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misc.cpp
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misc.cpp
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#include "regs.h"
#include "misc.h"
#include "DriverData.h"
#include <IOKit/IOLib.h>
#include <IOKit/audio/IOAudioDevice.h>
#include <IOKit/audio/IOAudioDefines.h>
#include "Phase88.h"
#include "cs8427.h"
#define MAUDIO_2496_ID 0x121434D6
#define MAUDIO_1010_ID 0x121430d6
#define MAUDIO_1010LT_ID 0x12143bd6
#define MAUDIO_DELTA44_ID 0x121433d6
#define MAUDIO_DELTA66_ID 0x121432d6
#define MAUDIO_DELTA_410_ID 0x121438d6
#define PHASE_88 0x3b155111
#define EWS88MT 0x3b151511
#define EWS88MT_2 0x3b152511
#define TS88PCI 0x3b157c11
#define EWX2496_ID 0x3b153011
/* Public functions in main.c */
void card_cleanup(struct CardData *card);
static void CreateParmsFor2496(struct CardData *card);
static void CreateParmsForDelta4466(struct CardData *card);
static void CreateParmsForDelta1010LT(struct CardData *card);
static void CreateParmsForEWX2496(struct CardData *card);
static void CreateParmsForDelta410(struct CardData *card);
void InitDigitalOut(struct CardData *card);
#define BIT_DEPTH 32
unsigned char ReadCCI(struct CardData *card, unsigned char address)
{
card->pci_dev->ioWrite8(CCS_ENVY_INDEX, address, card->iobase);
return card->pci_dev->ioRead8(CCS_ENVY_DATA, card->iobase);
}
void WriteCCI(struct CardData *card, unsigned char address, unsigned char data)
{
card->pci_dev->ioWrite8(CCS_ENVY_INDEX, address, card->iobase);
card->pci_dev->ioWrite8(CCS_ENVY_DATA, data, card->iobase);
}
void WritePartialMask8(IOPCIDevice *dev, IOMemoryMap *map, unsigned char reg, unsigned char shift, unsigned char mask, unsigned char val)
{
UInt8 tmp;
tmp = dev->ioRead8(reg, map);
tmp &= ~(mask << shift);
tmp |= val << shift;
dev->ioWrite8(reg, tmp, map);
}
void ClearMask8(IOPCIDevice *dev, IOMemoryMap *map, unsigned char reg, unsigned char mask)
{
UBYTE tmp;
tmp = dev->ioRead8(reg, map);
tmp &= ~mask;
dev->ioWrite8(reg, tmp, map);
}
void WriteMask8(IOPCIDevice *dev, IOMemoryMap *map, unsigned char reg, unsigned char mask)
{
UBYTE tmp;
tmp = dev->ioRead8(reg, map);
tmp |= mask;
dev->ioWrite8(reg, tmp, map);
}
void WritePartialMask(IOPCIDevice *dev, IOMemoryMap *map, unsigned char reg, unsigned long shift, unsigned long mask, unsigned long val)
{
ULONG tmp;
tmp = dev->ioRead32(reg, map);
tmp &= ~(mask << shift);
tmp |= val << shift;
dev->ioWrite32(reg, tmp, map);
}
void ClearMask(IOPCIDevice *dev, IOMemoryMap *map, unsigned long reg, unsigned long mask)
{
ULONG tmp;
tmp = dev->ioRead32(reg, map);
tmp &= ~mask;
dev->ioWrite32(reg, tmp, map);
}
void WriteMask(IOPCIDevice *dev, IOMemoryMap *map, unsigned long reg, unsigned long mask)
{
ULONG tmp;
tmp = dev->ioRead32(reg, map);
tmp |= mask;
dev->ioWrite32(reg, tmp, map);
}
void SetGPIOData(struct CardData *card, unsigned char data)
{
WriteCCI(card, CCI_GPIO_DATA, data);
}
void SaveGPIOStatus(struct CardData *card)
{
card->gpio_dir = ReadCCI(card, CCI_GPIO_DIR);
card->gpio_data = ReadCCI(card, CCI_GPIO_DATA);
}
void RestoreGPIOStatus(struct CardData *card)
{
WriteCCI(card, CCI_GPIO_DIR, card->gpio_dir);
WriteCCI(card, CCI_GPIO_DATA, card->gpio_data);
}
unsigned char GetGPIOData(struct CardData *card)
{
return ReadCCI(card, CCI_GPIO_DATA);
}
void WaitForI2C(IOPCIDevice *dev, struct CardData *card)
{
int Counter = 0;
for (Counter = 0; Counter < 1000; Counter++)
{
UInt8 status = dev->ioRead8(CCS_I2C_STATUS, card->iobase);
if ((status & CCS_I2C_BUSY) == 0)
{
//IOLog("Counter was %d\n", Counter);
return;
}
MicroDelay(32);
}
IOLog("WaitForI2C() failed!\n");
IOSleep(1000);
}
unsigned char ReadI2C(IOPCIDevice *dev, struct CardData *card, unsigned char addr)
{
UInt8 val;
WaitForI2C(dev, card);
dev->ioWrite8(CCS_I2C_ADDR, addr, card->iobase);
dev->ioWrite8(CCS_I2C_DEV_ADDRESS, 0xA0, card->iobase);
WaitForI2C(dev, card);
val = dev->ioRead8(CCS_I2C_DATA, card->iobase);
return val;
}
/*
* CS8427 via SPI mode (for Audiophile), emulated I2C
*/
/* send 8 bits */
static void ap_cs8427_write_byte(struct CardData *card, unsigned char data, unsigned char tmp)
{
int idx;
for (idx = 7; idx >= 0; idx--) {
tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
if (data & (1 << idx))
tmp |= ICE1712_DELTA_AP_DOUT;
WriteCCI(card, CCI_GPIO_DATA, tmp);
MicroDelay(5);
tmp |= ICE1712_DELTA_AP_CCLK;
WriteCCI(card, CCI_GPIO_DATA, tmp);
MicroDelay(5);
}
}
/* read 8 bits */
static unsigned char ap_cs8427_read_byte(struct CardData *card, unsigned char tmp)
{
unsigned char data = 0;
int idx;
for (idx = 7; idx >= 0; idx--) {
tmp &= ~ICE1712_DELTA_AP_CCLK;
WriteCCI(card, CCI_GPIO_DATA, tmp);
MicroDelay(5);
if (ReadCCI(card, CCI_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
data |= 1 << idx;
tmp |= ICE1712_DELTA_AP_CCLK;
WriteCCI(card, CCI_GPIO_DATA, tmp);
MicroDelay(5);
}
return data;
}
/* assert chip select */
static unsigned char ap_cs8427_codec_select(struct CardData *card)
{
unsigned char tmp;
tmp = ReadCCI(card, CCI_GPIO_DATA);
/*switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTA1010LT:
tmp &= ~ICE1712_DELTA_1010LT_CS;
tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
break;
case ICE1712_SUBDEVICE_AUDIOPHILE:
case ICE1712_SUBDEVICE_DELTA410:*/
tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
/*break;
case ICE1712_SUBDEVICE_VX442:
tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
tmp &= ~ICE1712_VX442_CS_DIGITAL;
break;
}*/
WriteCCI(card, CCI_GPIO_DATA, tmp);
MicroDelay(5);
IOLog("ap_cs8427_codec_select done!\n");
return tmp;
}
/* deassert chip select */
static void ap_cs8427_codec_deassert(struct CardData *card, unsigned char tmp)
{
/*switch (ice->eeprom.subvendor) {
case ICE1712_SUBDEVICE_DELTA1010E:
case ICE1712_SUBDEVICE_DELTA1010LT:
tmp &= ~ICE1712_DELTA_1010LT_CS;
tmp |= ICE1712_DELTA_1010LT_CS_NONE;
break;
case ICE1712_SUBDEVICE_AUDIOPHILE:
case ICE1712_SUBDEVICE_DELTA410:*/
tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
/*break;
case ICE1712_SUBDEVICE_VX442:
tmp |= ICE1712_VX442_CS_DIGITAL;
break;
}*/
WriteCCI(card, CCI_GPIO_DATA, tmp);
}
/* sequential write */
static int ap_cs8427_sendbytes(struct CardData *card, unsigned char *bytes, int count)
{
int res = count;
unsigned char tmp;
//mutex_lock(&ice->gpio_mutex);
tmp = ap_cs8427_codec_select(card);
ap_cs8427_write_byte(card, (0x10 << 1) | 0, tmp); /* address + write mode */
while (count-- > 0)
ap_cs8427_write_byte(card, *bytes++, tmp);
ap_cs8427_codec_deassert(card, tmp);
//mutex_unlock(&ice->gpio_mutex);
return res;
}
/* sequential read */
static int ap_cs8427_readbytes(struct CardData *card, unsigned char *bytes, int count)
{
int res = count;
unsigned char tmp;
//mutex_lock(&ice->gpio_mutex);
tmp = ap_cs8427_codec_select(card);
ap_cs8427_write_byte(card, (0x10 << 1) | 1, tmp); /* address + read mode */
while (count-- > 0)
*bytes++ = ap_cs8427_read_byte(card, tmp);
ap_cs8427_codec_deassert(card, tmp);
//mutex_unlock(&ice->gpio_mutex);
return res;
}
#if 0
static int ap_cs8427_probeaddr(struct CardData *card, unsigned short addr)
{
if (addr == 0x10)
return 1;
return -1;
}
#endif
int snd_cs8427_reg_write(struct CardData *card, unsigned char reg,
unsigned char val)
{
int err;
unsigned char buf[2];
buf[0] = reg & 0x7f;
buf[1] = val;
if ((err = ap_cs8427_sendbytes(card, buf, 2)) != 2) {
IOLog("unable to send bytes 0x%02x:0x%02x to CS8427 (%i)\n", buf[0], buf[1], err);
return err < 0 ? err : -1;
}
return 0;
}
static int snd_cs8427_reg_read(struct CardData *card, unsigned char reg)
{
int err;
unsigned char buf;
if ((err = ap_cs8427_sendbytes(card, ®, 1)) != 1) {
IOLog("unable to send register 0x%x byte "
"to CS8427\n", reg);
return err < 0 ? err : -1;
}
if ((err = ap_cs8427_readbytes(card, &buf, 1)) != 1) {
IOLog("unable to read register 0x%x byte "
"from CS8427\n", reg);
return err < 0 ? err : -1;
}
return buf;
}
/*
* Reset the chip using run bit, also lock PLL using ILRCK and
* put back AES3INPUT. This workaround is described in latest
* CS8427 datasheet, otherwise TXDSERIAL will not work.
*/
#if 0
static void snd_cs8427_reset(struct CardData *card)
{
//struct cs8427 *chip;
//unsigned long end_time;
int aes3input = 0;
unsigned char val;
//if (snd_BUG_ON(!cs8427))
// return;
//chip = cs8427->private_data;
//snd_i2c_lock(cs8427->bus);
//if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
// CS8427_RXDAES3INPUT) /* AES3 bit is set */
//aes3input = 1;
val = 0;
snd_cs8427_reg_write(card, CS8427_REG_CLOCKSOURCE, val);
MicroDelay(200);
val |= CS8427_RUN | CS8427_RXDILRCK;
snd_cs8427_reg_write(card, CS8427_REG_CLOCKSOURCE, val);
MicroDelay(200);
//snd_i2c_unlock(cs8427->bus);
/*end_time = jiffies + chip->reset_timeout;
while (time_after_eq(end_time, jiffies)) {
//snd_i2c_lock(cs8427->bus);
data = snd_cs8427_reg_read(card, CS8427_REG_RECVERRORS);
//snd_i2c_unlock(cs8427->bus);
if (!(data & CS8427_UNLOCK))
break;
schedule_timeout_uninterruptible(1);
}*/
//snd_i2c_lock(cs8427->bus);
val &= ~CS8427_RXDMASK;
//if (aes3input)
// chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
snd_cs8427_reg_write(card, CS8427_REG_CLOCKSOURCE, val);
//snd_i2c_unlock(cs8427->bus);
}
#endif
/******************************************************************************
** DriverData allocation ******************************************************
******************************************************************************/
// This code used to be in _AHIsub_AllocAudio(), but since we're now
// handling CAMD support too, it needs to be done at driver loading
// time.
struct CardData*
AllocDriverData( IOPCIDevice * dev, struct CardData *card )
{
card->SavedMask = 0;
card->SPDIF_RateSupported = false;
/* Initialize chip */
if( card_init( card ) < 0 )
{
return NULL;
}
card->card_initialized = TRUE;
card->input = 0;
card->output = 0;
return card;
}
/******************************************************************************
** DriverData deallocation ****************************************************
******************************************************************************/
// And this code used to be in _AHIsub_FreeAudio().
void
FreeDriverData( struct CardData* card )
{
if( card != NULL )
{
}
}
static unsigned char initvals1[] = {
CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
/* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
TCBL=output */
CS8427_SWCLK | CS8427_TCBLDIR,
/* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
normal stereo operation */
0x00,
/* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
Rx=>serial */
CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
/* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
output time base = OMCK, input time base = recovered input clock,
recovered input clock source is ILRCK changed to AES3INPUT
(workaround, see snd_cs8427_reset) */
CS8427_RXDILRCK,
/* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
24-bit, 64*Fsi */
CS8427_SIDEL | CS8427_SILRPOL,
/* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
= I2S, 24-bit, 64*Fsi */
CS8427_SODEL | CS8427_SOLRPOL,
};
static unsigned char initvals2[] = {
CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
/* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
biphase, parity status bits */
/* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
0xff, /* set everything */
/* CS8427_REG_CSDATABUF:
Registers 32-55 window to CS buffer
Inhibit D->E transfers from overwriting first 5 bytes of CS data.
Inhibit D->E transfers (all) of CS data.
Allow E->F transfer of CS data.
One byte mode; both A/B channels get same written CB data.
A channel info is output to chip's EMPH* pin. */
CS8427_CBMR | CS8427_DETCI,
/* CS8427_REG_UDATABUF:
Use internal buffer to transmit User (U) data.
Chip's U pin is an output.
Transmit all O's for user data.
Inhibit D->E transfers.
Inhibit E->F transfers. */
CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
};
#define SNDRV_PCM_DEFAULT_CON_SPDIF (IEC958_AES0_CON_EMPHASIS_NONE|\
(IEC958_AES1_CON_ORIGINAL<<8)|\
(IEC958_AES1_CON_PCM_CODER<<8)|\
(IEC958_AES3_CON_FS_48000<<24))
// ----------- OSS
#define BIT0 0x01
#define BIT1 0x02
#define BIT2 0x04
#define BIT3 0x08
#define BIT4 0x10
#define BIT5 0x20
#define BIT6 0x40
#define BIT7 0x80
#define CDC_CLK 1 /* Clock input to the CODEC's, rising edge clocks data. */
#define CDC_DIN 2 /* Data input to Envy from the CODEC. */
#define CDC_DOUT 3 /* Data output from Envy to the CODEC. */
#define DIG_CS 4 /* Chip select (0=select) for the SPDIF tx/rx. */
#define CDC_CS 5 /* Chip select (0=select) for the CODEC. */
#define D410_MUTE 7 /* Delta 410 codec mute */
#define CS_ASSERT 0 /* Asserted chip select (selects are inverted). */
#define CS_RELEASE 1 /* Idle chip select (selects are inverted). */
#define CS8_CLK CDC_CLK
#define CS8_DIN CDC_DIN
#define CS8_DOUT CDC_DOUT
#define CS8_CS DIG_CS
#define CS_1 CS_ASSERT
#define CS_0 CS_RELEASE
#define CS8_ADDR 0x20 /* Chip SPI/I2C address */
#define CS8_RD 0x01
#define CS8_WR 0x00
#define EWX_DIG_CS 0
#define EWX_CDC_CLK 5
#define EWX_CDC_DOUT 4
#define EWX_CDC_DIN EWX_CDC_DOUT
#define EWX_IIC_WRITE 3
#define CX_ASSERT 0 /* Asserted chip select (selects are inverted). */
#define CX_RELEASE 1 /* Idle chip select (selects are inverted). */
void
WriteGPIObit (struct CardData *card, int sel, int what)
{
unsigned char gpio;
gpio = ReadCCI(card, 0x20);
gpio &= ~(1 << sel);
gpio |= (what << sel);
WriteCCI(card, 0x20, gpio);
}
int
ReadGPIObit (struct CardData *card, int sel)
{
unsigned char gpio;
gpio = ReadCCI(card, 0x20);
return !!(gpio & (1 << sel));
}
#define write_cs8427_spdif_reg write_ap_spdif_reg
static void
write_ap_spdif_reg (struct CardData *card, int bRegister, int bData)
/*
*****************************************************************************
* Writes a byte to a specific register of the Delta-AP S/PDIF chip.
* Register must be (0..55).
****************************************************************************/
{
unsigned char bMask;
unsigned char bSPI;
/* Assert the CODEC chip select and wait at least 150 nS. */
/* */
WriteGPIObit (card, CDC_CS, CS_0);
WriteGPIObit (card, CS8_CS, CS_1);
/* Write the SPI address/cmd byte. */
/* */
bSPI = CS8_ADDR | CS8_WR;
/* */
for (bMask = 0x80; bMask; bMask = (bMask >> 1) & 0x7F)
{
/* Drop SPI clock low. */
WriteGPIObit (card, CS8_CLK, 0);
/* Write current data bit. */
if (bMask & bSPI)
WriteGPIObit (card, CS8_DOUT, 1);
else
WriteGPIObit (card, CS8_DOUT, 0);
/* Raise SPI clock to "clock data in". */
WriteGPIObit (card, CS8_CLK, 1);
}
/* Write the address (MAP) byte. */
/* */
for (bMask = 0x80; bMask; bMask = (bMask >> 1) & 0x7F)
{
/* Drop SPI clock low. */
WriteGPIObit (card, CS8_CLK, 0);
/* Write current data bit. */
if (bMask & bRegister)
WriteGPIObit (card, CS8_DOUT, 1);
else
WriteGPIObit (card, CS8_DOUT, 0);
/* Raise SPI clock to "clock data in". */
WriteGPIObit (card, CS8_CLK, 1);
}
/* Write the data byte. */
/* */
for (bMask = 0x80; bMask; bMask = (bMask >> 1) & 0x7F)
{
/* Drop SPI clock low. */
WriteGPIObit (card, CS8_CLK, 0);
/* Write current data bit. */
if (bMask & bData)
WriteGPIObit (card, CS8_DOUT, 1);
else
WriteGPIObit (card, CS8_DOUT, 0);
/* Raise SPI clock to "clock data in". */
WriteGPIObit (card, CS8_CLK, 1);
}
/* De-assert chip select. */
/* */
WriteGPIObit (card, CS8_CS, CS_0);
}
static int
read_cs8427_spdif_reg (struct CardData *card, int bRegister)
/*
*****************************************************************************
* Reads a byte from a specific CS8427 register.
****************************************************************************/
{
unsigned char bMask;
unsigned char bRet = 0;
unsigned char bSPI;
/****** WRITE MAP ADDRESS FIRST ******/
/* Drop the chip select low. */
/* Wait at least 150 nS. */
/* */
WriteGPIObit (card, DIG_CS, CS_ASSERT);
/* Write the SPI address/cmd byte. */
/* */
bSPI = CS8_ADDR + CS8_WR; /* SPI address field plus WRITE operation. */
/* */
for (bMask = 0x80; bMask; bMask = (bMask >> 1) & 0x7F)
{
/* Drop clock (GPIO5) low. */
WriteGPIObit (card, CDC_CLK, 0);
/* Write current data bit. */
if (bMask & bSPI)
WriteGPIObit (card, CDC_DOUT, 1);
else
WriteGPIObit (card, CDC_DOUT, 0);
/* Raise clock (GPIO5). */
WriteGPIObit (card, CDC_CLK, 1);
}
/* Write the address (MAP) byte. */
/* */
for (bMask = 0x80; bMask; bMask = (bMask >> 1) & 0x7F)
{
/* Drop clock (GPIO5) low. */
WriteGPIObit (card, CDC_CLK, 0);
/* Write current data bit. */
if (bMask & bRegister)
WriteGPIObit (card, CDC_DOUT, 1);
else
WriteGPIObit (card, CDC_DOUT, 0);
/* Raise clock (GPIO5). */
WriteGPIObit (card, CDC_CLK, 1);
}
/* De-assert chip select(s). */
/* */
WriteGPIObit (card, DIG_CS, CS_RELEASE);
/****** NOW READ THE DATA ******/
/* Drop the chip select low. */
/* Wait at least 150 nS. */
/* */
WriteGPIObit (card, DIG_CS, CS_ASSERT);
/* Write the SPI address/cmd byte. */
/* */
bSPI = CS8_ADDR + CS8_RD; /* SPI address field plus READ operation. */
/* */
for (bMask = 0x80; bMask; bMask = (bMask >> 1) & 0x7F)
{
/* Drop clock (GPIO5) low. */
WriteGPIObit (card, CDC_CLK, 0);
/* Write current data bit. */
if (bMask & bSPI)
WriteGPIObit (card, CDC_DOUT, 1);
else
WriteGPIObit (card, CDC_DOUT, 0);
/* Raise clock (GPIO5). */
WriteGPIObit (card, CDC_CLK, 1);
}
/* Read the data byte. */
/* */
bRet = 0;
/* */
for (bMask = 0x80; bMask; bMask = (bMask >> 1) & 0x7F)
{
/* Drop clock low. */
WriteGPIObit (card, CDC_CLK, 0);
/* Read current data bit. */
if (ReadGPIObit (card, CDC_DIN))
bRet |= bMask;
/* Raise clock. */
WriteGPIObit (card, CDC_CLK, 1);
}
/* De-assert chip selects. */
/* */
WriteGPIObit (card, DIG_CS, CS_RELEASE);
/* Return value. */
return bRet;
}
static void
lock_cs8427_spdif (struct CardData *card)
{
write_cs8427_spdif_reg (card, 18, read_cs8427_spdif_reg (card, 18) & ~BIT5);
write_cs8427_spdif_reg (card, 18, read_cs8427_spdif_reg (card, 18) | BIT2);
}
static void
unlock_cs8427_spdif (struct CardData *card)
{
write_cs8427_spdif_reg (card, 18, read_cs8427_spdif_reg (card, 18) & ~BIT2);
}
static unsigned char
bitswap (unsigned char bIn)
/*
*****************************************************************************
* Endian reversing routine.
****************************************************************************/
{
unsigned char bOut = 0;
unsigned char bImask = 0x01;
unsigned char bOmask = 0x80;
while (bImask)
{
if (bIn & bImask)
bOut |= bOmask;
bImask = bImask << 1;
bOmask = (bOmask >> 1) & 0x7F;
}
return bOut;
}
static unsigned char
ReadCsByte (struct CardData *card, unsigned char bByteNum)
/*
*****************************************************************************
* Reads a byte from Channel Status block buffer in CS8427.
*
* bByteNum is in the range (0..23)
*
* This routine assumes that CS8427 register 18 bit 5 is cleared so that the
* CS buffer is windowed, and that register 18 bit 2 is set so that CS output
* transfers are currently disabled.
****************************************************************************/
{
unsigned char bTemp;
/* CS block window starts at reg #32... */
bTemp = read_cs8427_spdif_reg (card, bByteNum + 32);
/* CS block access is reverse endian. */
return bitswap (bTemp);
}
static void
WriteCsByte (struct CardData *card, unsigned char bByteNum, unsigned char bData)
/*
*****************************************************************************
* Writes a byte to Channel Status block buffer in CS8427.
*
* bByteNum is in the range (0..23)
*
* This routine assumes that CS8427 register 18 bit 5 is cleared so that the
* CS buffer is windowed, and that register 18 bit 2 is set so that CS output
* transfers are currently disabled.
****************************************************************************/
{
/* CS block access is reverse endian. */
bData = bitswap (bData);
/* CS Window starts at reg #32... */
write_cs8427_spdif_reg (card, bByteNum + 32, bData);
}
void
InitConsumerModeCS (struct CardData *card)
{
int i;
/* Set CS8427 registers 32-55 to window CS block, and disable CS output. */
lock_cs8427_spdif (card);
/* Zero all the general CS bits. */
/* */
for (i = 0; i < 24; i++)
WriteCsByte (card, i, 0x00);
/* */
/* Consumer (usually SPDIF or AC3) mode static bit settings. */
/* */
WriteCsByte (card, 0, 0x00); /* Consumer format (bit0 = 0). */
WriteCsByte (card, 1, 0x02); /* Category = PCM encoder/decoder. */
unlock_cs8427_spdif (card);
}
void
init_cs8427_spdif (struct CardData *card)
{
int tmp;
/* Select iunternal sync */
write_cs8427_spdif_reg (card, 4, read_cs8427_spdif_reg (card, 4) & (~BIT0));
/*
*****************************************************************************
* Initializes core (mainly static) registers of the CS8427.
* Returns 1 if initialization OK, otherwise 0.
****************************************************************************/
/* Assumes Envy24 GPIO's have been initialized. They should be just fine */
/* in the Windows driver as they are initialized from EEPROM info. */
/* Verify device ID register. Must be 0x71. */
if ((tmp = read_cs8427_spdif_reg (card, 127)) != 0x71 && tmp != 0)
{
IOLog("Envy24: Unrecognized S/PDIF chip ID %02x\n",
read_cs8427_spdif_reg (card, 127));
IOLog(" Hardware stalled. Please reboot and try again.\n");
return;
}
/* Turn off RUN bit while making changes to configuration. */
write_cs8427_spdif_reg (card, 4, read_cs8427_spdif_reg (card, 4) & (~BIT6));
/* RMCK default function, set Validity, disable mutes, TCBL=output. */
write_cs8427_spdif_reg (card, 1, 0x01); /* validity* is BIT6. */
/* Hold last valid audio sample, RMCK=256*Fs, normal stereo operation. */
write_cs8427_spdif_reg (card, 2, 0x00);
/* Output drivers normal operation, Tx <== serial audio port, */
/* Rx ==> serial audio port. */
write_cs8427_spdif_reg (card, 3, 0x0C);
/* RUN off, OMCK=256xFs, output time base = OMCK, input time base = */
/* recovered input clock, recovered input clock source is Envy24. */
write_cs8427_spdif_reg (card, 4, 0x00);
/* Serial audio input port data format = I2S. */
write_cs8427_spdif_reg (card, 5, BIT2 | BIT0); /* SIDEL=1, SILRPOL=1. */
/* Serial audio output port data format = I2S. */
write_cs8427_spdif_reg (card, 6, BIT2 | BIT0); /* SODEL=1, SOLRPOL=1. */
/* Turn off CS8427 interrupt stuff that we don't implement in our hardware. */
write_cs8427_spdif_reg (card, 9, 0x00);
write_cs8427_spdif_reg (card, 10, 0x00);
write_cs8427_spdif_reg (card, 11, 0x00);
write_cs8427_spdif_reg (card, 12, 0x00);
write_cs8427_spdif_reg (card, 13, 0x00);
write_cs8427_spdif_reg (card, 14, 0x00);
/* Unmask the input PLL lock, V, confidence, biphase, parity status bits. */
write_cs8427_spdif_reg (card, 17,
(unsigned char) BIT4 | BIT3 | BIT2 | BIT1 | BIT0);
/* Registers 32-55 window to CS buffer. */
/* Inhibit D->E transfers from overwriting first 5 bytes of CS data. */
/* Inhibit D->E transfers (all) of CS data. */
/* Allow E->F transfers of CS data. */
/* One-byte mode: both A/B channels get same written CS data. */
/* A channel info is output to chip's EMPH* pin. */
/* */
write_cs8427_spdif_reg (card, 18, 0x18);
/* Use internal buffer to transmit User (U) data. */
/* Chip's U pin is an output. */
/* Transmit all 0's for user data. */
/* */
write_cs8427_spdif_reg (card, 19, 0x10);
IOLog("going to init consumer mode!\n");
/* Turn on chip's RUN bit, rock and roll! */
/* */
write_cs8427_spdif_reg (card, 4, read_cs8427_spdif_reg (card, 4) | BIT6);
InitConsumerModeCS (card);
}
static __inline__ void
WriteCsField (struct CardData *card, unsigned char bByteNum,
unsigned short bMask, unsigned short bBits)
{
/* Get current reg value. */
unsigned char bTemp = ReadCsByte (card, bByteNum);
/* Clear field to be written. */
bTemp &= ~(bMask);
/* Set new values. */
WriteCsByte (card, bByteNum, (unsigned char) (bTemp | (bBits & bMask)));
}
static void
envy24_setup_consumer_speed (struct CardData *card, int speed)
{
/*
* Set the sampling rate indication
*/
//if (card->ac3_mode)
// WriteCsField (card, 0, 0x02, 0x02); /* 1:1 = 1 */
//else
WriteCsField (card, 0, 0x02, 0x00); /* 1:1 = 0 */
switch (speed)
{
case 22050L:
WriteCsField (card, 0, 0xC0, 0x00); /* 7:6 = 00 */
WriteCsField (card, 3, 0x0F, 0x00); /* 3:0 = 0000 */
WriteCsField (card, 4, 0x0F, 0x09); /* 3:0 = 1001 */
break;
case 32000L:
WriteCsField (card, 0, 0xC0, 0xC0); /* 7:6 = 11 */
WriteCsField (card, 3, 0x0F, 0x03); /* 3:0 = 0011 */
WriteCsField (card, 4, 0x0F, 0x00); /* 3:0 = 0000 */
break;
case 44100L:
WriteCsField (card, 0, 0xC0, 0x40); /* 7:6 = 01 */
WriteCsField (card, 3, 0x0F, 0x00); /* 3:0 = 0000 */
WriteCsField (card, 4, 0x0F, 0x00); /* 3:0 = 0000 */
break;
case 48000L:
WriteCsField (card, 0, 0xC0, 0x80); /* 7:6 = 10 */
WriteCsField (card, 3, 0x0F, 0x02); /* 3:0 = 0010 */
WriteCsField (card, 4, 0x0F, 0x00); /* 3:0 = 0000 */
break;
case 88200L:
WriteCsField (card, 0, 0xC0, 0x00); /* 7:6 = 00 */
WriteCsField (card, 3, 0x0F, 0x00); /* 3:0 = 0000 */
WriteCsField (card, 4, 0x0F, 0x05); /* 3:0 = 0101 */
break;
case 96000L:
WriteCsField (card, 0, 0xC0, 0x00); /* 7:6 = 00 */
WriteCsField (card, 3, 0x0F, 0x00); /* 3:0 = 0000 */
WriteCsField (card, 4, 0x0F, 0x04); /* 3:0 = 0100 */
break;
default:
WriteCsField (card, 0, 0xC0, 0x00); /* 7:6 = 00 */
WriteCsField (card, 3, 0x0F, 0x00); /* 3:0 = 0000 */
WriteCsField (card, 4, 0x0F, 0x00); /* 3:0 = 0000 */
break;
}
}
static void
setup_consumer_mode (struct CardData *card)
{
WriteCsByte (card, 0, ReadCsByte (card, 0) & ~(0x02)); /* Set audio mode */