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Unfortunatele, I got error when execute tcu = Driver(pynqz1_ext4, overlay.axi_dma_0, debug=True).
The error is gone when the size of dram0_depth and dram1_depth are reduced to 2097152.
I need bigger size for dram_depth (such as 4194304) because this setting number successfully compile Resnet50v2 model for TCU, and create required files such as The manifest (tmodel), The Tensil program (tprog) and weights data (tdata).
@petrohi or anyone, Could you please give me some advices to fix this issue?. Thank you.
The text was updated successfully, but these errors were encountered:
According to the link, It is for Ultra96 board. Currently, I am working on Pynq-Z1 board. Is it safe for PynqZ1 board?
Please let me know, before I try it. Thank you.
I successfully create .bit and .hwh files for specific architecture on PynqZ1. The architecture in *.tarch is listed below:
{
"data_type": "FP16BP8",
"array_size": 8,
"dram0_depth": 4194304,
"dram1_depth": 4194304,
"local_depth": 10240,
"accumulator_depth": 4096,
"simd_registers_depth": 1,
"stride0_depth": 8,
"stride1_depth": 8,
"number_of_threads": 1,
"thread_queue_depth": 8
}
and for architecture,py file is listed below:
pynqz1_ext4 = Architecture(
data_type=DataType.FP16BP8,
array_size=8,
dram0_depth=4194304,
dram1_depth=4194304,
local_depth=10240,
accumulator_depth=4096,
simd_registers_depth=1,
stride0_depth=8,
stride1_depth=8,
number_of_threads=1,
thread_queue_depth=8,
)
Unfortunatele, I got error when execute tcu = Driver(pynqz1_ext4, overlay.axi_dma_0, debug=True).
The error is gone when the size of dram0_depth and dram1_depth are reduced to 2097152.
I need bigger size for dram_depth (such as 4194304) because this setting number successfully compile Resnet50v2 model for TCU, and create required files such as The manifest (tmodel), The Tensil program (tprog) and weights data (tdata).
@petrohi or anyone, Could you please give me some advices to fix this issue?. Thank you.
The text was updated successfully, but these errors were encountered: