RELEASE_NOTES

#
# Copyright (c) 2021 University of Cambridge
# All rights reserved.
#
# This software was developed by Stanford University and the University of Cambridge Computer Laboratory 
# under National Science Foundation under Grant No. CNS-0855268,
# the University of Cambridge Computer Laboratory under EPSRC INTERNET Project EP/H040536/1 and
# by the University of Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249 ("MRC2"), 
# as part of the DARPA MRC research programme,
# and by the University of Cambridge Computer Laboratory under EPSRC EARL Project
# EP/P025374/1 alongside support from Xilinx Inc.
#
# @NETFPGA_LICENSE_HEADER_START@
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#  http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# @NETFPGA_LICENSE_HEADER_END@
#
GIT VERSION 1.0.0

This release contains:
1. Designs
  - reference design for L2 switch, router, nic on Alveo series FPGA cards
    (e.g., U200, U250, U280) and VCU1525
  - Linux driver (open-nic-driver), hardware testing and simulation enviroments are included.
  - library cores to build reference_switch, reference_switch_lite, reference_router, 
    reference_nic and simulation and hardware testings

2. Notes
  - For U280 board, please use 320MHz for reference_switch_lite project to fix timing closure,
    and use 300MHz for reference_router project to fix timing closure
    To change the running freq., please refer to each tcl file.
    e.g., NetFPGA-PLUS/hw/projects/reference_switch_lite/hw/tcl/reference_switch_lite.tcl
  - scone is not fully tested.

3. Wiki
  - Please refer to our wiki: https://github.com/NetFPGA/NetFPGA-PLUS/wiki