New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

About x86 instruction set and RISC-V instruction set #65

Open

hz1490919302 opened this issue Apr 6, 2020 · 0 comments

hz1490919302 commented Apr 6, 2020

The Opensgx simulates hardware based on the x86 instruction set, is it possible to simulate hardware based on the RISC-V instruction set?

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment