diff --git a/repos/spack_repo/builtin/packages/namd/namd-cudalocalrecord-link-fix.patch b/repos/spack_repo/builtin/packages/namd/namd-cudalocalrecord-link-fix.patch
new file mode 100644
index 00000000000..36390d78ef8
--- /dev/null
+++ b/repos/spack_repo/builtin/packages/namd/namd-cudalocalrecord-link-fix.patch
@@ -0,0 +1,14 @@
+--- a/src/Sequencer.C
++++ b/src/Sequencer.C
+@@ -76,10 +76,8 @@
+ #define __thread __declspec(thread)
+ #endif
+ extern __thread DeviceCUDA *deviceCUDA;
+-#ifdef __IBMCPP__
+-// IBM compiler requires separate definition for static members
++// Required for C++11 toolchains when odr-used.
+ constexpr int CudaLocalRecord::num_inline_peer;
+-#endif
+ #endif
+ 
+ #define SPECIAL_PATCH_ID  91
diff --git a/repos/spack_repo/builtin/packages/namd/namd-hiparch-override.patch b/repos/spack_repo/builtin/packages/namd/namd-hiparch-override.patch
new file mode 100644
index 00000000000..655a8ab8817
--- /dev/null
+++ b/repos/spack_repo/builtin/packages/namd/namd-hiparch-override.patch
@@ -0,0 +1,24 @@
+--- a/arch/Linux-x86_64.hip
++++ b/arch/Linux-x86_64.hip
+@@ -15,12 +15,15 @@ endif
+ ROCMV = $(shell export HIP_PLATFORM=$(PLATFORM); $(HIPDIR)/bin/hipconfig -v | cut -d "." -f 1,2 )
+ 
+ ifeq ($(PLATFORM),amd)
+-    # set HIPARCH targets based on ROCMV
+-    ifeq (1,$(shell echo "$(ROCMV) >= 7.1" | bc))
+-        # We're dropping gfx1030 to avoid a rocPRIM issue for now
+-        HIPARCH = "gfx906,gfx908,gfx90a,gfx942,gfx950"
+-    else
+-        HIPARCH = "gfx906,gfx908,gfx90a,gfx1030"
++    # Allow callers (e.g. package managers) to override HIPARCH.
++    # When not provided, keep the original ROCm-version-based defaults.
++    ifeq ($(HIPARCH),)
++        ifeq (1,$(shell echo "$(ROCMV) >= 7.1" | bc))
++            # We're dropping gfx1030 to avoid a rocPRIM issue for now
++            HIPARCH = "gfx906,gfx908,gfx90a,gfx942,gfx950"
++        else
++            HIPARCH = "gfx906,gfx908,gfx90a,gfx1030"
++        endif
+     endif
+ endif
+ 
diff --git a/repos/spack_repo/builtin/packages/namd/package.py b/repos/spack_repo/builtin/packages/namd/package.py
index 18a1531b49e..dd7b810727f 100644
--- a/repos/spack_repo/builtin/packages/namd/package.py
+++ b/repos/spack_repo/builtin/packages/namd/package.py
@@ -26,6 +26,7 @@ class Namd(MakefilePackage, CudaPackage, ROCmPackage):
     maintainers("jcphill")
 
     version("master", branch="master")
+    version("3.0.2", sha256="0916700dec3342165b7ba2c3b5f99dcff767879d2a4931b5028dba47acd68bd5")
     version("3.0.1", sha256="3be0854545c45e58afb439a96708e127aef435d30113cc89adbab8f4b6888733")
     version(
         "2.14",
@@ -74,6 +75,10 @@ class Namd(MakefilePackage, CudaPackage, ROCmPackage):
     patch("inherited-member-2.14.patch", when="@2.14")
     # Handle change in python-config for python@3.8:
     patch("namd-python38.patch", when="interface=python ^python@3.8:")
+    # Allow Spack to drive HIP offload targets via HIPARCH.
+    patch("namd-hiparch-override.patch", when="@3.0.2: +rocm")
+    # Fix missing CudaLocalRecord::num_inline_peer symbol with C++11 HIP builds.
+    patch("namd-cudalocalrecord-link-fix.patch", when="@3.0.2: +rocm")
 
     depends_on("c", type="build")
     depends_on("cxx", type="build")
@@ -255,6 +260,16 @@ def _edit_arch(self, spec, prefix):
         if not self._edit_arch_target_based(spec, prefix):
             self._edit_arch_generic(spec, prefix)
 
+    def setup_build_environment(self, env):
+        if self.spec.satisfies("@3.0.2: +rocm"):
+            # Avoid leaking external PLATFORM into NAMD's HIP make logic.
+            # A leaked PLATFORM (e.g. linux) can bypass AMD autodetection and
+            # incorrectly inject CUDA defines/headers in ROCm-only builds.
+            env.unset("PLATFORM")
+            rocm_archs = self.spec.variants["amdgpu_target"].value
+            if "none" not in rocm_archs:
+                env.set("HIPARCH", ",".join(rocm_archs))
+
     def edit(self, spec, prefix):
         self._edit_arch(spec, prefix)