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According to the DRV8313PWPR documentation CPL and CPH should have a 0.01μF ceramic capacitor not a 0.1μF as in the schematic. It may not matter since the board obviously does work, I just don't know enough about charge pumps for FETs to determine that but it may have two different capacitors for a reason.
"Because the output stages use N-channel FETs, the device requires a gate-drive voltage higher than the VM
power supply to enhance the high-side FETs fully. The DRV8313 integrates a charge-pump circuit that generates
a voltage above the VM supply for this purpose.
The charge pump requires two external capacitors for operation. See the block diagram and pin descriptions for
details on these capacitors (value, connection, and so forth)."
The text was updated successfully, but these errors were encountered:
According to the DRV8313PWPR documentation CPL and CPH should have a 0.01μF ceramic capacitor not a 0.1μF as in the schematic. It may not matter since the board obviously does work, I just don't know enough about charge pumps for FETs to determine that but it may have two different capacitors for a reason.
"Because the output stages use N-channel FETs, the device requires a gate-drive voltage higher than the VM
power supply to enhance the high-side FETs fully. The DRV8313 integrates a charge-pump circuit that generates
a voltage above the VM supply for this purpose.
The charge pump requires two external capacitors for operation. See the block diagram and pin descriptions for
details on these capacitors (value, connection, and so forth)."
The text was updated successfully, but these errors were encountered: