diff --git a/.gitignore b/.gitignore new file mode 100644 index 000000000..fd87a392a --- /dev/null +++ b/.gitignore @@ -0,0 +1,2 @@ +build/ +isar/ diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml new file mode 100644 index 000000000..d5b4d5e69 --- /dev/null +++ b/.gitlab-ci.yml @@ -0,0 +1,24 @@ +image: kasproject/kas-isar:2.0 + +variables: + GIT_STRATEGY: clone + +all: + stage: build + script: + - export http_proxy=$HTTP_PROXY + - export https_proxy=$HTTPS_PROXY + - export ftp_proxy=$FTP_PROXY + - export no_proxy=$NO_PROXY + + # only needed as long as we depend on private ssh-based repos + - mkdir -m 0700 ~/.ssh + - echo "host *" > ~/.ssh/config + - echo "StrictHostKeyChecking no" >> ~/.ssh/config + - echo "$DEPLOY_KEY" > ~/.ssh/id_ed25519 + - chmod 0600 ~/.ssh/id_ed25519 + + - kas build kas-iot2050-example.yml + - kas build kas-iot2050-example.yml:kas/opt/preempt-rt.yml + - sudo rm -rf build/tmp + - kas build kas-iot2050-boot-advanced.yml diff --git a/CODE_OF_CONDUCT.md b/CODE_OF_CONDUCT.md new file mode 100644 index 000000000..12f2d469c --- /dev/null +++ b/CODE_OF_CONDUCT.md @@ -0,0 +1,61 @@ +# Contributor Covenant Code of Conduct + +## Our Pledge + +In the interest of fostering an open and welcoming environment, we as +contributors and maintainers pledge to making participation in our project and +our community a harassment-free experience for everyone, regardless of age, body +size, disability, ethnicity, gender identity and expression, level of experience, +nationality, personal appearance, race, religion, or sexual identity and +orientation. + +## Our Standards + +Examples of behavior that contributes to creating a positive environment +include: + +* Using welcoming and inclusive language +* Being respectful of differing viewpoints and experiences +* Gracefully accepting constructive criticism +* Focusing on what is best for the community +* Showing empathy towards other community members + +Examples of unacceptable behavior by participants include: + +* The use of sexualized language or imagery and unwelcome sexual attention or + advances +* Trolling, insulting/derogatory comments, and personal or political attacks +* Public or private harassment +* Publishing others' private information, such as a physical or electronic + address, without explicit permission +* Other conduct which could reasonably be considered inappropriate in a + professional setting + +## Our Responsibilities + +Project maintainers are responsible for clarifying the standards of acceptable +behavior and are expected to take appropriate and fair corrective action in +response to any instances of unacceptable behavior. + +Project maintainers have the right and responsibility to remove, edit, or +reject comments, commits, code, wiki edits, issues, and other contributions +that are not aligned to this Code of Conduct, or to ban temporarily or +permanently any contributor for other behaviors that they deem inappropriate, +threatening, offensive, or harmful. + +## Scope + +This Code of Conduct applies both within project spaces and in public spaces +when an individual is representing the project or its community. Examples of +representing a project or community include using an official project e-mail +address, posting via an official social media account, or acting as an appointed +representative at an online or offline event. Representation of a project may be +further defined and clarified by project maintainers. + +## Attribution + +This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4, +available at [http://contributor-covenant.org/version/1/4][version] + +[homepage]: http://contributor-covenant.org +[version]: http://contributor-covenant.org/version/1/4/ diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md new file mode 100644 index 000000000..040e454cb --- /dev/null +++ b/CONTRIBUTING.md @@ -0,0 +1,27 @@ +# Contributing + +We welcome contributions in several forms, e.g. + +* Sponsoring +* Documenting +* Testing +* Coding +* etc. + +Please read [14 Ways to Contribute to Open Source without Being a Programming Genius or a Rock Star](https://smartbear.com/blog/test-and-monitor/14-ways-to-contribute-to-open-source-without-being/ ). + +Please check issue page and look for unassigned ones or create a new one. + +Working together in an open and welcoming environment is the foundation of our +success, so please respect our [Code of Conduct](CODE_OF_CONDUCT.md). + +## Guidelines + +### Workflow + +We use the +[Feature Branch Workflow](https://www.atlassian.com/git/tutorials/comparing-workflows/feature-branch-workflow) +and review all changes we merge to master. + +We appreciate any contributions, so please use the [Forking Workflow](https://www.atlassian.com/git/tutorials/comparing-workflows/forking-workflow) +and send us `Merge Requests` diff --git a/COPYING.MIT b/COPYING.MIT new file mode 100644 index 000000000..e14c37141 --- /dev/null +++ b/COPYING.MIT @@ -0,0 +1,17 @@ +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. \ No newline at end of file diff --git a/MAINTAINERS b/MAINTAINERS new file mode 100644 index 000000000..92e040573 --- /dev/null +++ b/MAINTAINERS @@ -0,0 +1,5 @@ +Meta IOT2050 +M: Jan Kiszka +M: Bao Chengsu +M: Le Jin + diff --git a/README.md b/README.md new file mode 100644 index 000000000..b38de80e0 --- /dev/null +++ b/README.md @@ -0,0 +1,127 @@ +# META-IOT2050 + +This [Isar](https://github.com/ilbers/isar) layer contains recipes, +configuration and other artifacts that are specific to Debian-based +IOT2050 product. + +## Build example image + +Before building the system, you will need to install docker on build host. +For example under Debian Linux + +```shell +sudo apt install docker.io +``` + +Then build the example image + +```shell +./kas-docker --isar build kas-iot2050-example.yml +``` + +Build the example RT image, for example + +```shell +./kas-docker --isar build kas-iot2050-example.yml:kas/opt/preempt-rt.yml +``` + +Using 3rd-party mirrors, for example + +```shell +./kas-docker --isar build kas-iot2050-example.yml:kas/opt/mirror-example.yml +``` + +After build complete, the final image is under + +```text +build/tmp/deploy/images/iot2050/iot2050-image-example-isar-iot2050.wic.img +``` + +## Build user SDK +>>> +**Note:** Current SDK only supports Linux x86-64 host machine +>>> + +```shell +./kas-docker --isar build kas-iot2050-example.yml:kas/opt/sdk.yml +``` + +After build complete, the SDK tarball is located at + +```text +build/tmp/deploy/images/iot2050/sdk-isar-arm64.tar.xz +``` + +Please follow the further instruction file `README.sdk` under the SDK tarball + +## Clean build result + +```shell +./kas-docker --isar clean +``` + +## Build released version + +First checkout the desired tag. Then build the image or sdk by appending the `kas/opt/package-lock.yml`: + +```shell +# example image +./kas-docker --isar build kas-iot2050-example.yml:kas/opt/package-lock.yml + +# example rt image +./kas-docker --isar build kas-iot2050-example.yml:kas/opt/preempt-rt.yml:kas/opt/package-lock.yml + +# bootloader for advanced board +./kas-docker --isar build kas-iot2050-boot-advanced.yml:kas/opt/package-lock.yml + +# bootloader for basic board +./kas-docker --isar build kas-iot2050-boot-basic.yml:kas/opt/package-lock.yml + +# SDK +./kas-docker --isar build kas-iot2050-example.yml:kas/opt/sdk.yml:kas/opt/package-lock.yml +``` + +## Booting the Image from SD card + +Under Linux, insert an unused SD card. Assuming the SD card takes device +/dev/mmcblk0, use dd to copy the image to it. For example: + +```shell +$ sudo dd if=build/tmp/deploy/images/iot2050/iot2050-image-example-isar-iot2050.wic.img \ + of=/dev/mmcblk0 bs=4M oflag=sync +``` + +Alternatively, install the bmap-tools package and run the following command which is generally faster and safer: + +```shell +$ sudo bmaptool copy build/tmp/deploy/images/iot2050/iot2050-image-example-isar-iot2050.wic.img /dev/mmcblk0 +``` + +The example image starts with the IP 192.168.200.1 preconfigured on the first +Ethernet interface, and use DHCP at another. You can use ssh to connect to the system. + +The BSP image does not configure the network. If you want to ssh into the +system, you can use the root terminal via UART to ifconfig the IP address and +use that to ssh in. + +NOTE: To login, the default username and password is `root`. +And you are required to change the default password when first login. + +## Selecting a boot device + +By default, the boot loader will pick the first bootable device. If that device +may no longer fully start, you can select an alternative boot device in the +U-Boot shell. Attach a USB-UART adapter to X14, connect it to a host PC and +open a terminal program on that port. Reset the device and interrupt the boot +when it counts down ("Hit any key to stop autoboot"). Then type + +```shell +=> setenv boot_targets mmc0 +=> run distro_bootcmd +``` + +to boot from the microSD card. Use `usb0` for the first USB mass storage +device. + +NOTE: This selection is not persistent. The boot loader will fall back to its +default boot order after reset. diff --git a/classes/boot-flash-img.bbclass b/classes/boot-flash-img.bbclass new file mode 100644 index 000000000..5d4c66ce9 --- /dev/null +++ b/classes/boot-flash-img.bbclass @@ -0,0 +1,32 @@ +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# SPDX-License-Identifier: MIT + +BOOT_IMG_SIZE_KB ?= "8192" +BOOT_IMG_FILE = "${DEPLOY_DIR_IMAGE}/${IMAGE_FULLNAME}.bin" + +do_boot_img[stamp-extra-info] = "${DISTRO}-${MACHINE}" + +do_boot_flash_img() { + rm -f ${BOOT_IMG_FILE} + dd if=/dev/zero ibs=1k count=${BOOT_IMG_SIZE_KB} | tr "\000" "\377" > ${BOOT_IMG_FILE} + dd if=${BUILDCHROOT_DIR}/usr/lib/u-boot/${MACHINE}/tiboot3.bin of=${BOOT_IMG_FILE} seek=0 oflag=seek_bytes conv=notrunc + dd if=${BUILDCHROOT_DIR}/usr/lib/u-boot/${MACHINE}/tispl.bin of=${BOOT_IMG_FILE} seek=512K oflag=seek_bytes conv=notrunc + dd if=${BUILDCHROOT_DIR}/usr/lib/u-boot/${MACHINE}/u-boot.img of=${BOOT_IMG_FILE} seek=2560K oflag=seek_bytes conv=notrunc + # Env + dd if=/dev/zero ibs=1k count=128 of=${BOOT_IMG_FILE} seek=6656K oflag=seek_bytes conv=notrunc + # Env.bak + dd if=/dev/zero ibs=1k count=128 of=${BOOT_IMG_FILE} seek=6784K oflag=seek_bytes conv=notrunc + # SysFW + dd if=${BUILDCHROOT_DIR}/usr/lib/u-boot/${MACHINE}/sysfw.itb of=${BOOT_IMG_FILE} seek=6912K oflag=seek_bytes conv=notrunc + # PRU ethernet FW + dd if=${BUILDCHROOT_DIR}/usr/lib/u-boot/${MACHINE}/am65x-pru0-prueth-fw.elf of=${BOOT_IMG_FILE} seek=7936K oflag=seek_bytes conv=notrunc + dd if=${BUILDCHROOT_DIR}/usr/lib/u-boot/${MACHINE}/am65x-pru1-prueth-fw.elf of=${BOOT_IMG_FILE} seek=8000K oflag=seek_bytes conv=notrunc + dd if=${BUILDCHROOT_DIR}/usr/lib/u-boot/${MACHINE}/am65x-rtu0-prueth-fw.elf of=${BOOT_IMG_FILE} seek=8064K oflag=seek_bytes conv=notrunc + dd if=${BUILDCHROOT_DIR}/usr/lib/u-boot/${MACHINE}/am65x-rtu1-prueth-fw.elf of=${BOOT_IMG_FILE} seek=8128K oflag=seek_bytes conv=notrunc +} + +addtask boot_flash_img before do_build after do_copy_boot_files diff --git a/classes/meta-version.bbclass b/classes/meta-version.bbclass new file mode 100644 index 000000000..5c9ad77b1 --- /dev/null +++ b/classes/meta-version.bbclass @@ -0,0 +1,11 @@ +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# SPDX-License-Identifier: MIT + +get_meta_version() { + version=$(git describe --long --tag --dirty --always || echo unknown) + echo $version +} diff --git a/classes/npm.bbclass b/classes/npm.bbclass new file mode 100644 index 000000000..567fa6375 --- /dev/null +++ b/classes/npm.bbclass @@ -0,0 +1,232 @@ +# Copyright (c) Siemens AG, 2018-2019 +# +# SPDX-License-Identifier: MIT + +# HOWTO generate an npm-shrinkwrap.json: +# npm install --global-style +# cp package-lock.json /path/to/recipe/files/npm-shrinkwrap.json + +inherit dpkg-raw + +NPMPN ?= "${PN}" +NPM_SHRINKWRAP ?= "file://npm-shrinkwrap.json" +NPM_LOCAL_INSTALL_DIR ?= "" + +NPM_REBUILD ?= "1" + +ISAR_CROSS_COMPILE = "0" + +SRC_URI = "npm://registry.npmjs.org;name=${NPMPN};version=${PV} \ + ${NPM_SHRINKWRAP}" + +# function maps arch names to npm arch names +def npm_arch_map(target_arch, d): + import re + if re.match('p(pc|owerpc)(|64)', target_arch): return 'ppc' + elif re.match('i386$', target_arch): return 'ia32' + elif re.match('amd64$', target_arch): return 'x64' + return target_arch + +NPM_ARCH ?= "${@npm_arch_map(d.getVar('DISTRO_ARCH'), d)}" + +DEBIAN_NPM_PACKAGE ?= "npm" + +python() { + src_uri = (d.getVar('SRC_URI', True) or "").split() + if len(src_uri) == 0: + return + + new_src_uri = [] + npm_uri = None + for u in src_uri: + if u.startswith("npm://"): + if npm_uri: + bb.fatal("Only one npm package per recipe supported") + npm_uri = u + else: + new_src_uri.append(u) + + d.setVar('SRC_URI', ' '.join(new_src_uri)) + d.setVar('NPM_URI', npm_uri) + + type, host, path, user, pswd, params = bb.fetch2.decodeurl(npm_uri) + + if params['version'] != d.getVar('PV'): + bb.fatal("Mismatch between PV and version stored in registry") + + d.setVar('NPM_REGISTRY', "https://" + host) + + mapped_name = params['name'] + if mapped_name.startswith('@'): + mapped_name = mapped_name[1:].replace('/', '-') + d.setVar('NPM_MAPPED_NAME', mapped_name) +} + +def get_npm_bundled_tgz(d): + return "{0}-{1}-bundled.tgz".format(d.getVar('NPM_MAPPED_NAME'), + d.getVar('PV')) + +def runcmd(d, cmd, dir): + import subprocess + import os + + uid = os.geteuid() + gid = os.getegid() + chrootcmd = "sudo -E chroot --userspec={0}:{1} ".format(uid, gid) + chrootcmd += d.getVar('BUILDCHROOT_DIR') + chrootcmd += " sh -c 'cd {0}/{1}; {2}'".format(d.getVar('PP'), dir, cmd) + bb.note("Running " + chrootcmd) + (retval, output) = subprocess.getstatusoutput(chrootcmd) + if retval: + bb.fatal("Failed to run '{0}'{1}".format( + cmd, (":\n" + output) if output else "")) + bb.note(output) + +do_install_npm() { + dpkg_do_mounts + E="${@ bb.utils.export_proxies(d)}" + sudo -E chroot ${BUILDCHROOT_DIR} \ + apt-get update \ + -o Dir::Etc::sourcelist="sources.list.d/isar-apt.list" \ + -o Dir::Etc::sourceparts="-" \ + -o APT::Get::List-Cleanup="0" + sudo -E chroot ${BUILDCHROOT_DIR} \ + apt-get install \ + -y -o Debug::pkgProblemResolver=yes \ + --no-install-recommends ${DEBIAN_NPM_PACKAGE} + dpkg_undo_mounts +} +do_install_npm[depends] += "${@d.getVarFlag('do_apt_fetch', 'depends')}" +do_install_npm[depends] += "npm:do_deploy_deb" +do_install_npm[lockfiles] += "${REPO_ISAR_DIR}/isar.lock" + +addtask install_npm before do_fetch + +python fetch_npm() { + import json, os, shutil + + workdir = d.getVar('WORKDIR'); + tmpdir = workdir + "/fetch-tmp" + shrinkwarp_url = d.getVar('NPM_SHRINKWRAP') + + try: + fetch = bb.fetch2.Fetch([shrinkwarp_url], d) + fetch.unpack(workdir) + except bb.fetch2.BBFetchException as e: + bb.fatal(str(e)) + + shrinkwarp_path = fetch.localpath(shrinkwarp_url) + filelist = shrinkwarp_path + ":True" + checksum_list = bb.fetch2.get_file_checksums(filelist, d.getVar('PN')) + _, shrinkwarp_chksum = checksum_list[0] + + bundled_tgz = d.getVar('DL_DIR') + "/" + get_npm_bundled_tgz(d) + bundled_tgz_hash = bundled_tgz + ".hash" + + fetch_hash = d.getVar('NPM_URI') + "\n" + \ + shrinkwarp_url + " " + shrinkwarp_chksum + "\n" + + if os.path.exists(bundled_tgz) and os.path.exists(bundled_tgz_hash): + with open(bundled_tgz_hash) as hash_file: + hash = hash_file.read() + if hash == fetch_hash: + return + + bb.build.exec_func("dpkg_do_mounts", d) + bb.utils.export_proxies(d) + + old_cwd = os.getcwd() + os.chdir(tmpdir) + + shutil.copyfile(shrinkwarp_path, "npm-shrinkwrap.json") + + # changing the home directory to the tmpdir directory, the .npmrc will + # be created in this directory + os.environ['HOME'] = d.getVar('PP') + "/fetch-tmp" + + os.environ.update({'npm_config_registry': d.getVar('NPM_REGISTRY')}) + + npmpn = d.getVar('NPMPN') + + with open("package.json", 'w') as outfile: + json_objs = {'dependencies': { npmpn: '' }} + json.dump(json_objs, outfile, indent=2) + + runcmd(d, "npm ci --global-style --ignore-scripts --verbose", "fetch-tmp") + + os.chdir("node_modules/" + npmpn) + + with open("package.json") as infile: + json_objs = json.load(infile) + + deps = [d for d in json_objs['dependencies']] + json_objs.update({'bundledDependencies': deps}) + + # update package.json so that all dependencies are bundled + with open("package.json", 'w') as outfile: + json.dump(json_objs, outfile, indent=2) + + runcmd(d, "npm pack --ignore-scripts --verbose", + "fetch-tmp/node_modules/" + npmpn) + + shutil.copyfile("%s-%s.tgz" % (d.getVar('NPM_MAPPED_NAME'), d.getVar('PV')), + bundled_tgz) + with open(bundled_tgz_hash, 'w') as hash_file: + hash_file.write(fetch_hash) + + os.chdir(old_cwd) + bb.build.exec_func("dpkg_undo_mounts", d) +} +do_fetch[postfuncs] += "fetch_npm" +do_fetch[cleandirs] += "${WORKDIR}/fetch-tmp" + +python clean_npm() { + import os + + bundled_tgz = d.getVar('DL_DIR') + "/" + get_npm_bundled_tgz(d) + if os.path.exists(bundled_tgz): + os.remove(bundled_tgz) + + bundled_tgz_hash = bundled_tgz + ".hash" + if os.path.exists(bundled_tgz_hash): + os.remove(bundled_tgz_hash) +} +do_cleanall[postfuncs] += "clean_npm" + +do_install() { + dpkg_do_mounts + + # changing the home directory to the working directory, the .npmrc will + # be created in this directory + export HOME=${PP} + + # ensure empty cache + export npm_config_cache=${PP}/npm_cache + sudo rm -rf ${WORKDIR}/npm_cache + + export npm_config_nodedir=${PP}/image/usr/ + + INSTALL_FLAGS="--offline --only=production --no-package-lock --verbose \ + --arch=${NPM_ARCH} --target_arch=${NPM_ARCH}" + + if [ -n "${NPM_LOCAL_INSTALL_DIR}" ]; then + mkdir -p ${D}/${NPM_LOCAL_INSTALL_DIR} + CHDIR=${PP}/image/${NPM_LOCAL_INSTALL_DIR} + else + CHDIR=/ + INSTALL_FLAGS="$INSTALL_FLAGS --prefix ${PP}/image/usr -g" + fi + + if [ -n "${NPM_REBUILD}" ]; then + INSTALL_FLAGS="$INSTALL_FLAGS --build-from-source" + fi + + export CHDIR INSTALL_FLAGS + sudo -E chroot --userspec=$(id -u):$(id -g) ${BUILDCHROOT_DIR} sh -c ' \ + cd $CHDIR + echo $npm_config_nodedir + npm install $INSTALL_FLAGS /downloads/${@get_npm_bundled_tgz(d)} + ' + + dpkg_undo_mounts +} diff --git a/conf/distro/debian-snapshot.list b/conf/distro/debian-snapshot.list new file mode 100644 index 000000000..e78f7d187 --- /dev/null +++ b/conf/distro/debian-snapshot.list @@ -0,0 +1,8 @@ +deb [check-valid-until=no] http://snapshot.debian.org/archive/debian/20200117T150411Z/ buster main contrib non-free +deb-src [check-valid-until=no] http://snapshot.debian.org/archive/debian/20200117T150411Z/ buster main contrib non-free + +deb [check-valid-until=no] http://snapshot.debian.org/archive/debian-security/20200117T184524Z/ buster/updates main contrib non-free +deb-src [check-valid-until=no] http://snapshot.debian.org/archive/debian-security/20200117T184524Z/ buster/updates main contrib non-free + +deb [check-valid-until=no] http://snapshot.debian.org/archive/debian/20200117T150411Z/ buster-updates main contrib non-free +deb-src [check-valid-until=no] http://snapshot.debian.org/archive/debian/20200117T150411Z/ buster-updates main contrib non-free diff --git a/conf/distro/isar.conf b/conf/distro/isar.conf new file mode 100644 index 000000000..ecd6bc685 --- /dev/null +++ b/conf/distro/isar.conf @@ -0,0 +1,39 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +require conf/distro/debian-buster.conf + +DISTRO_NAME = "IOT2050 Debian System" + +PREFERRED_PROVIDER_u-boot-${MACHINE} ?= "u-boot" +PREFERRED_PROVIDER_u-boot-tools ?= "u-boot" + +KERNEL_NAME ?= "cip" + +PREFERRED_VERSION_customizations ?= "0.1-iot2050-debian" +PREFERRED_VERSION_customizations-debug ?= "0.1-iot2050-debian" + +OVERRIDES .= ':${PACKAGES_SELECTION}' + +# packages-mainline: Use the mainline debian packages +# packages-snapshot: Use the snapshot debian packages +PACKAGES_SELECTION ?= "packages-mainline" + +DISTRO_APT_SOURCES_MAINLINE_LIST := "${DISTRO_APT_SOURCES}" +DISTRO_APT_SOURCES_SNAPSHOT_LIST ?= "conf/distro/debian-snapshot.list" + +DISTRO_APT_SOURCES_append_packages-snapshot = " ${DISTRO_APT_SOURCES_SNAPSHOT_LIST}" +DISTRO_APT_SOURCES_remove_packages-snapshot = "${DISTRO_APT_SOURCES_MAINLINE_LIST}" + +HOST_DISTRO_APT_SOURCES_append_packages-snapshot = " ${DISTRO_APT_SOURCES_SNAPSHOT_LIST}" +HOST_DISTRO_APT_SOURCES_remove_packages-snapshot = "${DISTRO_APT_SOURCES_MAINLINE_LIST}" + +# Required as long as openssl is not rebuilt for the host arch +HOST_DISTRO_APT_PREFERENCES = "conf/distro/preferences.upstream-libssl" diff --git a/conf/distro/preferences.upstream-libssl b/conf/distro/preferences.upstream-libssl new file mode 100644 index 000000000..f488cddf0 --- /dev/null +++ b/conf/distro/preferences.upstream-libssl @@ -0,0 +1,3 @@ +Package: libssl*:* +Pin: release n=isar +Pin-Priority: -1 diff --git a/conf/layer.conf b/conf/layer.conf new file mode 100644 index 000000000..ded1e1ad7 --- /dev/null +++ b/conf/layer.conf @@ -0,0 +1,24 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +BBPATH .= ":${LAYERDIR}" + +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "meta-iot2050" +BBFILE_PATTERN_meta-iot2050 = "^${LAYERDIR}/recipes-" +BBFILE_PRIORITY_meta-iot2050 = "6" + +LAYERSERIES_COMPAT_meta-iot2050 = "next" + +LAYERDIR_meta-iot2050 = "${LAYERDIR}" + +ISAR_RELEASE_CMD = "git -C ${LAYERDIR_meta-iot2050} describe --long --tags --dirty --always || echo unknown" diff --git a/conf/machine/iot2050.conf b/conf/machine/iot2050.conf new file mode 100644 index 000000000..5a8d18aa7 --- /dev/null +++ b/conf/machine/iot2050.conf @@ -0,0 +1,31 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +DISTRO_ARCH ?= "arm64" + +HOST_DISTRO ?= "debian-buster" + +PREFERRED_PROVIDER_u-boot-${MACHINE} = "u-boot-iot2050" +PREFERRED_PROVIDER_u-boot-tools = "u-boot-iot2050" +U_BOOT_TOOLS_PACKAGE = "1" + +IMAGE_BOOT_FILES = "u-boot.img tiboot3.bin tispl.bin sysfw.itb \ + am65x-pru0-prueth-fw.elf \ + am65x-pru1-prueth-fw.elf \ + am65x-rtu0-prueth-fw.elf \ + am65x-rtu1-prueth-fw.elf" +KERNEL_NAME ?= "iot2050" + +IMAGE_TYPE ?= "wic-img" +WKS_FILE ?= "iot2050" +IMAGER_INSTALL += "u-boot-iot2050" +IMAGER_BUILD_DEPS += "u-boot-iot2050" + +IMAGE_INSTALL += "u-boot-script" diff --git a/isar-patches/0005-sdkchroot-Add-support-for-adding-self-defined-sdk-pa.patch b/isar-patches/0005-sdkchroot-Add-support-for-adding-self-defined-sdk-pa.patch new file mode 100644 index 000000000..ee64c4c8a --- /dev/null +++ b/isar-patches/0005-sdkchroot-Add-support-for-adding-self-defined-sdk-pa.patch @@ -0,0 +1,84 @@ +From 474ed5e64a311c861761d46a723e1bfef3bab973 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Thu, 19 Mar 2020 15:35:00 +0100 +Subject: [PATCH 1/6] sdk: Add support for adding self-defined sdk packages + +We do not yet have a good algorithm for automatically adding build +dependencies to the sdk beyond the basic set, let's allow users to +append what they need by appending SDK_PREINSTALL. Analogously to other +images, also allow to install self-built packages, consequently using +SDK_INSTALL. + +Based on original patch by Le Jin. + +Signed-off-by: Jan Kiszka +--- + doc/user_manual.md | 1 + + meta/recipes-devtools/sdkchroot/sdkchroot.bb | 25 +++++++++++++++---------- + 2 files changed, 16 insertions(+), 10 deletions(-) + +diff --git a/doc/user_manual.md b/doc/user_manual.md +index 0582ac74..6d95f26b 100644 +--- a/doc/user_manual.md ++++ b/doc/user_manual.md +@@ -744,6 +744,7 @@ target binary artifacts. Developer chroots to sdk rootfs and develops applicatio + + User manually triggers creation of SDK root filesystem for his target platform by launching the task `do_populate_sdk` for target image, f.e. + `bitbake -c do_populate_sdk mc:${MACHINE}-${DISTRO}:isar-image-base`. ++Packages that should be additionally installed into the SDK can be appended to `SDK_PREINSTALL` (external repositories) and `SDK_INSTALL` (self-built). + + The resulting SDK rootfs is archived into `tmp/deploy/images/${MACHINE}/sdk-${DISTRO}-${DISTRO_ARCH}.tar.xz`. + It is additionally available for direct use under `tmp/deploy/images/${MACHINE}/sdk-${DISTRO}-${DISTRO_ARCH}/`. +diff --git a/meta/recipes-devtools/sdkchroot/sdkchroot.bb b/meta/recipes-devtools/sdkchroot/sdkchroot.bb +index 467e6824..ab0a66dc 100644 +--- a/meta/recipes-devtools/sdkchroot/sdkchroot.bb ++++ b/meta/recipes-devtools/sdkchroot/sdkchroot.bb +@@ -13,6 +13,10 @@ SRC_URI = " \ + file://README.sdk" + PV = "0.1" + ++SDK_INSTALL ?= "" ++ ++DEPENDS += "${SDK_INSTALL}" ++ + TOOLCHAIN = "crossbuild-essential-${DISTRO_ARCH}" + TOOLCHAIN_${HOST_ARCH} = "build-essential" + TOOLCHAIN_i386 = "build-essential" +@@ -21,7 +25,7 @@ inherit rootfs + ROOTFS_ARCH = "${HOST_ARCH}" + ROOTFS_DISTRO = "${HOST_DISTRO}" + ROOTFSDIR = "${S}" +-ROOTFS_PACKAGES = "${SDKCHROOT_PREINSTALL} ${TOOLCHAIN}" ++ROOTFS_PACKAGES = "${SDK_PREINSTALL} ${SDK_INSTALL} ${TOOLCHAIN}" + ROOTFS_FEATURES += "clean-package-cache generate-manifest" + ROOTFS_MANIFEST_DEPLOY_DIR = "${DEPLOY_DIR_SDKCHROOT}" + +@@ -31,15 +35,16 @@ python() { + d.getVar("ROOTFS_ARCH"))) + } + +-SDKCHROOT_PREINSTALL := "debhelper \ +- autotools-dev \ +- dpkg \ +- locales \ +- docbook-to-man \ +- apt \ +- automake \ +- devscripts \ +- equivs" ++SDK_PREINSTALL += " \ ++ debhelper \ ++ autotools-dev \ ++ dpkg \ ++ locales \ ++ docbook-to-man \ ++ apt \ ++ automake \ ++ devscripts \ ++ equivs" + + S = "${WORKDIR}/rootfs" + +-- +2.16.4 + diff --git a/isar-patches/0006-sdk-Make-all-links-in-the-SDK-chroot-relative.patch b/isar-patches/0006-sdk-Make-all-links-in-the-SDK-chroot-relative.patch new file mode 100644 index 000000000..b59a58444 --- /dev/null +++ b/isar-patches/0006-sdk-Make-all-links-in-the-SDK-chroot-relative.patch @@ -0,0 +1,41 @@ +From 5176be74d9b8758bc8096c203aae528fd5495970 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Thu, 19 Mar 2020 16:21:59 +0100 +Subject: [PATCH 2/6] sdk: Make all links in the SDK chroot relative + +This, in combination with interp and rpatch rewriting, will allow to use +the SDK outside of its chroot. + +Signed-off-by: Jan Kiszka +--- + meta/classes/image-sdk-extension.bbclass | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/meta/classes/image-sdk-extension.bbclass b/meta/classes/image-sdk-extension.bbclass +index b9f2cf4a..84ac9c6d 100644 +--- a/meta/classes/image-sdk-extension.bbclass ++++ b/meta/classes/image-sdk-extension.bbclass +@@ -18,6 +18,20 @@ do_populate_sdk() { + # Remove setup scripts + sudo rm -f ${SDKCHROOT_DIR}/chroot-setup.sh ${SDKCHROOT_DIR}/configscript.sh + ++ # Make all links relative ++ for link in $(find ${SDKCHROOT_DIR}/ -type l); do ++ target=$(readlink $link) ++ ++ if [ "${target#/}" != "${target}" ]; then ++ basedir=$(dirname $link) ++ new_target=$(realpath --no-symlinks -m --relative-to=$basedir ${SDKCHROOT_DIR}/${target}) ++ ++ # remove first to allow rewriting directory links ++ sudo rm $link ++ sudo ln -s $new_target $link ++ fi ++ done ++ + # Copy mount_chroot.sh for convenience + sudo cp ${ISARROOT}/scripts/mount_chroot.sh ${SDKCHROOT_DIR} + +-- +2.16.4 + diff --git a/isar-patches/0007-sdk-Add-script-to-relocate-SDK.patch b/isar-patches/0007-sdk-Add-script-to-relocate-SDK.patch new file mode 100644 index 000000000..532d5862f --- /dev/null +++ b/isar-patches/0007-sdk-Add-script-to-relocate-SDK.patch @@ -0,0 +1,91 @@ +From 1560303a740c1dfa2624b92d98e2be35a0e9a597 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Thu, 19 Mar 2020 19:21:44 +0100 +Subject: [PATCH 3/6] sdk: Add script to relocate SDK + +When run inside the unpacked SDK, this script tunes interp and rpath +entry in relevant binaries so that the cross conpilation tool can be +called outside of the chroot, irrespective of the host distribution. +Then only "--sysroot /path/to/sdkroot" needs to be passed to the +compiler. + +The script also supports restoring the original chroot-mode when invoked +with the --restore-chroot option. + +Signed-off-by: Jan Kiszka +--- + .../sdkchroot/files/relocate-sdk.sh | 41 ++++++++++++++++++++++ + meta/recipes-devtools/sdkchroot/sdkchroot.bb | 2 ++ + 2 files changed, 43 insertions(+) + create mode 100755 meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh + +diff --git a/meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh b/meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh +new file mode 100755 +index 00000000..1c9b02fa +--- /dev/null ++++ b/meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh +@@ -0,0 +1,41 @@ ++#!/bin/sh ++# ++# This software is a part of ISAR. ++# Copyright (c) Siemens AG, 2020 ++# ++# SPDX-License-Identifier: MIT ++ ++sdkroot=$(realpath $(dirname $0)) ++arch=$(uname -m) ++ ++new_sdkroot=$sdkroot ++ ++case "$1" in ++--help|-h) ++ echo "Usage: $0 [--restore-chroot|-r]" ++ exit 0 ++ ;; ++--restore-chroot|-r) ++ new_sdkroot=/ ++ ;; ++esac ++ ++if [ -z $(which patchelf 2>/dev/null) ]; then ++ echo "Please install 'patchelf' package first." ++ exit 1 ++fi ++ ++echo -n "Adjusting path of SDK to '${new_sdkroot}'... " ++ ++for binary in $(find ${sdkroot}/usr/bin ${sdkroot}/usr/sbin ${sdkroot}/usr/lib/gcc* -executable -type f); do ++ interpreter=$(patchelf --print-interpreter ${binary} 2>/dev/null) ++ oldpath=${interpreter%/lib*/ld-linux*} ++ interpreter=${interpreter#${oldpath}} ++ if [ -n "${interpreter}" ]; then ++ patchelf --set-interpreter ${new_sdkroot}${interpreter} \ ++ --set-rpath ${new_sdkroot}/usr/lib:${new_sdkroot}/usr/lib/${arch}-linux-gnu \ ++ $binary 2>/dev/null ++ fi ++done ++ ++echo "done" +diff --git a/meta/recipes-devtools/sdkchroot/sdkchroot.bb b/meta/recipes-devtools/sdkchroot/sdkchroot.bb +index ab0a66dc..2bc9d291 100644 +--- a/meta/recipes-devtools/sdkchroot/sdkchroot.bb ++++ b/meta/recipes-devtools/sdkchroot/sdkchroot.bb +@@ -10,6 +10,7 @@ LIC_FILES_CHKSUM = "file://${LAYERDIR_core}/licenses/COPYING.GPLv2;md5=751419260 + + SRC_URI = " \ + file://configscript.sh \ ++ file://relocate-sdk.sh \ + file://README.sdk" + PV = "0.1" + +@@ -58,6 +59,7 @@ ROOTFS_POSTPROCESS_COMMAND =+ "sdkchroot_install_files" + sdkchroot_install_files() { + # Configure root filesystem + sudo install -m 644 ${WORKDIR}/README.sdk ${S} ++ sudo install -m 755 ${WORKDIR}/relocate-sdk.sh ${S} + sudo install -m 755 ${WORKDIR}/configscript.sh ${S} + sudo chroot ${S} /configscript.sh ${DISTRO_ARCH} + } +-- +2.16.4 + diff --git a/isar-patches/0008-sdk-Do-not-ship-the-isar-apt-repo.patch b/isar-patches/0008-sdk-Do-not-ship-the-isar-apt-repo.patch new file mode 100644 index 000000000..a92e995c5 --- /dev/null +++ b/isar-patches/0008-sdk-Do-not-ship-the-isar-apt-repo.patch @@ -0,0 +1,54 @@ +From 9708c4cf69246480ff5209a40f2a273fd461ac3c Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Fri, 20 Mar 2020 09:27:43 +0100 +Subject: [PATCH 4/6] sdk: Do not ship the isar-apt repo + +Users can add what should be included via SDK_INSTALL now. + +Signed-off-by: Jan Kiszka +--- + meta/classes/image-sdk-extension.bbclass | 6 +++--- + meta/recipes-devtools/sdkchroot/sdkchroot.bb | 6 ------ + 2 files changed, 3 insertions(+), 9 deletions(-) + +diff --git a/meta/classes/image-sdk-extension.bbclass b/meta/classes/image-sdk-extension.bbclass +index 84ac9c6d..6e76b04d 100644 +--- a/meta/classes/image-sdk-extension.bbclass ++++ b/meta/classes/image-sdk-extension.bbclass +@@ -8,13 +8,13 @@ + do_populate_sdk[stamp-extra-info] = "${DISTRO}-${MACHINE}" + do_populate_sdk[depends] = "sdkchroot:do_build" + do_populate_sdk() { +- # Copy isar-apt with deployed Isar packages +- sudo cp -Trpfx ${REPO_ISAR_DIR}/${DISTRO} ${SDKCHROOT_DIR}/isar-apt +- + sudo umount -R ${SDKCHROOT_DIR}/dev || true + sudo umount ${SDKCHROOT_DIR}/proc || true + sudo umount -R ${SDKCHROOT_DIR}/sys || true + ++ # Remove isar-apt repo entry ++ sudo rm -f ${SDKCHROOT_DIR}/etc/apt/sources.list.d/isar-apt.list ++ + # Remove setup scripts + sudo rm -f ${SDKCHROOT_DIR}/chroot-setup.sh ${SDKCHROOT_DIR}/configscript.sh + +diff --git a/meta/recipes-devtools/sdkchroot/sdkchroot.bb b/meta/recipes-devtools/sdkchroot/sdkchroot.bb +index 2bc9d291..dc765046 100644 +--- a/meta/recipes-devtools/sdkchroot/sdkchroot.bb ++++ b/meta/recipes-devtools/sdkchroot/sdkchroot.bb +@@ -49,12 +49,6 @@ SDK_PREINSTALL += " \ + + S = "${WORKDIR}/rootfs" + +-ROOTFS_CONFIGURE_COMMAND += "rootfs_configure_isar_apt_dir" +-rootfs_configure_isar_apt_dir() { +- # Copy isar-apt instead of mounting: +- sudo cp -Trpfx ${REPO_ISAR_DIR}/${DISTRO} ${ROOTFSDIR}/isar-apt +-} +- + ROOTFS_POSTPROCESS_COMMAND =+ "sdkchroot_install_files" + sdkchroot_install_files() { + # Configure root filesystem +-- +2.16.4 + diff --git a/isar-patches/0009-sdk-Inject-sysroot-path-when-calling-relocated-toolc.patch b/isar-patches/0009-sdk-Inject-sysroot-path-when-calling-relocated-toolc.patch new file mode 100644 index 000000000..1ec3413ca --- /dev/null +++ b/isar-patches/0009-sdk-Inject-sysroot-path-when-calling-relocated-toolc.patch @@ -0,0 +1,93 @@ +From 53614bba184fb544be69eacd7a90efffa8d319a6 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Sun, 22 Mar 2020 09:00:30 +0100 +Subject: [PATCH 5/6] sdk: Inject sysroot path when calling relocated toolchain + +This removes the need to specify --sysroot=/path/to/sdkroot when calling +gcc or ld from the SDK. + +Signed-off-by: Jan Kiszka +--- + meta/classes/image-sdk-extension.bbclass | 8 ++++++++ + .../sdkchroot/files/gcc-sysroot-wrapper.sh | 16 ++++++++++++++++ + meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh | 3 +++ + meta/recipes-devtools/sdkchroot/sdkchroot.bb | 2 ++ + 4 files changed, 29 insertions(+) + create mode 100755 meta/recipes-devtools/sdkchroot/files/gcc-sysroot-wrapper.sh + +diff --git a/meta/classes/image-sdk-extension.bbclass b/meta/classes/image-sdk-extension.bbclass +index 6e76b04d..aed8408c 100644 +--- a/meta/classes/image-sdk-extension.bbclass ++++ b/meta/classes/image-sdk-extension.bbclass +@@ -32,6 +32,14 @@ do_populate_sdk() { + fi + done + ++ # Set up sysroot wrapper ++ for tool_pattern in "gcc-[0-9]*" "g++-[0-9]*" "cpp-[0-9]*" "ld.bfd" "ld.gold"; do ++ for tool in $(find ${SDKCHROOT_DIR}/usr/bin -type f -name "*-linux-gnu-${tool_pattern}"); do ++ sudo mv "${tool}" "${tool}.bin" ++ sudo ln -sf gcc-sysroot-wrapper.sh ${tool} ++ done ++ done ++ + # Copy mount_chroot.sh for convenience + sudo cp ${ISARROOT}/scripts/mount_chroot.sh ${SDKCHROOT_DIR} + +diff --git a/meta/recipes-devtools/sdkchroot/files/gcc-sysroot-wrapper.sh b/meta/recipes-devtools/sdkchroot/files/gcc-sysroot-wrapper.sh +new file mode 100755 +index 00000000..feead1a1 +--- /dev/null ++++ b/meta/recipes-devtools/sdkchroot/files/gcc-sysroot-wrapper.sh +@@ -0,0 +1,16 @@ ++#!/bin/sh ++# ++# This software is a part of ISAR. ++# Copyright (c) Siemens AG, 2020 ++# ++# SPDX-License-Identifier: MIT ++ ++GCC_SYSROOT= ++ ++NEXT_TARGET=$0 ++until [ "${NEXT_TARGET##*/}" = "gcc-sysroot-wrapper.sh" ]; do ++ TARGET=${NEXT_TARGET} ++ NEXT_TARGET=$(dirname ${TARGET})/$(readlink ${TARGET}) ++done ++ ++${TARGET}.bin --sysroot=${GCC_SYSROOT} "$@" +diff --git a/meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh b/meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh +index 1c9b02fa..0d1c6330 100755 +--- a/meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh ++++ b/meta/recipes-devtools/sdkchroot/files/relocate-sdk.sh +@@ -38,4 +38,7 @@ for binary in $(find ${sdkroot}/usr/bin ${sdkroot}/usr/sbin ${sdkroot}/usr/lib/g + fi + done + ++sed -i 's|^GCC_SYSROOT=.*|GCC_SYSROOT="'"${new_sdkroot}"'"|' \ ++ ${sdkroot}/usr/bin/gcc-sysroot-wrapper.sh ++ + echo "done" +diff --git a/meta/recipes-devtools/sdkchroot/sdkchroot.bb b/meta/recipes-devtools/sdkchroot/sdkchroot.bb +index dc765046..bf3f6fb4 100644 +--- a/meta/recipes-devtools/sdkchroot/sdkchroot.bb ++++ b/meta/recipes-devtools/sdkchroot/sdkchroot.bb +@@ -11,6 +11,7 @@ LIC_FILES_CHKSUM = "file://${LAYERDIR_core}/licenses/COPYING.GPLv2;md5=751419260 + SRC_URI = " \ + file://configscript.sh \ + file://relocate-sdk.sh \ ++ file://gcc-sysroot-wrapper.sh \ + file://README.sdk" + PV = "0.1" + +@@ -54,6 +55,7 @@ sdkchroot_install_files() { + # Configure root filesystem + sudo install -m 644 ${WORKDIR}/README.sdk ${S} + sudo install -m 755 ${WORKDIR}/relocate-sdk.sh ${S} ++ sudo install -m 755 ${WORKDIR}/gcc-sysroot-wrapper.sh ${S}/usr/bin + sudo install -m 755 ${WORKDIR}/configscript.sh ${S} + sudo chroot ${S} /configscript.sh ${DISTRO_ARCH} + } +-- +2.16.4 + diff --git a/isar-patches/0010-sdk-Update-README.sdk.patch b/isar-patches/0010-sdk-Update-README.sdk.patch new file mode 100644 index 000000000..56cc6d552 --- /dev/null +++ b/isar-patches/0010-sdk-Update-README.sdk.patch @@ -0,0 +1,99 @@ +From c6bdd10a0b1cc6870ea7a2f72d83a3d11fff3873 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Sun, 22 Mar 2020 09:02:31 +0100 +Subject: [PATCH 6/6] sdk: Update README.sdk + +Document the out-of-chroot invocation and make it the preferred option. +Also remove irrelevant information. + +Signed-off-by: Jan Kiszka +--- + meta/recipes-devtools/sdkchroot/files/README.sdk | 71 ++++++++++++------------ + 1 file changed, 36 insertions(+), 35 deletions(-) + +diff --git a/meta/recipes-devtools/sdkchroot/files/README.sdk b/meta/recipes-devtools/sdkchroot/files/README.sdk +index 9c1af6d3..3e06d8c5 100644 +--- a/meta/recipes-devtools/sdkchroot/files/README.sdk ++++ b/meta/recipes-devtools/sdkchroot/files/README.sdk +@@ -1,42 +1,43 @@ +-Building applications for targets in ISAR takes a lot of time as they are built under QEMU. +-SDK helps to develop applications for target platform in crossbuild environment. ++ISAR Target SDK ++=============== + +-SDK contains cross-toolchain for target architecture and a copy of isar-apt repo with +-locally prebuilt target debian packages. ++This SDK helps to develop applications for an ISAR target platform in a ++crossbuild environment. It contains a cross-toolchain and development packages ++corresponding to the original target. + +- - First one have to mount the system directories for proper operation in chroot environement. +-Just call supplied with sdk tarball in udo rootfs as an argument to the script `mount_chroot.sh`: ++The SDK can be used in two ways, described in the following. + +-$ sudo mount_chroot.sh + +- - chroot to isar SDK rootfs: ++Option 1 (recommended): Use cross-compiler in host environment ++-------------------------------------------------------------- ++ ++After unpacking the SDK at the desired location, it has to be relocated once: ++ ++$ /relocate-sdk.sh ++ ++Now you can add /usr/bin to the local path or adjust your project ++to call the cross-compiler from the SDK. ++ ++ ++Option 2 (fallback): Build inside chroot ++---------------------------------------- ++ ++First you have to mount the system directories for proper operation into the ++chroot environment. Call the helper script supplied with SDK tarball: ++ ++$ sudo /mount_chroot.sh ++ ++Bind-mount the project into the rootfs: ++ ++$ sudo mount -o bind /path/to/project /mnt ++ ++If you have relocated the SDK previously for using option 1, you need to call ++this next: ++ ++$ /relocate-sdk.sh --restore-chroot ++ ++Then chroot into the SDK rootfs: + + $ sudo chroot + +- - Check that cross toolchains are installed +- +-:~# dpkg -l | grep crossbuild-essential-armhf +-ii crossbuild-essential-armhf 12.3 all Informational list of cross-build-essential packages +- +- - Install needed prebuilt target packages. +- +-:~# apt-get update +-:~# apt-get install libhello-dev:armhf +- +- - Check the contents of the installed target package +- +-:~# dpkg -L libhello-dev +-/. +-/usr +-/usr/include +-/usr/include/hello.h +-/usr/lib +-/usr/lib/arm-linux-gnueabihf +-/usr/lib/arm-linux-gnueabihf/libhello.a +-/usr/lib/arm-linux-gnueabihf/libhello.la +-/usr/share +-/usr/share/doc +-/usr/share/doc/libhello-dev +-/usr/share/doc/libhello-dev/changelog.gz +-/usr/share/doc/libhello-dev/copyright +-~# ++Now you can build the project under /mnt. +-- +2.16.4 + diff --git a/isar-patches/0011-dpkg-raw-Correct-path-so-that-git-fetching-works.patch b/isar-patches/0011-dpkg-raw-Correct-path-so-that-git-fetching-works.patch new file mode 100644 index 000000000..7cb077548 --- /dev/null +++ b/isar-patches/0011-dpkg-raw-Correct-path-so-that-git-fetching-works.patch @@ -0,0 +1,58 @@ +From bdbca046501c86ca5adca28439e0d7294b83c4b1 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Fri, 3 Apr 2020 12:18:21 +0200 +Subject: [PATCH] dpkg-raw: Correct path so that git fetching works + +Setting D to S and cleaning the former caused problems when fetching the +to-be-installed files via git. Fix this by using a distinct D folder. +This requires setting --sourcedir for dh_install accordingly. + +At this chance, simplify ${PN}.install creation and avoid resolving ${D} +in the error message. + +Reported-by: Sven Schultschik +Signed-off-by: Jan Kiszka +--- + meta/classes/dpkg-raw.bbclass | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +diff --git a/meta/classes/dpkg-raw.bbclass b/meta/classes/dpkg-raw.bbclass +index 8c01a46a..9d4e8c19 100644 +--- a/meta/classes/dpkg-raw.bbclass ++++ b/meta/classes/dpkg-raw.bbclass +@@ -5,22 +5,27 @@ + + inherit dpkg + +-D = "${S}" ++D = "${WORKDIR}/image" + + # Populate folder that will be picked up as package + do_install() { +- bbnote "Put your files for this package in ${D}" ++ bbnote "Put your files for this package in $""{D}" + } + + do_install[cleandirs] = "${D}" + addtask install after do_unpack before do_prepare_build + +-do_prepare_build[cleandirs] += "${D}/debian" ++do_prepare_build[cleandirs] += "${S}/debian" + do_prepare_build() { + cd ${D} + find . -maxdepth 1 ! -name .. -and ! -name . -and ! -name debian | \ +- sed 's:^./::' > ${WORKDIR}/${PN}.install +- mv ${WORKDIR}/${PN}.install ${D}/debian/ ++ sed 's:^./::' > ${S}/debian/${PN}.install + + deb_debianize ++ ++ cat <> ${S}/debian/rules ++ ++override_dh_install: ++ dh_install --sourcedir=${PP}/image ++EOF + } +-- +2.16.4 + diff --git a/isar-patches/0012-debianize-Add-placeholder-for-original-version-to-CH.patch b/isar-patches/0012-debianize-Add-placeholder-for-original-version-to-CH.patch new file mode 100644 index 000000000..c742aec22 --- /dev/null +++ b/isar-patches/0012-debianize-Add-placeholder-for-original-version-to-CH.patch @@ -0,0 +1,56 @@ +From 5c52de16b20af59170c634841392d654fe37dc7d Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Thu, 23 Apr 2020 15:06:34 +0200 +Subject: [PATCH] debianize: Add placeholder for original version to + CHANGELOG_V + +This allows to append to the latest upstream version when using an +unpinned source version. The format of the placeholder is +"". + +Signed-off-by: Jan Kiszka +--- + meta/classes/debianize.bbclass | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +diff --git a/meta/classes/debianize.bbclass b/meta/classes/debianize.bbclass +index da43a4e2..e77be232 100644 +--- a/meta/classes/debianize.bbclass ++++ b/meta/classes/debianize.bbclass +@@ -11,6 +11,15 @@ DESCRIPTION ?= "must not be empty" + MAINTAINER ?= "Unknown maintainer " + + deb_add_changelog() { ++ changelog_v="${CHANGELOG_V}" ++ if [ -f ${S}/debian/changelog ]; then ++ if [ ! -f ${WORKDIR}/changelog.orig ]; then ++ cp ${S}/debian/changelog ${WORKDIR}/changelog.orig ++ fi ++ orig_version=$(dpkg-parsechangelog -l ${WORKDIR}/changelog.orig -S Version) ++ changelog_v=$(echo "${changelog_v}" | sed 's//'${orig_version}'/') ++ fi ++ + timestamp=$(find ${S}/ -type f -not -path "${S}/debian/*" -printf "%T@\n"|sort -n -r|head -n 1) + if [ -n "${timestamp}" ]; then + date=$(LANG=C date -R -d @${timestamp}) +@@ -18,7 +27,7 @@ deb_add_changelog() { + date=$(LANG=C date -R) + fi + cat < ${S}/debian/changelog +-${PN} (${CHANGELOG_V}) UNRELEASED; urgency=low ++${PN} (${changelog_v}) UNRELEASED; urgency=low + + * generated by Isar + +@@ -26,7 +35,7 @@ ${PN} (${CHANGELOG_V}) UNRELEASED; urgency=low + EOF + if [ -f ${WORKDIR}/changelog ]; then + if head -1 "${WORKDIR}"/changelog | \ +- grep -q -e "^${PN} (${CHANGELOG_V})" ++ grep -q -e "^${PN} (${changelog_v})" + then + # entry for our version already there, use unmodified + rm ${S}/debian/changelog +-- +2.16.4 + diff --git a/isar-patches/0013-image-Fix-evaluation-of-complex-ISAR_RELEASE_CMD-val.patch b/isar-patches/0013-image-Fix-evaluation-of-complex-ISAR_RELEASE_CMD-val.patch new file mode 100644 index 000000000..e9446f01e --- /dev/null +++ b/isar-patches/0013-image-Fix-evaluation-of-complex-ISAR_RELEASE_CMD-val.patch @@ -0,0 +1,33 @@ +From 95a9f63cf08115d42e6d3df892314a704dd671ce Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Tue, 5 May 2020 17:38:11 +0200 +Subject: [PATCH] image: Fix evaluation of complex ISAR_RELEASE_CMD values + +If ISAR_RELEASE_CMD contains a boolean expression make sure to evaluate +it as a whole. So far, "false || true" was incorrectly be detected as +unsuccessful. + +This allows to handle failing git version extractions gracefully, e.g. +ISAR_RELEASE_CMD = "git ... describe ... || echo unknown". + +Signed-off-by: Jan Kiszka +--- + meta/classes/image.bbclass | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/meta/classes/image.bbclass b/meta/classes/image.bbclass +index 0150f271..a296cc06 100644 +--- a/meta/classes/image.bbclass ++++ b/meta/classes/image.bbclass +@@ -99,7 +99,7 @@ get_build_id() { + "considered in the build_id. Consider changing" \ + "ISAR_RELEASE_CMD." + fi +- if ! ${ISAR_RELEASE_CMD} 2>/dev/null; then ++ if ! ( ${ISAR_RELEASE_CMD} ) 2>/dev/null; then + bbwarn "\"${ISAR_RELEASE_CMD}\" failed, returning empty build_id." + echo "" + fi +-- +2.26.1 + diff --git a/kas-docker b/kas-docker new file mode 100755 index 000000000..5768f5546 --- /dev/null +++ b/kas-docker @@ -0,0 +1,250 @@ +#!/bin/sh +# +# kas - setup tool for bitbake based projects +# +# Copyright (c) Siemens AG, 2018-2019 +# +# Authors: +# Jan Kiszka +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be +# included in all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +set -e + +usage() +{ + printf "%b" "Usage: $0 [OPTIONS] { build | shell } [KASOPTIONS] KASFILE\n" + printf "%b" " $0 [OPTIONS] clean\n" + printf "%b" "\nPositional arguments:\n" + printf "%b" "build\t\t\tCheck out repositories and build target.\n" + printf "%b" "shell\t\t\tRun a shell in the build environment.\n" + printf "%b" "clean\t\t\tClean build artifacts, keep downloads.\n" + printf "%b" "\nOptional arguments:\n" + printf "%b" "--isar\t\t\tUse kas-isar container to build Isar image.\n" + printf "%b" "--docker-args\t\tAdditional arguments to pass to docker " \ + "for running the\n" + printf "%b" "\t\t\tbuild.\n" + printf "%b" "-v\t\t\tPrint operations.\n" + printf "%b" "--ssh-dir\t\tDirectory containing SSH configurations.\n" + printf "%b" "\t\t\tAvoid \$HOME/.ssh unless you fully trust the " \ + "container.\n" + printf "%b" "--no-proxy-from-env\tDo not inherit proxy settings from " \ + "environment.\n" + exit 1 +} + +trace() +{ + [ -n "${VERBOSE}" ] && echo "+ ""$@" + eval "$@" +} + +if [ -z "${KAS_IMAGE_VERSION}" ]; then + KAS_IMAGE_VERSION="2.0" +fi + +DOCKER_IMAGE=kasproject/kas:${KAS_IMAGE_VERSION} + +if [ -n "${KAS_WORK_DIR}" ]; then + KAS_WORK_DIR=$(readlink -f ${KAS_WORK_DIR}) +else + KAS_WORK_DIR=$(pwd) +fi + +# parse kas-docker options +while [ $# -gt 0 ]; do + case "$1" in + --isar) + DOCKER_IMAGE=kasproject/kas-isar:${KAS_IMAGE_VERSION} + if ! LOOP_DEV=$(/sbin/losetup -f 2>/dev/null); then + if [ $(id -u) -eq 0 ]; then + echo "Error: loop device not available!" + exit 1 + fi + sudo_command="/sbin/losetup -f" + sudo_message="[sudo] enter password to setup loop" + sudo_message="$sudo_message devices by calling" + sudo_message="$sudo_message '$sudo_command': " + if ! LOOP_DEV=$(sudo -p "$sudo_message" $sudo_command \ + 2>/dev/null); then + echo "Error: loop device setup unsuccessful!" + echo "try calling '$sudo_command' with root" \ + "permissions manually." + exit 1 + fi + fi + ISAR_ARGS="--cap-add=SYS_ADMIN --cap-add=MKNOD --privileged \ + --device ${LOOP_DEV}" + shift 1 + ;; + --docker-args) + [ $# -gt 0 ] || usage + USER_ARGS=$2 + shift 2 + ;; + --ssh-dir) + [ $# -gt 2 ] || usage + SSH_DIR=$2 + shift 2 + ;; + --no-proxy-from-env) + NO_PROXY_FROM_ENV=1 + shift 1 + ;; + -v) + VERBOSE=1 + shift 1 + ;; + --*) + usage + ;; + clean) + [ $# -eq 1 ] || usage + CLEAN_DIR=build/tmp + if [ -n "${ISAR_ARGS}" ]; then + trace docker run -v ${KAS_WORK_DIR}:/work:rw \ + --workdir=/work --rm ${ISAR_ARGS} \ + ${DOCKER_IMAGE} \ + sudo rm -rf ${CLEAN_DIR} + else + trace rm -rf ${KAS_WORK_DIR}/{CLEAN_DIR} + fi + exit 0 + ;; + build|shell) + CMD=$1 + shift 1 + break + ;; + *) + usage + ;; + esac +done + +[ -n "${CMD}" ] || usage + +# parse kas sub-command (build or shell) options +while [ $# -gt 0 ]; do + case "$1" in + -h|--help) + trace docker run ${DOCKER_IMAGE} ${CMD} --help + exit 0 + ;; + --skip|--target|--task|-c|--cmd|--command) + KAS_OPTIONS="${KAS_OPTIONS} $1 '$2'" + shift 2 + ;; + -*) + KAS_OPTIONS="${KAS_OPTIONS} $1" + shift 1 + ;; + *) + KAS_FILES= + for FILE in $(IFS=':'; echo $1); do + if ! REAL_FILE=$(realpath -qe $FILE); then + echo "Error: configuration file '${FILE}' not found" + exit 1 + fi + if [ -z "${KAS_FILES}" ]; then + FIRST_KAS_FILE=${REAL_FILE} + KAS_FILES=${REAL_FILE} + else + KAS_FILES=${KAS_FILES}:${REAL_FILE} + fi + done + shift 1 + ;; + esac +done + +[ -n "${FIRST_KAS_FILE}" ] || usage + +KAS_FILE_DIR=$(dirname ${FIRST_KAS_FILE}) + +REPO_DIR=$(git -C ${KAS_FILE_DIR} rev-parse --show-toplevel 2>/dev/null) \ + || REPO_DIR=$(hg --cwd ${KAS_FILE_DIR} root 2>/dev/null) \ + || REPO_DIR=${KAS_FILE_DIR} + +KAS_FILES=/repo/$(echo ${KAS_FILES} | sed 's|'${REPO_DIR}'/||g;s|:|:/repo/|g') + +trace mkdir -p ${KAS_WORK_DIR} + +DOCKER_ARGS="-v ${REPO_DIR}:/repo:ro \ + -v ${KAS_WORK_DIR}:/work:rw --workdir=/work \ + -e USER_ID=$(id -u) -e GROUP_ID=$(id -g) --rm" + +if [ -n "${SSH_DIR}" ] ; then + if [ ! -d "${SSH_DIR}" ]; then + echo "Passed SSH_VALUE '${SSH_DIR}' is not a directory" + exit 1 + fi + DOCKER_ARGS="${DOCKER_ARGS} -v $(readlink -f ${SSH_DIR}):/etc/skel/.ssh:ro" +fi + +if [ -t 1 ]; then + DOCKER_ARGS="${DOCKER_ARGS} -t -i" +fi + +if [ -n "${DL_DIR}" ]; then + trace mkdir -p ${DL_DIR} + DOCKER_ARGS="${DOCKER_ARGS} \ + -v $(readlink -f ${DL_DIR}):/downloads:rw \ + -e DL_DIR=/downloads" +fi + +if [ -n "${SSTATE_DIR}" ]; then + trace mkdir -p ${SSTATE_DIR} + DOCKER_ARGS="${DOCKER_ARGS} \ + -v $(readlink -f ${SSTATE_DIR}):/sstate:rw \ + -e SSTATE_DIR=/sstate" +fi + +if [ -n "${KAS_REPO_REF_DIR}" ]; then + DOCKER_ARGS="${DOCKER_ARGS} \ + -v $(readlink -f ${KAS_REPO_REF_DIR}):/repo-ref:ro \ + -e KAS_REPO_REF_DIR=${KAS_REPO_REF_DIR}" +fi + +set -- ${DOCKER_ARGS} + +for var in TERM KAS_DISTRO KAS_MACHINE KAS_TARGET KAS_TASK \ + KAS_PREMIRRORS; do + if [ -n "$(eval echo \$${var})" ]; then + set -- "$@" -e "${var}='$(eval echo \"\$${var}\")'" + fi +done + +# propagate only supported SHELL settings +case "$SHELL" in +/bin/sh|/bin/bash|/bin/dash) + set -- "$@" -e "SHELL='$(eval echo \"\$SHELL\")'" + ;; +esac + +if [ -z "${NO_PROXY_FROM_ENV+x}" ]; then + for var in http_proxy https_proxy ftp_proxy no_proxy NO_PROXY; do + if [ -n "$(eval echo \$${var})" ]; then + set -- "$@" -e "${var}='$(eval echo \$${var})'" + fi + done +fi + +trace docker run "$@" ${ISAR_ARGS} ${USER_ARGS} \ + ${DOCKER_IMAGE} ${CMD} ${KAS_OPTIONS} ${KAS_FILES} diff --git a/kas-iot2050-boot-advanced.yml b/kas-iot2050-boot-advanced.yml new file mode 100644 index 000000000..974aabada --- /dev/null +++ b/kas-iot2050-boot-advanced.yml @@ -0,0 +1,18 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + includes: + - kas-iot2050-boot-basic.yml + +local_conf_header: + platform-variants: | + IOT2050_VARIANTS = "ADVANCED" diff --git a/kas-iot2050-boot-basic.yml b/kas-iot2050-boot-basic.yml new file mode 100644 index 000000000..7e60d84d6 --- /dev/null +++ b/kas-iot2050-boot-basic.yml @@ -0,0 +1,22 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + includes: + - kas/iot2050.yml + +target: iot2050-image-boot + +local_conf_header: + image: | + IMAGE_TYPE ?= "boot-flash-img" + platform-variants: | + IOT2050_VARIANTS ?= "BASIC" diff --git a/kas-iot2050-example.yml b/kas-iot2050-example.yml new file mode 100644 index 000000000..d485926df --- /dev/null +++ b/kas-iot2050-example.yml @@ -0,0 +1,23 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + includes: + - kas/iot2050.yml + +target: iot2050-image-example + +local_conf_header: + root_password: | + # Set root password to 'root', see isar/meta-isar/conf/local.conf.sample + # about how to generate encrypted password + USERS += "root" + USER_root[password] ??= "$6$rounds=10000$RXeWrnFmkY$DtuS/OmsAS2cCEDo0BF5qQsizIrq6jPgXnwv3PHqREJeKd1sXdHX/ayQtuQWVDHe0KIO0/sVH8dvQm1KthF0d/" diff --git a/kas-iot2050-lxde.yml b/kas-iot2050-lxde.yml new file mode 100644 index 000000000..c817f40b7 --- /dev/null +++ b/kas-iot2050-lxde.yml @@ -0,0 +1,16 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + includes: + - kas-iot2050-example.yml + +target: iot2050-image-lxde diff --git a/kas/iot2050.yml b/kas/iot2050.yml new file mode 100644 index 000000000..8b1349579 --- /dev/null +++ b/kas/iot2050.yml @@ -0,0 +1,65 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + +distro: isar +target: iot2050-image-base +machine: iot2050 + +repos: + meta-iot2050: + + isar: + url: https://github.com/ilbers/isar + refspec: c8ccb82b11c4d22d12a225aa2bc7fd10156b5e86 + layers: + meta: + patches: + 05-add-sdk-pack: + repo: meta-iot2050 + path: isar-patches/0005-sdkchroot-Add-support-for-adding-self-defined-sdk-pa.patch + 06-relative-sdk-links: + repo: meta-iot2050 + path: isar-patches/0006-sdk-Make-all-links-in-the-SDK-chroot-relative.patch + 07-relocate-sdk: + repo: meta-iot2050 + path: isar-patches/0007-sdk-Add-script-to-relocate-SDK.patch + 08-sdk-do-not-ship-isar-apt: + repo: meta-iot2050 + path: isar-patches/0008-sdk-Do-not-ship-the-isar-apt-repo.patch + 09-sdk-inject-sysroot: + repo: meta-iot2050 + path: isar-patches/0009-sdk-Inject-sysroot-path-when-calling-relocated-toolc.patch + 10-sdk-adjust-readme: + repo: meta-iot2050 + path: isar-patches/0010-sdk-Update-README.sdk.patch + 11-dpkg-raw-fix: + repo: meta-iot2050 + path: isar-patches/0011-dpkg-raw-Correct-path-so-that-git-fetching-works.patch + 12-debianize: + repo: meta-iot2050 + path: isar-patches/0012-debianize-Add-placeholder-for-original-version-to-CH.patch + 13-fix-isar-build-cmd: + repo: meta-iot2050 + path: isar-patches/0013-image-Fix-evaluation-of-complex-ISAR_RELEASE_CMD-val.patch + +bblayers_conf_header: + standard: | + LCONF_VERSION = "6" + BBPATH = "${TOPDIR}" + BBFILES ?= "" + +local_conf_header: + standard: | + CONF_VERSION = "1" + crossbuild: | + ISAR_CROSS_COMPILE = "1" diff --git a/kas/opt/mirror-example.yml b/kas/opt/mirror-example.yml new file mode 100644 index 000000000..8e6898877 --- /dev/null +++ b/kas/opt/mirror-example.yml @@ -0,0 +1,17 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + +local_conf_header: + mirror-example: | + DISTRO_APT_PREMIRRORS = "\ + deb\.debian\.org mirrors.example.com\n" diff --git a/kas/opt/package-lock.yml b/kas/opt/package-lock.yml new file mode 100644 index 000000000..539b7dadc --- /dev/null +++ b/kas/opt/package-lock.yml @@ -0,0 +1,16 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Su Bao Cheng +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + +local_conf_header: + package-lock: | + PACKAGES_SELECTION := "packages-snapshot" diff --git a/kas/opt/preempt-rt.yml b/kas/opt/preempt-rt.yml new file mode 100644 index 000000000..1807f07b3 --- /dev/null +++ b/kas/opt/preempt-rt.yml @@ -0,0 +1,13 @@ +# +# Copyright (c) Siemens AG, 2018 +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + +local_conf_header: + preempt-rt: | + KERNEL_NAME = "iot2050-rt" diff --git a/kas/opt/sdk.yml b/kas/opt/sdk.yml new file mode 100644 index 000000000..8fddd03d5 --- /dev/null +++ b/kas/opt/sdk.yml @@ -0,0 +1,11 @@ +# +# Copyright (c) Siemens AG, 2018 +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +header: + version: 8 + +task: populate_sdk diff --git a/recipes-app/iot2050setup/files/iot2050setup.py b/recipes-app/iot2050setup/files/iot2050setup.py new file mode 100755 index 000000000..b6503f879 --- /dev/null +++ b/recipes-app/iot2050setup/files/iot2050setup.py @@ -0,0 +1,596 @@ +#! /usr/bin/python3 + +import traceback +from snack import * +import subprocess +import re +import os +import json +import mraa +from collections import OrderedDict + + +class ansicolors: + clear = '\033[2J' + + +class TopMenu: + def __init__(self): + self.gscreen = SnackScreen() + self.boardType = subprocess.check_output('grep -a -o -P "IOT2050-\w*" /proc/device-tree/model', + shell=True).lstrip().rstrip().decode('utf-8') + + def show(self): + menuItems = [('OS Settings', OsSettingsMenu(self)), + ('Networking', NetworkingMenu(self)), + ('Software', SoftwareMenu(self)), + ('Peripherals', PeripheralsMenu(self))] + while True: + action, selection = ListboxChoiceWindow(screen=self.gscreen, + title='IOT2050 Setup', + text='', + items=menuItems, + buttons=[('Quit', 'quit', 'ESC')]) + if action == 'quit': + self.close() + return + selection.show() + + def close(self): + self.gscreen.finish() + + +class OsSettingsMenu: + def __init__(self, topmenu): + self.topmenu = topmenu + + def show(self): + action, selection = ListboxChoiceWindow(screen=self.topmenu.gscreen, + title='OS Settings', + text='', + items=[('Change Hostname', self.changeHostname), + ('Change Password', self.changePassword)], + buttons=[('Back', 'back', 'ESC')]) + + if action == 'back': + return + selection() + + def changeHostname(self): + currentHostname = subprocess.check_output('hostname').decode('utf-8').lstrip().rstrip() + action, text = EntryWindow(screen=self.topmenu.gscreen, + title='Change Host Name', + text='', + prompts=[('Host Name:', currentHostname)], + width=70, + entryWidth=50, + buttons=[('OK'), ('Cancel', 'cancel', 'ESC')]) + if action == 'cancel': + return + subprocess.call('hostname ' + text[0].lstrip().rstrip(), shell=True) + with open('/etc/hostname', 'w') as textfile: + textfile.write(text[0].lstrip().rstrip()) + + def changePassword(self): + self.topmenu.close() + print(ansicolors.clear) # Clear console + subprocess.call('passwd', shell=True) + exit() + + +class NetworkingMenu: + def __init__(self, topmenu): + self.topmenu = topmenu + + def show(self): + subprocess.call('nmtui', shell=True, stderr=open(os.devnull, 'wb')) + + +class SoftwareMenu: + def __init__(self, topmenu): + self.topmenu = topmenu + + def show(self): + action, selection = ListboxChoiceWindow(screen=self.topmenu.gscreen, + title='Software', + text='', + items=[('Manage Autostart Options', self.changeAutostart)], + buttons=[('Back', 'back', 'ESC')]) + if action == 'back': + return + selection() + + def changeAutostart(self): + sshEnabled = 'enabled' in subprocess.Popen('systemctl is-enabled ssh', + shell=True, + stdout=subprocess.PIPE, + stderr=open(os.devnull, 'wb')).stdout.read().decode('utf-8') + mosquittoAutostartEnabled = 'enabled' in subprocess.Popen('systemctl is-enabled mosquitto', + shell=True, + stdout=subprocess.PIPE, + stderr=open(os.devnull, 'wb')).stdout.read().decode('utf-8') + noderedAutostartEnabled = 'enabled' in subprocess.Popen('systemctl is-enabled node-red', + shell=True, + stdout=subprocess.PIPE, + stderr=open(os.devnull, 'wb')).stdout.read().decode('utf-8') + buttonbar = ButtonBar(screen=self.topmenu.gscreen, buttonlist=[('Ok', 'ok'), ('Cancel', 'cancel', 'ESC')]) + ct = CheckboxTree(height=4, scroll=0) + ct.append('SSH Server Enabled', selected=sshEnabled) + ct.append('Auto Start Mosquitto Broker', selected=mosquittoAutostartEnabled) + ct.append('Auto Start node-red', selected=noderedAutostartEnabled) + g = GridForm(self.topmenu.gscreen, 'Advanced Options', 1, 2) + g.add(ct, 0, 0) + g.add(buttonbar, 0, 1) + result = g.runOnce() + if buttonbar.buttonPressed(result) == 'cancel': + return + selectedOptions = ct.getSelection() + sshEnabledNew = 'SSH Server Enabled' in selectedOptions + mosquittoAutostartEnabledNew = 'Auto Start Mosquitto Broker' in selectedOptions + noderedAutostartEnabledNew = 'Auto Start node-red' in selectedOptions + if sshEnabled != sshEnabledNew: + self.changeServiceSetting('ssh', sshEnabledNew) + if mosquittoAutostartEnabled != mosquittoAutostartEnabledNew: + self.changeServiceSetting('mosquitto', mosquittoAutostartEnabledNew) + if noderedAutostartEnabled != noderedAutostartEnabledNew: + self.changeServiceSetting('node-red', noderedAutostartEnabledNew) + + def changeServiceSetting(self, name, status): + if status: + subprocess.call('systemctl enable ' + name, shell=True, stdout=open(os.devnull, 'wb'), stderr=open(os.devnull, 'wb')) + subprocess.call('systemctl start ' + name, shell=True, stdout=open(os.devnull, 'wb'), stderr=open(os.devnull, 'wb')) + else: + subprocess.call('systemctl stop ' + name, shell=True, stdout=open(os.devnull, 'wb'), stderr=open(os.devnull, 'wb')) + subprocess.call('systemctl disable ' + name, shell=True, stdout=open(os.devnull, 'wb'), stderr=open(os.devnull, 'wb')) + + +class PeripheralsMenu: + def __init__(self, topmenu): + self.topmenu = topmenu + self.configureFile = '/etc/board-configuration.json' + self.config = self.getConfig() + + def show(self): + while True: + action, selection = ListboxChoiceWindow(screen=self.topmenu.gscreen, + title='Peripherals', + text='', + items=[('Configure External COM Ports', self.configureExternalSerialMode), + ('Configure Arduino I/O', self.configureArduinoIoMode)], + buttons=[('Back', 'back', 'ESC')]) + if action == 'back': + return + selection() + + def getConfig(self): + with open(self.configureFile, 'r') as f: + config = json.load(f, object_pairs_hook=OrderedDict) + return config + + def saveConfig(self, jsonSrc): + with open(self.configureFile, 'w') as f: + json.dump(jsonSrc, f, indent=4, separators=(',', ': ')) + + def pinmuxArray(self, index): + return self.config['Arduino_pinmux_map']['IO' + str(index)] + + def _pullMode(self, index): + return self.config['User_configuration']['IO' + str(index) + '_PULL_MODE'] + + def pullMode(self, index): + pullModeMap = {'Hiz': mraa.MODE_HIZ, + 'Pull-up': mraa.MODE_PULLUP, + 'Pull-down': mraa.MODE_PULLDOWN} + return pullModeMap[self._pullMode(index)] + + def _setPinmuxOfUserConfig(self, pinmux, index): + self.config['User_configuration']['IO' + str(index) + '_MODE'] = pinmux + + def _pinmuxOfUserConfig(self, index): + return self.config['User_configuration']['IO' + str(index) + '_MODE'] + + def setPinmuxOfUserConfig(self, pinmux, index=None): + if index is not None: + self._setPinmuxOfUserConfig(pinmux, index) + else: + for i in range(0, 20): + pinmuxes = self.pinmuxArray(i) + if pinmux in ' '.join(pinmuxes): + self._setPullModeOfUserConfig(i, 'Hiz') + self._setPinmuxOfUserConfig([n for n in pinmuxes if pinmux in n][0], i) + + def resetPinmuxOfUserConfig(self, pinmux): + for i in range(0, 20): + pinmuxes = self.pinmuxArray(i) + if pinmux in ' '.join(pinmuxes): + defaultPinmux = pinmuxes[0] + self._setPinmuxOfUserConfig(defaultPinmux, i) + self._setPullModeOfUserConfig(i, 'Hiz') + if 'GPIO' in defaultPinmux: + self.setPinmuxToGpio(defaultPinmux, i) + elif 'IIC_SDA' in defaultPinmux: + mraa.I2c(0) + + def setPinmuxToGpio(self, gpioPinmux, index): + direction = gpioPinmux.split('_')[1].lstrip().rstrip().lower() + gpio = mraa.Gpio(index) + gpio.dir(mraa.DIR_OUT if direction == 'output' else mraa.DIR_IN) + if direction == 'output': + gpio.write(0) + gpio.mode(self.pullMode(index)) + + def checkPinmuxConfig(self, pinmux, index=None): + for i in range(0, 20): + if index is None or index == i: + if pinmux in self._pinmuxOfUserConfig(i): + return 1 + return 0 + + def checkPullModeConfig(self, pullmode, index): + if pullmode in self._pullMode(index): + return 1 + return 0 + + def _setPullModeOfUserConfig(self, index, pullMode): + self.config['User_configuration']['IO' + str(index) + '_PULL_MODE'] = pullMode + + def getDirection(self, index): + if self.checkPinmuxConfig('GPIO_Input', index): + return 'Input' + elif self.checkPinmuxConfig('GPIO_Output', index): + return 'Output' + else: + return '--' + + def getPullMode(self, index): + if self.checkPullModeConfig('Pull-down', index): + return 'Pull-down' + elif self.checkPullModeConfig('Pull-up', index): + return 'Pull-up' + elif self.checkPullModeConfig('Hiz', index): + return 'Hiz' + + def configureArduinoGpio(self): + gpioIndex = 0 + dirIndex = 0 + pullmodeIndex = 0 + while True: + gm = GridForm(self.topmenu.gscreen, # screen + "Enable GPIO", # title + 1, 27) # 27x1 grid + g = GridForm(self.topmenu.gscreen, # screen + "Enable GPIO", # title + 4, 2) # 2x4 grid + gm.add(Label('Gpio | Direction | Pull Mode'), 0, 0) + gm.add(Label('-------+-----------+----------'), 0, 1) + for i in range(0, 20): + gpio = 'Gpio{:<3}'.format(str(i)) + direction = ' {:<10}'.format(self.getDirection(i)) + pullmode = ' {:<9}'.format(self.getPullMode(i)) + label = '%s|%s|%s' % (gpio, direction, pullmode) + gm.add(Label(label), 0, i + 2) + gm.add(Label(' '), 0, 23) + lbGpio = Listbox(height = 1, scroll = 0, returnExit = 0, width = 6, border = 0) + for i in range(0, 20): + lbGpio.append('Gpio' + str(i), i) + lbGpio.setCurrent(gpioIndex) + lbDir = Listbox(height = 1, scroll = 0, returnExit = 0, width = 11, border = 0) + lbDir.append('Input', 0) + lbDir.append('Output', 1) + lbDir.setCurrent(dirIndex) + lbPullMode = Listbox(height = 1, scroll = 0, returnExit = 0, width = 10, border = 0) + lbPullMode.append('Hiz', 0) + lbPullMode.append('Pull-up', 1) + lbPullMode.append('Pull-down', 2) + lbPullMode.setCurrent(pullmodeIndex) + g.add(Label('Gpio: '), 0, 0) + g.add(Label('Direction: '), 1, 0) + g.add(Label('Pull-Mode: '), 2, 0) + g.add(lbGpio, 0, 1) + g.add(lbDir, 1, 1) + g.add(lbPullMode, 2, 1) + btnOk = ButtonBar(screen = self.topmenu.gscreen, buttonlist = [('Ok', 1)], compact = 1) + g.add(btnOk, 3, 1) + gm.add(g, 0, 24) + gm.add(Label(' '), 0, 25) + btnBack = ButtonBar(screen = self.topmenu.gscreen, buttonlist = [('Back', 'back', 'ESC')]) + gm.add(btnBack, 0, 26) + result = gm.runOnce() + if btnBack.buttonPressed(result) == 'back': + return + def selectedPullMode(item): + if item == 2: + return 'Pull-down' + elif item == 1: + return 'Pull-up' + elif item == 0: + return 'Hiz' + if btnOk.buttonPressed(result) == 1: + gpioIndex = lbGpio.current() + dirIndex = lbDir.current() + pullmodeIndex = lbPullMode.current() + if dirIndex == 0: # input + self.setPinmuxOfUserConfig('GPIO_Input', gpioIndex) + self._setPullModeOfUserConfig(gpioIndex, selectedPullMode(pullmodeIndex)) + self.setPinmuxToGpio('GPIO_Input', gpioIndex) + elif dirIndex == 1: # output + self.setPinmuxOfUserConfig('GPIO_Output', gpioIndex) + self._setPullModeOfUserConfig(gpioIndex, selectedPullMode(pullmodeIndex)) + self.setPinmuxToGpio('GPIO_Output', gpioIndex) + self.saveConfig(self.config) + + def configureArduinoI2c(self): + btnchoicewind = ButtonChoiceWindow(screen=self.topmenu.gscreen, + title='Enable I2C on IO18 & IO19', + text='', + buttons=['Enable', 'Disable', ('Cancel', 'ESC')], + width=40) + if btnchoicewind == 'cancel': + return + elif btnchoicewind == 'enable': + i2c = mraa.I2c(0) + self.setPinmuxOfUserConfig('I2C') + elif (btnchoicewind == 'disable') and self.checkPinmuxConfig('I2C'): + self.resetPinmuxOfUserConfig('I2C') + self.saveConfig(self.config) + + def configureArduinoSpi(self): + btnchoicewind = ButtonChoiceWindow(screen=self.topmenu.gscreen, + title='Enable SPI on IO10-IO13', + text='', + buttons=['Enable', 'Disable', ('Cancel', 'ESC')], + width=40) + if btnchoicewind == 'cancel': + return + elif btnchoicewind == 'enable': + spi = mraa.Spi(0) + self.setPinmuxOfUserConfig('SPI') + elif btnchoicewind == 'disable' and self.checkPinmuxConfig('SPI'): + self.resetPinmuxOfUserConfig('SPI') + self.saveConfig(self.config) + + def configureArduinoUart(self): + ckboxtree = CheckboxTree(height=2, scroll=0) + ckboxtree.append(text='RX & TX', item=1, selected=self.checkPinmuxConfig('UART_RX')) + ckboxtree.append(text='CTS & RTS', item=2, selected=self.checkPinmuxConfig('UART_CTS')) + buttonbar = ButtonBar(screen=self.topmenu.gscreen, buttonlist=[('Ok', 'ok'), ('Cancel', 'cancel', 'ESC')]) + g = GridForm(self.topmenu.gscreen, # screen + 'Enable UART on IO0-IO3', # title + 1, 2) # 2x1 grid + g.add(ckboxtree, 0, 0) + g.add(buttonbar, 0, 1) + result = g.runOnce() + if buttonbar.buttonPressed(result) == 'cancel': + return + + selected = ckboxtree.getSelection() + if 1 in selected: + uart = mraa.Uart(0) + uart.setFlowcontrol(False, True if 2 in selected else False) + self.setPinmuxOfUserConfig('UART_RX') + self.setPinmuxOfUserConfig('UART_TX') + if 2 in selected: + self.setPinmuxOfUserConfig('UART_CTS') + self.setPinmuxOfUserConfig('UART_RTS') + else: + self.resetPinmuxOfUserConfig('UART_CTS') + self.resetPinmuxOfUserConfig('UART_RTS') + else: + self.resetPinmuxOfUserConfig('UART') + self.saveConfig(self.config) + + def configureArduinoPwm(self): + ckboxtree = CheckboxTree(height=6, scroll=0) + ckboxtree.append(text='PWM 4', item=4, selected=self.checkPinmuxConfig('PWM_4')) + ckboxtree.append(text='PWM 5', item=5, selected=self.checkPinmuxConfig('PWM_5')) + ckboxtree.append(text='PWM 6', item=6, selected=self.checkPinmuxConfig('PWM_6')) + ckboxtree.append(text='PWM 7', item=7, selected=self.checkPinmuxConfig('PWM_7')) + ckboxtree.append(text='PWM 8', item=8, selected=self.checkPinmuxConfig('PWM_8')) + ckboxtree.append(text='PWM 9', item=9, selected=self.checkPinmuxConfig('PWM_9')) + buttonbar = ButtonBar(screen=self.topmenu.gscreen, buttonlist=[('Ok', 'ok'), ('Cancel', 'cancel', 'ESC')]) + g = GridForm(self.topmenu.gscreen, # screen + 'Enable PWM on IO4-IO9', # title + 1, 2) # 1x1 grid + g.add(ckboxtree, 0, 0) + g.add(buttonbar, 0, 1) + result = g.runOnce() + if buttonbar.buttonPressed(result) == 'cancel': + return + selected = ckboxtree.getSelection() + for n in range(4, 10): + if n in selected: + pwm = mraa.Pwm(n) + self.setPinmuxOfUserConfig('PWM_' + str(n)) + else: + self.resetPinmuxOfUserConfig('PWM_' + str(n)) + self.saveConfig(self.config) + + def configureArduinoAdc(self): + ckboxtree = CheckboxTree(height=6, scroll=0) + ckboxtree.append(text='ADC 0', item=0, selected=self.checkPinmuxConfig('ADC_0')) + ckboxtree.append(text='ADC 1', item=1, selected=self.checkPinmuxConfig('ADC_1')) + ckboxtree.append(text='ADC 2', item=2, selected=self.checkPinmuxConfig('ADC_2')) + ckboxtree.append(text='ADC 3', item=3, selected=self.checkPinmuxConfig('ADC_3')) + ckboxtree.append(text='ADC 4', item=4, selected=self.checkPinmuxConfig('ADC_4')) + ckboxtree.append(text='ADC 5', item=5, selected=self.checkPinmuxConfig('ADC_5')) + buttonbar = ButtonBar(screen=self.topmenu.gscreen, buttonlist=[('Ok', 'ok'), ('Cancel', 'cancel', 'ESC')]) + g = GridForm(self.topmenu.gscreen, # screen + 'Enable ADC on IO14-IO19', # title + 1, 2) # 1x1 grid + g.add(ckboxtree, 0, 0) + g.add(buttonbar, 0, 1) + result = g.runOnce() + if buttonbar.buttonPressed(result) == 'cancel': + return + selected = ckboxtree.getSelection() + for n in range(0, 6): + if n in selected: + aio = mraa.Aio(n) + self.setPinmuxOfUserConfig('ADC_' + str(n)) + else: + self.resetPinmuxOfUserConfig('ADC_' + str(n)) + self.saveConfig(self.config) + + def configureArduinoIoMode(self): + while True: + self.config = self.getConfig() + ioInfor = ' Pin | Current | Pinmux\n -----+------------+-------------------------------------------\n' + for i in range(0, 20): + ioInfor += ' IO{:<3}'.format(str(i)) + ioInfor += '| {:<11}'.format(self.config['User_configuration']['IO' + str(i) + '_MODE']) + ioInfor += '| ' + ' | '.join(self.config['Arduino_pinmux_map']['IO' + str(i)]) + ioInfor += '\n' + action, selection = ListboxChoiceWindow(screen=self.topmenu.gscreen, + title='Configure Arduino I/O', + text=ioInfor, + items=[('Enable GPIO', self.configureArduinoGpio), + ('Enable I2C on IO18 & IO19', self.configureArduinoI2c), + ('Enable SPI on IO10-IO13', self.configureArduinoSpi), + ('Enable UART on IO0-IO3', self.configureArduinoUart), + ('Enable PWM on IO4-IO9', self.configureArduinoPwm), + ('Enable ADC on IO14-IO19', self.configureArduinoAdc)], + buttons=[('Back', 'back', 'ESC')], + width=68) + if action == 'back': + return + selection() + + def configureExternalSerialMode(self): + self.config = self.getConfig() + modeItems = ['RS232', 'RS485', 'RS422'] + modeAction, modeSelection = ListboxChoiceWindow(screen=self.topmenu.gscreen, + title='Configure External COM Ports', + text='Select a mode:', + items=modeItems, + buttons=[('Ok', 'ok'), ('Cancel', 'cancel', 'ESC')], + default=self.currentMode()) + if modeAction == 'cancel': + return + switchMode = modeItems[modeSelection] + self.terminateStatus = '' + if (switchMode == 'RS485') or (switchMode == 'RS422'): + self.terminateStatus = self.selectTerminate() + if self.topmenu.boardType == 'IOT2050-BASIC': + self.setBasicBoard(switchMode) + elif self.topmenu.boardType == 'IOT2050-ADVANCED': + self.setAdvancedBoard(switchMode) + else: + return + terminateOpt = ' -t' if self.terminateStatus == 'on' else '' + subprocess.call('switchserialmode -m ' + switchMode + terminateOpt, shell=True) + self.config['User_configuration']['External_Serial_Current_Mode'] = switchMode + self.saveConfig(self.config) + subprocess.call('sync', shell=True) + + def currentMode(self): + mode = self.config['User_configuration']['External_Serial_Current_Mode'] + if mode == 'RS232': + return 0 + elif mode == 'RS485': + return 1 + elif mode == 'RS422': + return 2 + return 0 + + def setAdvancedBoard(self, mode): + command = '' + if mode == 'RS232': + command = 'switchserialmode cp210x -D cp2102n24 -m gpio -v 0' + elif mode == 'RS485': + command = 'switchserialmode cp210x -D cp2102n24 -m RS485 -g 1' + elif mode == 'RS422': + command = 'switchserialmode cp210x -D cp2102n24 -m gpio -v 1' + subprocess.call(command, shell=True) + self.config['User_configuration']['External_Serial_Init_Mode'] = mode + if self.terminateStatus == 'on' or self.terminateStatus == 'off': + self.config['User_configuration']['External_Serial_Terminate'] = self.terminateStatus + self.saveConfig(self.config) + if mode == 'RS485': + self.setRS485SetupHoldTime() + ButtonChoiceWindow(screen=self.topmenu.gscreen, + title='Note', + text='You need to power cycle the device for the changes to take effect', + buttons=['Ok']) + + def setRS485SetupHoldTime(self): + command = 'switchserialmode cp210x -D CP2102N24 -d | grep -o -P \"setup-time\\(0x\\w*\\)\" | grep -o -P \"0x\\w*\"' + setup = subprocess.check_output(command, shell=True).lstrip().rstrip().decode('utf-8').lower() + command = 'switchserialmode cp210x -D CP2102N24 -d | grep -o -P \"hold-time\\(0x\\w*\\)\" | grep -o -P \"0x\\w*\"' + hold = subprocess.check_output(command, shell=True).lstrip().rstrip().decode('utf-8').lower() + + disSetup = '0xaa' if int(setup, 0) == 0 else setup + disHold = '0xaa' if int(hold, 0) == 0 else hold + + action, values = EntryWindow(screen=self.topmenu.gscreen, + title='Set The Setup and Hold Time of RS485 Mode', + text='The setup and hold time will affect the transfer stable in RS485 mode', + prompts=[('Setup (0x00 ~ 0xffff): ', disSetup), ('Hold (0x00 ~ 0xffff): ', disHold)], + width=70, + entryWidth=50, + buttons=[('OK'), ('Cancel', 'cancel', 'ESC')]) + + if action == 'cancel': + return + + command = 'switchserialmode cp210x -D cp2102n24' + if int(setup, 0) != int(values[0], 0): + command += ' -s ' + values[0] + if int(hold, 0) != int(values[1], 0): + command += ' -o ' + values[1] + if ('-s' in command) or ('-o' in command): + subprocess.call(command, shell=True) + + def setBasicBoard(self, mode): + persistentReturn = ButtonChoiceWindow(screen=self.topmenu.gscreen, + title='Configure Serial Mode', + text='Do you want to make your changes persistent?\n(Mode setting will be kept after reboot.) ', + buttons=[('Yes', 'yes'), ('No', 'no', 'ESC')], + width=40) + command = 'switchserialmode ttyuart -D /dev/ttyS2 -m ' + mode + subprocess.call(command, shell=True) + if persistentReturn == 'yes': + self.config['User_configuration']['External_Serial_Init_Mode'] = mode + if self.terminateStatus == 'on' or self.terminateStatus == 'off': + self.config['User_configuration']['External_Serial_Terminate'] = self.terminateStatus + self.saveConfig(self.config) + + def currentTerminate(self): + terminate = self.config['User_configuration']['External_Serial_Terminate'] + if terminate == 'off': + return 0 + elif terminate == 'on': + return 1 + else: + return 0 + + def selectTerminate(self): + default = self.config['User_configuration']['External_Serial_Terminate'] + rdgroup = RadioGroup() + rda = rdgroup.add(title = 'Turn off terminate resistor', value = 0, default = 0 if self.currentTerminate() else 1) + rdb = rdgroup.add(title = 'Turn on terminate resistor', value = 1, default = self.currentTerminate()) + buttonbar = ButtonBar(screen=self.topmenu.gscreen, buttonlist=[('Ok', 'ok'), ('Cancel', 'cancel', 'ESC')]) + g = GridForm(self.topmenu.gscreen, + 'Set the terminate resistor', + 1, 3) + g.add(rda, 0, 0) + g.add(rdb, 0, 1) + g.add(buttonbar, 0, 2) + result = g.runOnce() + if buttonbar.buttonPressed(result) == 'cancel': + return default + return 'on' if rdgroup.getSelection() else 'off' + + +def main(): + try: + mainwindow = TopMenu() + mainwindow.show() + except: + pass + finally: + mainwindow.close() + return '' + + +if __name__ == '__main__': + main() diff --git a/recipes-app/iot2050setup/iot2050setup_0.1.bb b/recipes-app/iot2050setup/iot2050setup_0.1.bb new file mode 100644 index 000000000..6268f3edc --- /dev/null +++ b/recipes-app/iot2050setup/iot2050setup_0.1.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "Board configuration tool" +MAINTAINER = "nian.gao@siemens.com" + +SRC_URI = "file://iot2050setup.py" + +DEBIAN_DEPENDS = "python3-newt, mraa" + +inherit dpkg-raw + +do_install() { + install -v -d ${D}/usr/bin/ + install -v -m 755 ${WORKDIR}/iot2050setup.py ${D}/usr/bin/iot2050setup +} diff --git a/recipes-app/mraa/files/0001-Add-Node-7.x-aka-V8-5.2-support.patch b/recipes-app/mraa/files/0001-Add-Node-7.x-aka-V8-5.2-support.patch new file mode 100644 index 000000000..885c39561 --- /dev/null +++ b/recipes-app/mraa/files/0001-Add-Node-7.x-aka-V8-5.2-support.patch @@ -0,0 +1,330 @@ +From 1a5aadcd66e85c63d228bfd811a521d617c22a38 Mon Sep 17 00:00:00 2001 +From: Patrick Schneider +Date: Thu, 13 Apr 2017 15:02:53 +0200 +Subject: [PATCH] Add Node 7.x aka V8 5.2+ support + +* Use WeakCallbackInfo instead of WeakCallbackData +* Use GetPrivate instead of GetHiddenValue +* Adopted new signature for SetWeak to support destructor calling +* SetAccessor deprecation fixed +* Proper version checks where applicable + +Upstream-Status: Submitted [https://github.com/swig/swig/pull/968] + +Signed-off-by: Paul Eggleton +--- + Lib/javascript/v8/javascriptcode.swg | 27 +++++++++++++++++----- + Lib/javascript/v8/javascripthelpers.swg | 29 +++++++++++++++++++++--- + Lib/javascript/v8/javascriptinit.swg | 16 +++++++++++-- + Lib/javascript/v8/javascriptrun.swg | 40 ++++++++++++++++++++++++++++----- + 4 files changed, 95 insertions(+), 17 deletions(-) + +diff --git a/Lib/javascript/v8/javascriptcode.swg b/Lib/javascript/v8/javascriptcode.swg +index fb7d55c..b8c5089 100644 +--- a/Lib/javascript/v8/javascriptcode.swg ++++ b/Lib/javascript/v8/javascriptcode.swg +@@ -133,10 +133,13 @@ static void $jswrapper(v8::Isolate *isolate, v8::Persistent object, v + SWIGV8_Proxy *proxy = static_cast(parameter); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < SWIGV8_SETWEAK_VERSION) + static void $jswrapper(v8::Isolate *isolate, v8::Persistent *object, SWIGV8_Proxy *proxy) { +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + static void $jswrapper(const v8::WeakCallbackData &data) { + v8::Local object = data.GetValue(); + SWIGV8_Proxy *proxy = data.GetParameter(); ++#else ++ static void $jswrapper(const v8::WeakCallbackInfo &data) { ++ SWIGV8_Proxy *proxy = data.GetParameter(); + #endif + + if(proxy->swigCMemOwn && proxy->swigCObject) { +@@ -147,7 +150,9 @@ static void $jswrapper(const v8::WeakCallbackData &dat + } + delete proxy; + ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + object.Clear(); ++#endif + + #if (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < 0x031710) + object.Dispose(); +@@ -155,7 +160,7 @@ static void $jswrapper(const v8::WeakCallbackData &dat + object.Dispose(isolate); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < 0x032100) + object->Dispose(isolate); +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + object->Dispose(); + #endif + } +@@ -177,10 +182,13 @@ static void $jswrapper(v8::Isolate *isolate, v8::Persistent object, v + SWIGV8_Proxy *proxy = static_cast(parameter); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < SWIGV8_SETWEAK_VERSION) + static void $jswrapper(v8::Isolate *isolate, v8::Persistent< v8::Object> *object, SWIGV8_Proxy *proxy) { +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + static void $jswrapper(const v8::WeakCallbackData &data) { + v8::Local object = data.GetValue(); + SWIGV8_Proxy *proxy = data.GetParameter(); ++#else ++static void $jswrapper(const v8::WeakCallbackInfo &data) { ++ SWIGV8_Proxy *proxy = data.GetParameter(); + #endif + + if(proxy->swigCMemOwn && proxy->swigCObject) { +@@ -197,7 +205,7 @@ static void $jswrapper(const v8::WeakCallbackData &dat + object->Dispose(isolate); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < SWIGV8_SETWEAK_VERSION) + object->Dispose(); +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + object.Clear(); + #endif + } +@@ -211,7 +219,11 @@ static void $jswrapper(const v8::WeakCallbackData &dat + * ----------------------------------------------------------------------------- */ + %fragment("js_getter", "templates") + %{ ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + static SwigV8ReturnValue $jswrapper(v8::Local property, const SwigV8PropertyCallbackInfo &info) { ++#else ++static SwigV8ReturnValue $jswrapper(v8::Local property, const SwigV8PropertyCallbackInfo &info) { ++#endif + SWIGV8_HANDLESCOPE(); + + v8::Handle jsresult; +@@ -233,8 +245,11 @@ fail: + * ----------------------------------------------------------------------------- */ + %fragment("js_setter", "templates") + %{ +-static void $jswrapper(v8::Local property, v8::Local value, +- const SwigV8PropertyCallbackInfoVoid &info) { ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) ++static void $jswrapper(v8::Local property, v8::Local value, const SwigV8PropertyCallbackInfoVoid &info) { ++#else ++static void $jswrapper(v8::Local property, v8::Local value, const SwigV8PropertyCallbackInfoVoid &info) { ++#endif + SWIGV8_HANDLESCOPE(); + + $jslocals +diff --git a/Lib/javascript/v8/javascripthelpers.swg b/Lib/javascript/v8/javascripthelpers.swg +index 091467d..7461079 100644 +--- a/Lib/javascript/v8/javascripthelpers.swg ++++ b/Lib/javascript/v8/javascripthelpers.swg +@@ -6,11 +6,16 @@ typedef v8::InvocationCallback SwigV8FunctionCallback; + typedef v8::AccessorGetter SwigV8AccessorGetterCallback; + typedef v8::AccessorSetter SwigV8AccessorSetterCallback; + typedef v8::AccessorInfo SwigV8PropertyCallbackInfoVoid; +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + typedef v8::FunctionCallback SwigV8FunctionCallback; + typedef v8::AccessorGetterCallback SwigV8AccessorGetterCallback; + typedef v8::AccessorSetterCallback SwigV8AccessorSetterCallback; + typedef v8::PropertyCallbackInfo SwigV8PropertyCallbackInfoVoid; ++#else ++typedef v8::FunctionCallback SwigV8FunctionCallback; ++typedef v8::AccessorNameGetterCallback SwigV8AccessorGetterCallback; ++typedef v8::AccessorNameSetterCallback SwigV8AccessorSetterCallback; ++typedef v8::PropertyCallbackInfo SwigV8PropertyCallbackInfoVoid; + #endif + + /** +@@ -65,18 +70,36 @@ SWIGRUNTIME void SWIGV8_AddStaticFunction(v8::Handle obj, const char + */ + SWIGRUNTIME void SWIGV8_AddStaticVariable(v8::Handle obj, const char* symbol, + SwigV8AccessorGetterCallback getter, SwigV8AccessorSetterCallback setter) { ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + obj->SetAccessor(SWIGV8_SYMBOL_NEW(symbol), getter, setter); ++#else ++ obj->SetAccessor(SWIGV8_CURRENT_CONTEXT(), SWIGV8_SYMBOL_NEW(symbol), getter, setter); ++#endif + } + +-SWIGRUNTIME void JS_veto_set_variable(v8::Local property, v8::Local value, +- const SwigV8PropertyCallbackInfoVoid& info) ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) ++SWIGRUNTIME void JS_veto_set_variable(v8::Local property, v8::Local value, const SwigV8PropertyCallbackInfoVoid& info) ++#else ++SWIGRUNTIME void JS_veto_set_variable(v8::Local property, v8::Local value, const SwigV8PropertyCallbackInfoVoid& info) ++#endif + { + char buffer[256]; + char msg[512]; + int res; + ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + property->WriteUtf8(buffer, 256); + res = sprintf(msg, "Tried to write read-only variable: %s.", buffer); ++#else ++ v8::Local sproperty; ++ if (property->ToString(SWIGV8_CURRENT_CONTEXT()).ToLocal(&sproperty)) { ++ sproperty->WriteUtf8(buffer, 256); ++ res = sprintf(msg, "Tried to write read-only variable: %s.", buffer); ++ } ++ else { ++ res = -1; ++ } ++#endif + + if(res<0) { + SWIG_exception(SWIG_ERROR, "Tried to write read-only variable."); +diff --git a/Lib/javascript/v8/javascriptinit.swg b/Lib/javascript/v8/javascriptinit.swg +index 34befa7..86008d9 100644 +--- a/Lib/javascript/v8/javascriptinit.swg ++++ b/Lib/javascript/v8/javascriptinit.swg +@@ -7,15 +7,27 @@ SWIG_V8_SetModule(void *, swig_module_info *swig_module) { + v8::Local global_obj = SWIGV8_CURRENT_CONTEXT()->Global(); + v8::Local mod = SWIGV8_EXTERNAL_NEW(swig_module); + assert(!mod.IsEmpty()); ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + global_obj->SetHiddenValue(SWIGV8_STRING_NEW("swig_module_info_data"), mod); ++#else ++ v8::Local privateKey = v8::Private::ForApi(v8::Isolate::GetCurrent(), SWIGV8_STRING_NEW("swig_module_info_data")); ++ global_obj->SetPrivate(SWIGV8_CURRENT_CONTEXT(), privateKey, mod); ++#endif + } + + SWIGRUNTIME swig_module_info * + SWIG_V8_GetModule(void *) { + v8::Local global_obj = SWIGV8_CURRENT_CONTEXT()->Global(); ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + v8::Local moduleinfo = global_obj->GetHiddenValue(SWIGV8_STRING_NEW("swig_module_info_data")); ++#else ++ v8::Local privateKey = v8::Private::ForApi(v8::Isolate::GetCurrent(), SWIGV8_STRING_NEW("swig_module_info_data")); ++ v8::Local moduleinfo; ++ if (!global_obj->GetPrivate(SWIGV8_CURRENT_CONTEXT(), privateKey).ToLocal(&moduleinfo)) ++ return 0; ++#endif + +- if (moduleinfo.IsEmpty()) ++ if (moduleinfo.IsEmpty() || moduleinfo->IsNull() || moduleinfo->IsUndefined()) + { + // It's not yet loaded + return 0; +@@ -23,7 +35,7 @@ SWIG_V8_GetModule(void *) { + + v8::Local moduleinfo_extern = v8::Local::Cast(moduleinfo); + +- if (moduleinfo_extern.IsEmpty()) ++ if (moduleinfo_extern.IsEmpty() || moduleinfo_extern->IsNull() || moduleinfo_extern->IsUndefined()) + { + // Something's not right + return 0; +diff --git a/Lib/javascript/v8/javascriptrun.swg b/Lib/javascript/v8/javascriptrun.swg +index 5ac52a5..30002c0 100644 +--- a/Lib/javascript/v8/javascriptrun.swg ++++ b/Lib/javascript/v8/javascriptrun.swg +@@ -193,8 +193,10 @@ public: + void (*dtor) (v8::Isolate *isolate, v8::Persistent< v8::Value> object, void *parameter); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < SWIGV8_SETWEAK_VERSION) + void (*dtor) (v8::Isolate *isolate, v8::Persistent< v8::Object > *object, SWIGV8_Proxy *proxy); +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + void (*dtor) (const v8::WeakCallbackData &data); ++#else ++ void (*dtor) (const v8::WeakCallbackInfo &data); + #endif + }; + +@@ -241,9 +243,12 @@ SWIGRUNTIME void SWIGV8_Proxy_DefaultDtor(v8::Isolate *, v8::Persistent< v8::Val + SWIGV8_Proxy *proxy = static_cast(parameter); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < SWIGV8_SETWEAK_VERSION) + SWIGRUNTIME void SWIGV8_Proxy_DefaultDtor(v8::Isolate *, v8::Persistent< v8::Object > *object, SWIGV8_Proxy *proxy) { +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + SWIGRUNTIME void SWIGV8_Proxy_DefaultDtor(const v8::WeakCallbackData &data) { + SWIGV8_Proxy *proxy = data.GetParameter(); ++#else ++SWIGRUNTIME void SWIGV8_Proxy_DefaultDtor(const v8::WeakCallbackInfo &data) { ++ SWIGV8_Proxy *proxy = data.GetParameter(); + #endif + + delete proxy; +@@ -312,12 +317,18 @@ SWIGRUNTIME void SWIGV8_SetPrivateData(v8::Handle obj, void *ptr, sw + } else { + cdata->handle.MakeWeak(cdata, SWIGV8_Proxy_DefaultDtor); + } +-#else ++#elifif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + if(cdata->swigCMemOwn && (SWIGV8_ClientData*)info->clientdata) { + cdata->handle.SetWeak(cdata, ((SWIGV8_ClientData*)info->clientdata)->dtor); + } else { + cdata->handle.SetWeak(cdata, SWIGV8_Proxy_DefaultDtor); + } ++#else ++ if(cdata->swigCMemOwn && (SWIGV8_ClientData*)info->clientdata) { ++ cdata->handle.SetWeak(cdata, ((SWIGV8_ClientData*)info->clientdata)->dtor, v8::WeakCallbackType::kParameter); ++ } else { ++ cdata->handle.SetWeak(cdata, SWIGV8_Proxy_DefaultDtor, v8::WeakCallbackType::kParameter); ++ } + #endif + + #if (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < 0x031710) +@@ -470,7 +481,14 @@ int SwigV8Packed_Check(v8::Handle valRef) { + + v8::Handle objRef = valRef->ToObject(); + if(objRef->InternalFieldCount() < 1) return false; ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + v8::Handle flag = objRef->GetHiddenValue(SWIGV8_STRING_NEW("__swig__packed_data__")); ++#else ++ v8::Local privateKey = v8::Private::ForApi(v8::Isolate::GetCurrent(), SWIGV8_STRING_NEW("__swig__packed_data__")); ++ v8::Local flag; ++ if (!objRef->GetPrivate(SWIGV8_CURRENT_CONTEXT(), privateKey).ToLocal(&flag)) ++ return false; ++#endif + return (flag->IsBoolean() && flag->BooleanValue()); + } + +@@ -519,10 +537,13 @@ SWIGRUNTIME void _wrap_SwigV8PackedData_delete(v8::Isolate *isolate, v8::Persist + SwigV8PackedData *cdata = static_cast(parameter); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < SWIGV8_SETWEAK_VERSION) + SWIGRUNTIME void _wrap_SwigV8PackedData_delete(v8::Isolate *isolate, v8::Persistent *object, SwigV8PackedData *cdata) { +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + SWIGRUNTIME void _wrap_SwigV8PackedData_delete(const v8::WeakCallbackData &data) { + v8::Local object = data.GetValue(); + SwigV8PackedData *cdata = data.GetParameter(); ++#else ++SWIGRUNTIME void _wrap_SwigV8PackedData_delete(const v8::WeakCallbackInfo &data) { ++ SwigV8PackedData *cdata = data.GetParameter(); + #endif + + delete cdata; +@@ -537,7 +558,7 @@ SWIGRUNTIME void _wrap_SwigV8PackedData_delete(const v8::WeakCallbackDataDispose(isolate); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < SWIGV8_SETWEAK_VERSION) + object->Dispose(); +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + object.Clear(); + #endif + } +@@ -550,7 +571,12 @@ v8::Handle SWIGV8_NewPackedObj(void *data, size_t size, swig_type_inf + // v8::Handle obj = SWIGV8_OBJECT_NEW(); + v8::Local obj = SWIGV8_OBJECT_NEW(); + ++#if (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + obj->SetHiddenValue(SWIGV8_STRING_NEW("__swig__packed_data__"), SWIGV8_BOOLEAN_NEW(true)); ++#else ++ v8::Local privateKey = v8::Private::ForApi(v8::Isolate::GetCurrent(), SWIGV8_STRING_NEW("__swig__packed_data__")); ++ obj->SetPrivate(SWIGV8_CURRENT_CONTEXT(), privateKey, SWIGV8_BOOLEAN_NEW(true)); ++#endif + + #if (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < 0x031511) + obj->SetPointerInInternalField(0, cdata); +@@ -573,9 +599,11 @@ v8::Handle SWIGV8_NewPackedObj(void *data, size_t size, swig_type_inf + cdata->handle.MakeWeak(v8::Isolate::GetCurrent(), cdata, _wrap_SwigV8PackedData_delete); + #elif (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < SWIGV8_SETWEAK_VERSION) + cdata->handle.MakeWeak(cdata, _wrap_SwigV8PackedData_delete); +-#else ++#elif (V8_MAJOR_VERSION-0) < 5 || (V8_MAJOR_VERSION == 5 && V8_MINOR_VERSION < 2) + cdata->handle.SetWeak(cdata, _wrap_SwigV8PackedData_delete); + // v8::V8::SetWeak(&cdata->handle, cdata, _wrap_SwigV8PackedData_delete); ++#else ++ cdata->handle.SetWeak(cdata, _wrap_SwigV8PackedData_delete, v8::WeakCallbackType::kParameter); + #endif + + #if (V8_MAJOR_VERSION-0) < 4 && (SWIG_V8_VERSION < 0x031710) +-- +2.9.5 + diff --git a/recipes-app/mraa/files/0001-aio.c-fix-mraa_aio_set_bit-for-result-scaling.patch b/recipes-app/mraa/files/0001-aio.c-fix-mraa_aio_set_bit-for-result-scaling.patch new file mode 100644 index 000000000..7844e643e --- /dev/null +++ b/recipes-app/mraa/files/0001-aio.c-fix-mraa_aio_set_bit-for-result-scaling.patch @@ -0,0 +1,32 @@ +From 7606faa9af13de293be17fafc1600b8df8999775 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Fri, 1 Nov 2019 18:02:54 +0800 +Subject: [PATCH 1/3] aio.c: fix mraa_aio_set_bit for result scaling + +Signed-off-by: le.jin +--- + src/aio/aio.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/src/aio/aio.c b/src/aio/aio.c +index 48a390b..b1e0478 100644 +--- a/src/aio/aio.c ++++ b/src/aio/aio.c +@@ -265,6 +265,14 @@ mraa_aio_set_bit(mraa_aio_context dev, int bits) + return MRAA_ERROR_INVALID_RESOURCE; + } + dev->value_bit = bits; ++ raw_bits = mraa_adc_raw_bits(); ++ if (raw_bits < dev->value_bit) { ++ shifter_value = dev->value_bit - raw_bits; ++ max_analog_value = ((1 << raw_bits) - 1) << shifter_value; ++ } else { ++ shifter_value = raw_bits - dev->value_bit; ++ max_analog_value = ((1 << raw_bits) - 1) >> shifter_value; ++ } + return MRAA_SUCCESS; + } + +-- +2.22.0 + diff --git a/recipes-app/mraa/files/0002-feat-iot2050-add-iot2050-platform-support.patch b/recipes-app/mraa/files/0002-feat-iot2050-add-iot2050-platform-support.patch new file mode 100644 index 000000000..d791081a4 --- /dev/null +++ b/recipes-app/mraa/files/0002-feat-iot2050-add-iot2050-platform-support.patch @@ -0,0 +1,2197 @@ +From 28e96d6f9da99dcff425df4e0cb87401c02dde31 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Fri, 24 May 2019 14:33:42 +0800 +Subject: [PATCH 2/3] feat:iot2050:add iot2050 platform support + +Add new iot2050 platform support with some modifications +due to lack of support with register level pin mux hooks. +Also add some examples for the iot2050 platform. + +Signed-off-by: le.jin +--- + api/mraa/types.h | 1 + + api/mraa/types.hpp | 1 + + include/arm/siemens/iot2050.h | 40 + + include/arm/siemens/platform.h | 97 ++ + include/arm/siemens/platform_iot2050.h | 34 + + include/mraa_adv_func.h | 2 + + include/mraa_internal_types.h | 13 + + src/CMakeLists.txt | 3 + + src/aio/aio.c | 7 +- + src/arm/arm.c | 6 + + src/arm/siemens/iot2050.c | 1186 ++++++++++++++++++++++++ + src/arm/siemens/platform.c | 41 + + src/arm/siemens/platform_iot2050.c | 367 ++++++++ + src/gpio/gpio.c | 14 +- + src/i2c/i2c.c | 13 +- + src/mraa.c | 2 +- + src/pwm/pwm.c | 7 + + src/spi/spi.c | 28 + + src/uart/uart.c | 34 +- + 19 files changed, 1891 insertions(+), 5 deletions(-) + create mode 100644 include/arm/siemens/iot2050.h + create mode 100644 include/arm/siemens/platform.h + create mode 100644 include/arm/siemens/platform_iot2050.h + create mode 100644 src/arm/siemens/iot2050.c + create mode 100644 src/arm/siemens/platform.c + create mode 100644 src/arm/siemens/platform_iot2050.c + +diff --git a/api/mraa/types.h b/api/mraa/types.h +index f28ba51..3230f1f 100644 +--- a/api/mraa/types.h ++++ b/api/mraa/types.h +@@ -60,6 +60,7 @@ typedef enum { + MRAA_MTK_LINKIT = 17, /**< Mediatek MT7688 based Linkit boards */ + MRAA_MTK_OMEGA2 = 18, /**< MT7688 based Onion Omega2 board */ + MRAA_IEI_TANK = 19, /**< IEI Tank System*/ ++ MRAA_SIEMENS_IOT2050 = 21, /**< Siemens IOT2050 board */ + + // USB platform extenders start at 256 + MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */ +diff --git a/api/mraa/types.hpp b/api/mraa/types.hpp +index 18844b4..8683e35 100644 +--- a/api/mraa/types.hpp ++++ b/api/mraa/types.hpp +@@ -58,6 +58,7 @@ typedef enum { + MTK_LINKIT = 17, /**< Mediatek MT7688 based Linkit boards */ + MTK_OMEGA2 = 18, /**< MT7688 based Onion Omega2 board */ + IEI_TANK = 19, /**< IEI Tank System*/ ++ SIEMENS_IOT2050 = 21, /**< Siemens IOT2050 board */ + + FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */ + +diff --git a/include/arm/siemens/iot2050.h b/include/arm/siemens/iot2050.h +new file mode 100644 +index 0000000..0acf0a0 +--- /dev/null ++++ b/include/arm/siemens/iot2050.h +@@ -0,0 +1,40 @@ ++/* ++ * Author: Le Jin ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#pragma once ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "mraa_internal.h" ++ ++#define PLATFORM_NAME "SIMATIC IOT2050" ++#define MRAA_IOT2050_PINCOUNT (20) ++ ++mraa_board_t * ++ mraa_siemens_iot2050(); ++ ++#ifdef __cplusplus ++} ++#endif +diff --git a/include/arm/siemens/platform.h b/include/arm/siemens/platform.h +new file mode 100644 +index 0000000..4203aa8 +--- /dev/null ++++ b/include/arm/siemens/platform.h +@@ -0,0 +1,97 @@ ++/* ++ * Author: Le Jin ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#ifndef _PLATFORM_H_ ++#define _PLATFORM_H_ ++#ifdef __cplusplus ++extern "C" { ++#endif ++#include ++#include ++#include ++typedef struct { ++ bool (*init)(void); ++ void (*deinit)(void); ++ void (*select_func)(uint8_t group, uint16_t pinIndex, uint8_t func); ++ void (*select_input)(uint8_t group, uint16_t pinIndex); ++ void (*select_output)(uint8_t group, uint16_t pinIndex); ++ void (*select_inout)(uint8_t group, uint16_t pinIndex); ++ void (*select_hiz)(uint8_t group, uint16_t pinIndex); ++ void (*select_pull_up)(uint8_t group, uint16_t pinIndex); ++ void (*select_pull_down)(uint8_t group, uint16_t pinIndex); ++ void (*select_pull_disable)(uint8_t group, uint16_t pinIndex); ++ uint32_t (*get_raw_reg_value)(uint8_t group, uint16_t pinIndex); ++ void (*set_raw_reg_value)(uint8_t group, uint16_t pinIndex, uint32_t value); ++ void (*dump_info)(uint8_t group, uint16_t pinIndex); ++}PinMuxOps_t; ++ ++typedef struct{ ++ bool initialized; ++ PinMuxOps_t ops; ++}PinMuxInterface_t; ++ ++#define VOID_INTERFACE_CALL(instance, function) \ ++do {\ ++ if((instance) && ((PinMuxInterface_t *)instance)->ops.function) \ ++ ((PinMuxInterface_t *)instance)->ops.function(); \ ++}while(0) ++ ++#define VOID_INTERFACE_CALL_WITH_ARGS(instance, function, ...) \ ++do {\ ++ if((instance) && ((PinMuxInterface_t *)instance)->ops.function) \ ++ ((PinMuxInterface_t *)instance)->ops.function(__VA_ARGS__); \ ++}while(0) ++ ++#define INTERFACE_CALL_WITH_ARGS(instance, retType, defaultRetValue, function, ...) \ ++( \ ++ { \ ++ retType ret = defaultRetValue; \ ++ if((instance) && ((PinMuxInterface_t *)instance)->ops.function) \ ++ ret = ((PinMuxInterface_t *)instance)->ops.function(__VA_ARGS__); \ ++ ret; \ ++ } \ ++) ++ ++#ifdef _DEBUG ++#define DEBUG_PRINT(...) fprintf(stderr, __VA_ARGS__) ++#else ++#define DEBUG_PRINT(...) do{}while(0) ++#endif ++ ++void *platfrom_pinmux_get_instance(char *platform); ++#define platform_pinmux_release_instance(instance) VOID_INTERFACE_CALL(instance, deinit) ++#define platform_pinmux_select_func(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, select_func, __VA_ARGS__) ++#define platform_pinmux_select_input(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, select_input, __VA_ARGS__) ++#define platform_pinmux_select_output(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, select_output, __VA_ARGS__) ++#define platform_pinmux_select_inout(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, select_inout, __VA_ARGS__) ++#define platform_pinmux_select_hiz(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, select_hiz, __VA_ARGS__) ++#define platform_pinmux_select_pull_up(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, select_pull_up, __VA_ARGS__) ++#define platform_pinmux_select_pull_down(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, select_pull_down, __VA_ARGS__) ++#define platform_pinmux_select_pull_disable(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, select_pull_disable, __VA_ARGS__) ++#define platform_pinmux_get_raw_reg_value(instance, ...) INTERFACE_CALL_WITH_ARGS(instance, uint32_t, -1, get_raw_reg_value, __VA_ARGS__) ++#define platform_pinmux_set_raw_reg_value(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, set_raw_reg_value, __VA_ARGS__) ++#define platform_pinmux_dump_info(instance, ...) VOID_INTERFACE_CALL_WITH_ARGS(instance, dump_info, __VA_ARGS__) ++#ifdef __cplusplus ++} ++#endif ++#endif +diff --git a/include/arm/siemens/platform_iot2050.h b/include/arm/siemens/platform_iot2050.h +new file mode 100644 +index 0000000..504851b +--- /dev/null ++++ b/include/arm/siemens/platform_iot2050.h +@@ -0,0 +1,34 @@ ++/* ++ * Author: Le Jin ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#ifndef _PLATFORM_IOT2050_H_ ++#define _PLATFORM_IOT2050_H_ ++#ifdef __cplusplus ++extern "C" { ++#endif ++#include "arm/siemens/platform.h" ++PinMuxInterface_t *iot2050_pinmux_get_instance(void); ++#ifdef __cplusplus ++} ++#endif ++#endif +diff --git a/include/mraa_adv_func.h b/include/mraa_adv_func.h +index 5cd9dc7..cd0f3b0 100644 +--- a/include/mraa_adv_func.h ++++ b/include/mraa_adv_func.h +@@ -123,4 +123,6 @@ typedef struct { + int (*uart_read_replace) (mraa_uart_context dev, char* buf, size_t len); + int (*uart_write_replace)(mraa_uart_context dev, const char* buf, size_t len); + mraa_boolean_t (*uart_data_available_replace) (mraa_uart_context dev, unsigned int millis); ++ ++ mraa_result_t (*setup_mux_register) (int phy_pin, int mode); + } mraa_adv_func_t; +diff --git a/include/mraa_internal_types.h b/include/mraa_internal_types.h +index beee8ad..1718b9d 100644 +--- a/include/mraa_internal_types.h ++++ b/include/mraa_internal_types.h +@@ -325,6 +325,19 @@ typedef enum { + } pincmd_t; + + ++/** ++ * Enum representing different mux register mode ++ */ ++ typedef enum { ++ MUX_REGISTER_MODE_GPIO = 0, /**< GPIO mode */ ++ MUX_REGISTER_MODE_UART = 1, /**< UART mode */ ++ MUX_REGISTER_MODE_I2C = 2, /**< I2C mode */ ++ MUX_REGISTER_MODE_SPI = 3, /**< SPI mode */ ++ MUX_REGISTER_MODE_PWM = 4, /**< PWM mode */ ++ MUX_REGISTER_MODE_AIO = 5, /**< AIO mode */ ++ MAX_MUX_REGISTER_MODE ++ } mux_register_mode_t; ++ + /** + * A Structure representing a multiplexer and the required value + */ +diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt +index 35c5488..e802065 100644 +--- a/src/CMakeLists.txt ++++ b/src/CMakeLists.txt +@@ -101,6 +101,9 @@ set (mraa_LIB_ARM_SRCS_NOAUTO + ${PROJECT_SOURCE_DIR}/src/arm/phyboard.c + ${PROJECT_SOURCE_DIR}/src/arm/banana.c + ${PROJECT_SOURCE_DIR}/src/arm/de_nano_soc.c ++ ${PROJECT_SOURCE_DIR}/src/arm/siemens/iot2050.c ++ ${PROJECT_SOURCE_DIR}/src/arm/siemens/platform.c ++ ${PROJECT_SOURCE_DIR}/src/arm/siemens/platform_iot2050.c + ) + + set (mraa_LIB_MIPS_SRCS_NOAUTO +diff --git a/src/aio/aio.c b/src/aio/aio.c +index b1e0478..80e097b 100644 +--- a/src/aio/aio.c ++++ b/src/aio/aio.c +@@ -136,7 +136,12 @@ mraa_aio_init(unsigned int aio) + return NULL; + } + } +- ++ if (board->adv_func->setup_mux_register) { ++ if(board->adv_func->setup_mux_register(pin, MUX_REGISTER_MODE_AIO) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "aio: unable to setup multiplex register for pin"); ++ return NULL; ++ } ++ } + // Create ADC device connected to specified channel + mraa_aio_context dev = mraa_aio_init_internal(board->adv_func, aio, board->pins[pin].aio.pinmap); + if (dev == NULL) { +diff --git a/src/arm/arm.c b/src/arm/arm.c +index 62d6b2e..a464d96 100644 +--- a/src/arm/arm.c ++++ b/src/arm/arm.c +@@ -32,6 +32,7 @@ + #include "arm/beaglebone.h" + #include "arm/phyboard.h" + #include "arm/raspberry_pi.h" ++#include "arm/siemens/iot2050.h" + #include "mraa_internal.h" + + +@@ -102,6 +103,8 @@ mraa_arm_platform() + platform_type = MRAA_96BOARDS; + else if (mraa_file_contains("/proc/device-tree/compatible", "raspberrypi,")) + platform_type = MRAA_RASPBERRY_PI; ++ else if (mraa_file_contains("/proc/device-tree/model", "SIMATIC IOT2050")) ++ platform_type = MRAA_SIEMENS_IOT2050; + } + + switch (platform_type) { +@@ -123,6 +126,9 @@ mraa_arm_platform() + case MRAA_DE_NANO_SOC: + plat = mraa_de_nano_soc(); + break; ++ case MRAA_SIEMENS_IOT2050: ++ plat = mraa_siemens_iot2050(); ++ break; + default: + plat = NULL; + syslog(LOG_ERR, "Unknown Platform, currently not supported by MRAA"); +diff --git a/src/arm/siemens/iot2050.c b/src/arm/siemens/iot2050.c +new file mode 100644 +index 0000000..de2f333 +--- /dev/null ++++ b/src/arm/siemens/iot2050.c +@@ -0,0 +1,1186 @@ ++/* ++ * Author: Le Jin ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#include ++#include ++#include ++#include ++ ++#include "common.h" ++#include "arm/siemens/iot2050.h" ++#include "arm/siemens/platform.h" ++ ++#define PINMUX_GROUP_MAIN (0) ++#define PINMUX_GROUP_WAKUP (1) ++#define MAIN_GPIO0_BASE (0) ++#define WKUP_GPIO0_BASE (186) ++#define D4200_GPIO_BASE (496) ++#define D4201_GPIO_BASE (480) ++#define D4202_GPIO_BASE (464) ++ ++typedef struct { ++ uint8_t group; ++ uint16_t index; ++ uint16_t pinmap; ++ int8_t mode[MAX_MUX_REGISTER_MODE]; ++}regmux_info_t; ++ ++static void *pinmux_instance = NULL; ++static regmux_info_t pinmux_info[MRAA_IOT2050_PINCOUNT]; ++static mraa_gpio_context output_en_pins[MRAA_IOT2050_PINCOUNT]; ++static int pull_en_pins[MRAA_IOT2050_PINCOUNT]; ++ ++static inline int ++iot2050_locate_phy_pin_by_name(mraa_board_t *board, char *pin_name) ++{ ++ int i; ++ ++ if(!pin_name) ++ return -1; ++ for(i=0; iphy_pin_count; i++) { ++ if(!strncmp(board->pins[i].name, pin_name, MRAA_PIN_NAME_SIZE)) { ++ return i; ++ } ++ } ++ return -1; ++} ++ ++static inline regmux_info_t* ++iot2050_get_regmux_by_pinmap(int pinmap) ++{ ++ int i; ++ ++ for(i=0; i MRAA_IOT2050_PINCOUNT)) ++ return MRAA_SUCCESS; ++ if((mode < 0) || (mode >= MAX_MUX_REGISTER_MODE)) { ++ return MRAA_ERROR_FEATURE_NOT_SUPPORTED; ++ } ++ if(mode == MUX_REGISTER_MODE_AIO) { ++ return MRAA_SUCCESS; ++ } ++ mux_mode = info->mode[mode]; ++ if(mux_mode < 0) { ++ return MRAA_ERROR_FEATURE_NOT_SUPPORTED; ++ } ++ syslog(LOG_DEBUG, "REGMUX[phy_pin %d] group %d index %d mode %d\n", phy_pin, info->group, info->index, mux_mode); ++ ++ platform_pinmux_select_func(pinmux_instance, info->group, info->index, mux_mode); ++ /* Configure as input and output for default */ ++ platform_pinmux_select_inout(pinmux_instance, info->group, info->index); ++ return MRAA_SUCCESS; ++} ++ ++static mraa_result_t ++iot2050_gpio_dir_pre(mraa_gpio_context dev, mraa_gpio_dir_t dir) ++{ ++ int pin = dev->phy_pin; ++ ++ if(pin >= 0) { ++ if(plat->pins[pin].gpio.complex_cap.complex_pin != 1) { ++ return MRAA_SUCCESS; ++ } ++ if(plat->pins[pin].gpio.complex_cap.output_en == 1) { ++ if(output_en_pins[pin] == NULL) { ++ output_en_pins[pin] = mraa_gpio_init_raw(plat->pins[pin].gpio.output_enable); ++ if(output_en_pins[pin]) { ++ if(mraa_gpio_dir(output_en_pins[pin], MRAA_GPIO_OUT) != MRAA_SUCCESS) { ++ mraa_gpio_close(output_en_pins[pin]); ++ output_en_pins[pin] = NULL; ++ goto failed; ++ } ++ } else { ++ goto failed; ++ } ++ } ++ if(dir == MRAA_GPIO_IN) { ++ syslog(LOG_DEBUG, "GPIODIR[phy_pin %d] gpio set out en %d to %d\n", pin, plat->pins[pin].gpio.output_enable, !plat->pins[pin].gpio.complex_cap.output_en_high); ++ if(mraa_gpio_write(output_en_pins[pin], !plat->pins[pin].gpio.complex_cap.output_en_high) != MRAA_SUCCESS) { ++ goto failed; ++ } ++ } else { ++ syslog(LOG_DEBUG, "GPIODIR[phy_pin %d] gpio set out en %d to %d\n", pin, plat->pins[pin].gpio.output_enable, plat->pins[pin].gpio.complex_cap.output_en_high); ++ if(mraa_gpio_write(output_en_pins[pin], plat->pins[pin].gpio.complex_cap.output_en_high) != MRAA_SUCCESS) { ++ goto failed; ++ } ++ } ++ } ++ } ++ return MRAA_SUCCESS; ++failed: ++ syslog(LOG_ERR, "iot2050: Error setting gpio direction"); ++ return MRAA_ERROR_INVALID_RESOURCE; ++} ++ ++static mraa_result_t ++iot2050_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode) ++{ ++ regmux_info_t *info; ++ mraa_gpio_context pull_en_pin; ++ mraa_result_t ret = MRAA_SUCCESS; ++ ++ /* Only support mode change on interface pins */ ++ if(dev->phy_pin == -1) { ++ ret = MRAA_ERROR_INVALID_RESOURCE; ++ goto failed; ++ } ++ info = iot2050_get_regmux_by_pinmap(dev->pin); ++ pull_en_pin = mraa_gpio_init_raw(pull_en_pins[dev->phy_pin]); ++ if(pull_en_pin == NULL) { ++ ret = MRAA_ERROR_INVALID_RESOURCE; ++ goto failed; ++ } ++ switch(mode) { ++ case MRAA_GPIO_PULLUP: ++ if(mraa_gpio_dir(pull_en_pin, MRAA_GPIO_OUT_HIGH) != MRAA_SUCCESS) { ++ ret = MRAA_ERROR_INVALID_RESOURCE; ++ goto failed; ++ } ++ if(info) { ++ platform_pinmux_select_pull_up(pinmux_instance, info->group, info->index); ++ } ++ break; ++ case MRAA_GPIO_PULLDOWN: ++ if(mraa_gpio_dir(pull_en_pin, MRAA_GPIO_OUT_LOW) != MRAA_SUCCESS) { ++ ret = MRAA_ERROR_INVALID_RESOURCE; ++ goto failed; ++ } ++ if(info) { ++ platform_pinmux_select_pull_down(pinmux_instance, info->group, info->index); ++ } ++ break; ++ case MRAA_GPIO_HIZ: ++ case MRAA_GPIO_STRONG: ++ if(mraa_gpio_dir(pull_en_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) { ++ ret = MRAA_ERROR_INVALID_RESOURCE; ++ goto failed; ++ } ++ if(info) { ++ platform_pinmux_select_pull_disable(pinmux_instance, info->group, info->index); ++ } ++ break; ++ case MRAA_GPIOD_ACTIVE_LOW: ++ case MRAA_GPIOD_OPEN_DRAIN: ++ case MRAA_GPIOD_OPEN_SOURCE: ++ default: ++ ret = MRAA_ERROR_FEATURE_NOT_IMPLEMENTED; ++ goto failed; ++ } ++ mraa_gpio_close(pull_en_pin); ++ return ret; ++failed: ++ syslog(LOG_ERR, "iot2050: Error setting gpio mode"); ++ if(pull_en_pin) { ++ mraa_gpio_close(pull_en_pin); ++ } ++ return ret; ++} ++ ++static inline void ++iot2050_setup_pins(mraa_board_t *board, int pin_index, char *pin_name, mraa_pincapabilities_t cap, regmux_info_t mux_info) ++{ ++ strncpy(board->pins[pin_index].name, pin_name, MRAA_PIN_NAME_SIZE); ++ board->pins[pin_index].capabilities = cap; ++ pinmux_info[pin_index] = mux_info; ++} ++ ++static inline void ++iot2050_pin_add_gpio(mraa_board_t *board, int pin_index, int chip, int line, ++ int output_en_pin, int pull_en_pin, mraa_mux_t *pin_mux, int num_pinmux) ++{ ++ int i; ++ ++ mraa_pininfo_t *pininfo = &(board->pins[pin_index]); ++ /*for sysfs*/ ++ pininfo->gpio.pinmap = pinmux_info[pin_index].pinmap; ++ pininfo->gpio.mux_total = 0; ++ /*for gpio chardev*/ ++ pininfo->gpio.gpio_chip = chip; ++ pininfo->gpio.gpio_line = line; ++ for(i=0; igpio.mux[i] = pin_mux[i]; ++ } ++ pininfo->gpio.mux_total = num_pinmux; ++ /*output enable pin*/ ++ if(output_en_pin != -1) ++ { ++ pininfo->gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 1, 0, 0 }; ++ pininfo->gpio.output_enable = output_en_pin; ++ pininfo->gpio.complex_cap.output_en_high = 1; ++ } ++ /*pull enabled pin*/ ++ pull_en_pins[pin_index] = pull_en_pin; ++ board->gpio_count++; ++} ++ ++static inline void ++iot2050_pin_add_aio(mraa_board_t *board, int pin_index, int channel, mraa_mux_t *pin_mux, int num_pinmux) ++{ ++ int i; ++ ++ mraa_pininfo_t *pininfo = &(board->pins[pin_index]); ++ pininfo->aio.pinmap = channel; ++ for(i=0; iaio.mux[i] = pin_mux[i]; ++ } ++ pininfo->aio.mux_total = num_pinmux; ++ board->aio_dev[channel].pin = pin_index; ++ board->aio_count++; ++} ++ ++static inline void ++iot2050_pin_add_uart(mraa_board_t *board, int pin_index, int parent_id, mraa_mux_t *pin_mux, int num_pinmux) ++{ ++ int i; ++ ++ mraa_pininfo_t *pininfo = &(board->pins[pin_index]); ++ pininfo->uart.parent_id = parent_id; ++ for(i=0; iuart.mux[i] = pin_mux[i]; ++ } ++ pininfo->uart.mux_total = num_pinmux; ++} ++ ++static inline void ++iot2050_pin_add_i2c(mraa_board_t *board, int pin_index, int parent_id, mraa_mux_t *pin_mux, int num_pinmux) ++{ ++ int i; ++ ++ mraa_pininfo_t *pininfo = &(board->pins[pin_index]); ++ pininfo->i2c.parent_id = parent_id; ++ for(i=0; ii2c.mux[i] = pin_mux[i]; ++ } ++ pininfo->i2c.mux_total = num_pinmux; ++} ++ ++static inline void ++iot2050_pin_add_spi(mraa_board_t *board, int pin_index, int parent_id, mraa_mux_t *pin_mux, int num_pinmux) ++{ ++ int i; ++ ++ mraa_pininfo_t *pininfo = &(board->pins[pin_index]); ++ pininfo->spi.parent_id = parent_id; ++ for(i=0; ispi.mux[i] = pin_mux[i]; ++ } ++ pininfo->spi.mux_total = num_pinmux; ++} ++ ++static inline void ++iot2050_pin_add_pwm(mraa_board_t *board, int pin_index, int parent_id, int pinmap, mraa_mux_t *pin_mux, int num_pinmux) ++{ ++ int i; ++ ++ mraa_pininfo_t *pininfo = &(board->pins[pin_index]); ++ pininfo->pwm.parent_id = parent_id; ++ pininfo->pwm.pinmap = pinmap; ++ for(i=0; ipwm.mux[i] = pin_mux[i]; ++ } ++ pininfo->pwm.mux_total = num_pinmux; ++} ++ ++ ++static inline void ++iot2050_setup_uart(mraa_board_t *board, char *name, char *path, char *rx_pin_name, char *tx_pin_name, char *cts_pin_name, char *rts_pin_name) ++{ ++ board->uart_dev[board->uart_dev_count].name = name; ++ board->uart_dev[board->uart_dev_count].device_path = path; ++ board->uart_dev[board->uart_dev_count].tx = iot2050_locate_phy_pin_by_name(board, tx_pin_name); ++ board->uart_dev[board->uart_dev_count].rx = iot2050_locate_phy_pin_by_name(board, rx_pin_name); ++ board->uart_dev[board->uart_dev_count].rts = iot2050_locate_phy_pin_by_name(board, rts_pin_name); ++ board->uart_dev[board->uart_dev_count].cts = iot2050_locate_phy_pin_by_name(board, cts_pin_name); ++ board->uart_dev_count++; ++} ++ ++static inline void ++iot2050_setup_i2c(mraa_board_t *board, char *name, int bus_id, char *sda_pin_name, char *scl_pin_name) ++{ ++ board->i2c_bus[board->i2c_bus_count].name = name; ++ board->i2c_bus[board->i2c_bus_count].bus_id = bus_id; ++ board->i2c_bus[board->i2c_bus_count].sda = iot2050_locate_phy_pin_by_name(board, sda_pin_name); ++ board->i2c_bus[board->i2c_bus_count].scl = iot2050_locate_phy_pin_by_name(board, scl_pin_name); ++ board->i2c_bus_count++; ++} ++ ++static inline void ++iot2050_setup_spi(mraa_board_t *board, char *name, int bus_id, int cs_id, ++ char *sclk_pin_name, char *mosi_pin_name, ++ char *miso_pin_name, char *cs_pin_name) ++{ ++ board->spi_bus[board->spi_bus_count].name = name; ++ board->spi_bus[board->spi_bus_count].bus_id = bus_id; ++ board->spi_bus[board->spi_bus_count].slave_s = cs_id; ++ board->spi_bus[board->spi_bus_count].sclk = iot2050_locate_phy_pin_by_name(board, sclk_pin_name); ++ board->spi_bus[board->spi_bus_count].mosi = iot2050_locate_phy_pin_by_name(board, mosi_pin_name); ++ board->spi_bus[board->spi_bus_count].miso = iot2050_locate_phy_pin_by_name(board, miso_pin_name); ++ board->spi_bus[board->spi_bus_count].cs = iot2050_locate_phy_pin_by_name(board, cs_pin_name); ++ board->spi_bus_count++; ++} ++ ++static inline void ++iot2050_setup_pwm(mraa_board_t *board, char *name) ++{ ++ board->pwm_dev[board->pwm_dev_count].name = name; ++ board->pwm_dev_count++; ++} ++ ++static inline void ++iot2050_setup_led(mraa_board_t *board, char *name) ++{ ++ board->led_dev[board->led_dev_count].name = name; ++ board->led_dev_count++; ++} ++ ++mraa_board_t* ++mraa_siemens_iot2050() ++{ ++ mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t)); ++ mraa_mux_t mux_info[6]; ++ int pin_index = 0; ++ ++ if(b == NULL) { ++ return NULL; ++ } ++ memset(output_en_pins, 0, sizeof(mraa_gpio_context) * MRAA_IOT2050_PINCOUNT); ++ b->platform_name = PLATFORM_NAME; ++ b->phy_pin_count = MRAA_IOT2050_PINCOUNT; ++ b->chardev_capable = 0; ++ b->adc_raw = 12; ++ b->adc_supported = 12; ++ b->pwm_default_period = 1000; /*us*/ ++ b->pwm_max_period = 939509; ++ b->pwm_min_period = 1; ++ b->aio_non_seq = 1; ++ b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t)); ++ if(b->adv_func == NULL) { ++ goto error; ++ } ++ b->adv_func->gpio_dir_pre = &iot2050_gpio_dir_pre; ++ b->adv_func->gpio_mode_replace = &iot2050_gpio_mode_replace; ++ b->adv_func->setup_mux_register = &iot2050_setup_mux_register; ++ b->pins = (mraa_pininfo_t*) calloc(MRAA_IOT2050_PINCOUNT, sizeof(mraa_pininfo_t)); ++ if(b->pins == NULL) { ++ free(b->adv_func); ++ goto error; ++ } ++ pinmux_instance = platfrom_pinmux_get_instance("iot2050"); ++ /* IO */ ++ iot2050_setup_pins(b, pin_index, "IO0", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 1}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 17, ++ WKUP_GPIO0_BASE+29, ++ { ++ 7, /*GPIO*/ ++ 4, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ ++ iot2050_pin_add_gpio(b, pin_index, 2, 29, D4201_GPIO_BASE+0, D4202_GPIO_BASE+0, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+0; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ mux_info[1].pin = D4202_GPIO_BASE+0; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_uart(b, pin_index, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO1", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 1}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 18, ++ WKUP_GPIO0_BASE+30, ++ { ++ 7, /*GPIO*/ ++ 4, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 2, 30, D4201_GPIO_BASE+1, D4202_GPIO_BASE+1, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+1; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+1; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_uart(b, pin_index, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO2", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 1}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 19, ++ WKUP_GPIO0_BASE+31, ++ { ++ 7, /*GPIO*/ ++ 4, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 2, 31, D4201_GPIO_BASE+2, D4202_GPIO_BASE+2, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+2; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ mux_info[1].pin = D4202_GPIO_BASE+2; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_uart(b, pin_index, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO3", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 1}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 21, ++ WKUP_GPIO0_BASE+33, ++ { ++ 7, /*GPIO*/ ++ 4, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 2, 33, D4201_GPIO_BASE+3, D4202_GPIO_BASE+3, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+3; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+3; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_uart(b, pin_index, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO4", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 1, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_MAIN, ++ 33, ++ MAIN_GPIO0_BASE+33, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ 5 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 0, 33, D4201_GPIO_BASE+4, D4202_GPIO_BASE+4, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+4; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+4; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_pwm(b, pin_index, 0, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO5", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 1, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_MAIN, ++ 35, ++ MAIN_GPIO0_BASE+35, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ 5 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 0, 35, D4201_GPIO_BASE+5, D4202_GPIO_BASE+5, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+5; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+5; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_pwm(b, pin_index, 2, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO6", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 1, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_MAIN, ++ 38, ++ MAIN_GPIO0_BASE+38, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ 5 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 0, 38, D4201_GPIO_BASE+6, D4202_GPIO_BASE+6, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+6; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+6; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_pwm(b, pin_index, 4, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO7", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 1, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_MAIN, ++ 43, ++ MAIN_GPIO0_BASE+43, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ 5 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 0, 43, D4201_GPIO_BASE+7, D4202_GPIO_BASE+7, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+7; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+7; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_pwm(b, pin_index, 6, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO8", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 1, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_MAIN, ++ 48, ++ MAIN_GPIO0_BASE+48, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ 5 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 0, 48, D4201_GPIO_BASE+8, D4202_GPIO_BASE+8, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+8; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+8; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_pwm(b, pin_index, 8, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO9", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 1, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_MAIN, ++ 51, ++ MAIN_GPIO0_BASE+51, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ 5 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 0, 51, D4201_GPIO_BASE+9, D4202_GPIO_BASE+9, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+9; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+9; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_pwm(b, pin_index, 10, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO10", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 1, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 39, ++ WKUP_GPIO0_BASE+51, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ 0, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 2, 51, D4201_GPIO_BASE+10, D4202_GPIO_BASE+10, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+10; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+10; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_spi(b, pin_index, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO11", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 1, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 37, ++ WKUP_GPIO0_BASE+49, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ 0, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 2, 49, D4201_GPIO_BASE+11, D4202_GPIO_BASE+11, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+11; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+11; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_spi(b, pin_index, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO12", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 1, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 38, ++ WKUP_GPIO0_BASE+50, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ 0, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 2, 50, D4201_GPIO_BASE+12, D4202_GPIO_BASE+12, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+12; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ mux_info[1].pin = D4202_GPIO_BASE+12; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_spi(b, pin_index, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "IO13", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 1, /*spi*/ ++ 0, /*i2c*/ ++ 0, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 36, ++ WKUP_GPIO0_BASE+48, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ 0, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ iot2050_pin_add_gpio(b, pin_index, 2, 48, D4201_GPIO_BASE+13, D4202_GPIO_BASE+13, NULL, 0); ++ mux_info[0].pin = D4201_GPIO_BASE+13; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_HIGH; ++ mux_info[1].pin = D4202_GPIO_BASE+13; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ iot2050_pin_add_spi(b, pin_index, 0, mux_info, 2); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "A0", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 1, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 33, ++ WKUP_GPIO0_BASE+45, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ mux_info[0].pin = D4200_GPIO_BASE+8; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ iot2050_pin_add_gpio(b, pin_index, 2, 45, WKUP_GPIO0_BASE+38, D4200_GPIO_BASE+0, mux_info, 1); ++ // D/A switch ++ mux_info[0].pin = D4200_GPIO_BASE+8; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_IN; ++ // muxed GPIO as input ++ mux_info[1].pin = WKUP_GPIO0_BASE+45; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ // output enable as input ++ mux_info[2].pin = WKUP_GPIO0_BASE+38; ++ mux_info[2].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[2].value = MRAA_GPIO_OUT_LOW; ++ // pull enable as input ++ mux_info[3].pin = D4200_GPIO_BASE+0; ++ mux_info[3].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[3].value = MRAA_GPIO_IN; ++ iot2050_pin_add_aio(b, pin_index, 0, mux_info, 4); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "A1", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 1, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 32, ++ WKUP_GPIO0_BASE+44, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ mux_info[0].pin = D4200_GPIO_BASE+9; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ iot2050_pin_add_gpio(b, pin_index, 2, 44, WKUP_GPIO0_BASE+37, D4200_GPIO_BASE+1, mux_info, 1); ++ // D/A switch ++ mux_info[0].pin = D4200_GPIO_BASE+9; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_IN; ++ // muxed GPIO as input ++ mux_info[1].pin = WKUP_GPIO0_BASE+44; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ // output enable as input ++ mux_info[2].pin = WKUP_GPIO0_BASE+37; ++ mux_info[2].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[2].value = MRAA_GPIO_OUT_LOW; ++ // pull enable as input ++ mux_info[3].pin = D4200_GPIO_BASE+1; ++ mux_info[3].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[3].value = MRAA_GPIO_IN; ++ iot2050_pin_add_aio(b, pin_index, 1, mux_info, 4); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "A2", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 1, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 31, ++ WKUP_GPIO0_BASE+43, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ mux_info[0].pin = D4200_GPIO_BASE+10; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ iot2050_pin_add_gpio(b, pin_index, 2, 43, WKUP_GPIO0_BASE+36, D4200_GPIO_BASE+2, mux_info, 1); ++ // D/A switch ++ mux_info[0].pin = D4200_GPIO_BASE+10; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_IN; ++ // muxed GPIO as input ++ mux_info[1].pin = WKUP_GPIO0_BASE+43; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ // output enable as input ++ mux_info[2].pin = WKUP_GPIO0_BASE+36; ++ mux_info[2].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[2].value = MRAA_GPIO_OUT_LOW; ++ // pull enable as input ++ mux_info[3].pin = D4200_GPIO_BASE+2; ++ mux_info[3].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[3].value = MRAA_GPIO_IN; ++ iot2050_pin_add_aio(b, pin_index, 2, mux_info, 4); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "A3", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 0, /*i2c*/ ++ 1, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 27, ++ WKUP_GPIO0_BASE+39, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ -1, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ mux_info[0].pin = D4200_GPIO_BASE+11; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ iot2050_pin_add_gpio(b, pin_index, 2, 39, WKUP_GPIO0_BASE+34, D4200_GPIO_BASE+3, mux_info, 1); ++ // D/A switch ++ mux_info[0].pin = D4200_GPIO_BASE+11; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_IN; ++ // muxed GPIO as input ++ mux_info[1].pin = WKUP_GPIO0_BASE+39; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_IN; ++ // output enable as input ++ mux_info[2].pin = WKUP_GPIO0_BASE+34; ++ mux_info[2].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[2].value = MRAA_GPIO_OUT_LOW; ++ // pull enable as input ++ mux_info[3].pin = D4200_GPIO_BASE+3; ++ mux_info[3].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[3].value = MRAA_GPIO_IN; ++ iot2050_pin_add_aio(b, pin_index, 3, mux_info, 4); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "A4", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 1, /*i2c*/ ++ 1, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 30, ++ WKUP_GPIO0_BASE+42, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ 0, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ mux_info[0].pin = D4200_GPIO_BASE+12; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ mux_info[1].pin = WKUP_GPIO0_BASE+21; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_OUT_HIGH; ++ iot2050_pin_add_gpio(b, pin_index, 2, 42, WKUP_GPIO0_BASE+41, D4200_GPIO_BASE+4, mux_info, 2); ++ // A/D/I switch ++ mux_info[0].pin = D4200_GPIO_BASE+12; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_IN; ++ mux_info[1].pin = WKUP_GPIO0_BASE+21; ++ mux_info[1].pincmd = PINCMD_SET_OUT_VALUE; ++ mux_info[1].value = 0; ++ // pull enable as input ++ mux_info[2].pin = D4200_GPIO_BASE+4; ++ mux_info[2].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[2].value = MRAA_GPIO_IN; ++ iot2050_pin_add_i2c(b, pin_index, 0, mux_info, 3); ++ // A/D/I switch ++ mux_info[0].pin = D4200_GPIO_BASE+12; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_IN; ++ mux_info[1].pin = WKUP_GPIO0_BASE+21; ++ mux_info[1].pincmd = PINCMD_SET_OUT_VALUE; ++ mux_info[1].value = 1; ++ // muxed GPIO as input ++ mux_info[2].pin = WKUP_GPIO0_BASE+42; ++ mux_info[2].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[2].value = MRAA_GPIO_IN; ++ // output enable as input ++ mux_info[3].pin = WKUP_GPIO0_BASE+41; ++ mux_info[3].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[3].value = MRAA_GPIO_OUT_LOW; ++ // pull enable as input ++ mux_info[4].pin = D4200_GPIO_BASE+4; ++ mux_info[4].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[4].value = MRAA_GPIO_IN; ++ iot2050_pin_add_aio(b, pin_index, 4, mux_info, 5); ++ pin_index++; ++ ++ iot2050_setup_pins(b, pin_index, "A5", ++ (mraa_pincapabilities_t) { ++ 1, /*valid*/ ++ 1, /*gpio*/ ++ 0, /*pwm*/ ++ 0, /*fast gpio*/ ++ 0, /*spi*/ ++ 1, /*i2c*/ ++ 1, /*aio*/ ++ 0}, /*uart*/ ++ (regmux_info_t) { ++ PINMUX_GROUP_WAKUP, ++ 23, ++ WKUP_GPIO0_BASE+35, ++ { ++ 7, /*GPIO*/ ++ -1, /*UART*/ ++ 0, /*I2C*/ ++ -1, /*SPI*/ ++ -1 /*PWM*/ ++ } ++ }); ++ mux_info[0].pin = D4200_GPIO_BASE+13; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_OUT_LOW; ++ mux_info[1].pin = WKUP_GPIO0_BASE+21; ++ mux_info[1].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[1].value = MRAA_GPIO_OUT_HIGH; ++ iot2050_pin_add_gpio(b, pin_index, 2, 35, D4201_GPIO_BASE+14, D4200_GPIO_BASE+5, mux_info, 2); ++ // A/D/I switch ++ mux_info[0].pin = D4200_GPIO_BASE+13; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_IN; ++ mux_info[1].pin = WKUP_GPIO0_BASE+21; ++ mux_info[1].pincmd = PINCMD_SET_OUT_VALUE; ++ mux_info[1].value = 0; ++ // pull enable as input ++ mux_info[2].pin = D4200_GPIO_BASE+5; ++ mux_info[2].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[2].value = MRAA_GPIO_IN; ++ iot2050_pin_add_i2c(b, pin_index, 0, mux_info, 3); ++ // A/D/I switch ++ mux_info[0].pin = D4200_GPIO_BASE+13; ++ mux_info[0].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[0].value = MRAA_GPIO_IN; ++ mux_info[1].pin = WKUP_GPIO0_BASE+21; ++ mux_info[1].pincmd = PINCMD_SET_OUT_VALUE; ++ mux_info[1].value = 1; ++ // muxed GPIO as input ++ mux_info[2].pin = WKUP_GPIO0_BASE+35; ++ mux_info[2].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[2].value = MRAA_GPIO_IN; ++ // output enable as input ++ mux_info[3].pin = D4201_GPIO_BASE+14; ++ mux_info[3].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[3].value = MRAA_GPIO_OUT_LOW; ++ // pull enable as input ++ mux_info[4].pin = D4200_GPIO_BASE+5; ++ mux_info[4].pincmd = PINCMD_SET_DIRECTION; ++ mux_info[4].value = MRAA_GPIO_IN; ++ iot2050_pin_add_aio(b, pin_index, 5, mux_info, 5); ++ pin_index++; ++ ++ /* UART */ ++ iot2050_setup_uart(b, "UART0", "/dev/ttyS1", "IO0", "IO1", "IO2", "IO3"); ++ b->def_uart_dev = 0; ++ /* I2C */ ++ iot2050_setup_i2c(b, "I2C0", 4, "A4", "A5"); ++ b->def_i2c_bus = 0; ++ /* SPI */ ++ iot2050_setup_spi(b, "SPI0", 0, 0, "IO13", "IO11", "IO12", "IO10"); ++ b->def_spi_bus = 0; ++ /* PWM */ ++ iot2050_setup_pwm(b, "PWM0"); ++ iot2050_setup_pwm(b, "PWM1"); ++ iot2050_setup_pwm(b, "PWM2"); ++ iot2050_setup_pwm(b, "PWM3"); ++ iot2050_setup_pwm(b, "PWM4"); ++ iot2050_setup_pwm(b, "PWM5"); ++ b->def_pwm_dev = 0; ++ /* LED */ ++ iot2050_setup_led(b, "user-led0-green"); ++ iot2050_setup_led(b, "user-led0-red"); ++ iot2050_setup_led(b, "user-led1-green"); ++ iot2050_setup_led(b, "user-led1-red"); ++ return b; ++error: ++ syslog(LOG_CRIT, "iot2050: Platform failed to initialise"); ++ free(b); ++ return NULL; ++} +diff --git a/src/arm/siemens/platform.c b/src/arm/siemens/platform.c +new file mode 100644 +index 0000000..b20a1e8 +--- /dev/null ++++ b/src/arm/siemens/platform.c +@@ -0,0 +1,41 @@ ++/* ++ * Author: Le Jin ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#include ++#include "arm/siemens/platform.h" ++#include "arm/siemens/platform_iot2050.h" ++ ++void * ++platfrom_pinmux_get_instance(char *platform) ++{ ++ PinMuxInterface_t *instance = NULL; ++ if(!strcmp(platform, "iot2050")) { ++ instance = iot2050_pinmux_get_instance(); ++ } ++ if((instance) && (instance->initialized == false) && (instance->ops.init)) { ++ return instance->ops.init()?instance:NULL; ++ } ++ else { ++ return NULL; ++ } ++} +diff --git a/src/arm/siemens/platform_iot2050.c b/src/arm/siemens/platform_iot2050.c +new file mode 100644 +index 0000000..89d12b9 +--- /dev/null ++++ b/src/arm/siemens/platform_iot2050.c +@@ -0,0 +1,367 @@ ++/* ++ * Author: Le Jin ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "arm/siemens/platform_iot2050.h" ++ ++enum{ ++ GROUP_MAIN_DOMAIN = 0, ++ GROUP_WAKUP_DOMAIN, ++ MAX_GROUP_NUMBER ++}; ++ ++typedef struct{ ++ PinMuxInterface_t super; ++ int memFd; ++ volatile uint32_t *pinMuxRegBase[MAX_GROUP_NUMBER]; ++ volatile void *mapAddress[MAX_GROUP_NUMBER]; ++}IOT2050PinMuxHandler_t; ++ ++static bool iot2050_pinmux_init(void); ++static void iot2050_pinmux_deinit(void); ++static void iot2050_pinmux_select_func(uint8_t group, uint16_t pinIndex, uint8_t func); ++static void iot2050_pinmux_select_input(uint8_t group, uint16_t pinIndex); ++static void iot2050_pinmux_select_output(uint8_t group, uint16_t pinIndex); ++static void iot2050_pinmux_select_inout(uint8_t group, uint16_t pinIndex); ++static void iot2050_pinmux_select_hiz(uint8_t group, uint16_t pinIndex); ++static void iot2050_pinmux_select_pull_up(uint8_t group, uint16_t pinIndex); ++static void iot2050_pinmux_select_pull_down(uint8_t group, uint16_t pinIndex); ++static void iot2050_pinmux_select_pull_disable(uint8_t group, uint16_t pinIndex); ++static uint32_t iot2050_pinmux_get_raw_reg_value(uint8_t group, uint16_t pinIndex); ++static void iot2050_pinmux_set_raw_reg_value(uint8_t group, uint16_t pinIndex, uint32_t value); ++static void iot2050_pinmux_dump_info(uint8_t group, uint16_t pinIndex); ++ ++#define MAIN_PINMUX_REG_NUM (195) ++#define MAIN_PINMUX_REG_LENGTH (MAIN_PINMUX_REG_NUM<<2) ++#define MAIN_PINMUX_REG_PHY_BASE_ADDRESS (0x0011c000) ++ ++#define WAKUP_PINMUX_REG_NUM (70) ++#define WAKUP_PINMUX_REG_LENGTH (WAKUP_PINMUX_REG_NUM<<2) ++#define WAKUP_PINMUX_REG_PHY_BASE_ADDRESS (0x4301c000) ++ ++#define PAGE_SIZE 4096UL ++#define PAGE_MASK (PAGE_SIZE - 1) ++ ++#define REG_MUXMODE_POS (0) ++#define REG_MUXMODE_MASK (0x0F << REG_MUXMODE_POS) ++#define REG_MUXMODE_GET(reg) ((reg & REG_MUXMODE_MASK) >> REG_MUXMODE_POS) ++#define REG_MUXMODE(mode) ((mode << REG_MUXMODE_POS) & REG_MUXMODE_MASK) ++ ++#define REG_PULL_ENABLE_POS (16) ++#define REG_PULL_ENABLE_MASK (0x01 << REG_PULL_ENABLE_POS) ++#define REG_PULL_ENABLE_GET(reg) ((reg & REG_PULL_ENABLE_MASK) >> REG_PULL_ENABLE_POS) ++#define REG_PULL_ENABLE (0x00 << REG_PULL_ENABLE_POS) ++#define REG_PULL_DISABLE (0x01 << REG_PULL_ENABLE_POS) ++#define REG_PULL_IS_ENABLED(reg) (!REG_PULL_ENABLE_GET(reg)) ++#define REG_PULL_IS_DISABLED(reg) (!REG_PULL_IS_ENABLED(reg)) ++ ++#define REG_PULL_SELECT_POS (17) ++#define REG_PULL_SELECT_MASK (0x01 << REG_PULL_SELECT_POS) ++#define REG_PULL_SELECT_GET(reg) ((reg & REG_PULL_SELECT_MASK) >> REG_PULL_SELECT_POS) ++#define REG_PULL_UP (0x01 << REG_PULL_SELECT_POS) ++#define REG_PULL_DOWN (0x00 << REG_PULL_SELECT_POS) ++#define REG_PULL_IS_UP(reg) (REG_PULL_SELECT_GET(reg)) ++#define REG_PULL_IS_DOWN(reg) (!REG_PULL_IS_UP(reg)) ++ ++#define REG_INPUT_ENABLE_POS (18) ++#define REG_INPUT_ENABLE_MASK (0x01 << REG_INPUT_ENABLE_POS) ++#define REG_INPUT_ENABLE_GET(reg) ((reg & REG_INPUT_ENABLE_MASK) >> REG_INPUT_ENABLE_POS) ++#define REG_INPUT_ENABLE (0x01 << REG_INPUT_ENABLE_POS) ++#define REG_INPUT_DISABLE (0x00 << REG_INPUT_ENABLE_POS) ++#define REG_INPUT_IS_ENABLED(reg) (REG_INPUT_ENABLE_GET(reg)) ++#define REG_INPUT_IS_DISABLED(reg) (!REG_INPUT_IS_ENABLED(reg)) ++ ++#define REG_OUTPUT_ENABLE_POS (21) ++#define REG_OUTPUT_ENABLE_MASK (0x01 << REG_OUTPUT_ENABLE_POS) ++#define REG_OUTPUT_ENABLE_GET(reg) ((reg & REG_OUTPUT_ENABLE_MASK) >> REG_OUTPUT_ENABLE_POS) ++#define REG_OUTPUT_ENABLE (0x00 << REG_OUTPUT_ENABLE_POS) ++#define REG_OUTPUT_DISABLE (0x01 << REG_OUTPUT_ENABLE_POS) ++#define REG_OUTPUT_IS_ENABLED(reg) (!REG_OUTPUT_ENABLE_GET(reg)) ++#define REG_OUTPUT_IS_DISABLED(reg) (!REG_OUTPUT_IS_ENABLED(reg)) ++ ++#define REG_UPDATE(address, mask, value) (*address = ((*address) & (~mask)) | (value)) ++#define GROUP_IS_VALID(group) (group < MAX_GROUP_NUMBER) ++ ++#define PIN_OUTPUT (PULL_DISABLE) ++#define PIN_OUTPUT_PULLUP (PULL_UP) ++#define PIN_OUTPUT_PULLDOWN 0 ++#define PIN_INPUT (INPUT_EN | PULL_DISABLE) ++#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) ++#define PIN_INPUT_PULLDOWN (INPUT_EN) ++ ++static IOT2050PinMuxHandler_t iot2050PinMuxHandler = { ++ .super = { ++ .initialized = false, ++ .ops = { ++ .init = iot2050_pinmux_init, ++ .deinit = iot2050_pinmux_deinit, ++ .select_func = iot2050_pinmux_select_func, ++ .select_input = iot2050_pinmux_select_input, ++ .select_output = iot2050_pinmux_select_output, ++ .select_inout = iot2050_pinmux_select_inout, ++ .select_hiz = iot2050_pinmux_select_hiz, ++ .select_pull_up = iot2050_pinmux_select_pull_up, ++ .select_pull_down = iot2050_pinmux_select_pull_down, ++ .select_pull_disable = iot2050_pinmux_select_pull_disable, ++ .get_raw_reg_value = iot2050_pinmux_get_raw_reg_value, ++ .set_raw_reg_value = iot2050_pinmux_set_raw_reg_value, ++ .dump_info = iot2050_pinmux_dump_info ++ } ++ }, ++ .memFd = -1, ++ .mapAddress[GROUP_MAIN_DOMAIN] = MAP_FAILED, ++ .mapAddress[GROUP_WAKUP_DOMAIN] = MAP_FAILED, ++ .pinMuxRegBase[GROUP_MAIN_DOMAIN] = MAP_FAILED, ++ .pinMuxRegBase[GROUP_WAKUP_DOMAIN] = MAP_FAILED ++}; ++ ++PinMuxInterface_t* ++iot2050_pinmux_get_instance(void) ++{ ++ return (PinMuxInterface_t *)&iot2050PinMuxHandler; ++} ++ ++static bool ++iot2050_pinmux_init(void) ++{ ++ uint32_t pageMask = sysconf(_SC_PAGE_SIZE) - 1; ++ ++ /* Open memory */ ++ DEBUG_PRINT("Open device\n"); ++ if((iot2050PinMuxHandler.memFd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) { ++ DEBUG_PRINT("Open device: %s\n", strerror(errno)); ++ goto _FATAL; ++ } ++ ++ /* Map */ ++ DEBUG_PRINT("Map main mux register base\n"); ++ iot2050PinMuxHandler.mapAddress[GROUP_MAIN_DOMAIN] = mmap(0, MAIN_PINMUX_REG_LENGTH, ++ PROT_READ | PROT_WRITE, MAP_SHARED, ++ iot2050PinMuxHandler.memFd, ++ MAIN_PINMUX_REG_PHY_BASE_ADDRESS & ~pageMask); ++ if(iot2050PinMuxHandler.mapAddress[GROUP_MAIN_DOMAIN] == MAP_FAILED) { ++ DEBUG_PRINT("Pinmux main domain map failed: %s\n", strerror(errno)); ++ goto _FATAL; ++ } ++ iot2050PinMuxHandler.pinMuxRegBase[GROUP_MAIN_DOMAIN] = iot2050PinMuxHandler.mapAddress[GROUP_MAIN_DOMAIN] + ++ (MAIN_PINMUX_REG_PHY_BASE_ADDRESS & pageMask); ++ DEBUG_PRINT("\tPage address: %p\n", iot2050PinMuxHandler.mapAddress[GROUP_MAIN_DOMAIN]); ++ DEBUG_PRINT("\tIn-page Offset: %x\n", MAIN_PINMUX_REG_PHY_BASE_ADDRESS & pageMask); ++ DEBUG_PRINT("\tReg address: %p\n", iot2050PinMuxHandler.pinMuxRegBase[GROUP_MAIN_DOMAIN]); ++ DEBUG_PRINT("Map wakup mux register base\n"); ++ iot2050PinMuxHandler.mapAddress[GROUP_WAKUP_DOMAIN] = mmap(0, WAKUP_PINMUX_REG_LENGTH, ++ PROT_READ | PROT_WRITE, MAP_SHARED, ++ iot2050PinMuxHandler.memFd, ++ WAKUP_PINMUX_REG_PHY_BASE_ADDRESS & ~pageMask); ++ if(iot2050PinMuxHandler.mapAddress[GROUP_WAKUP_DOMAIN] == MAP_FAILED) { ++ DEBUG_PRINT("Pinmux wakup domain map failed: %s\n", strerror(errno)); ++ goto _FATAL; ++ } ++ iot2050PinMuxHandler.pinMuxRegBase[GROUP_WAKUP_DOMAIN] = iot2050PinMuxHandler.mapAddress[GROUP_WAKUP_DOMAIN] + ++ (WAKUP_PINMUX_REG_PHY_BASE_ADDRESS & pageMask); ++ DEBUG_PRINT("\tPage address: %p\n", iot2050PinMuxHandler.mapAddress[GROUP_WAKUP_DOMAIN]); ++ DEBUG_PRINT("\tIn-page Offset: %x\n", WAKUP_PINMUX_REG_PHY_BASE_ADDRESS & pageMask); ++ DEBUG_PRINT("\tReg address: %p\n", iot2050PinMuxHandler.pinMuxRegBase[GROUP_WAKUP_DOMAIN]); ++ iot2050PinMuxHandler.super.initialized = true; ++ return true; ++_FATAL: ++ iot2050_pinmux_deinit(); ++ return false; ++} ++ ++static void ++iot2050_pinmux_deinit(void) ++{ ++ if(iot2050PinMuxHandler.memFd > 0) ++ close(iot2050PinMuxHandler.memFd); ++ iot2050PinMuxHandler.memFd = -1; ++ if(iot2050PinMuxHandler.mapAddress[GROUP_MAIN_DOMAIN] != MAP_FAILED) ++ munmap((void *)iot2050PinMuxHandler.mapAddress[GROUP_MAIN_DOMAIN], MAIN_PINMUX_REG_LENGTH); ++ iot2050PinMuxHandler.mapAddress[GROUP_MAIN_DOMAIN] = MAP_FAILED; ++ iot2050PinMuxHandler.pinMuxRegBase[GROUP_MAIN_DOMAIN] = MAP_FAILED; ++ ++ if(iot2050PinMuxHandler.mapAddress[GROUP_WAKUP_DOMAIN] != MAP_FAILED) ++ munmap((void *)iot2050PinMuxHandler.mapAddress[GROUP_WAKUP_DOMAIN], WAKUP_PINMUX_REG_LENGTH); ++ iot2050PinMuxHandler.mapAddress[GROUP_WAKUP_DOMAIN] = MAP_FAILED; ++ iot2050PinMuxHandler.pinMuxRegBase[GROUP_WAKUP_DOMAIN] = MAP_FAILED; ++ iot2050PinMuxHandler.super.initialized = false; ++} ++ ++static void ++iot2050_pinmux_select_func(uint8_t group, uint16_t pinIndex, uint8_t func) { ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ REG_UPDATE(regVirtualAddress, REG_MUXMODE_MASK, REG_MUXMODE(func)); ++ } ++} ++ ++static void ++iot2050_pinmux_select_input(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ REG_UPDATE(regVirtualAddress, REG_INPUT_ENABLE_MASK, REG_INPUT_ENABLE); ++ REG_UPDATE(regVirtualAddress, REG_OUTPUT_ENABLE_MASK, REG_OUTPUT_DISABLE); ++ } ++} ++ ++static void ++iot2050_pinmux_select_output(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ REG_UPDATE(regVirtualAddress, REG_INPUT_ENABLE_MASK, REG_INPUT_DISABLE); ++ REG_UPDATE(regVirtualAddress, REG_OUTPUT_ENABLE_MASK, REG_OUTPUT_ENABLE); ++ } ++} ++ ++static void ++iot2050_pinmux_select_inout(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ REG_UPDATE(regVirtualAddress, REG_INPUT_ENABLE_MASK, REG_INPUT_ENABLE); ++ REG_UPDATE(regVirtualAddress, REG_OUTPUT_ENABLE_MASK, REG_OUTPUT_ENABLE); ++ } ++} ++ ++static void ++iot2050_pinmux_select_hiz(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ REG_UPDATE(regVirtualAddress, REG_INPUT_ENABLE_MASK, REG_INPUT_DISABLE); ++ REG_UPDATE(regVirtualAddress, REG_OUTPUT_ENABLE_MASK, REG_OUTPUT_DISABLE); ++ } ++} ++ ++ ++static void ++iot2050_pinmux_select_pull_up(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ REG_UPDATE(regVirtualAddress, REG_PULL_ENABLE_MASK, REG_PULL_ENABLE); ++ REG_UPDATE(regVirtualAddress, REG_PULL_SELECT_MASK, REG_PULL_UP); ++ } ++} ++ ++static void ++iot2050_pinmux_select_pull_down(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ REG_UPDATE(regVirtualAddress, REG_PULL_ENABLE_MASK, REG_PULL_ENABLE); ++ REG_UPDATE(regVirtualAddress, REG_PULL_SELECT_MASK, REG_PULL_DOWN); ++ } ++} ++ ++static void ++iot2050_pinmux_select_pull_disable(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ REG_UPDATE(regVirtualAddress, REG_PULL_ENABLE_MASK, REG_PULL_DISABLE); ++ } ++} ++ ++static uint32_t ++iot2050_pinmux_get_raw_reg_value(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ return *regVirtualAddress; ++ } ++ return -1; ++} ++ ++static void ++iot2050_pinmux_set_raw_reg_value(uint8_t group, uint16_t pinIndex, uint32_t value) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ *regVirtualAddress = value; ++ } ++} ++ ++static void ++iot2050_pinmux_dump_info(uint8_t group, uint16_t pinIndex) ++{ ++ volatile uint32_t *regVirtualAddress; ++ ++ if(GROUP_IS_VALID(group)) { ++ regVirtualAddress = iot2050PinMuxHandler.pinMuxRegBase[group] + pinIndex; ++ fprintf(stderr, "PinmuxReg Domain %s, Index %d, Raw 0x%08x\n", ++ group?"Wakup":"Main", ++ pinIndex, ++ iot2050_pinmux_get_raw_reg_value(group, pinIndex)); ++ if(REG_INPUT_IS_ENABLED(*regVirtualAddress)) { ++ fprintf(stderr, "\tInput: enabled\n"); ++ } ++ else if(REG_OUTPUT_IS_ENABLED(*regVirtualAddress)) { ++ fprintf(stderr, "\tOutput: enabled\n"); ++ } ++ else { ++ fprintf(stderr, "\tOutput: Hiz\n"); ++ } ++ ++ if(REG_PULL_IS_ENABLED(*regVirtualAddress)) { ++ if(REG_PULL_IS_UP(*regVirtualAddress)) { ++ fprintf(stderr, "\tPull Status: up\n"); ++ } ++ else { ++ fprintf(stderr, "\tPull Status: down\n"); ++ } ++ } ++ else { ++ fprintf(stderr, "\tPull Status: disabled\n"); ++ } ++ fprintf(stderr, "\tMode: %d\n", REG_MUXMODE_GET(*regVirtualAddress)); ++ } ++} +diff --git a/src/gpio/gpio.c b/src/gpio/gpio.c +index 2734609..493f528 100644 +--- a/src/gpio/gpio.c ++++ b/src/gpio/gpio.c +@@ -212,7 +212,12 @@ mraa_gpio_init(int pin) + return NULL; + } + } +- ++ if (board->adv_func->setup_mux_register) { ++ if(board->adv_func->setup_mux_register(pin, MUX_REGISTER_MODE_GPIO) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "gpio%i: init: unable to setup multiplex register", pin); ++ return NULL; ++ } ++ } + mraa_gpio_context r = mraa_gpio_init_internal(board->adv_func, board->pins[pin].gpio.pinmap); + + if (r == NULL) { +@@ -309,6 +314,13 @@ mraa_gpio_chardev_init(int pins[], int num_pins) + } + } + ++ if (board->adv_func->setup_mux_register) { ++ if(board->adv_func->setup_mux_register(pins[i], MUX_REGISTER_MODE_GPIO) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "[GPIOD_INTERFACE]: init: unable to setup mux register for pin %d", pins[i]); ++ mraa_gpio_close(dev); ++ return NULL; ++ } ++ } + chip_id = board->pins[pins[i]].gpio.gpio_chip; + line_offset = board->pins[pins[i]].gpio.gpio_line; + +diff --git a/src/i2c/i2c.c b/src/i2c/i2c.c +index cb980e2..3f5ab9f 100644 +--- a/src/i2c/i2c.c ++++ b/src/i2c/i2c.c +@@ -173,7 +173,12 @@ mraa_i2c_init(int bus) + return NULL; + } + } +- ++ if (pos >= 0 && board->adv_func->setup_mux_register) { ++ if(board->adv_func->setup_mux_register(pos, MUX_REGISTER_MODE_I2C) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "i2c%i_init: Failed to set-up i2c sda multiplex register", bus); ++ return NULL; ++ } ++ } + pos = board->i2c_bus[bus].scl; + if (pos >=0 && board->pins[pos].i2c.mux_total > 0) { + if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) { +@@ -181,6 +186,12 @@ mraa_i2c_init(int bus) + return NULL; + } + } ++ if (pos >= 0 && board->adv_func->setup_mux_register) { ++ if(board->adv_func->setup_mux_register(pos, MUX_REGISTER_MODE_I2C) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "i2c%i_init: Failed to set-up scl sda multiplex register", bus); ++ return NULL; ++ } ++ } + } + + return mraa_i2c_init_internal(board->adv_func, (unsigned int) board->i2c_bus[bus].bus_id); +diff --git a/src/mraa.c b/src/mraa.c +index d568238..002046c 100644 +--- a/src/mraa.c ++++ b/src/mraa.c +@@ -406,7 +406,7 @@ mraa_setup_mux_mapped(mraa_pin_t meta) + unsigned int last_pin = UINT_MAX; + + for (mi = 0; mi < meta.mux_total; mi++) { +- ++ syslog(LOG_DEBUG, "PINMUX[%d] cmd %d pin %d\n", mi, meta.mux[mi].pincmd, meta.mux[mi].pin); + switch(meta.mux[mi].pincmd) { + case PINCMD_UNDEFINED: // used for backward compatibility + if(meta.mux[mi].pin != last_pin) { +diff --git a/src/pwm/pwm.c b/src/pwm/pwm.c +index e3be80e..70b5f88 100644 +--- a/src/pwm/pwm.c ++++ b/src/pwm/pwm.c +@@ -257,6 +257,13 @@ mraa_pwm_init(int pin) + } + } + ++ if (board->adv_func->setup_mux_register) { ++ if(board->adv_func->setup_mux_register(pin, MUX_REGISTER_MODE_PWM) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "pwm_init: Failed to set-up pwm%i multiplex register", pin); ++ return NULL; ++ } ++ } ++ + int chip = board->pins[pin].pwm.parent_id; + int pinn = board->pins[pin].pwm.pinmap; + +diff --git a/src/spi/spi.c b/src/spi/spi.c +index 62e1940..0b80452 100644 +--- a/src/spi/spi.c ++++ b/src/spi/spi.c +@@ -98,6 +98,13 @@ mraa_spi_init(int bus) + } + } + ++ if (pos >= 0 && plat->adv_func->setup_mux_register) { ++ if(plat->adv_func->setup_mux_register(pos, MUX_REGISTER_MODE_SPI) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "spi: failed to set-up spi sclk multiplex register"); ++ return NULL; ++ } ++ } ++ + pos = plat->spi_bus[bus].mosi; + if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) { + if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { +@@ -106,6 +113,13 @@ mraa_spi_init(int bus) + } + } + ++ if (pos >= 0 && plat->adv_func->setup_mux_register) { ++ if(plat->adv_func->setup_mux_register(pos, MUX_REGISTER_MODE_SPI) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "spi: failed to set-up spi mosi multiplex register"); ++ return NULL; ++ } ++ } ++ + pos = plat->spi_bus[bus].miso; + if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) { + if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { +@@ -114,6 +128,13 @@ mraa_spi_init(int bus) + } + } + ++ if (pos >= 0 && plat->adv_func->setup_mux_register) { ++ if(plat->adv_func->setup_mux_register(pos, MUX_REGISTER_MODE_SPI) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "spi: failed to set-up spi miso multiplex register"); ++ return NULL; ++ } ++ } ++ + pos = plat->spi_bus[bus].cs; + if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) { + if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { +@@ -121,6 +142,13 @@ mraa_spi_init(int bus) + return NULL; + } + } ++ ++ if (pos >= 0 && plat->adv_func->setup_mux_register) { ++ if(plat->adv_func->setup_mux_register(pos, MUX_REGISTER_MODE_SPI) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "spi: failed to set-up spi cs multiplex register"); ++ return NULL; ++ } ++ } + } + mraa_spi_context dev = mraa_spi_init_raw(plat->spi_bus[bus].bus_id, plat->spi_bus[bus].slave_s); + +diff --git a/src/uart/uart.c b/src/uart/uart.c +index da28c65..c4cd5fd 100644 +--- a/src/uart/uart.c ++++ b/src/uart/uart.c +@@ -131,6 +131,7 @@ static unsigned int speed_to_uint(speed_t speedt) { + { B1200, 1200 }, + { B1800, 1800 }, + { B2400, 2400 }, ++ { B4800, 4800 }, + { B9600, 9600 }, + { B19200, 19200 }, + { B38400, 38400 }, +@@ -218,6 +219,12 @@ mraa_uart_init(int index) + return NULL; + } + } ++ if (plat->adv_func->setup_mux_register) { ++ if(plat->adv_func->setup_mux_register(pos, MUX_REGISTER_MODE_UART) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "uart%i: init: failed to setup mux register for RX pin", index); ++ return NULL; ++ } ++ } + } + + pos = plat->uart_dev[index].tx; +@@ -228,6 +235,12 @@ mraa_uart_init(int index) + return NULL; + } + } ++ if (plat->adv_func->setup_mux_register) { ++ if(plat->adv_func->setup_mux_register(pos, MUX_REGISTER_MODE_UART) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "uart%i: init: failed to setup mux register for TX pin", index); ++ return NULL; ++ } ++ } + } + } + +@@ -623,12 +636,24 @@ mraa_uart_set_flowcontrol(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_bo + return MRAA_ERROR_FEATURE_NOT_SUPPORTED; + } + } ++ if (plat->adv_func->setup_mux_register) { ++ if(plat->adv_func->setup_mux_register(pos_cts, MUX_REGISTER_MODE_UART) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "uart%i: init: failed to setup mux register for CTS pin", dev->index); ++ return MRAA_ERROR_FEATURE_NOT_SUPPORTED; ++ } ++ } + if (plat->pins[pos_rts].uart.mux_total > 0) { + if (mraa_setup_mux_mapped(plat->pins[pos_rts].uart) != MRAA_SUCCESS) { + syslog(LOG_ERR, "uart%i: init: failed to setup muxes for RTS pin", dev->index); + return MRAA_ERROR_FEATURE_NOT_SUPPORTED; + } + } ++ if (plat->adv_func->setup_mux_register) { ++ if(plat->adv_func->setup_mux_register(pos_rts, MUX_REGISTER_MODE_UART) != MRAA_SUCCESS) { ++ syslog(LOG_ERR, "uart%i: init: failed to setup mux register for RTS pin", dev->index); ++ return MRAA_ERROR_FEATURE_NOT_SUPPORTED; ++ } ++ } + } + } + } +@@ -689,7 +714,14 @@ mraa_uart_set_timeout(mraa_uart_context dev, int read, int write, int interchar) + read = 1; + } + termio.c_lflag &= ~ICANON; /* Set non-canonical mode */ +- termio.c_cc[VTIME] = read; /* Set timeout in tenth seconds */ ++ if (read > 0) { ++ termio.c_cc[VTIME] = read; /* Set timeout in tenth seconds */ ++ termio.c_cc[VMIN] = 0; ++ } else { ++ termio.c_cc[VTIME] = 0; /* read <= 0 will disable timeout */ ++ termio.c_cc[VMIN] = 1; ++ } ++ + if (tcsetattr(dev->fd, TCSANOW, &termio) < 0) { + syslog(LOG_ERR, "uart%i: set_timeout: tcsetattr() failed: %s", dev->index, strerror(errno)); + return MRAA_ERROR_FEATURE_NOT_SUPPORTED; +-- +2.22.0 + diff --git a/recipes-app/mraa/files/0003-feat-iot2050-add-some-example-code-for-testing.patch b/recipes-app/mraa/files/0003-feat-iot2050-add-some-example-code-for-testing.patch new file mode 100644 index 000000000..c6ab8368a --- /dev/null +++ b/recipes-app/mraa/files/0003-feat-iot2050-add-some-example-code-for-testing.patch @@ -0,0 +1,432 @@ +From a387d2954da4ee92187b88c22d91f30d7dfe2e65 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Tue, 18 Jun 2019 16:16:02 +0800 +Subject: [PATCH 3/3] feat:iot2050:add some example code for testing + +Signed-off-by: le.jin +--- + examples/platform/CMakeLists.txt | 12 ++++ + examples/platform/aio_iot2050.c | 95 ++++++++++++++++++++++++++++ + examples/platform/led_iot2050.c | 81 ++++++++++++++++++++++++ + examples/platform/pwm_iot2050.c | 105 +++++++++++++++++++++++++++++++ + examples/platform/spi_iot2050.c | 82 ++++++++++++++++++++++++ + 5 files changed, 375 insertions(+) + create mode 100644 examples/platform/aio_iot2050.c + create mode 100644 examples/platform/led_iot2050.c + create mode 100644 examples/platform/pwm_iot2050.c + create mode 100644 examples/platform/spi_iot2050.c + +diff --git a/examples/platform/CMakeLists.txt b/examples/platform/CMakeLists.txt +index 08b7bb4..b283a0d 100644 +--- a/examples/platform/CMakeLists.txt ++++ b/examples/platform/CMakeLists.txt +@@ -4,6 +4,18 @@ target_link_libraries (gpio_edison mraa) + add_executable (up2-leds up2-leds.cpp) + target_link_libraries (up2-leds mraa) + ++add_executable (aio_iot2050 aio_iot2050.c) ++target_link_libraries (aio_iot2050 mraa) ++ ++add_executable (spi_iot2050 spi_iot2050.c) ++target_link_libraries (spi_iot2050 mraa) ++ ++add_executable (pwm_iot2050 pwm_iot2050.c) ++target_link_libraries (pwm_iot2050 mraa) ++ ++add_executable (led_iot2050 led_iot2050.c) ++target_link_libraries (led_iot2050 mraa) ++ + include_directories(${PROJECT_SOURCE_DIR}/api) + include_directories(${PROJECT_SOURCE_DIR}/api/mraa) + +diff --git a/examples/platform/aio_iot2050.c b/examples/platform/aio_iot2050.c +new file mode 100644 +index 0000000..ce5875d +--- /dev/null ++++ b/examples/platform/aio_iot2050.c +@@ -0,0 +1,95 @@ ++/* ++ * Author: Le Jin ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include "mraa/aio.h" ++ ++#define NUM_CHANNELS (6) ++ ++volatile sig_atomic_t flag = 1; ++ ++void ++sig_handler(int signum) ++{ ++ if (signum == SIGINT) { ++ fprintf(stdout, "Exiting...\n"); ++ flag = 0; ++ } ++} ++ ++int main(int argc, char *argv[]) ++{ ++ int i; ++ int value; ++ float float_value; ++ mraa_result_t status = MRAA_SUCCESS; ++ mraa_aio_context aio[NUM_CHANNELS]; ++ ++ signal(SIGINT, sig_handler); ++ /* init */ ++ mraa_init(); ++ memset(aio, 0, sizeof(mraa_aio_context) * NUM_CHANNELS); ++ for(i=0; i ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#include ++#include ++#include ++#include "mraa/led.h" ++ ++#define LED_TRIGGER "timer" ++#define NUM_LEDS (4) ++ ++int main(void) ++{ ++ mraa_result_t status = MRAA_SUCCESS; ++ mraa_led_context led[NUM_LEDS]; ++ int i; ++ ++ /* initialize mraa for the platform (not needed most of the time) */ ++ mraa_init(); ++ ++ //! [Interesting] ++ /* initialize LED */ ++ for(i=0; i ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include "mraa/pwm.h" ++ ++#define NUM_CHANNELS (6) ++#define PWM_FREQ_US (1) ++#define PWM_DUTY_PERCENT (0.5) ++#define PWM_START_PIN (4) ++ ++volatile sig_atomic_t flag = 1; ++ ++void ++sig_handler(int signum) ++{ ++ if (signum == SIGINT) { ++ fprintf(stdout, "Exiting...\n"); ++ flag = 0; ++ } ++} ++ ++int main(int argc, char *argv[]) ++{ ++ int i; ++ mraa_result_t status = MRAA_SUCCESS; ++ mraa_pwm_context pwm[NUM_CHANNELS]; ++ ++ signal(SIGINT, sig_handler); ++ /* init */ ++ mraa_init(); ++ memset(pwm, 0, sizeof(mraa_pwm_context) * NUM_CHANNELS); ++ for(i=0; i ++ * Copyright (c) Siemens AG, 2019 ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sublicense, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#include ++#include ++#include ++#include "mraa/spi.h" ++ ++#define SPI_BUS (0) ++#define SPI_FREQ 400000 ++#define BUF_SIZE (64) ++ ++int main(int argc, char *argv[]) ++{ ++ mraa_result_t status = MRAA_SUCCESS; ++ mraa_spi_context spi; ++ uint8_t tx_buf[BUF_SIZE]; ++ uint8_t rx_buf[BUF_SIZE]; ++ int i; ++ ++ /* initialize mraa */ ++ mraa_init(); ++ /* initialize SPI bus */ ++ spi = mraa_spi_init(SPI_BUS); ++ if (spi == NULL) { ++ fprintf(stderr, "Failed to initialize SPI\n"); ++ mraa_deinit(); ++ return EXIT_FAILURE; ++ } ++ status = mraa_spi_frequency(spi, SPI_FREQ); ++ if (status != MRAA_SUCCESS) ++ goto error; ++ fprintf(stderr, "Start SPI transfer\n"); ++ for(i=0; i +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# +inherit dpkg + +DESCRIPTION = "Low Level Skeleton Library for Communication on GNU/Linux platforms" +MAINTAINER = "le.jin@siemens.com" +SRC_URI += "git://github.com/intel-iot-devkit/mraa.git;protocol=https;branch=${MRAA_BRANCH};rev=${MRAA_REV};name=mraa \ + file://${MRAA_BUILD_SWIG30_PATCH_FILE};apply=no \ + file://0001-aio.c-fix-mraa_aio_set_bit-for-result-scaling.patch \ + file://0002-feat-iot2050-add-iot2050-platform-support.patch \ + file://0003-feat-iot2050-add-some-example-code-for-testing.patch \ + file://rules" +SRC_URI[sha256sum] = "15783b4c4431a36d44ba95daf134318a04ff44a8190ba3f19abbda89ede35a26" +MRAA_BRANCH = "master" +MRAA_REV = "967585c9ea0e1a8818d2172d2395d8502f6180a2" + +S = "${WORKDIR}/git" +PV = "2.0" + +MRAA_BUILD_SWIG30_PATCH_FILE = "0001-Add-Node-7.x-aka-V8-5.2-support.patch" +MRAA_BUILD_SWIG30_DIR = "${BUILDCHROOT_HOST_DIR}/usr/share/swig3.0" + +DEBIAN_DEPENDS = "python3, nodejs " + +do_prepare_build[cleandirs] += "${S}/debian" + +do_prepare_build() { + deb_debianize + sed -i -e 's/Build-Depends: /Build-Depends: cmake, swig3.0, libpython-dev, libpython3-dev, nodejs, libnode-dev, libjson-c-dev, default-jdk, /g' ${S}/debian/control +} + +# patch swig before build, see https://github.com/intel-iot-devkit/mraa/blob/master/docs/building.md#javascript-bindings-for-nodejs-700 +dpkg_runbuild_prepend() { + if ! sudo -E patch -N -d ${MRAA_BUILD_SWIG30_DIR} -p2 < ${WORKDIR}/${MRAA_BUILD_SWIG30_PATCH_FILE} ; then + sudo -E patch -R -d ${MRAA_BUILD_SWIG30_DIR} -p2 < ${WORKDIR}/${MRAA_BUILD_SWIG30_PATCH_FILE} + sudo -E patch -N -d ${MRAA_BUILD_SWIG30_DIR} -p2 < ${WORKDIR}/${MRAA_BUILD_SWIG30_PATCH_FILE} + fi +} diff --git a/recipes-app/node-red-gpio/files/0001-add-the-board-info-add-the-led-control-node.patch b/recipes-app/node-red-gpio/files/0001-add-the-board-info-add-the-led-control-node.patch new file mode 100644 index 000000000..96aeb717c --- /dev/null +++ b/recipes-app/node-red-gpio/files/0001-add-the-board-info-add-the-led-control-node.patch @@ -0,0 +1,386 @@ +From d220690c728c867ed89718e087ff57cec305116e Mon Sep 17 00:00:00 2001 +From: zengchao +Date: Tue, 12 Nov 2019 09:37:47 +0800 +Subject: [PATCH 1/2] add the board info add the led control node + +Signed-off-by: zengchao +--- + hardware/intel/mraa-gpio-ain.html | 5 +- + hardware/intel/mraa-gpio-ain.js | 1 + + hardware/intel/mraa-gpio-din.html | 5 +- + hardware/intel/mraa-gpio-din.js | 1 + + hardware/intel/mraa-gpio-dout.html | 5 +- + .../{mraa-gpio-pwm.html => mraa-gpio-led.html} | 47 +++++-------- + hardware/intel/mraa-gpio-led.js | 78 ++++++++++++++++++++++ + hardware/intel/mraa-gpio-pwm.html | 13 ++-- + hardware/intel/package.json | 7 +- + 9 files changed, 118 insertions(+), 44 deletions(-) + copy hardware/intel/{mraa-gpio-pwm.html => mraa-gpio-led.html} (58%) + create mode 100644 hardware/intel/mraa-gpio-led.js + +diff --git a/hardware/intel/mraa-gpio-ain.html b/hardware/intel/mraa-gpio-ain.html +index 93d5a5a..377eae9 100644 +--- a/hardware/intel/mraa-gpio-ain.html ++++ b/hardware/intel/mraa-gpio-ain.html +@@ -1,7 +1,7 @@ + + + + + + +diff --git a/hardware/intel/mraa-gpio-din.js b/hardware/intel/mraa-gpio-din.js +index 5966e44..4ac983f 100644 +--- a/hardware/intel/mraa-gpio-din.js ++++ b/hardware/intel/mraa-gpio-din.js +@@ -50,6 +50,7 @@ module.exports = function(RED) { + } + this.on('close', function() { + node.x.isr(m.EDGE_BOTH, null); ++ node.x.isrExit(); + }); + } + RED.nodes.registerType("mraa-gpio-din", gpioDin); +diff --git a/hardware/intel/mraa-gpio-dout.html b/hardware/intel/mraa-gpio-dout.html +index ed0289a..f3f7060 100644 +--- a/hardware/intel/mraa-gpio-dout.html ++++ b/hardware/intel/mraa-gpio-dout.html +@@ -1,7 +1,7 @@ + + + + +diff --git a/hardware/intel/mraa-gpio-pwm.html b/hardware/intel/mraa-gpio-led.html +similarity index 58% +copy from hardware/intel/mraa-gpio-pwm.html +copy to hardware/intel/mraa-gpio-led.html +index 2dfb95e..826875f 100644 +--- a/hardware/intel/mraa-gpio-pwm.html ++++ b/hardware/intel/mraa-gpio-led.html +@@ -1,24 +1,19 @@ + + + +- + +- +diff --git a/hardware/intel/mraa-gpio-led.js b/hardware/intel/mraa-gpio-led.js +new file mode 100644 +index 0000000..053d04a +--- /dev/null ++++ b/hardware/intel/mraa-gpio-led.js +@@ -0,0 +1,78 @@ ++module.exports = function(RED) { ++ var m = require('mraa'); ++ let led0 = new m.Led(0); /*user-led0-green*/ ++ let led1 = new m.Led(1); /*user-led0-red*/ ++ let led2 = new m.Led(2); /*user-led1-green*/ ++ let led3 = new m.Led(3); /*user-led1-red*/ ++ function LEDNode(n) { ++ RED.nodes.createNode(this, n); ++ this.pin = Number(n.pin); ++ this.on("input", function(msg) { ++ if (msg.payload == "1") { ++ switch(this.pin) ++ { ++ case 0: /*User0 Led Green*/ ++ led0.setBrightness(1); ++ break; ++ case 1: /*User0 Led Red*/ ++ led1.setBrightness(1); ++ break; ++ case 2: /*User0 Orange*/ ++ led0.setBrightness(1); ++ led1.setBrightness(1); ++ break; ++ case 3: /*User1 Led Green*/ ++ led2.setBrightness(1); ++ break; ++ case 4: /*User1 Led Red*/ ++ led3.setBrightness(1); ++ break; ++ case 5: /*User1 Orange*/ ++ led2.setBrightness(1); ++ led3.setBrightness(1); ++ break; ++ default: ++ break; ++ } ++ } ++ else { ++ switch(this.pin) ++ { ++ case 0: /*User0 Led Green*/ ++ led0.setBrightness(0); ++ break; ++ case 1: /*User0 Led Red*/ ++ led1.setBrightness(0); ++ break; ++ case 2: /*User0 Orange*/ ++ led0.setBrightness(0); ++ led1.setBrightness(0); ++ break; ++ case 3: /*User1 Led Green*/ ++ led2.setBrightness(0); ++ break; ++ case 4: /*User1 Led Red*/ ++ led3.setBrightness(0); ++ break; ++ case 5: /*User1 Orange*/ ++ led2.setBrightness(0); ++ led3.setBrightness(0); ++ break; ++ default: ++ break; ++ } ++ } ++ }); ++ this.on('close', function() { ++ }); ++ } ++ RED.nodes.registerType("mraa-gpio-led", LEDNode); ++ ++ RED.httpAdmin.get('/mraa-gpio/:id', RED.auth.needsPermission('mraa-gpio.read'), function(req,res) { ++ res.json(m.getPlatformType()); ++ }); ++ ++ RED.httpAdmin.get('/mraa-version/:id', RED.auth.needsPermission('mraa-version.read'), function(req,res) { ++ res.json(m.getVersion()); ++ }); ++} +diff --git a/hardware/intel/mraa-gpio-pwm.html b/hardware/intel/mraa-gpio-pwm.html +index 2dfb95e..8daace4 100644 +--- a/hardware/intel/mraa-gpio-pwm.html ++++ b/hardware/intel/mraa-gpio-pwm.html +@@ -1,7 +1,7 @@ + + + + +diff --git a/hardware/intel/package.json b/hardware/intel/package.json +index 6f66fe4..57b6f1f 100644 +--- a/hardware/intel/package.json ++++ b/hardware/intel/package.json +@@ -1,7 +1,7 @@ + { + "name" : "node-red-node-intel-gpio", +- "version" : "0.0.6", +- "description" : "A Node-RED node to talk to an Intel Galileo or Edison using mraa", ++ "version" : "0.0.6-IOT2050", ++ "description" : "A Node-RED node to talk to an IOT2050 using mraa", + "dependencies" : { + }, + "repository" : { +@@ -15,7 +15,8 @@ + "mraa-gpio-ain": "mraa-gpio-ain.js", + "mraa-gpio-din": "mraa-gpio-din.js", + "mraa-gpio-dout": "mraa-gpio-dout.js", +- "mraa-gpio-pwm": "mraa-gpio-pwm.js" ++ "mraa-gpio-pwm": "mraa-gpio-pwm.js", ++ "mraa-gpio-led": "mraa-gpio-led.js" + } + }, + "author": { +-- +2.16.4 + diff --git a/recipes-app/node-red-gpio/files/0002-extend-gpio-to-D19.patch b/recipes-app/node-red-gpio/files/0002-extend-gpio-to-D19.patch new file mode 100644 index 000000000..daa3efc30 --- /dev/null +++ b/recipes-app/node-red-gpio/files/0002-extend-gpio-to-D19.patch @@ -0,0 +1,62 @@ +From 81dc6e6f2f463a6f82bd3400b3ad841423f159d2 Mon Sep 17 00:00:00 2001 +From: zengchao +Date: Tue, 17 Dec 2019 08:48:05 +0800 +Subject: [PATCH 2/2] extend gpio to D19 + +Signed-off-by: zengchao +--- + hardware/intel/mraa-gpio-dout.html | 12 +++++++----- + hardware/intel/mraa-gpio-dout.js | 7 +------ + 2 files changed, 8 insertions(+), 11 deletions(-) + +diff --git a/hardware/intel/mraa-gpio-dout.html b/hardware/intel/mraa-gpio-dout.html +index f3f7060..d88995c 100644 +--- a/hardware/intel/mraa-gpio-dout.html ++++ b/hardware/intel/mraa-gpio-dout.html +@@ -15,11 +15,7 @@ + icon: "arrow.png", + align: "right", + label: function() { +- if (this.pin === "14") { +- return "LED"; +- } else { +- return this.name||"D"+this.pin; +- } ++ return this.name||"D"+this.pin; + }, + labelStyle: function() { + return this.name?"node_label_italic":""; +@@ -79,6 +75,12 @@ + + + ++ ++ ++ ++ ++ ++ + + +
+diff --git a/hardware/intel/mraa-gpio-dout.js b/hardware/intel/mraa-gpio-dout.js +index 020db55..37d1429 100644 +--- a/hardware/intel/mraa-gpio-dout.js ++++ b/hardware/intel/mraa-gpio-dout.js +@@ -8,12 +8,7 @@ module.exports = function(RED) { + this.set = n.set; + this.level = Number(n.level); + var node = this; +- if (node.pin === 14) { +- node.p = new m.Gpio(3,false,true); // special for onboard LED v1 +- } +- else { +- node.p = new m.Gpio(node.pin); +- } ++ node.p = new m.Gpio(node.pin); + node.p.mode(m.PIN_GPIO); + node.p.dir(m.DIR_OUT); + if (node.set) { +-- +2.16.4 + diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-ain.html b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-ain.html new file mode 100644 index 000000000..93d5a5ae6 --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-ain.html @@ -0,0 +1,69 @@ + + + + + + diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-ain.js b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-ain.js new file mode 100644 index 000000000..4122551ee --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-ain.js @@ -0,0 +1,27 @@ + +module.exports = function(RED) { + var m = require('mraa'); + + function gpioAin(n) { + RED.nodes.createNode(this, n); + this.pin = n.pin; + this.interval = n.interval; + this.x = new m.Aio(parseInt(this.pin)); + this.board = m.getPlatformName(); + var node = this; + var msg = { topic:node.board+"/A"+node.pin }; + var old = -99999; + this.timer = setInterval(function() { + msg.payload = node.x.read(); + if (msg.payload !== old) { + node.send(msg); + old = msg.payload; + } + }, node.interval); + + this.on('close', function() { + clearInterval(this.timer); + }); + } + RED.nodes.registerType("mraa-gpio-ain", gpioAin); +} diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-din.html b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-din.html new file mode 100644 index 000000000..fdbcfc450 --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-din.html @@ -0,0 +1,84 @@ + + + + + + diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-din.js b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-din.js new file mode 100644 index 000000000..5966e4480 --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-din.js @@ -0,0 +1,56 @@ + +module.exports = function(RED) { + var m = require('mraa'); + //console.log("BOARD :",m.getPlatformName()); + + function gpioDin(n) { + RED.nodes.createNode(this,n); + this.pin = n.pin; + this.interrupt = n.interrupt; + this.x = new m.Gpio(parseInt(this.pin)); + this.board = m.getPlatformName(); + var node = this; + node.x.mode(m.PIN_GPIO); + node.x.dir(m.DIR_IN); + node.x.isr(m.EDGE_BOTH, function() { + var g = node.x.read(); + var msg = { payload:g, topic:node.board+"/D"+node.pin }; + switch (g) { + case 0: { + node.status({fill:"green",shape:"ring",text:"low"}); + if (node.interrupt=== "f" || node.interrupt === "b") { + node.send(msg); + } + break; + } + case 1: { + node.status({fill:"green",shape:"dot",text:"high"}); + if (node.interrupt=== "r" || node.interrupt === "b") { + node.send(msg); + } + break; + } + default: { + node.status({fill:"grey",shape:"ring",text:"unknown"}); + } + } + }); + switch (node.x.read()) { + case 0: { + node.status({fill:"green",shape:"ring",text:"low"}); + break; + } + case 1: { + node.status({fill:"green",shape:"dot",text:"high"}); + break; + } + default: { + node.status({}); + } + } + this.on('close', function() { + node.x.isr(m.EDGE_BOTH, null); + }); + } + RED.nodes.registerType("mraa-gpio-din", gpioDin); +} diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-dout.html b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-dout.html new file mode 100644 index 000000000..ed0289ac3 --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-dout.html @@ -0,0 +1,105 @@ + + + + + + diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-dout.js b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-dout.js new file mode 100644 index 000000000..020db5586 --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-dout.js @@ -0,0 +1,43 @@ + +module.exports = function(RED) { + var m = require('mraa'); + + function gpioDout(n) { + RED.nodes.createNode(this, n); + this.pin = Number(n.pin); + this.set = n.set; + this.level = Number(n.level); + var node = this; + if (node.pin === 14) { + node.p = new m.Gpio(3,false,true); // special for onboard LED v1 + } + else { + node.p = new m.Gpio(node.pin); + } + node.p.mode(m.PIN_GPIO); + node.p.dir(m.DIR_OUT); + if (node.set) { + node.p.write(node.level); + } + node.on("input", function(msg) { + if (msg.payload == "1") { + node.p.write(1); + } + else { + node.p.write(0); + } + }); + + this.on('close', function() { + }); + } + RED.nodes.registerType("mraa-gpio-dout", gpioDout); + + RED.httpAdmin.get('/mraa-gpio/:id', RED.auth.needsPermission('mraa-gpio.read'), function(req,res) { + res.json(m.getPlatformType()); + }); + + RED.httpAdmin.get('/mraa-version/:id', RED.auth.needsPermission('mraa-version.read'), function(req,res) { + res.json(m.getVersion()); + }); +} diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-pwm.html b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-pwm.html new file mode 100644 index 000000000..2dfb95e62 --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-pwm.html @@ -0,0 +1,88 @@ + + + + + + diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-pwm.js b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-pwm.js new file mode 100644 index 000000000..22b02cb49 --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/mraa-gpio-pwm.js @@ -0,0 +1,35 @@ + +module.exports = function(RED) { + var m = require('mraa'); + + function gpioPWM(n) { + RED.nodes.createNode(this, n); + this.pin = Number(n.pin); + this.period = Number(n.period) || 100; + var node = this; + node.p = new m.Pwm(node.pin); + //node.p.dir(m.DIR_OUT); + //node.p.mode(m.PIN_PWM); + node.p.enable(true); + node.p.period_ms(node.period); + + node.on("input", function(msg) { + if (msg.payload) { + node.p.write(Number(msg.payload)); + } + }); + + this.on('close', function() { + node.p.enable(false); + }); + } + RED.nodes.registerType("mraa-gpio-pwm", gpioPWM); + + RED.httpAdmin.get('/mraa-gpio/:id', RED.auth.needsPermission('mraa-gpio.read'), function(req,res) { + res.json(m.getPlatformType()); + }); + + RED.httpAdmin.get('/mraa-version/:id', RED.auth.needsPermission('mraa-version.read'), function(req,res) { + res.json(m.getVersion()); + }); +} diff --git a/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/package.json b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/package.json new file mode 100644 index 000000000..14564d863 --- /dev/null +++ b/recipes-app/node-red-gpio/files/node-red-node-intel-gpio/package.json @@ -0,0 +1,56 @@ +{ + "_from": "node-red-node-intel-gpio", + "_id": "node-red-node-intel-gpio@0.0.6", + "_inBundle": false, + "_integrity": "sha512-ykZKgpillqBa69oN7gvR3CCY4EbyIRZZTad+YAC1Q6peIebugUD1QttNNwUeVe4t3oR1aHP2kdUUuyuPOt3EJA==", + "_location": "/node-red-node-intel-gpio", + "_phantomChildren": {}, + "_requested": { + "type": "tag", + "registry": true, + "raw": "node-red-node-intel-gpio", + "name": "node-red-node-intel-gpio", + "escapedName": "node-red-node-intel-gpio", + "rawSpec": "", + "saveSpec": null, + "fetchSpec": "latest" + }, + "_requiredBy": [ + "#USER", + "/" + ], + "_resolved": "https://registry.npmjs.org/node-red-node-intel-gpio/-/node-red-node-intel-gpio-0.0.6.tgz", + "_shasum": "e6439cb12edc4794331f414bef80b3c155575a44", + "_spec": "node-red-node-intel-gpio", + "_where": "/usr/local/lib/node_modules/node-red/node_modules", + "author": { + "name": "Dave Conway-Jones", + "email": "ceejay@vnet.ibm.com", + "url": "http://nodered.org" + }, + "bundleDependencies": false, + "dependencies": {}, + "deprecated": false, + "description": "A Node-RED node to talk to an Intel Galileo or Edison using mraa", + "keywords": [ + "node-red", + "intel", + "galileo", + "edison" + ], + "license": "Apache-2.0", + "name": "node-red-node-intel-gpio", + "node-red": { + "nodes": { + "mraa-gpio-ain": "mraa-gpio-ain.js", + "mraa-gpio-din": "mraa-gpio-din.js", + "mraa-gpio-dout": "mraa-gpio-dout.js", + "mraa-gpio-pwm": "mraa-gpio-pwm.js" + } + }, + "repository": { + "type": "git", + "url": "https://github.com/node-red/node-red-nodes/tree/master/hardware/intel" + }, + "version": "0.0.6" +} diff --git a/recipes-app/node-red-gpio/node-red-gpio_0.0.6-IOT2050.bb b/recipes-app/node-red-gpio/node-red-gpio_0.0.6-IOT2050.bb new file mode 100644 index 000000000..a0af0857d --- /dev/null +++ b/recipes-app/node-red-gpio/node-red-gpio_0.0.6-IOT2050.bb @@ -0,0 +1,30 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Chao Zeng +# Jan Kiszka +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +inherit dpkg-raw + +DESCRIPTION = "node-red-gpio-integration" +MAINTAINER = "chao.zeng@siemens.com" + +SRC_URI = " \ + git://github.com/node-red/node-red-nodes;protocol=https \ + file://0001-add-the-board-info-add-the-led-control-node.patch \ + file://0002-extend-gpio-to-D19.patch" +SRCREV="3087e8e2a1ea189f394bca0a2af159ad859d7722" + +S = "${WORKDIR}/git" + +DEBIAN_DEPENDS = "node-red" + +do_install() { + install -v -d ${D}/usr/lib/node_modules/node-red/node_modules/node-red-node-intel-gpio + install -v -m 644 ${S}/hardware/intel/* ${D}/usr/lib/node_modules/node-red/node_modules/node-red-node-intel-gpio +} diff --git a/recipes-app/node-red/files/node-red.service b/recipes-app/node-red/files/node-red.service new file mode 100644 index 000000000..9aad5c41f --- /dev/null +++ b/recipes-app/node-red/files/node-red.service @@ -0,0 +1,11 @@ +[Unit] +Description=Node-RED +After=syslog.target network.target + +[Service] +Type=idle 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See +# COPYING.MIT file in the top-level directory. +# + +inherit npm + +DESCRIPTION = "A visual tool for wiring the Internet of Things" + +PRESERVE_PERMS = "usr/lib/node_modules/node-red/red.js" + +SRC_URI += "file://node-red.service" + +do_install_append() { + install -v -d ${D}/lib/systemd/system/ + install -v -m 644 ${WORKDIR}/node-red.service ${D}/lib/systemd/system/ +} diff --git a/recipes-app/npm/npm_6.10.3+ds.bb b/recipes-app/npm/npm_6.10.3+ds.bb new file mode 100644 index 000000000..cc3e839b0 --- /dev/null +++ b/recipes-app/npm/npm_6.10.3+ds.bb @@ -0,0 +1,6 @@ +inherit dpkg-gbp + +SRC_URI = "git://salsa.debian.org/freexian-team/npm.git;protocol=https" +SRCREV = "616a7c023dcb4d98cbb8502b0ce0b54e8997ae6b" + +GBP_EXTRA_OPTIONS += "--git-compression=xz" diff --git a/recipes-app/switchserialmode/files/CMakeLists.txt b/recipes-app/switchserialmode/files/CMakeLists.txt new file mode 100644 index 000000000..dbc30778e --- /dev/null +++ b/recipes-app/switchserialmode/files/CMakeLists.txt @@ -0,0 +1,6 @@ +cmake_minimum_required(VERSION 2.6) +project(switchserialmode) +add_executable(switchserialmode switchserialmode.c) +set(CMAKE_INSTALL_PREFIX "/usr") +set(CMAKE_EXE_LINKER_FLAGS "-lusb-1.0") +install(TARGETS switchserialmode RUNTIME DESTINATION bin) diff --git a/recipes-app/switchserialmode/files/switchserialmode.c b/recipes-app/switchserialmode/files/switchserialmode.c new file mode 100644 index 000000000..edc482773 --- /dev/null +++ b/recipes-app/switchserialmode/files/switchserialmode.c @@ -0,0 +1,1279 @@ +/* + * Copyright (c) Siemens AG, 2019 + * + * Authors: + * Gao Nian + * + * This file is subject to the terms and conditions of the MIT License. See + * COPYING.MIT file in the top-level directory. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +typedef unsigned char BYTE; +typedef unsigned int UINT; +typedef unsigned short U16; + +typedef enum _E_STATUS { + e_SUCCESS = 0x00, + e_IO_ERROR = 0x01, + + e_DEVICE_NOT_FOUND = 0xFF +} E_STATUS; + +#define ERROR(msg, ...) printf("ERROR: "msg"\n", ##__VA_ARGS__); + +typedef enum{ + e_case_sensitive = 0, + e_case_insensitive +}E_CASE_SENSITIVE; + +#define MUTIL_THREAD 100 + +static char *format(const char *fmt, ...) +{ + #define MAX_STRING_SIZE 128 + + static char string[MUTIL_THREAD][MAX_STRING_SIZE] = {{0,0}}; + + static int cnt = 0; + if(cnt == MUTIL_THREAD) + { + cnt = 0; + } + + memset((char *)&string[cnt][0], 0, MAX_STRING_SIZE); + + va_list ap; + va_start(ap, fmt); + vsprintf((char *)&string[cnt][0], fmt, ap); + va_end(ap); + + char *ptr = (char *)&string[cnt][0]; + cnt++; + + return ptr; +} + +static char **split(const char *string, const char *delimiter, int *num) +{ + #define MAX_SECTION 20 + static char *args[MUTIL_THREAD][MAX_SECTION] = {{0,0}}; + + #define BUF_SIZE 256 + static char buf[MUTIL_THREAD][BUF_SIZE] = {{0,0}}; + + static int count = 0; + if(count == MUTIL_THREAD) + { + count = 0; + } + + memset((char *)&buf[count][0], 0, BUF_SIZE); + memcpy((char *)&buf[count][0], string, strlen(string)); + + int i = 0; + char *p = strtok((char *)&buf[count][0], delimiter); + while(NULL != p) + { + args[count][i++] = p; + p = strtok(NULL, delimiter); + } + + if(NULL != num) + { + *num = i; + } + + char **ptr = &args[count][0]; + count++; + + return ptr; +} + +#define ARG(fmt, ...) split(format(fmt, ##__VA_ARGS__), " ", NULL) + +static bool compare_string(const char *dest, const char *arg, const E_CASE_SENSITIVE casesensitive) +{ + const char *DELIMITER = ","; + + int num = 0; + char **list = split(arg, DELIMITER, &num); + + int i = 0; + for(i = 0; i < num; i++) + { + if(casesensitive == e_case_sensitive) + { + if(0 == strncmp(list[i], dest, strlen(dest))) + { + return true; + } + } + else + { + if(0 == strcasecmp(list[i], dest)) + { + return true; + } + } + } + return false; +} + +static bool check_arg(int argc, char **argv, const char *name, const E_CASE_SENSITIVE casesensitive) +{ + for(int i = 0; i < argc; i++) + { + if(compare_string(argv[i], name, casesensitive)) + { + return true; + } + } + + return false; +} + +static int get_arg_int(int argc, char **argv, const char *name, const E_CASE_SENSITIVE casesensitive, int defaultValue) +{ + for(int i = 0; i < argc; i++) + { + if(compare_string(argv[i], name, casesensitive) + && ((i + 1) < argc) + && ('-' != argv[i + 1][0])) + { + return strtol(argv[i + 1], NULL, 0); + } + } + + return defaultValue; +} + +static char *get_arg_string(int argc, char **argv, const char *name, const E_CASE_SENSITIVE casesensitive, char *defaultValue) +{ + for(int i = 0; i < argc; i++) + { + if(compare_string(argv[i], name, casesensitive) + && ((i + 1) < argc)) + { + return argv[i + 1]; + } + } + + return defaultValue; +} + + +#define LEN(a) (sizeof(a)/sizeof((a)[0])) + +int exe_shell(const char **lines, int lines_num, char *res, int res_size) +{ + char buf[1024] = {0}; + memset(buf, 0, sizeof(buf)); + + int i = 0; + for(i = 0; i < lines_num; i++) + { + if(0 == i) + { + strncpy(buf, lines[0], strlen(lines[0])); + } + else + { + strcat(buf, lines[i]); + } + } + + FILE *fp = popen(buf, "r"); + + memset(buf, 0, sizeof(buf)); + char *ptr = (NULL == res) ? buf : res; + int ptr_size = (NULL == res) ? sizeof(buf) : res_size; + + fgets(ptr, ptr_size, fp); + pclose(fp); + + if(NULL != strstr(ptr, "true") + || NULL != strstr(ptr, "TRUE") + || NULL != strstr(ptr, "True")) + { + return 1; + } + + return 0; +} + +void gpio_set(const char *gpiodev, const char *offset, const char *value) +{ + const char* cmd_is_exist[] = {"if [ -e ", gpiodev, " ]; then echo true; else echo false; fi"}; + const char* cmd_export_gpio[] = {"echo ", offset, " > /sys/class/gpio/export"}; + const char* cmd_set_gpio_out[] = {"echo out > ", gpiodev, "/direction"}; + const char* cmd_set_gpio_value[] = {"echo ", value, " > ", gpiodev, "/value"}; + + if(!exe_shell(cmd_is_exist, LEN(cmd_is_exist), NULL, 0)) + { + exe_shell(cmd_export_gpio, LEN(cmd_export_gpio), NULL, 0); + } + + exe_shell(cmd_set_gpio_out, LEN(cmd_set_gpio_out), NULL, 0); + exe_shell(cmd_set_gpio_value, LEN(cmd_set_gpio_value), NULL, 0); +} + +static void gpio_set_mode(int va, int vb) +{ + gpio_set("/sys/class/gpio/gpio192", "192", "1"); /* uart_en gpio */ + gpio_set("/sys/class/gpio/gpio190", "190", va ? "1" : "0"); /* uart_mode0 gpio */ + gpio_set("/sys/class/gpio/gpio191", "191", vb ? "1" : "0"); /* uart_mode1 gpio */ +} + +static void gpio_set_terminate(int onoff) +{ + gpio_set("/sys/class/gpio/gpio193", "193", onoff ? "1" : "0"); /* uart_terminate gpio */ +} + +static void gpio_switch_mode(const char *mode, int terminate) +{ + if(compare_string(mode, "rs232", e_case_insensitive)) + { + gpio_set_mode(0, 1); + gpio_set_terminate(0); + } + else if(compare_string(mode, "rs485", e_case_insensitive)) + { + gpio_set_mode(1, 0); + gpio_set_terminate(terminate); + } + else if(compare_string(mode, "rs422", e_case_insensitive)) + { + gpio_set_mode(1, 1); + gpio_set_terminate(terminate); + } +} + + +#ifndef SER_RS485_TERMINATE_BUS +#define SER_RS485_TERMINATE_BUS (1 << 5) +#endif + +#define SET_UART_RTS_ACTIVE_LOGIC(flags, logic) \ + do{\ + if(logic){\ + flags &= ~(SER_RS485_RTS_ON_SEND); \ + flags |= (SER_RS485_RTS_AFTER_SEND); \ + }else{\ + flags |= (SER_RS485_RTS_ON_SEND); \ + flags &= ~(SER_RS485_RTS_AFTER_SEND);}\ + }while(0) + +#define GET_UART_RTS_ACTIVE_LOGIC(flags) (!((flags) & SER_RS485_RTS_ON_SEND)) + +static E_STATUS ttyuart_get_rs485conf(const char *uartdev, struct serial_rs485 *pcfg) +{ + int fd = open(uartdev, O_RDWR); + if(fd < 0) + { + ERROR("open %s failed", uartdev); + return e_IO_ERROR; + } + + int ret = ioctl(fd, TIOCGRS485, pcfg); + if(ret < 0) + { + perror("Error"); + } + + close(fd); + return 0 == ret ? e_SUCCESS : e_IO_ERROR; +} + +static void ttyuart_print_mode(const char *uartdev) +{ + struct serial_rs485 rs485conf; + + if(e_SUCCESS != ttyuart_get_rs485conf(uartdev, &rs485conf)) + { + return; + } + + const char *mode = NULL; + const char *activelogic = NULL; + const char *terminate = NULL; + + if(!(rs485conf.flags & SER_RS485_ENABLED)) + { + mode = "rs232"; + activelogic = ""; + terminate = ""; + } + else + { + if(rs485conf.flags & SER_RS485_RX_DURING_TX) + { + mode = "rs422"; + activelogic = ""; + } + else + { + mode = "rs485"; + activelogic = GET_UART_RTS_ACTIVE_LOGIC(rs485conf.flags) ? "active-logic(high)" : "active-logic(low)"; + } + + if(rs485conf.flags & SER_RS485_TERMINATE_BUS) + { + terminate = "terminating"; + } + else + { + terminate = "non-terminating"; + } + } + + printf("%s %s %s\n", mode, activelogic, terminate); +} + +static E_STATUS ttyuart_set_rs485conf(const char *uartdev, struct serial_rs485 *pcfg) +{ + int fd = open(uartdev, O_RDWR); + if(fd < 0) + { + ERROR("open %s failed", uartdev); + return e_IO_ERROR; + } + + int ret = ioctl(fd, TIOCSRS485, pcfg); + if(ret < 0) + { + perror("Error"); + } + + close(fd); + return 0 == ret ? e_SUCCESS : e_IO_ERROR; +} + +static E_STATUS ttyuart_switchto_rs232(const char *uartdev) +{ + struct serial_rs485 rs485conf; + memset(&rs485conf, 0, sizeof(rs485conf)); + + return ttyuart_set_rs485conf(uartdev, &rs485conf); +} + +static E_STATUS ttyuart_switchto_rs485(const char *uartdev, int logicLevel) +{ + struct serial_rs485 rs485conf; + memset(&rs485conf, 0, sizeof(rs485conf)); + + SET_UART_RTS_ACTIVE_LOGIC(rs485conf.flags, logicLevel); + + rs485conf.flags |= SER_RS485_ENABLED | SER_RS485_RX_DURING_TX; + + return ttyuart_set_rs485conf(uartdev, &rs485conf); +} + +static E_STATUS ttyuart_switchto_rs422(const char *uartdev) +{ + struct serial_rs485 rs485conf; + memset(&rs485conf, 0, sizeof(rs485conf)); + + rs485conf.flags |= SER_RS485_ENABLED | SER_RS485_RX_DURING_TX; + + return ttyuart_set_rs485conf(uartdev, &rs485conf); +} + +const char * const TTYUART_USAGE = "\ +It's to operate tty serial device.\n\ + -h,--help: display help information.\n\ + -D,--device: specified device, like '/dev/ttyS1' etc.\n\ + -m,--mode mode: set serial work mode, the mode can be set 'rs232' or 'rs485' or 'rs422'.\n\ + -l,--logic level: set RTS-pin logic level when sending in rs485 mode, logic can be set '0' or '1'.\n\ + -d,--display: display the current mode of ttyuart\n"; + +static void ttyuart_command_handle(int argc, char **argv) +{ + if(check_arg(argc, argv, "-h,--help", e_case_sensitive)) + { + printf("%s", TTYUART_USAGE); + return; + } + + const char *devType = get_arg_string(argc, argv, "-D,--device", e_case_sensitive, NULL); + if(NULL == devType) + { + ERROR("parameter error, must specify serial device via '-D,--device'"); + return; + } + + if(check_arg(argc, argv, "-d,--display", e_case_sensitive)) + { + ttyuart_print_mode(devType); + return; + } + + const char *mode = get_arg_string(argc, argv, "-m,--mode", e_case_sensitive, NULL); + if(NULL == mode) + { + ERROR("parameter error, must specify mode via '-m,--mode'"); + return; + } + + int logicLevel = get_arg_int(argc, argv, "-l,--logic", e_case_sensitive, 1); + + if(0 == strcasecmp(mode, "rs232")) + { + ttyuart_switchto_rs232(devType); + } + else if(0 == strcasecmp(mode, "rs485")) + { + ttyuart_switchto_rs485(devType, logicLevel); + } + else if(0 == strcasecmp(mode, "rs422")) + { + ttyuart_switchto_rs422(devType); + } + else + { + ERROR("parameter error, don't support '%s'", mode); + } +} + + + +/* Device Part Numbers */ +typedef enum _SILABS_PARTNUM_CPXXXX { + CP210x_PARTNUM_UNKNOWN = ((BYTE)(0xFF & 0x00)), + CP210x_PARTNUM_CP2101 = ((BYTE)(0xFF & 0x01)), + CP210x_PARTNUM_CP2102 = ((BYTE)(0xFF & 0x02)), + CP210x_PARTNUM_CP2103 = ((BYTE)(0xFF & 0x03)), + CP210x_PARTNUM_CP2104 = ((BYTE)(0xFF & 0x04)), + CP210x_PARTNUM_CP2105 = ((BYTE)(0xFF & 0x05)), + CP210x_PARTNUM_CP2108 = ((BYTE)(0xFF & 0x08)), + CP210x_PARTNUM_CP2109 = ((BYTE)(0xFF & 0x09)), + + SILABS_PARTNUM_CP2110 = ((BYTE)(0xFF & 0x0A)), + HID_UART_PART_CP2110 = SILABS_PARTNUM_CP2110, + + CP210x_PARTNUM_CP2112 = ((BYTE)(0xFF & 0x0C)), + HID_SMBUS_PART_CP2112 = CP210x_PARTNUM_CP2112, + + SILABS_PARTNUM_CP2114 = ((BYTE)(0xFF & 0x0E)), + HID_UART_PART_CP2114 = SILABS_PARTNUM_CP2114, + + CP210x_PARTNUM_CP2102N_QFN28 = ((BYTE)(0xFF & 0x20)), + CP210x_PARTNUM_CP2102N_QFN24 = ((BYTE)(0xFF & 0x21)), + CP210x_PARTNUM_CP2102N_QFN20 = ((BYTE)(0xFF & 0x22)), + + CP210x_PARTNUM_USBXPRESS_F3XX = ((BYTE)(0xFF & 0x80)), + CP210x_PARTNUM_USBXPRESS_EFM8 = ((BYTE)(0xFF & 0x80)), + CP210x_PARTNUM_USBXPRESS_EFM32 = ((BYTE)(0xFF & 0x81)) +}SILABS_PARTNUM_CPXXXX; + +struct cp210x_info{ + SILABS_PARTNUM_CPXXXX partnum; + const char * const name; +}; + +const struct cp210x_info cp210x_info_list[] = { + {CP210x_PARTNUM_CP2101, "CP2101"}, + {CP210x_PARTNUM_CP2102, "CP2102"}, + {CP210x_PARTNUM_CP2103, "CP2103"}, + {CP210x_PARTNUM_CP2104, "CP2104"}, + {CP210x_PARTNUM_CP2105, "CP2105"}, + {CP210x_PARTNUM_CP2108, "CP2108"}, + {CP210x_PARTNUM_CP2109, "CP2109"}, + + {SILABS_PARTNUM_CP2110, "CP2110"}, + {CP210x_PARTNUM_CP2112, "CP2112"}, + {SILABS_PARTNUM_CP2114, "CP2114"}, + + {CP210x_PARTNUM_CP2102N_QFN28, "CP2102N28"}, + {CP210x_PARTNUM_CP2102N_QFN24, "CP2102N24"}, + {CP210x_PARTNUM_CP2102N_QFN20, "CP2102N20"}}; + +static libusb_context *g_LibusbContext = NULL; + +static const char *cp210x_find_name(SILABS_PARTNUM_CPXXXX partnum) +{ + for(int i = 0; i < sizeof(cp210x_info_list)/sizeof(cp210x_info_list[0]); i++) + { + if(cp210x_info_list[i].partnum == partnum) + { + return cp210x_info_list[i].name; + } + } + + return NULL; +} + +static SILABS_PARTNUM_CPXXXX cp210x_find_partnum(const char *name) +{ + for(int i = 0; i < sizeof(cp210x_info_list)/sizeof(cp210x_info_list[0]); i++) + { + if(0 == strcasecmp(cp210x_info_list[i].name, name)) + { + return cp210x_info_list[i].partnum; + } + } + + return CP210x_PARTNUM_UNKNOWN; +} + +static bool is_valid_cp210x_partnum(const SILABS_PARTNUM_CPXXXX _v) +{ + return (((CP210x_PARTNUM_CP2101 <= _v) && (_v <= CP210x_PARTNUM_CP2105)) + || (CP210x_PARTNUM_CP2108 == _v) + || (CP210x_PARTNUM_CP2109 == _v) + || (CP210x_PARTNUM_CP2112 == _v) + || ((CP210x_PARTNUM_CP2102N_QFN28 <= _v) && (_v <= CP210x_PARTNUM_CP2102N_QFN20)) + || (CP210x_PARTNUM_USBXPRESS_F3XX == _v)); +} + +static bool cp210x_is_candidate_device(libusb_device *pdev) +{ + bool isCandidateDevice = false; /* innocent til proven guilty */ + struct libusb_device_descriptor devDesc; + + if(0 != libusb_get_device_descriptor(pdev, &devDesc)) + { + return isCandidateDevice; + } + + switch(devDesc.bDeviceClass) + { + case LIBUSB_CLASS_PER_INTERFACE: /* CP2102, CP2112, */ + if((1 == devDesc.iManufacturer) && (2 == devDesc.iProduct) && (3 <= devDesc.iSerialNumber)) + { + struct libusb_config_descriptor *pconfigDesc = NULL; + isCandidateDevice = true; + + if(0 == libusb_get_config_descriptor(pdev, 0, &pconfigDesc)) + { + if(pconfigDesc->bNumInterfaces + && pconfigDesc->interface->num_altsetting + && (LIBUSB_CLASS_VENDOR_SPEC != pconfigDesc->interface->altsetting->bInterfaceClass)) + { + isCandidateDevice = false; + } + + libusb_free_config_descriptor(pconfigDesc); + pconfigDesc = (struct libusb_config_descriptor *)NULL; + } + } + break; + + default: + isCandidateDevice = false; + break; + } + + return isCandidateDevice; +} + +static E_STATUS cp210x_get_partnumber(libusb_device_handle *h, BYTE *partnum) +{ + int ret = libusb_control_transfer(h, 0xC0, 0xFF, 0x370B, 0x0000, partnum, 1, 7000); + + if(1 == ret) + { + return e_SUCCESS; + } + + if(LIBUSB_ERROR_TIMEOUT == ret) + { + ERROR("libusb_control_transfer timeout"); + return e_IO_ERROR; + } + + struct libusb_config_descriptor *configDesc = NULL; + E_STATUS status = e_IO_ERROR; + + if(0 == libusb_get_config_descriptor(libusb_get_device(h), 0, &configDesc)) + { + /* Looking for a very particular fingerprint to conclude the device is a CP2101 */ + if ((configDesc->bNumInterfaces > 0) + && (configDesc->interface[0].altsetting->bNumEndpoints > 1) + && ((configDesc->interface[0].altsetting->endpoint[0].bEndpointAddress & 0x0F) == 0x03) + && ((configDesc->interface[0].altsetting->endpoint[1].bEndpointAddress & 0x0F) == 0x03)) + { + *partnum = CP210x_PARTNUM_CP2101; + status = e_SUCCESS; + } + + libusb_free_config_descriptor(configDesc); + } + + return status; +} + +static E_STATUS cp210x_read_config(libusb_device_handle *usbhd, BYTE *config, UINT len) +{ + UINT rlen = libusb_control_transfer(usbhd, 0xC0, 0xFF, + 0x0E, /* wValue */ + 0, /* WIndex */ + config, /* data */ + len, /* data size */ + 0); + + return (rlen == len) ? e_SUCCESS : e_IO_ERROR; +} + +static E_STATUS cp210x_write_config(libusb_device_handle *usbhd, BYTE *config, UINT len) +{ + UINT wlen = libusb_control_transfer(usbhd, 0x40, 0xFF, + 0x370F, /* wValue */ + 0, /* WIndex */ + config, /* data */ + len, /* data size */ + 0); + + return (wlen == len) ? e_SUCCESS : e_IO_ERROR; +} + +static int cp210x_list(const char **namelist, int len) +{ + libusb_device_handle *usbh = NULL; + libusb_device **list = NULL; + + /* Enumerate all USB devices, returning the number of USB devices and a list of those devices */ + const ssize_t numOfUSBDevices = libusb_get_device_list(g_LibusbContext, &list); + + /* A negative count indicates an error */ + if(numOfUSBDevices < 0) + { + ERROR("libusb_get_device_list error"); + return 0; + } + + int n = 0; + + for(ssize_t i = 0; i < numOfUSBDevices; i++) + { + libusb_device *device = list[i]; + libusb_device_handle *h = NULL; + + if(cp210x_is_candidate_device(device) && (0 == libusb_open(list[i], &h))) + { + BYTE partNum = 0; + + if((0 == cp210x_get_partnumber(h, &partNum)) + && is_valid_cp210x_partnum((SILABS_PARTNUM_CPXXXX)partNum)) + { + if(n < len) + { + namelist[n++] = cp210x_find_name(partNum); + } + } + + libusb_close(h); + } + } /* end for */ + + libusb_free_device_list(list, 1); /* Unreference all devices to free the device list */ + return n; +} + +static libusb_device_handle *cp210x_open(SILABS_PARTNUM_CPXXXX cp210x_partnum) +{ + libusb_device_handle *usbh = NULL; + libusb_device **list = NULL; + + /* Enumerate all USB devices, returning the number of USB devices and a list of those devices */ + const ssize_t numOfUSBDevices = libusb_get_device_list(g_LibusbContext, &list); + + /* A negative count indicates an error */ + if(numOfUSBDevices < 0) + { + ERROR("libusb_get_device_list error"); + return NULL; + } + + for(ssize_t i = 0; i < numOfUSBDevices; i++) + { + libusb_device *device = list[i]; + libusb_device_handle *h = NULL; + + if(cp210x_is_candidate_device(device) && (0 == libusb_open(list[i], &h))) + { + BYTE partNum = 0; + + if((0 == cp210x_get_partnumber(h, &partNum)) + && is_valid_cp210x_partnum((SILABS_PARTNUM_CPXXXX)partNum) + && (partNum == cp210x_partnum)) + { + if(NULL == usbh) + { + usbh = h; + } + else + { + ERROR("conflicts, find multi '%s'", cp210x_find_name(partNum)); + libusb_close(usbh); + libusb_close(h); + return NULL; + } + } + else + { + libusb_close(h); + } + } + } /* end for */ + + libusb_free_device_list(list, 1); + return usbh; +} + +static void cp210x_close(libusb_device_handle *usbh) +{ + if(NULL != usbh) + { + libusb_close(usbh); + } +} + +static void cp210x_reset(libusb_device_handle *usbh) +{ + if(NULL != usbh) + { + libusb_reset_device(usbh); + } +} + +static U16 fletcher16(const BYTE *bytes, U16 len) +{ + U16 sum1 = 0xff, sum2 = 0xff; + U16 tlen = 0; + + while (len) { + tlen = len >= 20 ? 20 : len; + len -= tlen; + do { + sum2 += sum1 += *bytes++; + } while (--tlen); + sum1 = (sum1 & 0xff) + (sum1 >> 8); + sum2 = (sum2 & 0xff) + (sum2 >> 8); + } + /* Second reduction step to reduce sums to 8 bits */ + sum1 = (sum1 & 0xff) + (sum1 >> 8); + sum2 = (sum2 & 0xff) + (sum2 >> 8); + return sum2 << 8 | sum1; +} + +static void cp210x_compute_configure_checksum(BYTE *config, U16 len) +{ + U16 checksum = fletcher16(config, len - 2); + config[len - 2] = (BYTE)((checksum >> 8) & 0xff); + config[len - 1] = (BYTE)((checksum) & 0xff); +} + +#define MAIN_GPIO_CONTROL_1_INDEX 600 +#define CP2102N_RS485_BIT 4 +#define MAIN_GPIO_CONTROL_2_INDEX 601 +#define CP2102N_RS485_LOGIC_BIT 0 +#define CP2102N_RS485_SETUP_INDEX 669 +#define CP2102N_RS485_HOLD_INDEX 671 +#define MAIN_RESET_LATCH_P1_INDEX 587 +#define CP2102N_GPIO2_RESET_LATH_BIT 5 + +#define SET_CP2102N_RS485PIN_TO_RS585(config) ((config)[MAIN_GPIO_CONTROL_1_INDEX] |= (BYTE)(1 << CP2102N_RS485_BIT)) +#define IS_CP2102N_RS485PIN_RS485_MODE(config) ((config)[MAIN_GPIO_CONTROL_1_INDEX] & (1 << CP2102N_RS485_BIT)) +#define SET_CP2102N_RS485PIN_TO_GPIO(config) ((config)[MAIN_GPIO_CONTROL_1_INDEX] &= (BYTE)(~(1 << CP2102N_RS485_BIT))) + +#define SET_CP2102N_RS485PIN_RS485_ACTIVE_LOGIC(config, logic)\ + do{\ + if(logic)\ + config[MAIN_GPIO_CONTROL_2_INDEX] |= (BYTE)(1 << CP2102N_RS485_LOGIC_BIT); \ + else \ + config[MAIN_GPIO_CONTROL_2_INDEX] &= (BYTE)(~(1 << CP2102N_RS485_LOGIC_BIT));\ + }while(0) + +#define IS_CP2102N_RS485PIN_RS485_LOGIC(config) (config[MAIN_GPIO_CONTROL_2_INDEX] & (1 << CP2102N_RS485_LOGIC_BIT)) + +#define SET_CP2102N_GPIO2_RESET_LATH(config, logic) \ + do{\ + if(logic)\ + config[MAIN_RESET_LATCH_P1_INDEX] |= (BYTE)(1 << CP2102N_GPIO2_RESET_LATH_BIT); \ + else\ + config[MAIN_RESET_LATCH_P1_INDEX] &= (BYTE)(~(1 << CP2102N_GPIO2_RESET_LATH_BIT)); \ + }while(0) + +#define GET_CP2102N_GPIO2_RESET_LATH(config) (config[MAIN_RESET_LATCH_P1_INDEX] & (BYTE)(1 << CP2102N_GPIO2_RESET_LATH_BIT)) + +#define SET_CP2102N_RS485_SETUP_TIME(config, u16vl) \ + do{\ + config[CP2102N_RS485_SETUP_INDEX] = (BYTE)(((u16vl) >> 8) & 0xff); \ + config[CP2102N_RS485_SETUP_INDEX + 1] = (BYTE)((u16vl) & 0xff); \ + }while(0) + +#define GET_CP2102N_RS485_SETUP_TIME(config) (((config[CP2102N_RS485_SETUP_INDEX] << 8) & 0xff00) | (config[CP2102N_RS485_SETUP_INDEX + 1] & 0xff)) + +#define CFG_CP2102N_RS485_HOLD_TIME(config, u16vl) \ + do{\ + config[CP2102N_RS485_HOLD_INDEX] = (BYTE)(((u16vl) >> 8) & 0xff); \ + config[CP2102N_RS485_HOLD_INDEX + 1] = (BYTE)((u16vl) & 0xff); \ + }while(0) + +#define GET_CP2102N_RS485_HOLD_TIME(config) (((config[CP2102N_RS485_HOLD_INDEX] << 8) & 0xff00) | (config[CP2102N_RS485_HOLD_INDEX + 1] & 0xff)) + + +const char * const CP210X_USAGE = "\ +It's to operate cp210x device.\n\ + -h,--help: display help information.\n\ + -l,--list: list cp210x device.\n\ + -D,--device: specified device, like 'cp2102', 'cp2102n24', 'cp2102n28' etc.\n\ + -r,--read-config filename: read configuration from cp210x to filename.\n\ + -w,--write-config filename: write configuration from filename to cp210x.\n\ + -m,--rs485pin mode: set rs485-pin work mode, the mode can be set 'gpio' or 'rs485'.\n\ + -g,--rs485-logic logic: set rs485-pin logic level when sending in rs485 mode, logic can be set '0' or '1'.\n\ + -s,--setup u16: set rs485-pin's setup time in rs485 mode.\n\ + -o,--hold u16: set rs485-pin's hold time in rs485 mode.\n\ + -d,--display: display the current mode of cp210x.\n\ + -v,--reset-level: set rs485-pin's default logic level in gpio mode.\n\ + -e,--reset: reset cp210x.\n"; + + +typedef enum { + e_CONTINUE = 0, + e_STOP, +}E_CMD_EXE_STATUS; + +#define CP210x_MAX_CONFIG_LENGTH 0x02a6 + +typedef E_CMD_EXE_STATUS (*cmd_hander)(int argc, char **argv); + +static U16 g_CheckSumOld = 0; + +static libusb_device_handle *cp210x_cmd_open_device(int argc, char **argv) +{ + static libusb_device_handle *usbhd = NULL; + if(NULL != usbhd) + { + return usbhd; + } + + SILABS_PARTNUM_CPXXXX ePartNum = CP210x_PARTNUM_UNKNOWN; + const char *devType = get_arg_string(argc, argv, "-D,--device", e_case_sensitive, NULL); + if(devType) + { + ePartNum = cp210x_find_partnum(devType); + if(CP210x_PARTNUM_UNKNOWN == ePartNum) + { + ERROR("parameter error, don't support '%s'", devType); + return NULL; + } + } + else + { + ERROR("parameter error, must specify cp210x device via '-D,--device'"); + return NULL; + } + + usbhd = cp210x_open(ePartNum); + if(NULL == usbhd) + { + ERROR("open '%s' failed", devType); + } + + return usbhd; +} + +static BYTE *cp210x_cmd_get_config(int argc, char **argv) +{ + static BYTE config[CP210x_MAX_CONFIG_LENGTH] = {0}; + + static bool isGeted = false; + if(isGeted) + { + return config; + } + + libusb_device_handle *usbhd = cp210x_cmd_open_device(argc, argv); + if(NULL == usbhd) + { + return NULL; + } + + memset((char*)(&(config[0])), 0, CP210x_MAX_CONFIG_LENGTH); + + if(e_SUCCESS != cp210x_read_config(usbhd, config, CP210x_MAX_CONFIG_LENGTH)) + { + ERROR("cp210x_read_config failed"); + return NULL; + } + + g_CheckSumOld = ((config[CP210x_MAX_CONFIG_LENGTH - 2] << 8) & 0xff00) | (config[CP210x_MAX_CONFIG_LENGTH - 1] & 0xff); + isGeted = true; + + return config; +} + +static E_CMD_EXE_STATUS cp210x_cmd_help(int argc, char **argv) +{ + printf("%s", CP210X_USAGE); + return e_STOP;; +} + +static E_CMD_EXE_STATUS cp210x_cmd_list(int argc, char **argv) +{ + #define MAX_NUM 10 + const char *namelist[MAX_NUM] = {0}; + int num = cp210x_list(namelist, MAX_NUM); + + int i = 0; + for(i = 0; i < num; i++) + { + if(0 == i) + { + printf("Find cp210x:\n"); + } + printf("\t%s\n", namelist[i]); + } + + return e_STOP; +} + +static E_CMD_EXE_STATUS cp210x_cmd_print_mode(int argc, char **argv) +{ + BYTE *config = cp210x_cmd_get_config(argc, argv); + if(NULL == config) + { + return e_STOP; + } + + if(IS_CP2102N_RS485PIN_RS485_MODE(config)) + { + printf("rs485 active-logic(%s) setup-time(0x%04x) hold-time(0x%04x)\n" + , IS_CP2102N_RS485PIN_RS485_LOGIC(config) ? "high" : "low" + , GET_CP2102N_RS485_SETUP_TIME(config) + , GET_CP2102N_RS485_HOLD_TIME(config)); + } + else + { + printf("gpio reset-logic(%s)\n", GET_CP2102N_GPIO2_RESET_LATH(config) ? "high" : "low"); + } + + return e_STOP; +} + +static E_CMD_EXE_STATUS cp210x_cmd_read_config(int argc, char **argv) +{ + const char *saveName = get_arg_string(argc, argv, "-r,--read-config", e_case_sensitive, NULL); + if(NULL == saveName) + { + ERROR("parameter error, '-r,--read-config' must append a file name"); + return e_STOP; + } + + BYTE *config = cp210x_cmd_get_config(argc, argv); + if(NULL == config) + { + return e_STOP; + } + + FILE *fp = fopen(saveName, "w"); + + #define TMP_SIZE 10 + char tmp[TMP_SIZE] = {0}; + int i = 0; + for(i = 0; i < CP210x_MAX_CONFIG_LENGTH; i++) + { + memset(tmp, TMP_SIZE, 0); + sprintf(tmp, "0x%02x\n", config[i]); + fwrite(tmp, 1, strlen(tmp), fp); + } + + fclose(fp); + return e_CONTINUE; +} + +static E_CMD_EXE_STATUS cp210x_cmd_write_config(int argc, char **argv) +{ + const char *configName = get_arg_string(argc, argv, "-w,--write-config", e_case_sensitive, NULL); + if(NULL == configName) + { + ERROR("parameter error, '-w,--write-config' must append a file name"); + return e_STOP; + } + + BYTE config[CP210x_MAX_CONFIG_LENGTH] = {0}; + + FILE *fp = fopen(configName, "r"); + if(NULL == fp) + { + ERROR("open '%s' failed", configName); + return e_STOP; + } + + #define MAX_LINE 10 + char tmp[MAX_LINE] = {0}; + int i = 0; + + while(!feof(fp) && (i < CP210x_MAX_CONFIG_LENGTH)) + { + memset(tmp, 0, MAX_LINE); + fgets(tmp, MAX_LINE, fp); + config[i++] = strtol(tmp, NULL, 0); + } + + fclose(fp); + + libusb_device_handle *usbhd = cp210x_cmd_open_device(argc, argv); + if(NULL == usbhd) + { + return e_STOP; + } + + cp210x_compute_configure_checksum(config, CP210x_MAX_CONFIG_LENGTH); + + if(e_SUCCESS != cp210x_write_config(usbhd, config, CP210x_MAX_CONFIG_LENGTH)) + { + ERROR("cp210x_write_config failed"); + return e_STOP; + } + + return e_CONTINUE; +} + +static E_CMD_EXE_STATUS cp210x_cmd_set_mode(int argc, char **argv) +{ + const char *mode = get_arg_string(argc, argv, "-m,--rs485pin", e_case_sensitive, NULL); + if(NULL == mode) + { + ERROR("parameter error, '-m,--rs485pin' must append a mode"); + return e_STOP; + } + + BYTE *config = cp210x_cmd_get_config(argc, argv); + if(NULL == config) + { + return e_STOP; + } + + if(0 == strcasecmp(mode, "gpio")) + { + SET_CP2102N_RS485PIN_TO_GPIO(config); + + } + else if(0 == strcasecmp(mode, "rs485")) + { + SET_CP2102N_RS485PIN_TO_RS585(config); + } + else + { + ERROR("parameter error, '-m,--rs485pin' must append a mode, it can be 'gpio' or 'rs485'"); + return e_STOP; + } + + return e_CONTINUE; +} + +static E_CMD_EXE_STATUS cp210x_cmd_set_rs485_logic(int argc, char **argv) +{ + const int logic = get_arg_int(argc, argv, "-g,--rs485-logic", e_case_sensitive, -1); + if(-1 == logic) + { + ERROR("parameter error, '-g,--rs485-logic' must append a value, like '0' or '1'"); + return e_STOP; + } + + BYTE *config = cp210x_cmd_get_config(argc, argv); + if(NULL == config) + { + return e_STOP; + } + + SET_CP2102N_RS485PIN_RS485_ACTIVE_LOGIC(config, logic); + + return e_CONTINUE; +} + +static E_CMD_EXE_STATUS cp210x_cmd_set_rs485_setup(int argc, char **argv) +{ + const int setuptime = get_arg_int(argc, argv, "-s,--setup", e_case_sensitive, -1); + if(-1 == setuptime) + { + ERROR("parameter error, '-s,--setup' must append a unsigned short type value, like '0x1234' or '1234'"); + return e_STOP; + } + + BYTE *config = cp210x_cmd_get_config(argc, argv); + if(NULL == config) + { + return e_STOP; + } + + SET_CP2102N_RS485_SETUP_TIME(config, setuptime); + return e_CONTINUE; +} + +static E_CMD_EXE_STATUS cp210x_cmd_set_rs485_hold(int argc, char **argv) +{ + const int holdtime = get_arg_int(argc, argv, "-o,--hold", e_case_sensitive, -1); + if(-1 == holdtime) + { + ERROR("parameter error, '-o,--hold' must append a unsigned short type value, like '0x1234' or '1234'"); + return e_STOP; + } + + BYTE *config = cp210x_cmd_get_config(argc, argv); + if(NULL == config) + { + return e_STOP; + } + + CFG_CP2102N_RS485_HOLD_TIME(config, holdtime); + return e_CONTINUE; +} + +static E_CMD_EXE_STATUS cp210x_cmd_set_rs485pin_gpio_reset_level(int argc, char **argv) +{ + int rstLogic = get_arg_int(argc, argv, "-v,--reset-level", e_case_sensitive, -1); + if(-1 == rstLogic) + { + ERROR("parameter error, '-o,--hold' must append a value, like '0' or '1'"); + return e_STOP; + } + + BYTE *config = cp210x_cmd_get_config(argc, argv); + if(NULL == config) + { + return e_STOP; + } + + SET_CP2102N_GPIO2_RESET_LATH(config, rstLogic); + return e_CONTINUE; +} + +static E_CMD_EXE_STATUS cp210x_cmd_reset(int argc, char **argv) +{ + cp210x_reset(cp210x_cmd_open_device(argc, argv)); + return e_STOP; +} + +typedef struct { + const char *const cmd; + cmd_hander cmd_func; +}cmd_list_t; + +cmd_list_t cmd_list[] = { + {"-h,--help", cp210x_cmd_help}, + {"-l,--list", cp210x_cmd_list}, + {"-d,--display", cp210x_cmd_print_mode}, + {"-r,--read-config", cp210x_cmd_read_config}, + {"-w,--write-config", cp210x_cmd_write_config}, + {"-m,--rs485pin", cp210x_cmd_set_mode}, + {"-g,--rs485-logic", cp210x_cmd_set_rs485_logic}, + {"-s,--setup", cp210x_cmd_set_rs485_setup}, + {"-o,--hold", cp210x_cmd_set_rs485_hold}, + {"-v,--reset-level", cp210x_cmd_set_rs485pin_gpio_reset_level}, + {"-e,--reset", cp210x_cmd_reset}}; + +static void cp210x_command_handle(int argc, char **argv) +{ + libusb_init(&g_LibusbContext); + + const int size = sizeof(cmd_list) / sizeof(cmd_list[0]); + int i = 0; + for(i = 0; i < size; i++) + { + if(check_arg(argc, argv, cmd_list[i].cmd, e_case_sensitive)) + { + if(e_STOP == cmd_list[i].cmd_func(argc, argv)) + { + break; + } + } + } + + if(g_CheckSumOld) + { + libusb_device_handle *usbhd = cp210x_cmd_open_device(argc, argv); + + BYTE *config = cp210x_cmd_get_config(argc, argv); + if(NULL != config) + { + cp210x_compute_configure_checksum(config, CP210x_MAX_CONFIG_LENGTH); + const U16 checkSumNew = ((config[CP210x_MAX_CONFIG_LENGTH - 2] << 8) & 0xff00) | (config[CP210x_MAX_CONFIG_LENGTH - 1] & 0xff); + + if(g_CheckSumOld != checkSumNew) + { + if(e_SUCCESS != cp210x_write_config(usbhd, config, CP210x_MAX_CONFIG_LENGTH)) + { + ERROR("cp210x_write_config failed"); + } + } + } + + cp210x_close(usbhd); + } + + libusb_exit(g_LibusbContext); +} + +static void print_usage(const char *name) +{ + printf("\ +It's used to set external serial port mode.\n\ +Usage:\n\ + %s [ttyuart [options]] | [cp210x [options]] | [-m,--mode MODE]\n\n\ +Example:\n\ + %s ttyuart -h\n\ + %s cp210x -h\n\ + %s -m,--mode [-t,--terminate]\n\ + -t,--terminate: Terminate the rs422 or rs485 bus.\n" + , name, name, name, name); +} + +int main(int argc, char **argv) +{ + if(1 == argc) + { + ERROR("parameter error\n"); + print_usage(argv[0]); + } + else if(compare_string(argv[1], "-h,--help", e_case_insensitive)) + { + print_usage(argv[0]); + } + else if(compare_string(argv[1], "ttyuart", e_case_insensitive)) + { + ttyuart_command_handle(argc, argv); + } + else if(compare_string(argv[1], "cp210x", e_case_insensitive)) + { + cp210x_command_handle(argc, argv); + } + else if(compare_string(argv[1], "-m,--mode", e_case_insensitive)) + { + const int terminate = check_arg(argc, argv, "-t,--terminate", e_case_sensitive); + const char *mode = get_arg_string(argc, argv, "-m", e_case_sensitive, NULL); + if(NULL != mode) + { + gpio_switch_mode(mode, terminate); + } + } + else + { + ERROR("parameter error\n"); + print_usage(argv[0]); + } + + return 0; +} diff --git a/recipes-app/switchserialmode/switchserialmode_0.1.bb b/recipes-app/switchserialmode/switchserialmode_0.1.bb new file mode 100644 index 000000000..8ca19363a --- /dev/null +++ b/recipes-app/switchserialmode/switchserialmode_0.1.bb @@ -0,0 +1,17 @@ + +inherit dpkg + +DESCRIPTION = "Tool to switch between the uart0 modes" +MAINTAINER = "nian.gao@siemens.com" + +SRC_URI = "file://switchserialmode.c file://CMakeLists.txt" +S = "${WORKDIR}/switchserialmode" + +do_prepare_build[cleandirs] += "${S}/debian" + +do_prepare_build() { + cp ${WORKDIR}/switchserialmode.c ${S}/ + cp ${WORKDIR}/CMakeLists.txt ${S}/ + deb_debianize + sed -i -e 's/Build-Depends: /Build-Depends: cmake, libusb-1.0-0-dev, /g' ${S}/debian/control +} diff --git a/recipes-app/tcf-agent/files/debian/compat b/recipes-app/tcf-agent/files/debian/compat new file mode 100644 index 000000000..f599e28b8 --- /dev/null +++ b/recipes-app/tcf-agent/files/debian/compat @@ -0,0 +1 @@ +10 diff --git a/recipes-app/tcf-agent/files/debian/control b/recipes-app/tcf-agent/files/debian/control new file mode 100644 index 000000000..100d56b12 --- /dev/null +++ b/recipes-app/tcf-agent/files/debian/control @@ -0,0 +1,11 @@ +Source: tcf-agent +Section: devel +Priority: optional +Standards-Version: 4.1.3 +Maintainer: Unknown maintainer +Build-Depends: debhelper (>= 10), libssl-dev, uuid-dev + +Package: tcf-agent +Architecture: any +Depends: ${misc:Depends}, ${shlibs:Depends} +Description: Target Communication Framework for the Eclipse IDE diff --git a/recipes-app/tcf-agent/files/debian/rules b/recipes-app/tcf-agent/files/debian/rules new file mode 100644 index 000000000..ab59fa0f1 --- /dev/null +++ b/recipes-app/tcf-agent/files/debian/rules @@ -0,0 +1,18 @@ +#!/usr/bin/make -f + +export DH_VERBOSE=1 + +ifeq ($(DEB_HOST_GNU_CPU),armv6l) + export MACHINE=arm +endif +ifeq ($(DEB_HOST_GNU_CPU),armv7l) + export MACHINE=arm +endif +ifeq ($(DEB_HOST_GNU_CPU),aarch64) + export MACHINE=a64 +endif + +export INSTALLROOT=$(CURDIR)/debian/tmp + +%: + dh $@ --with systemd --sourcedirectory=agent diff --git a/recipes-app/tcf-agent/files/debian/tcf-agent.install b/recipes-app/tcf-agent/files/debian/tcf-agent.install new file mode 100644 index 000000000..dde41c634 --- /dev/null +++ b/recipes-app/tcf-agent/files/debian/tcf-agent.install @@ -0,0 +1 @@ +usr/sbin/* diff --git a/recipes-app/tcf-agent/files/debian/tcf-agent.service b/recipes-app/tcf-agent/files/debian/tcf-agent.service new file mode 100644 index 000000000..c23c877ac --- /dev/null +++ b/recipes-app/tcf-agent/files/debian/tcf-agent.service @@ -0,0 +1,9 @@ +[Unit] +Description=tcf-agent +After=network.target + +[Service] +ExecStart=/usr/sbin/tcf-agent -L- -l0 -s SSL: + +[Install] +WantedBy=multi-user.target diff --git a/recipes-app/tcf-agent/tcf-agent.bb b/recipes-app/tcf-agent/tcf-agent.bb new file mode 100644 index 000000000..138f02481 --- /dev/null +++ b/recipes-app/tcf-agent/tcf-agent.bb @@ -0,0 +1,27 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Chao Zeng +# Jan Kiszka +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +inherit dpkg + +PV = "1.7.0-dc373fa9" +SRC_URI = " \ + git://github.com/eclipse/tcf.agent.git;protocol=https \ + file://debian" +SRCREV = "dc373fa9fedc12e0ea155a4cd2984170e4d7bb20" + +S = "${WORKDIR}/git" + +do_prepare_build[cleandirs] += "${S}/debian" + +do_prepare_build() { + cp -r ${WORKDIR}/debian ${S}/ + deb_add_changelog +} diff --git a/recipes-bsp/u-boot/README.md b/recipes-bsp/u-boot/README.md new file mode 100644 index 000000000..e08172373 --- /dev/null +++ b/recipes-bsp/u-boot/README.md @@ -0,0 +1,51 @@ +# Building and programming the boot loader + +## Building the image + +The boot loader for the basic version is built like this: + +```shell +./kas-docker --isar build kas-iot2050-boot-basic.yml +``` + +The advanced version is built like this: + +```shell +./kas-docker --isar build kas-iot2050-boot-advanced.yml +``` + +After the build the boot image is under + +```text +build/tmp/deploy/images/iot2050/iot2050-image-boot-isar-iot2050.bin +``` + +## Flashing the image + +> :warning: +> Flashing an incorrect image may brick the device! + +Write `iot2050-image-boot-isar-iot2050.bin` to an SD card and insert that into +the target device. Then boot into the U-Boot shell and execute there: + +```shell +sf probe +load mmc 0:1 $loadaddr /path/to/iot2050-image-boot-isar-iot2050.bin +sf update $loadaddr 0x0 $filesize +``` + +> :note: +> When updating the boot loader of the BASIC variant, make sure to remove +> 0022-iot2050-Roll-back-basic-dtb-to-V01.00.00.1-release.patch from the kernel +> patch queue in recipes-kernel/linux/linux-iot2050_*.bb. + +## Recovering a bricked device + +If the device does not come up anymore after flashing the boot loader, you can +recover it with the help of an external flash programmer. Known to work are the +Dediprog SF100 or SF600. Attach the programmer to X17, then run the following +on the host machine: + +```shell +dpcmd --vcc 2 -v -u iot2050-image-boot-isar-iot2050.bin +``` diff --git a/recipes-bsp/u-boot/files/0001-feat-add-iot2050-platform-support.patch b/recipes-bsp/u-boot/files/0001-feat-add-iot2050-platform-support.patch new file mode 100644 index 000000000..2a6067dc7 --- /dev/null +++ b/recipes-bsp/u-boot/files/0001-feat-add-iot2050-platform-support.patch @@ -0,0 +1,3272 @@ +From 2a37c06cafb717ab8d02d9d88b70b221d4755872 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Tue, 12 Nov 2019 17:36:06 +0800 +Subject: [PATCH 01/15] feat: add iot2050 platform support + +Signed-off-by: le.jin +--- + arch/arm/dts/Makefile | 6 +- + .../dts/iot2050-advanced-ddr4-1600MHz.dtsi | 158 ++++++++ + arch/arm/dts/iot2050-advanced.dts | 68 ++++ + arch/arm/dts/iot2050-basic-ddr4-1600MHz.dtsi | 158 ++++++++ + arch/arm/dts/iot2050-basic.dts | 72 ++++ + arch/arm/dts/iot2050-common.dtsi | 162 ++++++++ + arch/arm/dts/iot2050-r5-advanced.dts | 54 +++ + arch/arm/dts/iot2050-r5-basic.dts | 55 +++ + arch/arm/dts/iot2050-r5-common.dtsi | 278 ++++++++++++++ + arch/arm/dts/iot2050-u-boot.dtsi | 345 ++++++++++++++++++ + arch/arm/dts/k3-am65-main.dtsi | 6 +- + arch/arm/dts/k3-am654-ddr.dtsi | 1 + + arch/arm/mach-k3/Kconfig | 1 + + arch/arm/mach-k3/sysfw-loader.c | 5 +- + board/siemens/common/Kconfig | 15 + + board/siemens/iot2050/Kconfig | 78 ++++ + board/siemens/iot2050/MAINTAINERS | 7 + + board/siemens/iot2050/Makefile | 13 + + board/siemens/iot2050/board.c | 152 ++++++++ + board/siemens/iot2050/board_detect.c | 155 ++++++++ + board/siemens/iot2050/board_detect.h | 99 +++++ + configs/am65x_iot2050_advanced_a53_defconfig | 159 ++++++++ + .../am65x_iot2050_advanced_gp_a53_defconfig | 158 ++++++++ + .../am65x_iot2050_advanced_gp_r5_defconfig | 125 +++++++ + configs/am65x_iot2050_advanced_r5_defconfig | 122 +++++++ + configs/am65x_iot2050_basic_a53_defconfig | 158 ++++++++ + configs/am65x_iot2050_basic_r5_defconfig | 125 +++++++ + drivers/ram/k3-am654-ddrss.c | 29 +- + drivers/ram/k3-am654-ddrss.h | 1 + + include/configs/iot2050.h | 146 ++++++++ + tools/k3_gen_x509_cert.sh | 2 +- + 31 files changed, 2903 insertions(+), 10 deletions(-) + create mode 100644 arch/arm/dts/iot2050-advanced-ddr4-1600MHz.dtsi + create mode 100644 arch/arm/dts/iot2050-advanced.dts + create mode 100644 arch/arm/dts/iot2050-basic-ddr4-1600MHz.dtsi + create mode 100644 arch/arm/dts/iot2050-basic.dts + create mode 100644 arch/arm/dts/iot2050-common.dtsi + create mode 100644 arch/arm/dts/iot2050-r5-advanced.dts + create mode 100644 arch/arm/dts/iot2050-r5-basic.dts + create mode 100644 arch/arm/dts/iot2050-r5-common.dtsi + create mode 100644 arch/arm/dts/iot2050-u-boot.dtsi + create mode 100644 board/siemens/common/Kconfig + create mode 100644 board/siemens/iot2050/Kconfig + create mode 100644 board/siemens/iot2050/MAINTAINERS + create mode 100644 board/siemens/iot2050/Makefile + create mode 100644 board/siemens/iot2050/board.c + create mode 100644 board/siemens/iot2050/board_detect.c + create mode 100644 board/siemens/iot2050/board_detect.h + create mode 100644 configs/am65x_iot2050_advanced_a53_defconfig + create mode 100644 configs/am65x_iot2050_advanced_gp_a53_defconfig + create mode 100644 configs/am65x_iot2050_advanced_gp_r5_defconfig + create mode 100644 configs/am65x_iot2050_advanced_r5_defconfig + create mode 100644 configs/am65x_iot2050_basic_a53_defconfig + create mode 100644 configs/am65x_iot2050_basic_r5_defconfig + create mode 100644 include/configs/iot2050.h + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 484e21e678..05ff599a48 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -568,8 +568,10 @@ dtb-$(CONFIG_TARGET_STM32MP1) += \ + stm32mp157c-ed1.dtb \ + stm32mp157c-ev1.dtb + +-dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb \ +- k3-am654-pcie-usb2.dtbo k3-am654-idk.dtbo ++dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-pcie-usb2.dtbo k3-am654-idk.dtbo \ ++ iot2050-r5-basic.dtb iot2050-basic.dtb \ ++ iot2050-r5-advanced.dtb iot2050-advanced.dtb ++ + dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ + k3-j721e-r5-common-proc-board.dtb + +diff --git a/arch/arm/dts/iot2050-advanced-ddr4-1600MHz.dtsi b/arch/arm/dts/iot2050-advanced-ddr4-1600MHz.dtsi +new file mode 100644 +index 0000000000..c0757cdebc +--- /dev/null ++++ b/arch/arm/dts/iot2050-advanced-ddr4-1600MHz.dtsi +@@ -0,0 +1,158 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ ++ * This file was generated by AM65x_DRA80xM_EMIF_Tool_1.95.xlsm ++ * http://www.ti.com/lit/pdf/spracj0 ++ * Configuration Parameters ++ * Memory Type: DDR4 ++ * Data Rate: 1600 MT/s ++ * ECC Enabled: No ++ * Data Width: 32 bits ++ */ ++#define DDR_PLL_FREQUENCY 400000000 ++#define DDRSS_V2H_CTL_REG 0x000073FF ++#define DDRCTL_MSTR 0x81040010 ++#define DDRCTL_RFSHCTL0 0x00210070 ++#define DDRCTL_ECCCFG0 0x00000000 ++#define DDRCTL_RFSHTMG 0x0030008C ++#define DDRCTL_CRCPARCTL0 0x00008000 ++#define DDRCTL_CRCPARCTL1 0x1A000000 ++#define DDRCTL_CRCPARCTL2 0x0048051E ++#define DDRCTL_INIT0 0x400100C4 ++#define DDRCTL_INIT1 0x004F0000 ++#define DDRCTL_INIT3 0x02100501 ++#define DDRCTL_INIT4 0x00000020 ++#define DDRCTL_INIT5 0x00100000 ++#define DDRCTL_INIT6 0x00000480 ++#define DDRCTL_INIT7 0x000004E8 ++#define DDRCTL_DRAMTMG0 0x0C0E0D0E ++#define DDRCTL_DRAMTMG1 0x00030314 ++#define DDRCTL_DRAMTMG2 0x0506040A ++#define DDRCTL_DRAMTMG3 0x0000400C ++#define DDRCTL_DRAMTMG4 0x06020306 ++#define DDRCTL_DRAMTMG5 0x04040302 ++#define DDRCTL_DRAMTMG6 0x00000004 ++#define DDRCTL_DRAMTMG7 0x00000404 ++#define DDRCTL_DRAMTMG8 0x03030C05 ++#define DDRCTL_DRAMTMG9 0x40020308 ++#define DDRCTL_DRAMTMG10 0x001C180A ++#define DDRCTL_DRAMTMG11 0x1106010E ++#define DDRCTL_DRAMTMG12 0x00020008 ++#define DDRCTL_DRAMTMG13 0x0B100002 ++#define DDRCTL_DRAMTMG14 0x00000000 ++#define DDRCTL_DRAMTMG15 0x0000003F ++#define DDRCTL_DRAMTMG17 0x00500028 ++#define DDRCTL_ZQCTL0 0x21000040 ++#define DDRCTL_ZQCTL1 0x0202FAF0 ++#define DDRCTL_DFITMG0 0x04878206 ++#define DDRCTL_DFITMG1 0x000A0606 ++#define DDRCTL_DFITMG2 0x00000504 ++#define DDRCTL_DFIMISC 0x00000001 ++#define DDRCTL_ADDRMAP0 0x0000001F ++#define DDRCTL_ADDRMAP1 0x003F0808 ++#define DDRCTL_ADDRMAP2 0x00000000 ++#define DDRCTL_ADDRMAP3 0x00000000 ++#define DDRCTL_ADDRMAP4 0x00001F1F ++#define DDRCTL_ADDRMAP5 0x07070707 ++#define DDRCTL_ADDRMAP6 0x07070707 ++#define DDRCTL_ADDRMAP7 0x00000F0F ++#define DDRCTL_ADDRMAP8 0x00003F0A ++#define DDRCTL_ADDRMAP9 0x00000000 ++#define DDRCTL_ADDRMAP10 0x00000000 ++#define DDRCTL_ADDRMAP11 0x001F1F00 ++#define DDRCTL_DQMAP0 0x00000000 ++#define DDRCTL_DQMAP1 0x00000000 ++#define DDRCTL_DQMAP4 0x00000000 ++#define DDRCTL_DQMAP5 0x00000000 ++#define DDRCTL_PWRCTL 0x00000000 ++#define DDRCTL_RANKCTL 0x00000000 ++#define DDRCTL_ODTCFG 0x05000508 ++#define DDRCTL_ODTMAP 0x00000001 ++#define DDRPHY_PGCR0 0x07001E00 ++#define DDRPHY_PGCR1 0x020046C0 ++#define DDRPHY_PGCR2 0x00F05E60 ++#define DDRPHY_PGCR3 0x55AA0080 ++#define DDRPHY_PGCR6 0x00013001 ++#define DDRPHY_PTR2 0x00083DEF ++#define DDRPHY_PTR3 0x00061A80 ++#define DDRPHY_PTR4 0x00000120 ++#define DDRPHY_PTR5 0x00027100 ++#define DDRPHY_PTR6 0x04000320 ++#define DDRPHY_PLLCR0 0x021c4000 ++#define DDRPHY_DXCCR 0x00000038 ++#define DDRPHY_DSGCR 0x02A0C129 ++#define DDRPHY_DCR 0x4000040C ++#define DDRPHY_DTPR0 0x061C0B06 ++#define DDRPHY_DTPR1 0x281C0000 ++#define DDRPHY_DTPR2 0x0034E300 ++#define DDRPHY_DTPR3 0x02800800 ++#define DDRPHY_DTPR4 0x31180805 ++#define DDRPHY_DTPR5 0x00270B06 ++#define DDRPHY_DTPR6 0x00000505 ++#define DDRPHY_ZQCR 0x008A2A58 ++#define DDRPHY_ZQ0PR0 0x000077DD ++#define DDRPHY_ZQ1PR0 0x000077DD ++#define DDRPHY_MR0 0x00000210 ++#define DDRPHY_MR1 0x00000501 ++#define DDRPHY_MR2 0x00000000 ++#define DDRPHY_MR3 0x00000020 ++#define DDRPHY_MR4 0x00000000 ++#define DDRPHY_MR5 0x00000480 ++#define DDRPHY_MR6 0x000004E8 ++#define DDRPHY_MR11 0x00000000 ++#define DDRPHY_MR12 0x00000000 ++#define DDRPHY_MR13 0x00000000 ++#define DDRPHY_MR14 0x00000000 ++#define DDRPHY_MR22 0x00000000 ++#define DDRPHY_VTCR0 0xF3C32028 ++#define DDRPHY_DX8SL0PLLCR0 0x021c4000 ++#define DDRPHY_DX8SL1PLLCR0 0x021c4000 ++#define DDRPHY_DX8SL2PLLCR0 0x021c4000 ++#define DDRPHY_DTCR0 0x8000B1C7 ++#define DDRPHY_DTCR1 0x00010236 ++#define DDRPHY_ACIOCR3 0x20000001 ++#define DDRPHY_ACIOCR5 0x04800000 ++#define DDRPHY_IOVCR0 0x0F0C0C0C ++#define DDRPHY_DX0GCR0 0x00000000 ++#define DDRPHY_DX0GCR1 0x00000000 ++#define DDRPHY_DX0GCR2 0x00000000 ++#define DDRPHY_DX0GCR3 0x00000000 ++#define DDRPHY_DX1GCR0 0x00000000 ++#define DDRPHY_DX1GCR1 0x00000000 ++#define DDRPHY_DX1GCR2 0x00000000 ++#define DDRPHY_DX1GCR3 0x00000000 ++#define DDRPHY_DX2GCR0 0x40700204 ++#define DDRPHY_DX2GCR1 0x00007FFF ++#define DDRPHY_DX2GCR2 0x00000000 ++#define DDRPHY_DX2GCR3 0xFFC0010B ++#define DDRPHY_DX3GCR0 0x40700204 ++#define DDRPHY_DX3GCR1 0x00007FFF ++#define DDRPHY_DX3GCR2 0x00000000 ++#define DDRPHY_DX3GCR3 0xFFC0010B ++#define DDRPHY_DX4GCR0 0x40703220 ++#define DDRPHY_DX4GCR1 0x55556000 ++#define DDRPHY_DX4GCR2 0xAAAA0000 ++#define DDRPHY_DX4GCR3 0xFFE18587 ++#define DDRPHY_DX0GCR4 0x0E00B03C ++#define DDRPHY_DX1GCR4 0x0E00B03C ++#define DDRPHY_DX2GCR4 0x0E00B03C ++#define DDRPHY_DX3GCR4 0x0E00B03C ++#define DDRPHY_DX4GCR4 0x0E00B03C ++#define DDRPHY_PGCR5 0x01010004 ++#define DDRPHY_DX0GCR5 0x00000049 ++#define DDRPHY_DX1GCR5 0x00000049 ++#define DDRPHY_DX2GCR5 0x00000049 ++#define DDRPHY_DX3GCR5 0x00000049 ++#define DDRPHY_DX4GCR5 0x00000049 ++#define DDRPHY_DX0GTR0 0x00020002 ++#define DDRPHY_DX1GTR0 0x00020002 ++#define DDRPHY_DX2GTR0 0x00020002 ++#define DDRPHY_DX3GTR0 0x00020002 ++#define DDRPHY_DX4GTR0 0x00020002 ++#define DDRPHY_ODTCR 0x00010000 ++#define DDRPHY_DX8SL0IOCR 0x74800000 ++#define DDRPHY_DX8SL1IOCR 0x74800000 ++#define DDRPHY_DX8SL2IOCR 0x74800000 ++#define DDRPHY_DX8SL0DXCTL2 0x00141830 ++#define DDRPHY_DX8SL1DXCTL2 0x00141830 ++#define DDRPHY_DX8SL2DXCTL2 0x00141830 +diff --git a/arch/arm/dts/iot2050-advanced.dts b/arch/arm/dts/iot2050-advanced.dts +new file mode 100644 +index 0000000000..83040eb2b3 +--- /dev/null ++++ b/arch/arm/dts/iot2050-advanced.dts +@@ -0,0 +1,68 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++ ++/dts-v1/; ++ ++#include "k3-am654.dtsi" ++#include "iot2050-u-boot.dtsi" ++#include ++#include "iot2050-common.dtsi" ++ ++/ { ++ compatible = "siemens,iot2050", "ti,am654"; ++ model = "Siemens IOT2050 Advanced Base Board"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ /* 2G RAM */ ++ reg = <0x00000000 0x80000000 0x00000000 0x80000000>, ++ <0x00000008 0x80000000 0x00000000 0x00000000>; ++ }; ++ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ secure_ddr: secure_ddr@9e800000 { ++ reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ ++ alignment = <0x1000>; ++ no-map; ++ }; ++ }; ++}; ++ ++&main_pmx0 { ++ u-boot,dm-spl; ++ main_mmc0_pins_default: main_mmc0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ ++ AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ ++ AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ ++ AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ ++ AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ ++ AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ ++ AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ ++ AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ ++ AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ ++ AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ ++ AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ ++ AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ ++ >; ++ u-boot,dm-spl; ++ }; ++}; ++ ++/* eMMC */ ++&sdhci0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_mmc0_pins_default>; ++ bus-width = <8>; ++ non-removable; ++ ti,driver-strength-ohm = <50>; ++}; ++ ++&main_uart0 { ++ status = "disabled"; ++}; +diff --git a/arch/arm/dts/iot2050-basic-ddr4-1600MHz.dtsi b/arch/arm/dts/iot2050-basic-ddr4-1600MHz.dtsi +new file mode 100644 +index 0000000000..10a76aacf0 +--- /dev/null ++++ b/arch/arm/dts/iot2050-basic-ddr4-1600MHz.dtsi +@@ -0,0 +1,158 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ ++ * This file was generated by AM65x_DRA80xM_EMIF_Tool_1.95.xlsm ++ * http://www.ti.com/lit/pdf/spracj0 ++ * Configuration Parameters ++ * Memory Type: DDR4 ++ * Data Rate: 1600 MT/s ++ * ECC Enabled: No ++ * Data Width: 16 bits ++ */ ++#define DDR_PLL_FREQUENCY 400000000 ++#define DDRSS_V2H_CTL_REG 0x000073FF ++#define DDRCTL_MSTR 0x81041010 ++#define DDRCTL_RFSHCTL0 0x00210070 ++#define DDRCTL_ECCCFG0 0x00000000 ++#define DDRCTL_RFSHTMG 0x0030008C ++#define DDRCTL_CRCPARCTL0 0x00008000 ++#define DDRCTL_CRCPARCTL1 0x1A000000 ++#define DDRCTL_CRCPARCTL2 0x0048051E ++#define DDRCTL_INIT0 0x400100C4 ++#define DDRCTL_INIT1 0x004F0000 ++#define DDRCTL_INIT3 0x02100501 ++#define DDRCTL_INIT4 0x00000020 ++#define DDRCTL_INIT5 0x00100000 ++#define DDRCTL_INIT6 0x00000480 ++#define DDRCTL_INIT7 0x000004E8 ++#define DDRCTL_DRAMTMG0 0x0C0E0D0E ++#define DDRCTL_DRAMTMG1 0x00030314 ++#define DDRCTL_DRAMTMG2 0x0506040A ++#define DDRCTL_DRAMTMG3 0x0000400C ++#define DDRCTL_DRAMTMG4 0x06020306 ++#define DDRCTL_DRAMTMG5 0x04040302 ++#define DDRCTL_DRAMTMG6 0x00000004 ++#define DDRCTL_DRAMTMG7 0x00000404 ++#define DDRCTL_DRAMTMG8 0x03030C05 ++#define DDRCTL_DRAMTMG9 0x40020308 ++#define DDRCTL_DRAMTMG10 0x001C180A ++#define DDRCTL_DRAMTMG11 0x1106010E ++#define DDRCTL_DRAMTMG12 0x00020008 ++#define DDRCTL_DRAMTMG13 0x0B100002 ++#define DDRCTL_DRAMTMG14 0x00000000 ++#define DDRCTL_DRAMTMG15 0x0000003F ++#define DDRCTL_DRAMTMG17 0x00500028 ++#define DDRCTL_ZQCTL0 0x21000040 ++#define DDRCTL_ZQCTL1 0x0202FAF0 ++#define DDRCTL_DFITMG0 0x04878206 ++#define DDRCTL_DFITMG1 0x000A0606 ++#define DDRCTL_DFITMG2 0x00000504 ++#define DDRCTL_DFIMISC 0x00000001 ++#define DDRCTL_ADDRMAP0 0x0000001F ++#define DDRCTL_ADDRMAP1 0x003F0707 ++#define DDRCTL_ADDRMAP2 0x00000000 ++#define DDRCTL_ADDRMAP3 0x1F000000 ++#define DDRCTL_ADDRMAP4 0x00001F1F ++#define DDRCTL_ADDRMAP5 0x06060606 ++#define DDRCTL_ADDRMAP6 0x06060606 ++#define DDRCTL_ADDRMAP7 0x00000F0F ++#define DDRCTL_ADDRMAP8 0x00003F09 ++#define DDRCTL_ADDRMAP9 0x00000000 ++#define DDRCTL_ADDRMAP10 0x00000000 ++#define DDRCTL_ADDRMAP11 0x001F1F00 ++#define DDRCTL_DQMAP0 0x00000000 ++#define DDRCTL_DQMAP1 0x00000000 ++#define DDRCTL_DQMAP4 0x00000000 ++#define DDRCTL_DQMAP5 0x00000000 ++#define DDRCTL_PWRCTL 0x00000000 ++#define DDRCTL_RANKCTL 0x00000000 ++#define DDRCTL_ODTCFG 0x05000508 ++#define DDRCTL_ODTMAP 0x00000001 ++#define DDRPHY_PGCR0 0x07001E00 ++#define DDRPHY_PGCR1 0x020046C0 ++#define DDRPHY_PGCR2 0x00F05E60 ++#define DDRPHY_PGCR3 0x55AA0080 ++#define DDRPHY_PGCR6 0x00013001 ++#define DDRPHY_PTR2 0x00083DEF ++#define DDRPHY_PTR3 0x00061A80 ++#define DDRPHY_PTR4 0x00000120 ++#define DDRPHY_PTR5 0x00027100 ++#define DDRPHY_PTR6 0x04000320 ++#define DDRPHY_PLLCR0 0x021c4000 ++#define DDRPHY_DXCCR 0x00000038 ++#define DDRPHY_DSGCR 0x02A0C129 ++#define DDRPHY_DCR 0x4000040C ++#define DDRPHY_DTPR0 0x061C0B06 ++#define DDRPHY_DTPR1 0x281C0000 ++#define DDRPHY_DTPR2 0x0034E300 ++#define DDRPHY_DTPR3 0x02800800 ++#define DDRPHY_DTPR4 0x31180805 ++#define DDRPHY_DTPR5 0x00270B06 ++#define DDRPHY_DTPR6 0x00000505 ++#define DDRPHY_ZQCR 0x008A2A58 ++#define DDRPHY_ZQ0PR0 0x000077DD ++#define DDRPHY_ZQ1PR0 0x000077DD ++#define DDRPHY_MR0 0x00000210 ++#define DDRPHY_MR1 0x00000501 ++#define DDRPHY_MR2 0x00000000 ++#define DDRPHY_MR3 0x00000020 ++#define DDRPHY_MR4 0x00000000 ++#define DDRPHY_MR5 0x00000480 ++#define DDRPHY_MR6 0x000004E8 ++#define DDRPHY_MR11 0x00000000 ++#define DDRPHY_MR12 0x00000000 ++#define DDRPHY_MR13 0x00000000 ++#define DDRPHY_MR14 0x00000000 ++#define DDRPHY_MR22 0x00000000 ++#define DDRPHY_VTCR0 0xF3C32028 ++#define DDRPHY_DX8SL0PLLCR0 0x021c4000 ++#define DDRPHY_DX8SL1PLLCR0 0x021c4000 ++#define DDRPHY_DX8SL2PLLCR0 0x021c4000 ++#define DDRPHY_DTCR0 0x8000B1C7 ++#define DDRPHY_DTCR1 0x00010236 ++#define DDRPHY_ACIOCR3 0x20000001 ++#define DDRPHY_ACIOCR5 0x04800000 ++#define DDRPHY_IOVCR0 0x0F0C0C0C ++#define DDRPHY_DX0GCR0 0x00000000 ++#define DDRPHY_DX0GCR1 0x00000000 ++#define DDRPHY_DX0GCR2 0x00000000 ++#define DDRPHY_DX0GCR3 0x00000000 ++#define DDRPHY_DX1GCR0 0x00000000 ++#define DDRPHY_DX1GCR1 0x00000000 ++#define DDRPHY_DX1GCR2 0x00000000 ++#define DDRPHY_DX1GCR3 0x00000000 ++#define DDRPHY_DX2GCR0 0x40703220 ++#define DDRPHY_DX2GCR1 0x55556000 ++#define DDRPHY_DX2GCR2 0xAAAA0000 ++#define DDRPHY_DX2GCR3 0xFFE18587 ++#define DDRPHY_DX3GCR0 0x40703220 ++#define DDRPHY_DX3GCR1 0x55556000 ++#define DDRPHY_DX3GCR2 0xAAAA0000 ++#define DDRPHY_DX3GCR3 0xFFE18587 ++#define DDRPHY_DX4GCR0 0x40703220 ++#define DDRPHY_DX4GCR1 0x55556000 ++#define DDRPHY_DX4GCR2 0xAAAA0000 ++#define DDRPHY_DX4GCR3 0xFFE18587 ++#define DDRPHY_DX0GCR4 0x0E00B03C ++#define DDRPHY_DX1GCR4 0x0E00B03C ++#define DDRPHY_DX2GCR4 0x0E00B03C ++#define DDRPHY_DX3GCR4 0x0E00B03C ++#define DDRPHY_DX4GCR4 0x0E00B03C ++#define DDRPHY_PGCR5 0x01010004 ++#define DDRPHY_DX0GCR5 0x00000049 ++#define DDRPHY_DX1GCR5 0x00000049 ++#define DDRPHY_DX2GCR5 0x00000049 ++#define DDRPHY_DX3GCR5 0x00000049 ++#define DDRPHY_DX4GCR5 0x00000049 ++#define DDRPHY_DX0GTR0 0x00020002 ++#define DDRPHY_DX1GTR0 0x00020002 ++#define DDRPHY_DX2GTR0 0x00020002 ++#define DDRPHY_DX3GTR0 0x00020002 ++#define DDRPHY_DX4GTR0 0x00020002 ++#define DDRPHY_ODTCR 0x00010000 ++#define DDRPHY_DX8SL0IOCR 0x74800000 ++#define DDRPHY_DX8SL1IOCR 0x74800000 ++#define DDRPHY_DX8SL2IOCR 0x74800000 ++#define DDRPHY_DX8SL0DXCTL2 0x00141830 ++#define DDRPHY_DX8SL1DXCTL2 0x00141830 ++#define DDRPHY_DX8SL2DXCTL2 0x00141830 +diff --git a/arch/arm/dts/iot2050-basic.dts b/arch/arm/dts/iot2050-basic.dts +new file mode 100644 +index 0000000000..b6d0ab4de0 +--- /dev/null ++++ b/arch/arm/dts/iot2050-basic.dts +@@ -0,0 +1,72 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++ ++/dts-v1/; ++ ++#include "k3-am654.dtsi" ++#include "iot2050-u-boot.dtsi" ++#include ++#include "iot2050-common.dtsi" ++ ++/ { ++ compatible = "siemens,iot2050", "ti,am654"; ++ model = "Siemens IOT2050 Basic Base Board"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ /* 1G RAM */ ++ reg = <0x00000000 0x80000000 0x00000000 0x40000000>, ++ <0x00000008 0x80000000 0x00000000 0x00000000>; ++ }; ++ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ secure_ddr: secure_ddr@9e800000 { ++ reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ ++ alignment = <0x1000>; ++ no-map; ++ }; ++ }; ++}; ++ ++/* eMMC */ ++&sdhci0 { ++ status = "disabled"; ++}; ++ ++&main_pmx0 { ++ main_uart0_pins_default: main_uart0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ ++ AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ ++ AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ ++ AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ ++ AM65X_IOPAD(0x0188, PIN_INPUT, 1) /* (D25) UART0_DCDn */ ++ AM65X_IOPAD(0x018c, PIN_INPUT, 1) /* (B26) UART0_DSRn */ ++ AM65X_IOPAD(0x0190, PIN_OUTPUT, 1) /* (A24) UART0_DTRn */ ++ AM65X_IOPAD(0x0194, PIN_INPUT, 1) /* (E24) UART0_RIN */ ++ >; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&wkup_pmx0 { ++ main_uart0_mode_pins_default: main_uart0_mode_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7) /* (AD3) WKUP_GPIO0_5, serial mode switch0 */ ++ AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT, 7) /* (AC3) WKUP_GPIO0_4, serial mode switch1 */ ++ AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 7) /* (AC1) WKUP_GPIO0_7, 485 terminal resister */ ++ AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AC2) WKUP_GPIO0_6, 485 en */ ++ >; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&main_uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_uart0_pins_default &main_uart0_mode_pins_default>; ++}; +diff --git a/arch/arm/dts/iot2050-common.dtsi b/arch/arm/dts/iot2050-common.dtsi +new file mode 100644 +index 0000000000..2391a12c88 +--- /dev/null ++++ b/arch/arm/dts/iot2050-common.dtsi +@@ -0,0 +1,162 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++ ++/ { ++ chosen { ++ stdout-path = "serial3:115200n8"; ++ bootargs = "earlycon=ns16550a,mmio32,0x02800000"; ++ }; ++ ++ aliases { ++ remoteproc0 = &mcu_r5fss0_core0; ++ remoteproc1 = &mcu_r5fss0_core1; ++ }; ++}; ++ ++&wkup_pmx0 { ++ mcu_fss0_ospi0_pins_default: mcu_fss0_ospi0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ ++ AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ ++ AM65X_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* (U4) MCU_OSPI0_D0 */ ++ AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ ++ AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ ++ >; ++ u-boot,dm-spl; ++ }; ++ wkup_i2c0_pins_default: wkup-i2c0-pins-default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ ++ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ ++ >; ++ }; ++ mcu_i2c0_pins_default: mcu_i2c0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */ ++ AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */ ++ >; ++ }; ++}; ++ ++&main_pmx0 { ++ usb0_pins_default: usb0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ ++ >; ++ }; ++ ++ usb1_pins_default: usb1_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ ++ >; ++ }; ++ ++ main_i2c2_pins_default: main-i2c2-pins-default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ ++ AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ ++ >; ++ }; ++}; ++ ++&main_pmx1 { ++ main_i2c0_pins_default: main-i2c0-pins-default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ ++ AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ ++ >; ++ }; ++ ++ main_i2c1_pins_default: main-i2c1-pins-default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ ++ AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ ++ >; ++ }; ++}; ++ ++&dwc3_1 { ++ status = "okay"; ++}; ++ ++&usb1_phy { ++ status = "okay"; ++}; ++ ++&usb1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb1_pins_default>; ++ dr_mode = "host"; ++}; ++ ++&dwc3_0 { ++ status = "okay"; ++}; ++ ++&usb0_phy { ++ status = "okay"; ++}; ++ ++&usb0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb0_pins_default>; ++ dr_mode = "host"; ++}; ++ ++&wkup_i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wkup_i2c0_pins_default>; ++ clock-frequency = <400000>; ++}; ++ ++&mcu_i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_i2c0_pins_default>; ++ clock-frequency = <400000>; ++}; ++ ++&main_i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c0_pins_default>; ++ clock-frequency = <400000>; ++ eeprom: eeprom@54 { ++ compatible = "atmel,24c08"; ++ reg = <0x54>; ++ pagesize = <16>; ++ }; ++}; ++ ++&main_i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c1_pins_default>; ++ clock-frequency = <400000>; ++}; ++ ++&main_i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c2_pins_default>; ++ clock-frequency = <400000>; ++}; ++ ++&ospi0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; ++ ++ flash@0{ ++ compatible = "jedec,spi-nor"; ++ reg = <0x0>; ++ spi-tx-bus-width = <1>; ++ spi-rx-bus-width = <1>; ++ spi-max-frequency = <33333334>; ++ cdns,tshsl-ns = <60>; ++ cdns,tsd2d-ns = <60>; ++ cdns,tchsh-ns = <60>; ++ cdns,tslch-ns = <60>; ++ cdns,read-delay = <0>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ }; ++}; +diff --git a/arch/arm/dts/iot2050-r5-advanced.dts b/arch/arm/dts/iot2050-r5-advanced.dts +new file mode 100644 +index 0000000000..1afde4a30d +--- /dev/null ++++ b/arch/arm/dts/iot2050-r5-advanced.dts +@@ -0,0 +1,54 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++ ++/dts-v1/; ++ ++#include "k3-am654.dtsi" ++#include "iot2050-u-boot.dtsi" ++#include "iot2050-advanced-ddr4-1600MHz.dtsi" ++#include "k3-am654-ddr.dtsi" ++#include "iot2050-r5-common.dtsi" ++ ++/ { ++ compatible = "siemens,iot2050", "ti,am654"; ++ model = "Siemens IOT2050 R5 Advanced Base Board"; ++}; ++ ++&main_pmx0 { ++ u-boot,dm-spl; ++ main_mmc0_pins_default: main_mmc0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ ++ AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ ++ AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ ++ AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ ++ AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ ++ AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ ++ AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ ++ AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ ++ AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ ++ AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ ++ AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ ++ AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ ++ >; ++ u-boot,dm-spl; ++ }; ++}; ++ ++/* eMMC */ ++&sdhci0 { ++ clock-names = "clk_xin"; ++ clocks = <&clk_200mhz>; ++ /delete-property/ power-domains; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_mmc0_pins_default>; ++ bus-width = <8>; ++ non-removable; ++ ti,driver-strength-ohm = <50>; ++}; ++ ++&main_uart0 { ++ status = "disabled"; ++}; +diff --git a/arch/arm/dts/iot2050-r5-basic.dts b/arch/arm/dts/iot2050-r5-basic.dts +new file mode 100644 +index 0000000000..2aaae81193 +--- /dev/null ++++ b/arch/arm/dts/iot2050-r5-basic.dts +@@ -0,0 +1,55 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++ ++/dts-v1/; ++ ++#include "k3-am654.dtsi" ++#include "iot2050-u-boot.dtsi" ++#include "iot2050-basic-ddr4-1600MHz.dtsi" ++#include "k3-am654-ddr.dtsi" ++#include "iot2050-r5-common.dtsi" ++ ++/ { ++ compatible = "siemens,iot2050", "ti,am654"; ++ model = "Siemens IOT2050 R5 Basic Base Board"; ++}; ++ ++/* eMMC */ ++&sdhci0 { ++ status = "disabled"; ++}; ++ ++&main_pmx0 { ++ main_uart0_pins_default: main_uart0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ ++ AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ ++ AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ ++ AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ ++ AM65X_IOPAD(0x0188, PIN_INPUT, 1) /* (D25) UART0_DCDn */ ++ AM65X_IOPAD(0x018c, PIN_INPUT, 1) /* (B26) UART0_DSRn */ ++ AM65X_IOPAD(0x0190, PIN_OUTPUT, 1) /* (A24) UART0_DTRn */ ++ AM65X_IOPAD(0x0194, PIN_INPUT, 1) /* (E24) UART0_RIN */ ++ >; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&wkup_pmx0 { ++ main_uart0_mode_pins_default: main_uart0_mode_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7) /* (AD3) WKUP_GPIO0_5, serial mode switch0 */ ++ AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT, 7) /* (AC3) WKUP_GPIO0_4, serial mode switch1 */ ++ AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 7) /* (AC1) WKUP_GPIO0_7, 485 terminal resister */ ++ AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AC2) WKUP_GPIO0_6, 485 en */ ++ >; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&main_uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_uart0_pins_default &main_uart0_mode_pins_default>; ++}; +diff --git a/arch/arm/dts/iot2050-r5-common.dtsi b/arch/arm/dts/iot2050-r5-common.dtsi +new file mode 100644 +index 0000000000..411a48dc4d +--- /dev/null ++++ b/arch/arm/dts/iot2050-r5-common.dtsi +@@ -0,0 +1,278 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ ++ */ ++ ++/ { ++ aliases { ++ serial1 = &mcu_uart0; ++ serial2 = &main_uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial3:115200n8"; ++ tick-timer = &timer1; ++ }; ++ ++ aliases { ++ remoteproc0 = &sysctrler; ++ remoteproc1 = &a53_0; ++ }; ++ ++ a53_0: a53@0 { ++ compatible = "ti,am654-rproc"; ++ reg = <0x0 0x00a90000 0x0 0x10>; ++ power-domains = <&k3_pds 61 TI_SCI_PD_SHARED>, ++ <&k3_pds 202 TI_SCI_PD_SHARED>; ++ resets = <&k3_reset 202 0>; ++ assigned-clocks = <&k3_clks 202 0>; ++ assigned-clock-rates = <800000000>; ++ ti,sci = <&dmsc>; ++ ti,sci-proc-id = <32>; ++ ti,sci-host-id = <10>; ++ u-boot,dm-spl; ++ }; ++ ++ vtt_supply: vtt_supply { ++ compatible = "regulator-gpio"; ++ regulator-name = "vtt"; ++ regulator-min-microvolt = <0>; ++ regulator-max-microvolt = <3300000>; ++ gpios = <&wkup_gpio0 18 GPIO_ACTIVE_HIGH>; ++ states = <0 0x0 3300000 0x1>; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&cbass_main { ++ timer1: timer@40400000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x0 0x40400000 0x0 0x80>; ++ ti,timer-alwon; ++ clock-frequency = <25000000>; ++ u-boot,dm-pre-reloc; ++ }; ++}; ++ ++&cbass_mcu { ++ mcu_secproxy: secproxy@28380000 { ++ compatible = "ti,am654-secure-proxy"; ++ reg = <0x0 0x2a380000 0x0 0x80000>, ++ <0x0 0x2a400000 0x0 0x80000>, ++ <0x0 0x2a480000 0x0 0x80000>; ++ reg-names = "rt", "scfg", "target_data"; ++ #mbox-cells = <1>; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&cbass_wakeup { ++ sysctrler: sysctrler { ++ compatible = "ti,am654-system-controller"; ++ mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; ++ mbox-names = "tx", "rx"; ++ u-boot,dm-spl; ++ }; ++ ++ wkup_gpio0: wkup_gpio0@42110000 { ++ compatible = "ti,k2g-gpio", "ti,keystone-gpio"; ++ reg = <0x42110000 0x100>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ti,ngpio = <56>; ++ ti,davinci-gpio-unbanked = <0>; ++ clocks = <&k3_clks 59 0>; ++ clock-names = "gpio"; ++ u-boot,dm-spl; ++ }; ++ ++ clk_200mhz: dummy_clock { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <200000000>; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&dmsc { ++ mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>; ++ mbox-names = "tx", "rx", "notify"; ++ ti,host-id = <4>; ++ ti,secure-host; ++}; ++ ++&mcu_uart0 { ++ u-boot,dm-spl; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_uart0_pins_default>; ++ clock-frequency = <48000000>; ++ status = "okay"; ++}; ++ ++&main_uart0 { ++ u-boot,dm-spl; ++ power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; ++}; ++ ++&main_i2c0 { ++ u-boot,dm-spl; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c0_pins_default>; ++ status = "okay"; ++ clock-frequency = <400000>; ++ power-domains = <&k3_pds 110 TI_SCI_PD_SHARED>; ++ eeprom@54 { ++ compatible = "atmel,24c08"; ++ reg = <0x54>; ++ pagesize = <16>; ++ }; ++}; ++ ++&wkup_i2c0 { ++ u-boot,dm-spl; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wkup_i2c0_pins_default>; ++ status = "okay"; ++ clock-frequency = <400000>; ++ power-domains = <&k3_pds 115 TI_SCI_PD_SHARED>; ++ lp8733: lp8733@60 { ++ compatible = "ti,lp8733"; ++ reg = <0x60>; ++ u-boot,dm-spl; ++ lp8733_regulators: regulators { ++ u-boot,dm-spl; ++ lp8733_buck0_reg: buck0 { ++ regulator-name = "lp8733-buck0"; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <1250000>; ++ regulator-always-on; ++ regulator-boot-on; ++ u-boot,dm-spl; ++ }; ++ }; ++ }; ++}; ++ ++&mcu_i2c0 { ++ u-boot,dm-spl; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_i2c0_pins_default>; ++ status = "okay"; ++ clock-frequency = <400000>; ++ power-domains = <&k3_pds 114 TI_SCI_PD_SHARED>; ++ vdd_mpu: tps62363@60 { ++ compatible = "ti,tps62363"; ++ reg = <0x60>; ++ regulator-name = "VDD_MPU"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1770000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ti,vsel0-state-high; ++ ti,vsel1-state-high; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&wkup_vtm0 { ++ vdd-supply-2 = <&lp8733_buck0_reg>; ++ vdd-supply-3 = <&vdd_mpu>; ++ vdd-supply-4 = <&vdd_mpu>; ++ u-boot,dm-spl; ++}; ++ ++&wkup_pmx0 { ++ u-boot,dm-spl; ++ wkup_vtt_pins_default: wkup_vtt_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0018, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_18 */ ++ >; ++ u-boot,dm-spl; ++ }; ++ ++ mcu_uart0_pins_default: mcu_uart0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */ ++ >; ++ u-boot,dm-spl; ++ }; ++ ++ wkup_i2c0_pins_default: wkup-i2c0-pins-default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ ++ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ ++ >; ++ }; ++ ++ mcu_i2c0_pins_default: mcu_i2c0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */ ++ AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */ ++ >; ++ }; ++ ++ mcu_fss0_ospi0_pins_default: mcu_fss0_ospi0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ ++ AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ ++ AM65X_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* (U4) MCU_OSPI0_D0 */ ++ AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ ++ AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ ++ >; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&main_pmx1 { ++ u-boot,dm-spl; ++ main_i2c0_pins_default: main_i2c0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ ++ AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ ++ >; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&memorycontroller { ++ vtt-supply = <&vtt_supply>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wkup_vtt_pins_default>; ++}; ++ ++&sdhci1 { ++ clock-names = "clk_xin"; ++ clocks = <&clk_200mhz>; ++ /delete-property/ power-domains; ++ ti,driver-strength-ohm = <50>; ++}; ++ ++&ospi0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; ++ u-boot,dm-spl; ++ reg = <0x0 0x47040000 0x0 0x100>, ++ <0x0 0x50000000 0x0 0x8000000>; ++ clocks = <&clk_200mhz>; ++ /delete-property/ power-domains; ++ ++ flash@0{ ++ compatible = "jedec,spi-nor"; ++ reg = <0x0>; ++ spi-tx-bus-width = <1>; ++ spi-rx-bus-width = <1>; ++ spi-max-frequency = <6000000>; ++ cdns,tshsl-ns = <500>; ++ cdns,tsd2d-ns = <500>; ++ cdns,tchsh-ns = <119>; ++ cdns,tslch-ns = <119>; ++ cdns,read-delay = <0>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ u-boot,dm-spl; ++ }; ++}; +diff --git a/arch/arm/dts/iot2050-u-boot.dtsi b/arch/arm/dts/iot2050-u-boot.dtsi +new file mode 100644 +index 0000000000..b12c772b84 +--- /dev/null ++++ b/arch/arm/dts/iot2050-u-boot.dtsi +@@ -0,0 +1,345 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++ ++#include ++#include ++#include ++ ++/ { ++ chosen { ++ stdout-path = "serial3:115200n8"; ++ }; ++ ++ aliases { ++ serial3 = &main_uart1; ++ ethernet0 = &pruss0_eth; ++ }; ++ ++ /* Dual Ethernet application node on PRU-ICSSG0 */ ++ pruss0_eth: pruss0_eth { ++ compatible = "ti,am654-icssg-prueth"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&icssg0_rgmii_pins_default>; ++ sram = <&icssg0_sram>; ++ clocks = <&k3_clks 62 3>; ++ clock-names = "mdio_fck"; ++ ++ prus = <&pru0_0>, <&rtu0_0>, <&pru0_1>, <&rtu0_1>; ++ firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf", ++ "ti-pruss/am65x-rtu0-prueth-fw.elf", ++ "ti-pruss/am65x-pru1-prueth-fw.elf", ++ "ti-pruss/am65x-rtu1-prueth-fw.elf"; ++ mii-g-rt = <&icssg0_mii_g_rt>; ++ dma-coherent; ++ dmas = <&mcu_udmap &icssg0 0 UDMA_DIR_TX>, /* egress slice 0 */ ++ <&mcu_udmap &icssg0 1 UDMA_DIR_TX>, /* egress slice 0 */ ++ <&mcu_udmap &icssg0 2 UDMA_DIR_TX>, /* egress slice 0 */ ++ <&mcu_udmap &icssg0 3 UDMA_DIR_TX>, /* egress slice 0 */ ++ <&mcu_udmap &icssg0 4 UDMA_DIR_TX>, /* egress slice 1 */ ++ <&mcu_udmap &icssg0 5 UDMA_DIR_TX>, /* egress slice 1 */ ++ <&mcu_udmap &icssg0 6 UDMA_DIR_TX>, /* egress slice 1 */ ++ <&mcu_udmap &icssg0 7 UDMA_DIR_TX>, /* egress slice 1 */ ++ <&mcu_udmap &icssg0 0 UDMA_DIR_RX>, /* ingress slice 0 */ ++ <&mcu_udmap &icssg0 1 UDMA_DIR_RX>, /* ingress slice 1 */ ++ <&mcu_udmap &icssg0 2 UDMA_DIR_RX>, /* mgmnt rsp slice 0 */ ++ <&mcu_udmap &icssg0 3 UDMA_DIR_RX>; /* mgmnt rsp slice 1 */ ++ dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", ++ "tx1-0", "tx1-1", "tx1-2", "tx1-3", ++ "rx0", "rx1", ++ "rxmgm0", "rxmgm1"; ++ ++ pruss0_emac0: ethernet-mii0 { ++ phy-handle = <&pruss0_eth0_phy>; ++ phy-mode = "rgmii-rxid"; ++ syscon-rgmii-delay = <&scm_conf 0x4100>; ++ /* Filled in by bootloader */ ++ local-mac-address = [00 00 00 00 00 00]; ++ }; ++ ++/* ++ * Commenting out the second mii interface as the framework ++ * supports one interface in a single probe ++ * So either mii1 or mii2 can be used. In case mii1 is needed ++ * uncomment mii1 and comment out mii0 ++ pruss0_emac1: ethernet-mii1 { ++ phy-handle = <&pruss0_eth1_phy>; ++ phy-mode = "rgmii-rxid"; ++ syscon-rgmii-delay = <&scm_conf 0x4104>; ++ local-mac-address = [00 00 00 00 00 00]; ++ }; ++*/ ++ }; ++}; ++ ++&cbass_main{ ++ u-boot,dm-spl; ++ ++ sdhci1: sdhci@04FA0000 { ++ compatible = "ti,am654-sdhci-5.1"; ++ reg = <0x0 0x4FA0000 0x0 0x1000>, ++ <0x0 0x4FB0000 0x0 0x400>; ++ clocks = <&k3_clks 48 0>, <&k3_clks 48 1>; ++ clock-names = "clk_ahb", "clk_xin"; ++ power-domains = <&k3_pds 48 TI_SCI_PD_SHARED>; ++ max-frequency = <25000000>; ++ ti,otap-del-sel = <0x2>; ++ ti,trm-icp = <0x8>; ++ }; ++ ++}; ++ ++&cbass_mcu { ++ u-boot,dm-spl; ++ ++ navss_mcu: navss-mcu { ++ compatible = "simple-bus"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ ti,sci-dev-id = <119>; ++ u-boot,dm-spl; ++ ++ mcu_ringacc: ringacc@2b800000 { ++ compatible = "ti,am654-navss-ringacc"; ++ reg = <0x0 0x2b800000 0x0 0x400000>, ++ <0x0 0x2b000000 0x0 0x400000>, ++ <0x0 0x28590000 0x0 0x100>, ++ <0x0 0x2a500000 0x0 0x40000>; ++ reg-names = "rt", "fifos", ++ "proxy_gcfg", "proxy_target"; ++ ti,num-rings = <286>; ++ ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */ ++ ti,dma-ring-reset-quirk; ++ ti,sci = <&dmsc>; ++ ti,sci-dev-id = <195>; ++ u-boot,dm-spl; ++ ++ }; ++ ++ mcu_udmap: udmap@285c0000 { ++ compatible = "ti,k3-navss-udmap"; ++ reg = <0x0 0x285c0000 0x0 0x100>, ++ <0x0 0x2a800000 0x0 0x40000>, ++ <0x0 0x2aa00000 0x0 0x40000>; ++ reg-names = "gcfg", "rchanrt", "tchanrt"; ++ #dma-cells = <3>; ++ ++ ti,ringacc = <&mcu_ringacc>; ++ ti,psil-base = <0x6000>; ++ ++ ti,sci = <&dmsc>; ++ ti,sci-dev-id = <194>; ++ ++ ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */ ++ <0x2>; /* TX_CHAN */ ++ ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */ ++ <0x4>; /* RX_CHAN */ ++ ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ ++ dma-coherent; ++ u-boot,dm-spl; ++ ++ }; ++ }; ++ ++ mcu_conf: scm_conf@40f00000 { ++ compatible = "syscon"; ++ reg = <0x0 0x40f00000 0x0 0x20000>; ++ }; ++}; ++ ++&cbass_wakeup { ++ u-boot,dm-spl; ++}; ++ ++&secure_proxy_main { ++ u-boot,dm-spl; ++}; ++ ++&dmsc { ++ u-boot,dm-spl; ++ k3_sysreset: sysreset-controller { ++ compatible = "ti,sci-sysreset"; ++ u-boot,dm-spl; ++ }; ++}; ++ ++&k3_pds { ++ u-boot,dm-spl; ++}; ++ ++&k3_clks { ++ u-boot,dm-spl; ++}; ++ ++&k3_reset { ++ u-boot,dm-spl; ++}; ++ ++&wkup_pmx0 { ++ u-boot,dm-spl; ++ ++ mcu_fss0_ospi0_pins_default { ++ u-boot,dm-spl; ++ }; ++ ++ wkup_i2c0_pins_default { ++ u-boot,dm-spl; ++ }; ++}; ++ ++&wkup_pmx0 { ++ u-boot,dm-spl; ++ ++ mcu_fss0_ospi0_pins_default { ++ u-boot,dm-spl; ++ }; ++}; ++ ++&main_pmx0 { ++ u-boot,dm-spl; ++ main_uart1_pins_default: main_uart1_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */ ++ AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) UART1_TXD */ ++ AM65X_IOPAD(0x0178, PIN_INPUT, 6) /* (AD22) UART1_CTSn */ ++ AM65X_IOPAD(0x017c, PIN_OUTPUT, 6) /* (AC21) UART1_RTSn */ ++ >; ++ u-boot,dm-spl; ++ }; ++ ++ main_mmc1_pins_default: main_mmc1_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ ++ AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ ++ AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */ ++ AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */ ++ AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */ ++ AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */ ++ AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */ ++ AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */ ++ >; ++ u-boot,dm-spl; ++ }; ++ ++ icssg0_rgmii_pins_default: icssg0_rgmii_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */ ++ AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */ ++ AM65X_IOPAD(0x024c, PIN_INPUT, 2) /* (AC27) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */ ++ AM65X_IOPAD(0x0250, PIN_INPUT, 2) /* (AB26) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */ ++ AM65X_IOPAD(0x0274, PIN_OUTPUT, 2) /* (AC25) PRG0_PRU1_GPO12.PRG0_RGMII2_TD0 */ ++ AM65X_IOPAD(0x0278, PIN_OUTPUT, 2) /* (AD25) PRG0_PRU1_GPO13.PRG0_RGMII2_TD1 */ ++ AM65X_IOPAD(0x027c, PIN_OUTPUT, 2) /* (AD24) PRG0_PRU1_GPO14.PRG0_RGMII2_TD2 */ ++ AM65X_IOPAD(0x0280, PIN_OUTPUT, 2) /* (AE27) PRG0_PRU1_GPO15.PRG0_RGMII2_TD3 */ ++ AM65X_IOPAD(0x0284, PIN_INPUT, 2) /* (AC24) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */ ++ AM65X_IOPAD(0x0270, PIN_OUTPUT, 2) /* (AB24) PRG0_PRU1_GPO11.PRG0_RGMII2_TX_CTL */ ++ AM65X_IOPAD(0x025c, PIN_INPUT, 2) /* (AB27) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */ ++ AM65X_IOPAD(0x0254, PIN_INPUT, 2) /* (AA25) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */ ++ AM65X_IOPAD(0x01f4, PIN_INPUT, 2) /* (V24) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */ ++ AM65X_IOPAD(0x01f8, PIN_INPUT, 2) /* (W25) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */ ++ AM65X_IOPAD(0x01fc, PIN_INPUT, 2) /* (W24) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */ ++ AM65X_IOPAD(0x0200, PIN_INPUT, 2) /* (AA27) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */ ++ AM65X_IOPAD(0x0224, PIN_OUTPUT, 2) /* (AD27) PRG0_PRU0_GPO12.PRG0_RGMII1_TD0 */ ++ AM65X_IOPAD(0x0228, PIN_OUTPUT, 2) /* (AC26) PRG0_PRU0_GPO13.PRG0_RGMII1_TD1 */ ++ AM65X_IOPAD(0x022c, PIN_OUTPUT, 2) /* (AD26) PRG0_PRU0_GPO14.PRG0_RGMII1_TD2 */ ++ AM65X_IOPAD(0x0230, PIN_OUTPUT, 2) /* (AA24) PRG0_PRU0_GPO15.PRG0_RGMII1_TD3 */ ++ AM65X_IOPAD(0x0234, PIN_INPUT, 2) /* (AD28) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */ ++ AM65X_IOPAD(0x0220, PIN_OUTPUT, 2) /* (AB25) PRG0_PRU0_GPO11.PRG0_RGMII1_TX_CTL */ ++ AM65X_IOPAD(0x020c, PIN_INPUT, 2) /* (Y25) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */ ++ AM65X_IOPAD(0x0204, PIN_INPUT, 2) /* (Y24) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */ ++ /* HACK As there is no driver for mdio */ ++ AM65X_IOPAD(0x0294, PIN_INPUT , 0) /* (AE26) PRG0_MDIO0_MDIO */ ++ AM65X_IOPAD(0x0298, PIN_OUTPUT , 0) /* (AE28) PRG0_MDIO0_MDC */ ++ >; ++ }; ++ ++ icssg0_mdio_pins_default: icssg0_mdio_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */ ++ AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */ ++ >; ++ }; ++}; ++ ++&main_pmx1 { ++ u-boot,dm-spl; ++}; ++ ++&main_uart1 { ++ u-boot,dm-spl; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_uart1_pins_default>; ++ status = "okay"; ++}; ++ ++&sdhci0 { ++ u-boot,dm-spl; ++}; ++ ++&sdhci1 { ++ u-boot,dm-spl; ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_mmc1_pins_default>; ++ sdhci-caps-mask = <0x7 0x0>; ++ ti,driver-strength-ohm = <50>; ++}; ++ ++&wkup_i2c0 { ++ u-boot,dm-spl; ++ gpio@38 { ++ u-boot,dm-spl; ++ }; ++}; ++ ++&usb0 { ++ dr_mode = "host"; ++}; ++ ++&usb1 { ++ dr_mode = "host"; ++}; ++ ++&fss { ++ u-boot,dm-spl; ++}; ++ ++&ospi0 { ++ u-boot,dm-spl; ++ ++ flash@0{ ++ u-boot,dm-spl; ++ }; ++}; ++ ++&msmc_ram { ++ icssg0_sram: icssg0-sram@40000 { ++ reg = <0x40000 0x20000>; ++ }; ++ icssg2_sram: icssg2-sram@60000 { ++ reg = <0x60000 0x10000>; ++ }; ++}; ++ ++&icssg0_mdio { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&icssg0_mdio_pins_default>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pruss0_eth0_phy: ethernet-phy@0 { ++ reg = <0>; ++ ti,rx-internal-delay = ; ++ ti,fifo-depth = ; ++ }; ++ ++ pruss0_eth1_phy: ethernet-phy@3 { ++ reg = <3>; ++ ti,rx-internal-delay = ; ++ ti,fifo-depth = ; ++ }; ++}; +diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi +index c741a5e993..ee32bf84cc 100644 +--- a/arch/arm/dts/k3-am65-main.dtsi ++++ b/arch/arm/dts/k3-am65-main.dtsi +@@ -122,7 +122,7 @@ + sdhci0: sdhci@4f80000 { + compatible = "ti,am654-sdhci-5.1"; + reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; +- power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>; ++ power-domains = <&k3_pds 47 TI_SCI_PD_SHARED>; + clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; + clock-names = "clk_ahb", "clk_xin"; + interrupts = ; +@@ -181,7 +181,7 @@ + ranges = <0x0 0x0 0x4000000 0x20000>; + interrupts = ; + dma-coherent; +- power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>; ++ power-domains = <&k3_pds 151 TI_SCI_PD_SHARED>; + assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>; + assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ + <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ +@@ -221,7 +221,7 @@ + ranges = <0x0 0x0 0x4020000 0x20000>; + interrupts = ; + dma-coherent; +- power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>; ++ power-domains = <&k3_pds 152 TI_SCI_PD_SHARED>; + assigned-clocks = <&k3_clks 152 2>; + assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ + +diff --git a/arch/arm/dts/k3-am654-ddr.dtsi b/arch/arm/dts/k3-am654-ddr.dtsi +index 622a3edb61..b2e21597cd 100644 +--- a/arch/arm/dts/k3-am654-ddr.dtsi ++++ b/arch/arm/dts/k3-am654-ddr.dtsi +@@ -168,6 +168,7 @@ + >; + + ti,phy-ioctl = < ++ DDRPHY_ACIOCR3 + DDRPHY_ACIOCR5 + DDRPHY_IOVCR0 + >; +diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig +index 75dbee51d0..4d61eb4f53 100644 +--- a/arch/arm/mach-k3/Kconfig ++++ b/arch/arm/mach-k3/Kconfig +@@ -144,4 +144,5 @@ config SYS_K3_SPL_ATF + + source "board/ti/am65x/Kconfig" + source "board/ti/j721e/Kconfig" ++source "board/siemens/iot2050/Kconfig" + endif +diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c +index 3e931a880a..858a1c37bb 100644 +--- a/arch/arm/mach-k3/sysfw-loader.c ++++ b/arch/arm/mach-k3/sysfw-loader.c +@@ -282,9 +282,8 @@ void k3_sysfw_loader(void (*config_pm_done_callback)(void)) + #endif + #if CONFIG_IS_ENABLED(SPI_LOAD) + case BOOT_DEVICE_SPI: +- addr = get_sysfw_spi_addr(); +- if (!addr) +- ret = -ENODEV; ++ ret = spl_spi_load(&spl_image, &bootdev, ++ CONFIG_K3_SYSFW_IMAGE_SPI_OFFS, addr); + break; + #endif + #if CONFIG_IS_ENABLED(YMODEM_SUPPORT) +diff --git a/board/siemens/common/Kconfig b/board/siemens/common/Kconfig +new file mode 100644 +index 0000000000..9a2cee1ff9 +--- /dev/null ++++ b/board/siemens/common/Kconfig +@@ -0,0 +1,15 @@ ++config IOT2050_I2C_BOARD_DETECT ++ bool "Support for Board detection for IOT2050 platforms" ++ help ++ Support for detection board information on IOT2050 ++ Boards which have I2C based EEPROM detection ++ ++config EEPROM_BUS_ADDRESS ++ int "Board EEPROM's I2C bus address" ++ range 0 8 ++ default 2 ++ ++config EEPROM_CHIP_ADDRESS ++ hex "Board EEPROM's I2C chip address" ++ range 0 0xff ++ default 0x54 +\ No newline at end of file +diff --git a/board/siemens/iot2050/Kconfig b/board/siemens/iot2050/Kconfig +new file mode 100644 +index 0000000000..d441f1b9ca +--- /dev/null ++++ b/board/siemens/iot2050/Kconfig +@@ -0,0 +1,78 @@ ++# SPDX-License-Identifier: GPL-2.0+ ++# ++# (C) Copyright 2018 Siemens AG ++# Le Jin ++choice ++ prompt "IOT2050 based boards" ++ optional ++ ++config TARGET_IOT2050_BASIC_A53 ++ bool "IOT2050 basic running on A53" ++ select ARM64 ++ select SOC_K3_AM6 ++ select BOARD_LATE_INIT ++ imply IOT2050_I2C_BOARD_DETECT ++ select SYS_DISABLE_DCACHE_OPS ++ ++config TARGET_IOT2050_ADVANCED_A53 ++ bool "IOT2050 advanced running on A53" ++ select ARM64 ++ select SOC_K3_AM6 ++ select BOARD_LATE_INIT ++ imply IOT2050_I2C_BOARD_DETECT ++ select SYS_DISABLE_DCACHE_OPS ++ ++config TARGET_IOT2050_BASIC_R5 ++ bool "IOT2050 basic running on R5" ++ select CPU_V7R ++ select SYS_THUMB_BUILD ++ select SOC_K3_AM6 ++ select K3_LOAD_SYSFW ++ select K3_AM654_DDRSS ++ imply SYS_K3_SPL_ATF ++ imply IOT2050_I2C_BOARD_DETECT ++ ++config TARGET_IOT2050_ADVANCED_R5 ++ bool "IOT2050 advanced running on R5" ++ select CPU_V7R ++ select SYS_THUMB_BUILD ++ select SOC_K3_AM6 ++ select K3_LOAD_SYSFW ++ select K3_AM654_DDRSS ++ imply SYS_K3_SPL_ATF ++ imply IOT2050_I2C_BOARD_DETECT ++ ++endchoice ++ ++if (TARGET_IOT2050_BASIC_A53 || TARGET_IOT2050_ADVANCED_A53) ++ ++config SYS_BOARD ++ default "iot2050" ++ ++config SYS_VENDOR ++ default "siemens" ++ ++config SYS_CONFIG_NAME ++ default "iot2050" ++ ++source "board/siemens/common/Kconfig" ++ ++endif ++ ++if (TARGET_IOT2050_BASIC_R5 || TARGET_IOT2050_ADVANCED_R5) ++ ++config SYS_BOARD ++ default "iot2050" ++ ++config SYS_VENDOR ++ default "siemens" ++ ++config SYS_CONFIG_NAME ++ default "iot2050" ++ ++config SPL_LDSCRIPT ++ default "arch/arm/mach-omap2/u-boot-spl.lds" ++ ++source "board/siemens/common/Kconfig" ++ ++endif +diff --git a/board/siemens/iot2050/MAINTAINERS b/board/siemens/iot2050/MAINTAINERS +new file mode 100644 +index 0000000000..f36d6eeba2 +--- /dev/null ++++ b/board/siemens/iot2050/MAINTAINERS +@@ -0,0 +1,7 @@ ++IOT2050 BOARD ++M: Le Jin ++S: Maintained ++F: board/siemens/iot2050/ ++F: include/configs/iot2050.h ++F: configs/am65x_iot2050_a53_defconfig ++F: configs/am65x_iot2050_r5_defconfig +diff --git a/board/siemens/iot2050/Makefile b/board/siemens/iot2050/Makefile +new file mode 100644 +index 0000000000..fd8d9c2a80 +--- /dev/null ++++ b/board/siemens/iot2050/Makefile +@@ -0,0 +1,13 @@ ++# ++# Makefile for siemens IOT2050 board ++# (C) Copyright 2018 Siemens AG ++# Le Jin ++# ++# Based on: ++# U-Boot file: board/ti/am65x/Makefile ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += board.o ++obj-${CONFIG_IOT2050_I2C_BOARD_DETECT} += board_detect.o +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +new file mode 100644 +index 0000000000..2baa0eccfe +--- /dev/null ++++ b/board/siemens/iot2050/board.c +@@ -0,0 +1,152 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Board specific initialization for IOT2050 ++ * (C) Copyright 2018 Siemens AG ++ * Le Jin ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "board_detect.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#if defined(CONFIG_TARGET_IOT2050_ADVANCED_A53) || defined(CONFIG_TARGET_IOT2050_ADVANCED_R5) ++#define RAM_SIZE (0x80000000) ++#elif defined(CONFIG_TARGET_IOT2050_BASIC_A53) || defined(CONFIG_TARGET_IOT2050_BASIC_R5) ++#define RAM_SIZE (0x40000000) ++#else ++#error "Unknown iot2050 platfrom" ++#endif ++ ++int fdt_disable_node(void *blob, char *node_path); ++ ++int board_init(void) ++{ ++ return 0; ++} ++ ++int dram_init(void) ++{ ++#ifdef CONFIG_PHYS_64BIT ++ gd->ram_size = RAM_SIZE; ++#else ++ gd->ram_size = RAM_SIZE; ++#endif ++ ++ return 0; ++} ++ ++ulong board_get_usable_ram_top(ulong total_size) ++{ ++#ifdef CONFIG_PHYS_64BIT ++ /* Limit RAM used by U-Boot to the DDR low region */ ++ if (gd->ram_top > 0x100000000) ++ return 0x100000000; ++#endif ++ ++ return gd->ram_top; ++} ++ ++int dram_init_banksize(void) ++{ ++ /* Bank 0 declares the memory available in the DDR low region */ ++ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; ++ gd->bd->bi_dram[0].size = RAM_SIZE; ++ gd->ram_size = RAM_SIZE; ++ ++#ifdef CONFIG_PHYS_64BIT ++ /* Bank 1 declares the memory available in the DDR high region */ ++ gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1; ++ gd->bd->bi_dram[1].size = 0x00000000; ++ gd->ram_size = RAM_SIZE; ++#endif ++ ++ return 0; ++} ++ ++#ifdef CONFIG_SPL_LOAD_FIT ++int board_fit_config_name_match(const char *name) ++{ ++#if defined(CONFIG_TARGET_IOT2050_ADVANCED_A53) ++ if (!strcmp(name, "iot2050-advanced")) ++ return 0; ++#elif defined(CONFIG_TARGET_IOT2050_BASIC_A53) ++ if (!strcmp(name, "iot2050-basic")) ++ return 0; ++#endif ++#if defined(CONFIG_TARGET_IOT2050_ADVANCED_R5) ++ if (!strcmp(name, "iot2050-r5-advanced")) ++ return 0; ++#elif defined(CONFIG_TARGET_IOT2050_BASIC_R5) ++ if (!strcmp(name, "iot2050-r5-basic")) ++ return 0; ++#endif ++ ++ return -1; ++} ++#endif ++ ++int do_board_detect(void) ++{ ++ return 0; ++} ++ ++static void setup_board_eeprom_env(void) ++{ ++ do_board_detect(); ++ if(board_iot2050_was_eeprom_read()) ++ { ++ set_board_info_env_iot2050(); ++ } ++ else ++ { ++ pr_err("%s: Board info parsing error!\n", __func__); ++ } ++} ++ ++int board_late_init(void) ++{ ++ struct iot2050_eeprom *ep = IOT2050_EEPROM_DATA; ++ ++ setup_board_eeprom_env(); ++ /* ++ * The first MAC address for ethernet a.k.a. ethernet0 comes from ++ * efuse populated via the am654 gigabit eth switch subsystem driver. ++ * All the other ones are populated via EEPROM, hence continue with ++ * an index of 1. ++ */ ++ board_iot2050_set_ethaddr(1, ep->mac_addr_cnt); ++ return 0; ++} ++ ++#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) ++int ft_board_setup(void *blob, bd_t *bd) ++{ ++ int ret; ++ ++ ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000", "sram@70000000"); ++ if (ret) ++ printf("%s: fixing up msmc ram failed %d\n", __func__, ret); ++ ++#if defined(CONFIG_TI_SECURE_DEVICE) ++ /* Make HW RNG reserved for secure world use */ ++ ret = fdt_disable_node(blob, "/interconnect@100000/trng@4e10000"); ++ if (ret) ++ printf("%s: disabling TRGN failed %d\n", __func__, ret); ++#endif ++ ++ return ret; ++} ++#endif ++ ++void spl_board_init(void) ++{ ++} +diff --git a/board/siemens/iot2050/board_detect.c b/board/siemens/iot2050/board_detect.c +new file mode 100644 +index 0000000000..1b91c67b05 +--- /dev/null ++++ b/board/siemens/iot2050/board_detect.c +@@ -0,0 +1,155 @@ ++/* ++ * Library to support early IOT2050 EEPROM handling ++ * (C) Copyright 2019 Siemens AG ++ * Le Jin ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "board_detect.h" ++ ++bool __maybe_unused board_is(char *name_tag) ++{ ++ struct iot2050_eeprom *ep = IOT2050_EEPROM_DATA; ++ ++ if (ep->header != IOT2050_EEPROM_HEADER_MAGIC) ++ return false; ++ return !strncmp(ep->name, name_tag, IOT2050_EEPROM_HDR_NAME_LEN); ++} ++ ++char * __maybe_unused board_iot2050_get_name(void) ++{ ++ struct iot2050_eeprom *ep = IOT2050_EEPROM_DATA; ++ ++ if (ep->header != IOT2050_EEPROM_HEADER_MAGIC) ++ return NULL; ++ return ep->name; ++} ++ ++void __maybe_unused ++board_iot2050_get_eth_mac_addr(int index, ++ u8 mac_addr[IOT2050_EEPROM_MAC_ADDR_LEN]) ++{ ++ struct iot2050_eeprom *ep = IOT2050_EEPROM_DATA; ++ ++ if (ep->header != IOT2050_EEPROM_HEADER_MAGIC) ++ goto fail; ++ ++ if (index < 0 || index >= ep->mac_addr_cnt) ++ goto fail; ++ ++ memcpy(mac_addr, ep->mac_addr[index], IOT2050_EEPROM_MAC_ADDR_LEN); ++ return; ++fail: ++ memset(mac_addr, 0, IOT2050_EEPROM_MAC_ADDR_LEN); ++} ++ ++void __maybe_unused set_board_info_env_iot2050(void) ++{ ++ struct iot2050_eeprom *ep = IOT2050_EEPROM_DATA; ++ u8 need_update = 0; ++ u8 mac_cnt; ++ char env_name[16]; ++ char mac_str[32]; ++ ++ /* name */ ++ if(strcmp(env_get("board_name"), ep->name)) ++ { ++ env_set("board_name", ep->name); ++ need_update = 1; ++ } ++ if(strcmp(env_get("board"), ep->name)) ++ { ++ env_set("board", ep->name); ++ need_update = 1; ++ } ++ /* serial */ ++ if(strcmp(env_get("board_serial"), ep->serial)) ++ { ++ env_set("board_serial", ep->serial); ++ need_update = 1; ++ } ++ /* mlfb */ ++ if(strcmp(env_get("mlfb"), ep->mlfb)) ++ { ++ env_set("mlfb", ep->mlfb); ++ need_update = 1; ++ } ++ /* uuid */ ++ if(strcmp(env_get("board_uuid"), ep->uuid)) ++ { ++ env_set("board_uuid", ep->uuid); ++ need_update = 1; ++ } ++ /* a5e */ ++ if(strcmp(env_get("board_a5e"), ep->a5e)) ++ { ++ env_set("board_a5e", ep->a5e); ++ need_update = 1; ++ } ++ /* fw version */ ++ if(strcmp(env_get("fw_version"), PLAIN_VERSION)) ++ { ++ env_set("fw_version", PLAIN_VERSION); ++ need_update = 1; ++ } ++ /* MAC address */ ++ for(mac_cnt=0; mac_cntmac_addr_cnt; mac_cnt++) ++ { ++ snprintf(env_name, 16, "eth%daddr", mac_cnt+1); ++ char *mac = env_get(env_name); ++ snprintf(mac_str, 32, "%02x:%02x:%02x:%02x:%02x:%02x", ++ ep->mac_addr[mac_cnt][0], ++ ep->mac_addr[mac_cnt][1], ++ ep->mac_addr[mac_cnt][2], ++ ep->mac_addr[mac_cnt][3], ++ ep->mac_addr[mac_cnt][4], ++ ep->mac_addr[mac_cnt][5]); ++ if((mac == NULL) || strcmp(mac, mac_str)) ++ { ++ env_set(env_name, mac_str); ++ need_update = 1; ++ ++ /* Set the MAC address environment variable that ICSSG0-PRU eth0 will use in u-boot */ ++ if(0 == mac_cnt) ++ { ++ env_set("ethaddr", mac_str); ++ } ++ } ++ } ++ if(need_update) ++ { ++ env_save(); ++ } ++} ++ ++void board_iot2050_set_ethaddr(int index, int count) ++{ ++ u8 mac_addr[6]; ++ int i; ++ ++ for (i = 0; i < count; i++) { ++ board_iot2050_get_eth_mac_addr(i, mac_addr); ++ if (is_valid_ethaddr(mac_addr)) ++ eth_env_set_enetaddr_by_index("eth", i + index, ++ mac_addr); ++ } ++} ++ ++bool __maybe_unused board_iot2050_was_eeprom_read(void) ++{ ++ struct iot2050_eeprom *ep = IOT2050_EEPROM_DATA; ++ ++ if (ep->header == IOT2050_EEPROM_HEADER_MAGIC) ++ return true; ++ else ++ return false; ++} +diff --git a/board/siemens/iot2050/board_detect.h b/board/siemens/iot2050/board_detect.h +new file mode 100644 +index 0000000000..adf1e9cb82 +--- /dev/null ++++ b/board/siemens/iot2050/board_detect.h +@@ -0,0 +1,99 @@ ++/* ++ * Library to support early IOT2050 EEPROM handling ++ * (C) Copyright 2019 Siemens AG ++ * Le Jin ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __IOT2050_BOARD_DETECT_H ++#define __IOT2050_BOARD_DETECT_H ++ ++/* EEPROM MAGIC Header identifier */ ++#define IOT2050_EEPROM_HEADER_MAGIC 0xC0DEC0DE ++ ++/* IOT2050 EEPROM board info structure */ ++#define IOT2050_EEPROM_HDR_NAME_LEN 20 ++#define IOT2050_EEPROM_HDR_SERIAL_LEN 16 ++#define IOT2050_EEPROM_HDR_MLFB_LEN 18 ++#define IOT2050_EEPROM_HDR_UUID_LEN 32 ++#define IOT2050_EEPROM_HDR_A5E_LEN 18 ++ ++ ++/* IOT2050 EEPROM MAC info structure */ ++#define IOT2050_EEPROM_MAC_ADDR_LEN 6 ++#define IOT2050_EEPROM_HDR_NO_OF_MAC_ADDR 8 ++ ++struct iot2050_eeprom { ++ u32 header; ++ char name[IOT2050_EEPROM_HDR_NAME_LEN + 1]; ++ char serial[IOT2050_EEPROM_HDR_SERIAL_LEN + 1]; ++ char mlfb[IOT2050_EEPROM_HDR_MLFB_LEN + 1]; ++ char uuid[IOT2050_EEPROM_HDR_UUID_LEN + 1]; ++ char a5e[IOT2050_EEPROM_HDR_A5E_LEN + 1]; ++ u8 mac_addr_cnt; ++ char mac_addr[IOT2050_EEPROM_HDR_NO_OF_MAC_ADDR][IOT2050_EEPROM_MAC_ADDR_LEN]; ++}; ++ ++/* Use scratch SRAM even before DDR is initialzed */ ++#define IOT2050_EEPROM_DATA ((struct iot2050_eeprom *) \ ++ TI_SRAM_SCRATCH_BOARD_EEPROM_START) ++ ++ ++/** ++ * board_is() - Board detection logic for IOT2050 boards ++ * @name_tag: Tag used in eeprom for the board ++ * ++ * Return: false if board information does not match OR eeprom wasn't read. ++ * true otherwise ++ */ ++bool board_is(char *name_tag); ++ ++/** ++ * board_iot2050_get_name() - Get board name for IOT2050 ++ * ++ * Return: Empty string if eeprom wasn't read. ++ * Board name otherwise ++ */ ++char *board_iot2050_get_name(void); ++ ++/** ++ * board_iot2050_get_eth_mac_addr() - Get Ethernet MAC address from EEPROM MAC list ++ * @index: 0 based index within the list of MAC addresses ++ * @mac_addr: MAC address contained at the index is returned here ++ * ++ * Does not sanity check the mac_addr. Whatever is stored in EEPROM is returned. ++ */ ++void board_iot2050_get_eth_mac_addr(int index, u8 mac_addr[IOT2050_EEPROM_MAC_ADDR_LEN]); ++ ++/** ++ * set_board_info_env_iot2050() - Setup commonly used board information environment ++ * vars for iot2050 boards ++ * @name: Name of the board ++ * ++ * If name is NULL, default_name is used. ++ */ ++void set_board_info_env_iot2050(void); ++ ++/** ++ * board_iot2050_set_ethaddr- Sets the ethaddr environment from EEPROM ++ * @index: The first ethaddr environment variable to set ++ * @count: The number of MAC addresses to process ++ * ++ * EEPROM should be already read before calling this function. The EEPROM ++ * contains n dedicated MAC addresses. This function sets the ethaddr ++ * environment variable for all the available MAC addresses starting ++ * from ethaddr. ++ */ ++void board_iot2050_set_ethaddr(int index, int count); ++ ++/** ++ * board_iot2050_was_eeprom_read() - Check to see if the eeprom contents have been read ++ * ++ * This function is useful to determine if the eeprom has already been read and ++ * its contents have already been loaded into memory. It utiltzes the magic ++ * number that the header value is set to upon successful eeprom read. ++ */ ++bool board_iot2050_was_eeprom_read(void); ++ ++#endif /* __IOT2050_BOARD_DETECT_H */ +diff --git a/configs/am65x_iot2050_advanced_a53_defconfig b/configs/am65x_iot2050_advanced_a53_defconfig +new file mode 100644 +index 0000000000..177cbdd457 +--- /dev/null ++++ b/configs/am65x_iot2050_advanced_a53_defconfig +@@ -0,0 +1,159 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_K3=y ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x8000 ++CONFIG_SOC_K3_AM6=y ++CONFIG_TARGET_IOT2050_ADVANCED_A53=y ++CONFIG_SPL_MMC_SUPPORT=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_SPL_STACK_R_ADDR=0x82000000 ++CONFIG_SPL_FAT_SUPPORT=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DISTRO_DEFAULTS=y ++CONFIG_NR_DRAM_BANKS=2 ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-k3/make_fit.py" ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_USE_BOOTARGS=y ++CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=am65xevmboard" ++CONFIG_CONSOLE_MUX=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_SPL_BOARD_INIT=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 ++CONFIG_SPL_I2C_SUPPORT=y ++CONFIG_SPL_DM_MAILBOX=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_POWER_DOMAIN=y ++# CONFIG_SPL_SPI_FLASH_TINY is not set ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_SPL_YMODEM_SUPPORT=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_DFU=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_REMOTEPROC=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0" ++CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),256k(padding),-@8m(ospi.rootfs)" ++CONFIG_CMD_UBI=y ++# CONFIG_ISO_PARTITION is not set ++CONFIG_OF_CONTROL=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="iot2050-advanced" ++CONFIG_SPL_MULTI_DTB_FIT=y ++CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_DM=y ++CONFIG_SPL_DM=y ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_OF_TRANSLATE=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_TI_SCI=y ++CONFIG_DFU_MMC=y ++CONFIG_DFU_RAM=y ++CONFIG_DFU_SF=y ++CONFIG_DMA_CHANNELS=y ++CONFIG_TI_K3_NAVSS_UDMA=y ++CONFIG_USB_FUNCTION_FASTBOOT=y ++CONFIG_FASTBOOT_BUF_ADDR=0x82000000 ++CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y ++CONFIG_TI_SCI_PROTOCOL=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_PCA953X=y ++CONFIG_DM_I2C=y ++CONFIG_I2C_SET_DEFAULT_BUS_NUM=y ++CONFIG_SYS_I2C_OMAP24XX=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MAILBOX=y ++CONFIG_K3_SEC_PROXY=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_SPL_MMC_HS200_SUPPORT=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_ADMA=y ++CONFIG_SPL_MMC_SDHCI_ADMA=y ++CONFIG_MMC_SDHCI_AM654=y ++CONFIG_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_WINBOND=y ++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_PHY_TI=y ++CONFIG_PHY_FIXED=y ++CONFIG_DM_ETH=y ++CONFIG_E1000=y ++CONFIG_CMD_E1000=y ++CONFIG_TI_AM65_CPSW_NUSS=y ++CONFIG_TI_AM64_ICSSG_PRUETH=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_KEYSTONE=y ++CONFIG_PHY=y ++CONFIG_AM654_PHY=y ++CONFIG_OMAP_USB2_PHY=y ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++CONFIG_SPL_PINCTRL=y ++# CONFIG_SPL_PINCTRL_GENERIC is not set ++CONFIG_PINCTRL_SINGLE=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_TI_SCI_POWER_DOMAIN=y ++CONFIG_REMOTEPROC_TI_K3_R5F=y ++CONFIG_REMOTEPROC_TI_PRU=y ++CONFIG_DM_RESET=y ++CONFIG_RESET_TI_SCI=y ++CONFIG_DM_SERIAL=y ++CONFIG_SOC_TI=y ++CONFIG_TI_PRUSS=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_CADENCE_QSPI=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_TI_SCI=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_DM_USB_GADGET=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" ++CONFIG_USB_GADGET_VENDOR_NUM=0x0451 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x6162 ++CONFIG_FAT_WRITE=y ++CONFIG_HEXDUMP=y ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_TI_SECURE_DEVICE=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_BLOCK_CACHE=y ++CONFIG_SPL_BLOCK_CACHE=y +diff --git a/configs/am65x_iot2050_advanced_gp_a53_defconfig b/configs/am65x_iot2050_advanced_gp_a53_defconfig +new file mode 100644 +index 0000000000..b26e2cd8e5 +--- /dev/null ++++ b/configs/am65x_iot2050_advanced_gp_a53_defconfig +@@ -0,0 +1,158 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_K3=y ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x8000 ++CONFIG_SOC_K3_AM6=y ++CONFIG_TARGET_IOT2050_ADVANCED_A53=y ++CONFIG_SPL_MMC_SUPPORT=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_SPL_STACK_R_ADDR=0x82000000 ++CONFIG_SPL_FAT_SUPPORT=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DISTRO_DEFAULTS=y ++CONFIG_NR_DRAM_BANKS=2 ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-k3/make_fit.py" ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_USE_BOOTARGS=y ++CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=am65xevmboard" ++CONFIG_CONSOLE_MUX=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_SPL_BOARD_INIT=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 ++CONFIG_SPL_I2C_SUPPORT=y ++CONFIG_SPL_DM_MAILBOX=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_POWER_DOMAIN=y ++# CONFIG_SPL_SPI_FLASH_TINY is not set ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_SPL_YMODEM_SUPPORT=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_DFU=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_REMOTEPROC=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0" ++CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),256k(padding),-@8m(ospi.rootfs)" ++CONFIG_CMD_UBI=y ++# CONFIG_ISO_PARTITION is not set ++CONFIG_OF_CONTROL=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="iot2050-advanced" ++CONFIG_SPL_MULTI_DTB_FIT=y ++CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_DM=y ++CONFIG_SPL_DM=y ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_OF_TRANSLATE=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_TI_SCI=y ++CONFIG_DFU_MMC=y ++CONFIG_DFU_RAM=y ++CONFIG_DFU_SF=y ++CONFIG_DMA_CHANNELS=y ++CONFIG_TI_K3_NAVSS_UDMA=y ++CONFIG_USB_FUNCTION_FASTBOOT=y ++CONFIG_FASTBOOT_BUF_ADDR=0x82000000 ++CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y ++CONFIG_TI_SCI_PROTOCOL=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_PCA953X=y ++CONFIG_DM_I2C=y ++CONFIG_I2C_SET_DEFAULT_BUS_NUM=y ++CONFIG_SYS_I2C_OMAP24XX=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MAILBOX=y ++CONFIG_K3_SEC_PROXY=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_SPL_MMC_HS200_SUPPORT=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_ADMA=y ++CONFIG_SPL_MMC_SDHCI_ADMA=y ++CONFIG_MMC_SDHCI_AM654=y ++CONFIG_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_WINBOND=y ++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_PHY_TI=y ++CONFIG_PHY_FIXED=y ++CONFIG_DM_ETH=y ++CONFIG_E1000=y ++CONFIG_CMD_E1000=y ++CONFIG_TI_AM65_CPSW_NUSS=y ++CONFIG_TI_AM64_ICSSG_PRUETH=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_KEYSTONE=y ++CONFIG_PHY=y ++CONFIG_AM654_PHY=y ++CONFIG_OMAP_USB2_PHY=y ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++CONFIG_SPL_PINCTRL=y ++# CONFIG_SPL_PINCTRL_GENERIC is not set ++CONFIG_PINCTRL_SINGLE=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_TI_SCI_POWER_DOMAIN=y ++CONFIG_REMOTEPROC_TI_K3_R5F=y ++CONFIG_REMOTEPROC_TI_PRU=y ++CONFIG_BLOCK_CACHE=y ++CONFIG_SPL_BLOCK_CACHE=y ++CONFIG_DM_RESET=y ++CONFIG_RESET_TI_SCI=y ++CONFIG_DM_SERIAL=y ++CONFIG_SOC_TI=y ++CONFIG_TI_PRUSS=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_CADENCE_QSPI=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_TI_SCI=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_DM_USB_GADGET=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" ++CONFIG_USB_GADGET_VENDOR_NUM=0x0451 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x6162 ++CONFIG_FAT_WRITE=y ++CONFIG_HEXDUMP=y ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +diff --git a/configs/am65x_iot2050_advanced_gp_r5_defconfig b/configs/am65x_iot2050_advanced_gp_r5_defconfig +new file mode 100644 +index 0000000000..021900b5eb +--- /dev/null ++++ b/configs/am65x_iot2050_advanced_gp_r5_defconfig +@@ -0,0 +1,125 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_K3=y ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x55000 ++CONFIG_SOC_K3_AM6=y ++CONFIG_TARGET_IOT2050_ADVANCED_R5=y ++CONFIG_SPL_MMC_SUPPORT=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_SPL_STACK_R_ADDR=0x82000000 ++CONFIG_SPL_FAT_SUPPORT=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_USE_BOOTCOMMAND=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SPL_SKIP_CLEAR_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 ++CONFIG_SPL_I2C_SUPPORT=y ++CONFIG_SPL_DM_MAILBOX=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_POWER_SUPPORT=y ++CONFIG_SPL_POWER_DOMAIN=y ++CONFIG_SPL_RAM_SUPPORT=y ++CONFIG_SPL_RAM_DEVICE=y ++CONFIG_SPL_REMOTEPROC=y ++# CONFIG_SPL_SPI_FLASH_TINY is not set ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_SPL_YMODEM_SUPPORT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_ASKENV=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_REMOTEPROC=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_CMD_FAT=y ++CONFIG_OF_CONTROL=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="iot2050-r5-advanced" ++CONFIG_SPL_MULTI_DTB_FIT=y ++CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_DM=y ++CONFIG_SPL_DM=y ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_OF_TRANSLATE=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_TI_SCI=y ++CONFIG_DMA_CHANNELS=y ++CONFIG_TI_K3_NAVSS_UDMA=y ++CONFIG_TI_SCI_PROTOCOL=y ++CONFIG_DM_GPIO=y ++CONFIG_DA8XX_GPIO=y ++CONFIG_DM_I2C=y ++CONFIG_I2C_SET_DEFAULT_BUS_NUM=y ++CONFIG_SYS_I2C_OMAP24XX=y ++CONFIG_DM_MAILBOX=y ++CONFIG_K3_SEC_PROXY=y ++CONFIG_MISC=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_SPL_MMC_HS200_SUPPORT=y ++CONFIG_MMC_SDHCI=y ++CONFIG_SPL_MMC_SDHCI_ADMA=y ++CONFIG_MMC_SDHCI_AM654=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_WINBOND=y ++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++CONFIG_SPL_PINCTRL=y ++# CONFIG_SPL_PINCTRL_GENERIC is not set ++CONFIG_PINCTRL_SINGLE=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_TI_SCI_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_SPL_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_SPL_DM_REGULATOR_GPIO=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_LP873X=y ++CONFIG_SPL_PMIC_LP873X=y ++CONFIG_DM_REGULATOR_LP873X=y ++CONFIG_SPL_DM_REGULATOR_LP873X=y ++CONFIG_DM_REGULATOR_TPS62360=y ++CONFIG_K3_AVS0=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_BLOCK_CACHE=y ++CONFIG_SPL_BLOCK_CACHE=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_K3_SYSTEM_CONTROLLER=y ++CONFIG_REMOTEPROC_TI_K3_ARM64=y ++CONFIG_DM_RESET=y ++CONFIG_RESET_TI_SCI=y ++CONFIG_DM_SERIAL=y ++CONFIG_SOC_TI=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_CADENCE_QSPI=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_TI_SCI=y ++CONFIG_TIMER=y ++CONFIG_SPL_TIMER=y ++CONFIG_OMAP_TIMER=y ++CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 ++CONFIG_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +diff --git a/configs/am65x_iot2050_advanced_r5_defconfig b/configs/am65x_iot2050_advanced_r5_defconfig +new file mode 100644 +index 0000000000..f71b13d7ee +--- /dev/null ++++ b/configs/am65x_iot2050_advanced_r5_defconfig +@@ -0,0 +1,122 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_K3=y ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x55000 ++CONFIG_SOC_K3_AM6=y ++CONFIG_TARGET_IOT2050_ADVANCED_R5=y ++CONFIG_SPL_MMC_SUPPORT=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_SPL_STACK_R_ADDR=0x82000000 ++CONFIG_SPL_FAT_SUPPORT=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_USE_BOOTCOMMAND=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SPL_SKIP_CLEAR_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 ++CONFIG_SPL_I2C_SUPPORT=y ++CONFIG_SPL_DM_MAILBOX=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_POWER_SUPPORT=y ++CONFIG_SPL_POWER_DOMAIN=y ++CONFIG_SPL_RAM_SUPPORT=y ++CONFIG_SPL_RAM_DEVICE=y ++CONFIG_SPL_REMOTEPROC=y ++# CONFIG_SPL_SPI_FLASH_TINY is not set ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_SPL_YMODEM_SUPPORT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_ASKENV=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_REMOTEPROC=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_CMD_FAT=y ++CONFIG_OF_CONTROL=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="iot2050-r5-advanced" ++CONFIG_SPL_MULTI_DTB_FIT=y ++CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_DM=y ++CONFIG_SPL_DM=y ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_OF_TRANSLATE=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_TI_SCI=y ++CONFIG_TI_SCI_PROTOCOL=y ++CONFIG_DM_GPIO=y ++CONFIG_DA8XX_GPIO=y ++CONFIG_DM_I2C=y ++CONFIG_I2C_SET_DEFAULT_BUS_NUM=y ++CONFIG_SYS_I2C_OMAP24XX=y ++CONFIG_DM_MAILBOX=y ++CONFIG_K3_SEC_PROXY=y ++CONFIG_MISC=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_SPL_MMC_HS200_SUPPORT=y ++CONFIG_MMC_SDHCI=y ++CONFIG_SPL_MMC_SDHCI_ADMA=y ++CONFIG_MMC_SDHCI_AM654=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_WINBOND=y ++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++CONFIG_SPL_PINCTRL=y ++# CONFIG_SPL_PINCTRL_GENERIC is not set ++CONFIG_PINCTRL_SINGLE=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_TI_SCI_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_SPL_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_SPL_DM_REGULATOR_GPIO=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_LP873X=y ++CONFIG_SPL_PMIC_LP873X=y ++CONFIG_DM_REGULATOR_LP873X=y ++CONFIG_SPL_DM_REGULATOR_LP873X=y ++CONFIG_DM_REGULATOR_TPS62360=y ++CONFIG_K3_AVS0=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_K3_SYSTEM_CONTROLLER=y ++CONFIG_REMOTEPROC_TI_K3_ARM64=y ++CONFIG_DM_RESET=y ++CONFIG_RESET_TI_SCI=y ++CONFIG_DM_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_CADENCE_QSPI=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_TI_SCI=y ++CONFIG_TIMER=y ++CONFIG_SPL_TIMER=y ++CONFIG_OMAP_TIMER=y ++CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_TI_SECURE_DEVICE=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_BLOCK_CACHE=y ++CONFIG_SPL_BLOCK_CACHE=y +diff --git a/configs/am65x_iot2050_basic_a53_defconfig b/configs/am65x_iot2050_basic_a53_defconfig +new file mode 100644 +index 0000000000..c6657eb03c +--- /dev/null ++++ b/configs/am65x_iot2050_basic_a53_defconfig +@@ -0,0 +1,158 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_K3=y ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x8000 ++CONFIG_SOC_K3_AM6=y ++CONFIG_TARGET_IOT2050_BASIC_A53=y ++CONFIG_SPL_MMC_SUPPORT=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_SPL_STACK_R_ADDR=0x82000000 ++CONFIG_SPL_FAT_SUPPORT=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DISTRO_DEFAULTS=y ++CONFIG_NR_DRAM_BANKS=2 ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-k3/make_fit.py" ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_USE_BOOTARGS=y ++CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=am65xevmboard" ++CONFIG_CONSOLE_MUX=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_SPL_BOARD_INIT=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 ++CONFIG_SPL_I2C_SUPPORT=y ++CONFIG_SPL_DM_MAILBOX=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_POWER_DOMAIN=y ++# CONFIG_SPL_SPI_FLASH_TINY is not set ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_SPL_YMODEM_SUPPORT=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_DFU=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_REMOTEPROC=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0" ++CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),256k(padding),-@8m(ospi.rootfs)" ++CONFIG_CMD_UBI=y ++# CONFIG_ISO_PARTITION is not set ++CONFIG_OF_CONTROL=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="iot2050-basic" ++CONFIG_SPL_MULTI_DTB_FIT=y ++CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_DM=y ++CONFIG_SPL_DM=y ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_OF_TRANSLATE=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_TI_SCI=y ++CONFIG_DFU_MMC=y ++CONFIG_DFU_RAM=y ++CONFIG_DFU_SF=y ++CONFIG_DMA_CHANNELS=y ++CONFIG_TI_K3_NAVSS_UDMA=y ++CONFIG_USB_FUNCTION_FASTBOOT=y ++CONFIG_FASTBOOT_BUF_ADDR=0x82000000 ++CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y ++CONFIG_TI_SCI_PROTOCOL=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_PCA953X=y ++CONFIG_DM_I2C=y ++CONFIG_I2C_SET_DEFAULT_BUS_NUM=y ++CONFIG_SYS_I2C_OMAP24XX=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MAILBOX=y ++CONFIG_K3_SEC_PROXY=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_SPL_MMC_HS200_SUPPORT=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_ADMA=y ++CONFIG_SPL_MMC_SDHCI_ADMA=y ++CONFIG_MMC_SDHCI_AM654=y ++CONFIG_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_WINBOND=y ++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_PHY_TI=y ++CONFIG_PHY_FIXED=y ++CONFIG_DM_ETH=y ++CONFIG_E1000=y ++CONFIG_CMD_E1000=y ++CONFIG_TI_AM65_CPSW_NUSS=y ++CONFIG_TI_AM64_ICSSG_PRUETH=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_PCI_KEYSTONE=y ++CONFIG_PHY=y ++CONFIG_AM654_PHY=y ++CONFIG_OMAP_USB2_PHY=y ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++CONFIG_SPL_PINCTRL=y ++# CONFIG_SPL_PINCTRL_GENERIC is not set ++CONFIG_PINCTRL_SINGLE=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_TI_SCI_POWER_DOMAIN=y ++CONFIG_REMOTEPROC_TI_K3_R5F=y ++CONFIG_REMOTEPROC_TI_PRU=y ++CONFIG_BLOCK_CACHE=y ++CONFIG_SPL_BLOCK_CACHE=y ++CONFIG_DM_RESET=y ++CONFIG_RESET_TI_SCI=y ++CONFIG_DM_SERIAL=y ++CONFIG_SOC_TI=y ++CONFIG_TI_PRUSS=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_CADENCE_QSPI=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_TI_SCI=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_DM_USB_GADGET=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" ++CONFIG_USB_GADGET_VENDOR_NUM=0x0451 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x6162 ++CONFIG_FAT_WRITE=y ++CONFIG_HEXDUMP=y ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +diff --git a/configs/am65x_iot2050_basic_r5_defconfig b/configs/am65x_iot2050_basic_r5_defconfig +new file mode 100644 +index 0000000000..f5c12f746f +--- /dev/null ++++ b/configs/am65x_iot2050_basic_r5_defconfig +@@ -0,0 +1,125 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_K3=y ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x55000 ++CONFIG_SOC_K3_AM6=y ++CONFIG_TARGET_IOT2050_BASIC_R5=y ++CONFIG_SPL_MMC_SUPPORT=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_SPL_STACK_R_ADDR=0x82000000 ++CONFIG_SPL_FAT_SUPPORT=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_USE_BOOTCOMMAND=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SPL_SKIP_CLEAR_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 ++CONFIG_SPL_I2C_SUPPORT=y ++CONFIG_SPL_DM_MAILBOX=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_POWER_SUPPORT=y ++CONFIG_SPL_POWER_DOMAIN=y ++CONFIG_SPL_RAM_SUPPORT=y ++CONFIG_SPL_RAM_DEVICE=y ++CONFIG_SPL_REMOTEPROC=y ++# CONFIG_SPL_SPI_FLASH_TINY is not set ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_SPL_YMODEM_SUPPORT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_ASKENV=y ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_REMOTEPROC=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_CMD_FAT=y ++CONFIG_OF_CONTROL=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="iot2050-r5-basic" ++CONFIG_SPL_MULTI_DTB_FIT=y ++CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_DM=y ++CONFIG_SPL_DM=y ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_OF_TRANSLATE=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_TI_SCI=y ++CONFIG_DMA_CHANNELS=y ++CONFIG_TI_K3_NAVSS_UDMA=y ++CONFIG_TI_SCI_PROTOCOL=y ++CONFIG_DM_GPIO=y ++CONFIG_DA8XX_GPIO=y ++CONFIG_DM_I2C=y ++CONFIG_I2C_SET_DEFAULT_BUS_NUM=y ++CONFIG_SYS_I2C_OMAP24XX=y ++CONFIG_DM_MAILBOX=y ++CONFIG_K3_SEC_PROXY=y ++CONFIG_MISC=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_SPL_MMC_HS200_SUPPORT=y ++CONFIG_MMC_SDHCI=y ++CONFIG_SPL_MMC_SDHCI_ADMA=y ++CONFIG_MMC_SDHCI_AM654=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_WINBOND=y ++# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_GENERIC is not set ++CONFIG_SPL_PINCTRL=y ++# CONFIG_SPL_PINCTRL_GENERIC is not set ++CONFIG_PINCTRL_SINGLE=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_TI_SCI_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_SPL_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_SPL_DM_REGULATOR_GPIO=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_LP873X=y ++CONFIG_SPL_PMIC_LP873X=y ++CONFIG_DM_REGULATOR_LP873X=y ++CONFIG_SPL_DM_REGULATOR_LP873X=y ++CONFIG_DM_REGULATOR_TPS62360=y ++CONFIG_K3_AVS0=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_BLOCK_CACHE=y ++CONFIG_SPL_BLOCK_CACHE=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_K3_SYSTEM_CONTROLLER=y ++CONFIG_REMOTEPROC_TI_K3_ARM64=y ++CONFIG_DM_RESET=y ++CONFIG_RESET_TI_SCI=y ++CONFIG_DM_SERIAL=y ++CONFIG_SOC_TI=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_CADENCE_QSPI=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_TI_SCI=y ++CONFIG_TIMER=y ++CONFIG_SPL_TIMER=y ++CONFIG_OMAP_TIMER=y ++CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 ++CONFIG_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c +index 7957f678a1..119cf3a5dd 100644 +--- a/drivers/ram/k3-am654-ddrss.c ++++ b/drivers/ram/k3-am654-ddrss.c +@@ -138,11 +138,14 @@ static void am654_ddrss_ctrl_configuration(struct am654_ddrss_desc *ddrss) + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG3, tmg->ddrctl_dramtmg3); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG4, tmg->ddrctl_dramtmg4); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG5, tmg->ddrctl_dramtmg5); ++ ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG6, tmg->ddrctl_dramtmg6); ++ ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG7, tmg->ddrctl_dramtmg7); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG8, tmg->ddrctl_dramtmg8); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG9, tmg->ddrctl_dramtmg9); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG11, tmg->ddrctl_dramtmg11); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG12, tmg->ddrctl_dramtmg12); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG13, tmg->ddrctl_dramtmg13); ++ ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG14, tmg->ddrctl_dramtmg14); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG15, tmg->ddrctl_dramtmg15); + ddrss_ctl_writel(DDRSS_DDRCTL_DRAMTMG17, tmg->ddrctl_dramtmg17); + +@@ -166,6 +169,11 @@ static void am654_ddrss_ctrl_configuration(struct am654_ddrss_desc *ddrss) + ddrss_ctl_writel(DDRSS_DDRCTL_ADDRMAP10, map->ddrctl_addrmap10); + ddrss_ctl_writel(DDRSS_DDRCTL_ADDRMAP11, map->ddrctl_addrmap11); + ++ ddrss_ctl_writel(DDRSS_DDRCTL_DQMAP0, map->ddrctl_dqmap0); ++ ddrss_ctl_writel(DDRSS_DDRCTL_DQMAP1, map->ddrctl_dqmap1); ++ ddrss_ctl_writel(DDRSS_DDRCTL_DQMAP4, map->ddrctl_dqmap4); ++ ddrss_ctl_writel(DDRSS_DDRCTL_DQMAP5, map->ddrctl_dqmap5); ++ + ddrss_ctl_writel(DDRSS_DDRCTL_ODTCFG, reg->ddrctl_odtcfg); + ddrss_ctl_writel(DDRSS_DDRCTL_ODTMAP, reg->ddrctl_odtmap); + +@@ -203,12 +211,13 @@ static void am654_ddrss_phy_configuration(struct am654_ddrss_desc *ddrss) + struct ddrss_ddrphy_zq_params *zq = &ddrss->params.phy_zq; + + debug("%s: DDR phy register configuration started\n", __func__); +- ++ ddrss_phy_writel(DDRSS_DDRPHY_PGCR0, cfg->ddrphy_pgcr0); + ddrss_phy_writel(DDRSS_DDRPHY_PGCR1, cfg->ddrphy_pgcr1); + ddrss_phy_writel(DDRSS_DDRPHY_PGCR2, cfg->ddrphy_pgcr2); + ddrss_phy_writel(DDRSS_DDRPHY_PGCR3, cfg->ddrphy_pgcr3); + ddrss_phy_writel(DDRSS_DDRPHY_PGCR6, cfg->ddrphy_pgcr6); + ++ ddrss_phy_writel(DDRSS_DDRPHY_PTR2, tmg->ddrphy_ptr2); + ddrss_phy_writel(DDRSS_DDRPHY_PTR3, tmg->ddrphy_ptr3); + ddrss_phy_writel(DDRSS_DDRPHY_PTR4, tmg->ddrphy_ptr4); + ddrss_phy_writel(DDRSS_DDRPHY_PTR5, tmg->ddrphy_ptr5); +@@ -240,6 +249,11 @@ static void am654_ddrss_phy_configuration(struct am654_ddrss_desc *ddrss) + ddrss_phy_writel(DDRSS_DDRPHY_MR4, ctrl->ddrphy_mr4); + ddrss_phy_writel(DDRSS_DDRPHY_MR5, ctrl->ddrphy_mr5); + ddrss_phy_writel(DDRSS_DDRPHY_MR6, ctrl->ddrphy_mr6); ++ ddrss_phy_writel(DDRSS_DDRPHY_MR11, ctrl->ddrphy_mr11); ++ ddrss_phy_writel(DDRSS_DDRPHY_MR12, ctrl->ddrphy_mr12); ++ ddrss_phy_writel(DDRSS_DDRPHY_MR13, ctrl->ddrphy_mr13); ++ ddrss_phy_writel(DDRSS_DDRPHY_MR14, ctrl->ddrphy_mr14); ++ ddrss_phy_writel(DDRSS_DDRPHY_MR22, ctrl->ddrphy_mr22); + + ddrss_phy_writel(DDRSS_DDRPHY_VTCR0, ctrl->ddrphy_vtcr0); + +@@ -250,9 +264,20 @@ static void am654_ddrss_phy_configuration(struct am654_ddrss_desc *ddrss) + ddrss_phy_writel(DDRSS_DDRPHY_DTCR0, ctrl->ddrphy_dtcr0); + ddrss_phy_writel(DDRSS_DDRPHY_DTCR1, ctrl->ddrphy_dtcr1); + ++ ddrss_phy_writel(DDRSS_DDRPHY_ACIOCR3, ioctl->ddrphy_aciocr3); + ddrss_phy_writel(DDRSS_DDRPHY_ACIOCR5, ioctl->ddrphy_aciocr5); + ddrss_phy_writel(DDRSS_DDRPHY_IOVCR0, ioctl->ddrphy_iovcr0); + ++ ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR0, cfg->ddrphy_dx2gcr0); ++ ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR1, cfg->ddrphy_dx2gcr1); ++ ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR2, cfg->ddrphy_dx2gcr2); ++ ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR3, cfg->ddrphy_dx2gcr3); ++ ++ ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR0, cfg->ddrphy_dx3gcr0); ++ ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR1, cfg->ddrphy_dx3gcr1); ++ ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR2, cfg->ddrphy_dx3gcr2); ++ ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR3, cfg->ddrphy_dx3gcr3); ++ + ddrss_phy_writel(DDRSS_DDRPHY_DX4GCR0, cfg->ddrphy_dx4gcr0); + ddrss_phy_writel(DDRSS_DDRPHY_DX4GCR1, cfg->ddrphy_dx4gcr1); + ddrss_phy_writel(DDRSS_DDRPHY_DX4GCR2, cfg->ddrphy_dx4gcr2); +@@ -262,12 +287,14 @@ static void am654_ddrss_phy_configuration(struct am654_ddrss_desc *ddrss) + ddrss_phy_writel(DDRSS_DDRPHY_DX1GCR4, cfg->ddrphy_dx1gcr4); + ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR4, cfg->ddrphy_dx2gcr4); + ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR4, cfg->ddrphy_dx3gcr4); ++ ddrss_phy_writel(DDRSS_DDRPHY_DX4GCR4, cfg->ddrphy_dx4gcr4); + + ddrss_phy_writel(DDRSS_DDRPHY_PGCR5, cfg->ddrphy_pgcr5); + ddrss_phy_writel(DDRSS_DDRPHY_DX0GCR5, cfg->ddrphy_dx0gcr5); + ddrss_phy_writel(DDRSS_DDRPHY_DX1GCR5, cfg->ddrphy_dx1gcr5); + ddrss_phy_writel(DDRSS_DDRPHY_DX2GCR5, cfg->ddrphy_dx2gcr5); + ddrss_phy_writel(DDRSS_DDRPHY_DX3GCR5, cfg->ddrphy_dx3gcr5); ++ ddrss_phy_writel(DDRSS_DDRPHY_DX4GCR5, cfg->ddrphy_dx4gcr5); + + ddrss_phy_writel(DDRSS_DDRPHY_RANKIDR, DDRSS_DDRPHY_RANKIDR_RANK0); + +diff --git a/drivers/ram/k3-am654-ddrss.h b/drivers/ram/k3-am654-ddrss.h +index 78d73cd9fc..49d10cb0ed 100644 +--- a/drivers/ram/k3-am654-ddrss.h ++++ b/drivers/ram/k3-am654-ddrss.h +@@ -1147,6 +1147,7 @@ struct ddrss_ddrphy_ctrl_params { + }; + + struct ddrss_ddrphy_ioctl_params { ++ u32 ddrphy_aciocr3; + u32 ddrphy_aciocr5; + u32 ddrphy_iovcr0; + }; +diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h +new file mode 100644 +index 0000000000..81dbf39537 +--- /dev/null ++++ b/include/configs/iot2050.h +@@ -0,0 +1,146 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Configuration header file for IOT2050 ++ * (C) Copyright 2018 Siemens AG ++ * Le Jin ++ */ ++ ++#ifndef __CONFIG_IOT2050_H ++#define __CONFIG_IOT2050_H ++ ++#include ++#include ++#include ++ ++#define CONFIG_ENV_SIZE (128 << 10) ++ ++/* DDR Configuration */ ++#define CONFIG_SYS_SDRAM_BASE1 0x880000000 ++ ++/* SPL Loader Configuration */ ++#if defined(CONFIG_TARGET_IOT2050_BASIC_A53) || defined(CONFIG_TARGET_IOT2050_ADVANCED_A53) ++#define CONFIG_SPL_TEXT_BASE 0x80080000 ++#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \ ++ CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE) ++#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x280000 ++#else ++#define CONFIG_SPL_TEXT_BASE 0x41c00000 ++/* ++ * Maximum size in memory allocated to the SPL BSS. Keep it as tight as ++ * possible (to allow the build to go through), as this directly affects ++ * our memory footprint. The less we use for BSS the more we have available ++ * for everything else. ++ */ ++#define CONFIG_SPL_BSS_MAX_SIZE 0x5000 ++/* ++ * Link BSS to be within SPL in a dedicated region located near the top of ++ * the MCU SRAM, this way making it available also before relocation. Note ++ * that we are not using the actual top of the MCU SRAM as there is a memory ++ * location filled in by the boot ROM that we want to read out without any ++ * interference from the C context. ++ */ ++#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\ ++ CONFIG_SPL_BSS_MAX_SIZE) ++/* Set the stack right below the SPL BSS section */ ++#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR ++/* Configure R5 SPL post-relocation malloc pool in DDR */ ++#define CONFIG_SYS_SPL_MALLOC_START 0x84000000 ++#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M ++#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000 ++#endif ++ ++#ifdef CONFIG_SYS_K3_SPL_ATF ++#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" ++#endif ++ ++#ifndef CONFIG_CPU_V7R ++#define CONFIG_SKIP_LOWLEVEL_INIT ++#endif ++ ++#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE ++ ++#define CONFIG_SYS_BOOTM_LEN SZ_64M ++ ++#define PARTS_DEFAULT \ ++ /* Linux partitions */ \ ++ "uuid_disk=${uuid_gpt_disk};" \ ++ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" ++ ++#define EXTRA_ENV_UUID_VERIFY \ ++ "uuid_devices=mmc1 mmc0 usb0 usb1 usb2\0" \ ++ "uuid_get_mmc=part uuid mmc ${devno}:1 uuid_tmp\0" \ ++ "uuid_get_mmc0=setenv devno 0; run uuid_get_mmc\0" \ ++ "uuid_get_mmc1=setenv devno 1; run uuid_get_mmc\0" \ ++ "uuid_get_usb=usb start; part uuid usb ${devno}:1 uuid_tmp\0" \ ++ "uuid_get_usb0=setenv devno 0; run uuid_get_usb\0" \ ++ "uuid_get_usb1=setenv devno 1; run uuid_get_usb\0" \ ++ "uuid_get_usb2=setenv devno 2; run uuid_get_usb\0" \ ++ "uuid_list=env delete uuids; for device in ${uuid_devices}; do if test ${target} != ${device}; then env delete uuid_tmp; run uuid_get_${device}; setenv uuids ${uuids} ${uuid_tmp}; fi; done\0" \ ++ "uuid_compare=for uuid_other in ${uuids}; do if test ${uuid_conflict} = no && env exists uuid_get && test ${uuid_other} = ${uuid_get}; then echo \"** ERROR: uuid conflicts: \"${uuid}\" !!! **\"; setenv uuid_conflict yes; fi; done\0" \ ++ "uuid_verify=setenv uuid_conflict no; setenv uuid_break no; for target in ${boot_targets}; do if test ${uuid_break} = no; then env delete uuid_tmp; run uuid_get_${target}; setenv uuid_get ${uuid_tmp}; run uuid_list; run uuid_compare; if test ${target} = ${devtype}${devnum}; then setenv uuid_break yes; fi; fi; done\0" ++ ++/* U-Boot general configuration */ ++#define EXTRA_ENV_IOT2050_BOARD_SETTINGS \ ++ "loadaddr=0x80080000\0" \ ++ "scriptaddr=0x83000000\0" \ ++ "kernel_addr_r=0x80080000\0" \ ++ "ramdisk_addr_r=0x81000000\0" \ ++ "fdt_addr_r=0x82000000\0" \ ++ "overlay_addr_r=0x83000000\0" \ ++ "start_icssg0=rproc start 2; rproc start 3\0" \ ++ "load_icssg0_pru0_fw=sf read 0x89000000 0x7c0000 0x8000; rproc load 2 0x89000000 0x8000\0" \ ++ "load_icssg0_rtu0_fw=sf read 0x8a000000 0x7e0000 0x8000; rproc load 3 0x8a000000 0x8000\0" \ ++ "init_icssg0=rproc init; sf probe; run load_icssg0_pru0_fw; run load_icssg0_rtu0_fw\0" \ ++ "usb_pgood_delay=900\0" ++ ++#ifndef CONFIG_SPL_BUILD ++#if defined(CONFIG_TARGET_IOT2050_BASIC_A53) ++#define BOOT_TARGET_DEVICES(func) \ ++ func(MMC, mmc, 0) \ ++ func(MMC, usb, 0) \ ++ func(MMC, usb, 1) \ ++ func(MMC, usb, 2) ++#else ++#define BOOT_TARGET_DEVICES(func) \ ++ func(MMC, mmc, 1) \ ++ func(MMC, mmc, 0) \ ++ func(MMC, usb, 0) \ ++ func(MMC, usb, 1) \ ++ func(MMC, usb, 2) ++#endif ++#include ++ ++/* Incorporate settings into the U-Boot environment */ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ BOOTENV \ ++ EXTRA_ENV_IOT2050_BOARD_SETTINGS \ ++ EXTRA_ENV_UUID_VERIFY ++#endif ++ ++#define CONFIG_SUPPORT_EMMC_BOOT ++ ++/* MMC ENV related defines */ ++#ifdef CONFIG_ENV_IS_IN_MMC ++#define CONFIG_SYS_MMC_ENV_DEV 0 ++#define CONFIG_SYS_MMC_ENV_PART 1 ++#define CONFIG_ENV_SIZE (128 << 10) ++#define CONFIG_ENV_OFFSET 0x680000 ++#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) ++#define CONFIG_SYS_REDUNDAND_ENVIRONMENT ++#endif ++ ++/* Non Kconfig SF configs */ ++#define CONFIG_SF_DEFAULT_SPEED 0 ++#define CONFIG_SF_DEFAULT_MODE 0 ++#ifdef CONFIG_ENV_IS_IN_SPI_FLASH ++#define CONFIG_ENV_OFFSET 0x680000 ++#define CONFIG_ENV_SECT_SIZE 0x20000 ++#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ ++ CONFIG_ENV_SECT_SIZE) ++#define CONFIG_SYS_REDUNDAND_ENVIRONMENT ++#endif ++ ++/* Now for the remaining common defines */ ++#include ++ ++#endif /* __CONFIG_IOT2050_H */ +diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh +index b6d055f6f5..ec8e5b9f8d 100755 +--- a/tools/k3_gen_x509_cert.sh ++++ b/tools/k3_gen_x509_cert.sh +@@ -79,7 +79,7 @@ cat << 'EOF' > x509-template.txt + + [ debug ] + debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000 +- debugType = INTEGER:4 ++ debugType = INTEGER:0 + coreDbgEn = INTEGER:0 + coreDbgSecEn = INTEGER:0 + EOF +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0002-am654x-frequency-update-for-both-arm-clusters-and-bu.patch b/recipes-bsp/u-boot/files/0002-am654x-frequency-update-for-both-arm-clusters-and-bu.patch new file mode 100644 index 000000000..a9d46a800 --- /dev/null +++ b/recipes-bsp/u-boot/files/0002-am654x-frequency-update-for-both-arm-clusters-and-bu.patch @@ -0,0 +1,76 @@ +From 8e4decfe354a5f8d21d8b00edaeb33e972065579 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Tue, 12 Nov 2019 18:26:14 +0800 +Subject: [PATCH 02/15] am654x: frequency update for both arm clusters and bump + up to 1GHz + +Signed-off-by: le.jin +--- + arch/arm/dts/iot2050-r5-common.dtsi | 18 +++++++++++++++++- + arch/arm/mach-k3/common.c | 8 ++++++++ + 2 files changed, 25 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/dts/iot2050-r5-common.dtsi b/arch/arm/dts/iot2050-r5-common.dtsi +index 411a48dc4d..cf3a1f2ed4 100644 +--- a/arch/arm/dts/iot2050-r5-common.dtsi ++++ b/arch/arm/dts/iot2050-r5-common.dtsi +@@ -17,6 +17,7 @@ + aliases { + remoteproc0 = &sysctrler; + remoteproc1 = &a53_0; ++ remoteproc2 = &a53_2; + }; + + a53_0: a53@0 { +@@ -26,13 +27,28 @@ + <&k3_pds 202 TI_SCI_PD_SHARED>; + resets = <&k3_reset 202 0>; + assigned-clocks = <&k3_clks 202 0>; +- assigned-clock-rates = <800000000>; ++ assigned-clock-rates = <1000000000>; + ti,sci = <&dmsc>; + ti,sci-proc-id = <32>; + ti,sci-host-id = <10>; + u-boot,dm-spl; + }; + ++ a53_2: a53@2 { ++ compatible = "ti,am654-rproc"; ++ reg = <0x0 0x00a90000 0x0 0x10>; ++ power-domains = <&k3_pds 61 TI_SCI_PD_SHARED>, ++ <&k3_pds 204 TI_SCI_PD_SHARED>; ++ resets = <&k3_reset 204 0>; ++ assigned-clocks = <&k3_clks 204 0>; ++ assigned-clock-rates = <1000000000>; ++ ti,sci = <&dmsc>; ++ ti,sci-proc-id = <34>; ++ ti,sci-host-id = <12>; ++ u-boot,dm-spl; ++ }; ++ ++ + vtt_supply: vtt_supply { + compatible = "regulator-gpio"; + regulator-name = "vtt"; +diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c +index 08d3e5ed37..b4bc2d3eea 100644 +--- a/arch/arm/mach-k3/common.c ++++ b/arch/arm/mach-k3/common.c +@@ -166,6 +166,14 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + if (ret) + panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret); + ++ /* ++ * Both cluster should be initialized (eg. frequency) ++ */ ++ ret = rproc_dev_init(2); ++ if (ret) ++ panic("%s: ATF failed to initialize on rproc (%d)\n", __func__, ++ ret); ++ + if (!(size > 0 && valid_elf_image(loadaddr))) { + debug("Shutting down...\n"); + release_resources_for_core_shutdown(); +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0003-iot2050-turn-on-red-led-when-something-goes-wrong.patch b/recipes-bsp/u-boot/files/0003-iot2050-turn-on-red-led-when-something-goes-wrong.patch new file mode 100644 index 000000000..0b4ccab46 --- /dev/null +++ b/recipes-bsp/u-boot/files/0003-iot2050-turn-on-red-led-when-something-goes-wrong.patch @@ -0,0 +1,312 @@ +From b10414684b81c4750614d240d1b0d86b9fbc6cab Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Mon, 18 Nov 2019 09:58:29 +0800 +Subject: [PATCH 03/15] iot2050:turn on red led when something goes wrong + +Signed-off-by: le.jin +--- + arch/arm/dts/iot2050-common.dtsi | 23 ++++++ + arch/arm/dts/iot2050-r5-common.dtsi | 12 --- + arch/arm/dts/iot2050-u-boot.dtsi | 11 +++ + common/main.c | 22 ++++- + configs/am65x_iot2050_advanced_a53_defconfig | 3 + + .../am65x_iot2050_advanced_gp_a53_defconfig | 3 + + configs/am65x_iot2050_basic_a53_defconfig | 3 + + lib/hang.c | 80 +++++++++++++++++++ + 8 files changed, 144 insertions(+), 13 deletions(-) + +diff --git a/arch/arm/dts/iot2050-common.dtsi b/arch/arm/dts/iot2050-common.dtsi +index 2391a12c88..9769818d69 100644 +--- a/arch/arm/dts/iot2050-common.dtsi ++++ b/arch/arm/dts/iot2050-common.dtsi +@@ -13,6 +13,22 @@ + remoteproc0 = &mcu_r5fss0_core0; + remoteproc1 = &mcu_r5fss0_core1; + }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_pins_default>; ++ ++ status-led-red { ++ gpios = <&wkup_gpio0 32 GPIO_ACTIVE_HIGH>; ++ label = "redled"; ++ }; ++ ++ status-led-green { ++ gpios = <&wkup_gpio0 24 GPIO_ACTIVE_HIGH>; ++ label = "greenled"; ++ }; ++ }; + }; + + &wkup_pmx0 { +@@ -38,6 +54,13 @@ + AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */ + >; + }; ++ led_pins_default:led_pins_default{ ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0050, PIN_OUTPUT, 7) /* (N2) WKUP_GPIO0_32 STATUS RED LED */ ++ AM65X_WKUP_IOPAD(0x0028, PIN_OUTPUT, 7) /* (R3) WKUP_GPIO0_22 USER GREEN LED */ ++ AM65X_WKUP_IOPAD(0x0030, PIN_OUTPUT, 7) /* (R5) WKUP_GPIO0_24 STATUS GREEN LED */ ++ >; ++ }; + }; + + &main_pmx0 { +diff --git a/arch/arm/dts/iot2050-r5-common.dtsi b/arch/arm/dts/iot2050-r5-common.dtsi +index cf3a1f2ed4..32cd62ec05 100644 +--- a/arch/arm/dts/iot2050-r5-common.dtsi ++++ b/arch/arm/dts/iot2050-r5-common.dtsi +@@ -90,18 +90,6 @@ + u-boot,dm-spl; + }; + +- wkup_gpio0: wkup_gpio0@42110000 { +- compatible = "ti,k2g-gpio", "ti,keystone-gpio"; +- reg = <0x42110000 0x100>; +- gpio-controller; +- #gpio-cells = <2>; +- ti,ngpio = <56>; +- ti,davinci-gpio-unbanked = <0>; +- clocks = <&k3_clks 59 0>; +- clock-names = "gpio"; +- u-boot,dm-spl; +- }; +- + clk_200mhz: dummy_clock { + compatible = "fixed-clock"; + #clock-cells = <0>; +diff --git a/arch/arm/dts/iot2050-u-boot.dtsi b/arch/arm/dts/iot2050-u-boot.dtsi +index b12c772b84..025fdd1578 100644 +--- a/arch/arm/dts/iot2050-u-boot.dtsi ++++ b/arch/arm/dts/iot2050-u-boot.dtsi +@@ -152,6 +152,17 @@ + + &cbass_wakeup { + u-boot,dm-spl; ++ wkup_gpio0: wkup_gpio0@42110000 { ++ compatible = "ti,k2g-gpio", "ti,keystone-gpio"; ++ reg = <0x42110000 0x100>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ti,ngpio = <56>; ++ ti,davinci-gpio-unbanked = <0>; ++ clocks = <&k3_clks 59 0>; ++ clock-names = "gpio"; ++ u-boot,dm-spl; ++ }; + }; + + &secure_proxy_main { +diff --git a/common/main.c b/common/main.c +index 07b34bf2b0..d926894f61 100644 +--- a/common/main.c ++++ b/common/main.c +@@ -11,7 +11,9 @@ + #include + #include + #include +- ++#include ++#include ++#include + /* + * Board-specific Platform code can reimplement show_boot_progress () if needed + */ +@@ -37,6 +39,19 @@ static void run_preboot_environment_command(void) + #endif /* CONFIG_PREBOOT */ + } + ++#if defined(CONFIG_TARGET_IOT2050_ADVANCED_A53) || defined(CONFIG_TARGET_IOT2050_BASIC_A53) ++static void iot2050_show_set_light(const char *label,enum led_state_t state) ++{ ++ struct udevice *led_dev; ++ int error_status; ++ error_status = led_get_by_label(label,&led_dev); ++ if(!error_status) ++ { ++ led_set_state(led_dev, state); ++ } ++} ++#endif ++ + /* We come here after U-Boot is initialised and ready to process commands */ + void main_loop(void) + { +@@ -60,6 +75,11 @@ void main_loop(void) + + autoboot_command(s); + ++#if defined(CONFIG_TARGET_IOT2050_ADVANCED_A53) || defined(CONFIG_TARGET_IOT2050_BASIC_A53) ++ /* Turn on the LED when OS is not started */ ++ iot2050_show_set_light("redled",LEDST_ON); ++ iot2050_show_set_light("greenled",LEDST_OFF); ++#endif + cli_loop(); + panic("No CLI available"); + } +diff --git a/configs/am65x_iot2050_advanced_a53_defconfig b/configs/am65x_iot2050_advanced_a53_defconfig +index 177cbdd457..a2f1f37b99 100644 +--- a/configs/am65x_iot2050_advanced_a53_defconfig ++++ b/configs/am65x_iot2050_advanced_a53_defconfig +@@ -84,6 +84,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0 + CONFIG_FASTBOOT_CMD_OEM_FORMAT=y + CONFIG_TI_SCI_PROTOCOL=y + CONFIG_DM_GPIO=y ++CONFIG_DA8XX_GPIO=y + CONFIG_DM_PCA953X=y + CONFIG_DM_I2C=y + CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +@@ -157,3 +158,5 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y + CONFIG_FIT_IMAGE_POST_PROCESS=y + CONFIG_BLOCK_CACHE=y + CONFIG_SPL_BLOCK_CACHE=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y +diff --git a/configs/am65x_iot2050_advanced_gp_a53_defconfig b/configs/am65x_iot2050_advanced_gp_a53_defconfig +index b26e2cd8e5..5a0a1f67cb 100644 +--- a/configs/am65x_iot2050_advanced_gp_a53_defconfig ++++ b/configs/am65x_iot2050_advanced_gp_a53_defconfig +@@ -84,6 +84,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0 + CONFIG_FASTBOOT_CMD_OEM_FORMAT=y + CONFIG_TI_SCI_PROTOCOL=y + CONFIG_DM_GPIO=y ++CONFIG_DA8XX_GPIO=y + CONFIG_DM_PCA953X=y + CONFIG_DM_I2C=y + CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +@@ -129,6 +130,8 @@ CONFIG_REMOTEPROC_TI_K3_R5F=y + CONFIG_REMOTEPROC_TI_PRU=y + CONFIG_BLOCK_CACHE=y + CONFIG_SPL_BLOCK_CACHE=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y + CONFIG_DM_RESET=y + CONFIG_RESET_TI_SCI=y + CONFIG_DM_SERIAL=y +diff --git a/configs/am65x_iot2050_basic_a53_defconfig b/configs/am65x_iot2050_basic_a53_defconfig +index c6657eb03c..124cc496fd 100644 +--- a/configs/am65x_iot2050_basic_a53_defconfig ++++ b/configs/am65x_iot2050_basic_a53_defconfig +@@ -84,6 +84,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0 + CONFIG_FASTBOOT_CMD_OEM_FORMAT=y + CONFIG_TI_SCI_PROTOCOL=y + CONFIG_DM_GPIO=y ++CONFIG_DA8XX_GPIO=y + CONFIG_DM_PCA953X=y + CONFIG_DM_I2C=y + CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +@@ -129,6 +130,8 @@ CONFIG_REMOTEPROC_TI_K3_R5F=y + CONFIG_REMOTEPROC_TI_PRU=y + CONFIG_BLOCK_CACHE=y + CONFIG_SPL_BLOCK_CACHE=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y + CONFIG_DM_RESET=y + CONFIG_RESET_TI_SCI=y + CONFIG_DM_SERIAL=y +diff --git a/lib/hang.c b/lib/hang.c +index c5a78694be..a612136138 100644 +--- a/lib/hang.c ++++ b/lib/hang.c +@@ -9,7 +9,85 @@ + + #include + #include ++#include ++#include ++#include ++#include + ++#define WKUP_GPIO_32 0 /* WKUP_GPIO0 bank 2: Status Red */ ++#define WKUP_GPIO_24 24 /* WKUP_GPIO0 bank 1: Status Green*/ ++ ++#define WKUP_GPIO0_BASE 0x42110000 ++#define GPIO_DIRECTION01_OFFSET 0x0010 ++#define GPIO_SETDATA01_OFFSET 0x0018 ++#define GPIO_DIRECTION23_OFFSET 0x0038 ++#define GPIO_SETDATA23_OFFSET 0x0040 ++#define WKUP_CTRL_MMR0_CFG0 0x43000000 ++#define CTRLMMR_WKUP_GPIO32_PADCONFIG20_OFFSET 0x1C050 /* WKUP_GPIO_32 */ ++#define CTRLMMR_WKUP_GPIO24_PADCONFIG12_OFFSET 0x1C030 /* WKUP_GPIO_24 */ ++ ++#define MUX_MODE_GENERAL_GPIO 0x07 ++#define TX_DIS_FIELD 21 /* tx disable filed */ ++#define RED 0 ++#define GREEN 1 ++#define TURN_ON 1 ++#define TURN_OFF 0 ++ ++/** ++ * set_iot2050_status_led: set iot2050 status led ++ * ++ * @colour: status red/green led [ red: RED ; green: GREEN ] ++ * @state: turn on/off the led [ on: TURN_ON ; off: TURN_OFF ] ++ * ++ */ ++ ++static void set_iot2050_status_led(unsigned int colour,unsigned int state) ++{ ++ u32 pad_config,dir_reg,data_reg; ++ void *dirreg, *outreg, *padconfig; ++ u32 WKUP_GPIO; ++ ++ if (colour == GREEN) { ++ dirreg = (void*)(WKUP_GPIO0_BASE+GPIO_DIRECTION01_OFFSET); ++ outreg = (void*)(WKUP_GPIO0_BASE+GPIO_SETDATA01_OFFSET); ++ padconfig = (void*)(WKUP_CTRL_MMR0_CFG0+CTRLMMR_WKUP_GPIO24_PADCONFIG12_OFFSET); ++ WKUP_GPIO = WKUP_GPIO_24; ++ ++ } else if (colour == RED) { ++ dirreg = (void*)(WKUP_GPIO0_BASE+GPIO_DIRECTION23_OFFSET); ++ outreg = (void*)(WKUP_GPIO0_BASE+GPIO_SETDATA23_OFFSET); ++ padconfig = (void*)(WKUP_CTRL_MMR0_CFG0+CTRLMMR_WKUP_GPIO32_PADCONFIG20_OFFSET); ++ WKUP_GPIO = WKUP_GPIO_32; ++ } ++ ++ /* config pinmux */ ++ pad_config = __raw_readl(padconfig); ++ pad_config |= MUX_MODE_GENERAL_GPIO; ++ pad_config &= ~(1 << TX_DIS_FIELD); ++ __raw_writel(pad_config, padconfig); ++ ++ /* set direction out */ ++ dir_reg = __raw_readl(dirreg); ++ dir_reg &= ~(1 << WKUP_GPIO); ++ __raw_writel(dir_reg, dirreg); ++ ++ /* set the value high or low */ ++ data_reg = __raw_readl(outreg); ++ if (state == TURN_ON) ++ data_reg |= (1 << WKUP_GPIO); ++ else if (state == TURN_OFF) ++ data_reg &= ~(1 << WKUP_GPIO); ++ ++ __raw_writel(data_reg, outreg); ++} ++ ++ ++ ++static void set_iot2050_error_status_led_on(void) ++{ ++ set_iot2050_status_led(GREEN,TURN_OFF); ++ set_iot2050_status_led(RED,TURN_ON); ++} + /** + * hang - stop processing by staying in an endless loop + * +@@ -20,6 +98,8 @@ + */ + void hang(void) + { ++ /*Turn on the red led for IOT2050 platform*/ ++ set_iot2050_error_status_led_on(); + #if !defined(CONFIG_SPL_BUILD) || \ + (CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT) && \ + CONFIG_IS_ENABLED(SERIAL_SUPPORT)) +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0004-am65x-fix-usb-hub-issue-for-disabling-charge-detect.patch b/recipes-bsp/u-boot/files/0004-am65x-fix-usb-hub-issue-for-disabling-charge-detect.patch new file mode 100644 index 000000000..7d3f6ac93 --- /dev/null +++ b/recipes-bsp/u-boot/files/0004-am65x-fix-usb-hub-issue-for-disabling-charge-detect.patch @@ -0,0 +1,37 @@ +From 6da565a50598aa74ab6ef1654350c30274166295 Mon Sep 17 00:00:00 2001 +From: "le.jin@siemens.com" +Date: Sun, 16 Feb 2020 18:39:15 +0800 +Subject: [PATCH 04/15] am65x:fix usb hub issue for disabling charge detect + +Signed-off-by: le +--- + common/main.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/common/main.c b/common/main.c +index d926894f61..c36119be28 100644 +--- a/common/main.c ++++ b/common/main.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + /* + * Board-specific Platform code can reimplement show_boot_progress () if needed + */ +@@ -73,8 +74,10 @@ void main_loop(void) + if (cli_process_fdt(&s)) + cli_secure_boot_cmd(s); + +- autoboot_command(s); ++ /* change CTRL_MMR register to let serdes0 not output USB3.0 signals. */ ++ writel(0x3, 0x00104080); + ++ autoboot_command(s); + #if defined(CONFIG_TARGET_IOT2050_ADVANCED_A53) || defined(CONFIG_TARGET_IOT2050_BASIC_A53) + /* Turn on the LED when OS is not started */ + iot2050_show_set_light("redled",LEDST_ON); +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0005-am654x-remove-dependency-of-TI_SECURE_DEV_PKG.patch b/recipes-bsp/u-boot/files/0005-am654x-remove-dependency-of-TI_SECURE_DEV_PKG.patch new file mode 100644 index 000000000..2538046ac --- /dev/null +++ b/recipes-bsp/u-boot/files/0005-am654x-remove-dependency-of-TI_SECURE_DEV_PKG.patch @@ -0,0 +1,162 @@ +From 549a95faa2fca208d14bb614d8b1e17733d6c058 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Tue, 12 Nov 2019 19:23:40 +0800 +Subject: [PATCH 05/15] am654x: remove dependency of TI_SECURE_DEV_PKG + +Signed-off-by: le.jin +--- + arch/arm/mach-k3/config.mk | 20 ++++++++++++----- + arch/arm/mach-k3/config_secure.mk | 23 +++----------------- + configs/am65x_iot2050_advanced_a53_defconfig | 1 + + configs/am65x_iot2050_advanced_r5_defconfig | 1 + + tools/k3_gen_x509_cert.sh | 12 ++++++++-- + 5 files changed, 30 insertions(+), 27 deletions(-) + +diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk +index f6b63db349..10a6ff3940 100644 +--- a/arch/arm/mach-k3/config.mk ++++ b/arch/arm/mach-k3/config.mk +@@ -3,8 +3,6 @@ + # Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ + # Lokesh Vutla + +-ifdef CONFIG_SPL_BUILD +- + # Openssl is required to generate x509 certificate. + # Error out if openssl is not available. + ifeq ($(shell which openssl),) +@@ -28,6 +26,19 @@ else + KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY)) + endif + ++quiet_cmd_k3secureimg = SECURE $@ ++cmd_k3secureimg = \ ++ $(if $2, \ ++ $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $< \ ++ -o $@ -l $(CONFIG_SPL_TEXT_BASE) -k $(KEY) -t $2 \ ++ $(if $(KBUILD_VERBOSE:1=), >/dev/null), \ ++ $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $< \ ++ -o $@ -l $(CONFIG_SPL_TEXT_BASE) -k $(KEY) \ ++ $(if $(KBUILD_VERBOSE:1=), >/dev/null) \ ++ ) ++ ++ifdef CONFIG_SPL_BUILD ++ + # tiboot3.bin is mandated by ROM and ROM only supports R5 boot. + # So restrict tiboot3.bin creation for CPU_V7R. + ifdef CONFIG_CPU_V7R +@@ -40,9 +51,8 @@ image_check: $(obj)/u-boot-spl.bin FORCE + exit 1; \ + fi + +-tiboot3.bin: image_check FORCE +- $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \ +- -o $@ -l $(CONFIG_SPL_TEXT_BASE) -k $(KEY) ++tiboot3.bin: $(obj)/u-boot-spl.bin image_check FORCE ++ $(call if_changed,k3secureimg) + + ALL-y += tiboot3.bin + endif +diff --git a/arch/arm/mach-k3/config_secure.mk b/arch/arm/mach-k3/config_secure.mk +index 6d63c57665..5c8f1139c6 100644 +--- a/arch/arm/mach-k3/config_secure.mk ++++ b/arch/arm/mach-k3/config_secure.mk +@@ -3,28 +3,11 @@ + # Copyright (C) 2018 Texas Instruments, Incorporated - http://www.ti.com/ + # Andrew F. Davis + +-quiet_cmd_k3secureimg = SECURE $@ +-ifneq ($(TI_SECURE_DEV_PKG),) +-ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh),) +-cmd_k3secureimg = $(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh \ +- $< $@ \ +- $(if $(KBUILD_VERBOSE:1=), >/dev/null) +-else +-cmd_k3secureimg = echo "WARNING:" \ +- "$(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh not found." \ +- "$@ was NOT secured!"; cp $< $@ +-endif +-else +-cmd_k3secureimg = echo "WARNING: TI_SECURE_DEV_PKG environment" \ +- "variable must be defined for TI secure devices." \ +- "$@ was NOT secured!"; cp $< $@ +-endif +- + %.dtb_HS: %.dtb FORCE +- $(call if_changed,k3secureimg) ++ $(call if_changed,k3secureimg,$(dir $(KEY))/x509-sysfw-template.txt) + + $(obj)/u-boot-spl-nodtb.bin_HS: $(obj)/u-boot-spl-nodtb.bin FORCE +- $(call if_changed,k3secureimg) ++ $(call if_changed,k3secureimg,$(dir $(KEY))/x509-sysfw-template.txt) + + tispl.bin_HS: $(obj)/u-boot-spl-nodtb.bin_HS $(patsubst %,$(obj)/dts/%.dtb_HS,$(subst ",,$(CONFIG_SPL_OF_LIST))) $(SPL_ITS) FORCE + $(call if_changed,mkfitimage) +@@ -38,7 +21,7 @@ OF_LIST_TARGETS = $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIS + $(OF_LIST_TARGETS): dtbs + + u-boot-nodtb.bin_HS: u-boot-nodtb.bin FORCE +- $(call if_changed,k3secureimg) ++ $(call if_changed,k3secureimg,$(dir $(KEY))/x509-sysfw-template.txt) + + u-boot.img_HS: u-boot-nodtb.bin_HS u-boot.img $(patsubst %.dtb,%.dtb_HS,$(OF_LIST_TARGETS)) FORCE + $(call if_changed,mkimage) +diff --git a/configs/am65x_iot2050_advanced_a53_defconfig b/configs/am65x_iot2050_advanced_a53_defconfig +index a2f1f37b99..d05fedd64f 100644 +--- a/configs/am65x_iot2050_advanced_a53_defconfig ++++ b/configs/am65x_iot2050_advanced_a53_defconfig +@@ -160,3 +160,4 @@ CONFIG_BLOCK_CACHE=y + CONFIG_SPL_BLOCK_CACHE=y + CONFIG_LED=y + CONFIG_LED_GPIO=y ++CONFIG_SYS_K3_KEY="keys/custMpk.pem" +diff --git a/configs/am65x_iot2050_advanced_r5_defconfig b/configs/am65x_iot2050_advanced_r5_defconfig +index f71b13d7ee..dce7a3e0bd 100644 +--- a/configs/am65x_iot2050_advanced_r5_defconfig ++++ b/configs/am65x_iot2050_advanced_r5_defconfig +@@ -120,3 +120,4 @@ CONFIG_TI_SECURE_DEVICE=y + CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y + CONFIG_BLOCK_CACHE=y + CONFIG_SPL_BLOCK_CACHE=y ++CONFIG_SYS_K3_KEY="keys/custMpk.pem" +diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh +index ec8e5b9f8d..5e77058119 100755 +--- a/tools/k3_gen_x509_cert.sh ++++ b/tools/k3_gen_x509_cert.sh +@@ -151,8 +151,9 @@ options_help[k]="key_file:file with key inside it. If not provided script genera + options_help[o]="output_file:Name of the final output file. default to $OUTPUT" + options_help[c]="core_id:target core id on which the image would be running. Default to $BOOTCORE" + options_help[l]="loadaddr: Target load address of the binary in hex. Default to $LOADADDR" ++options_help[t]="template: Use predefined certificate template rather than generated one" + +-while getopts "b:k:o:c:l:h" opt ++while getopts "b:k:o:c:l:t:h" opt + do + case $opt in + b) +@@ -170,6 +171,9 @@ do + c) + BOOTCORE=$OPTARG + ;; ++ t) ++ TEMPLATE=$OPTARG ++ ;; + h) + usage + exit 0 +@@ -233,7 +237,11 @@ gen_cert() { + openssl req -new -x509 -key $KEY -nodes -outform DER -out $CERT -config $TEMP_X509 -sha512 + } + +-gen_template ++if [ -n "$TEMPLATE" ]; then ++ cp $TEMPLATE x509-template.txt ++else ++ gen_template ++fi + gen_cert + cat $CERT $BIN > $OUTPUT + +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0006-mmc-change-SD-to-mmc0-and-EMMC-Flash-to-mmc1.patch b/recipes-bsp/u-boot/files/0006-mmc-change-SD-to-mmc0-and-EMMC-Flash-to-mmc1.patch new file mode 100644 index 000000000..6267cec08 --- /dev/null +++ b/recipes-bsp/u-boot/files/0006-mmc-change-SD-to-mmc0-and-EMMC-Flash-to-mmc1.patch @@ -0,0 +1,29 @@ +From 1c315cc40a232f12ddf7897732f268187fbea360 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Tue, 12 Nov 2019 19:26:20 +0800 +Subject: [PATCH 06/15] mmc:change SD to mmc0 and EMMC-Flash to mmc1 + +Signed-off-by: Gao Nian +--- + arch/arm/dts/iot2050-advanced.dts | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/dts/iot2050-advanced.dts b/arch/arm/dts/iot2050-advanced.dts +index 83040eb2b3..92703d2254 100644 +--- a/arch/arm/dts/iot2050-advanced.dts ++++ b/arch/arm/dts/iot2050-advanced.dts +@@ -14,6 +14,11 @@ + compatible = "siemens,iot2050", "ti,am654"; + model = "Siemens IOT2050 Advanced Base Board"; + ++ aliases { ++ mmc0 = &sdhci1; ++ mmc1 = &sdhci0; ++ }; ++ + memory@80000000 { + device_type = "memory"; + /* 2G RAM */ +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0007-feat-add-scripts-to-select-fdt-name.patch b/recipes-bsp/u-boot/files/0007-feat-add-scripts-to-select-fdt-name.patch new file mode 100644 index 000000000..a5febebfb --- /dev/null +++ b/recipes-bsp/u-boot/files/0007-feat-add-scripts-to-select-fdt-name.patch @@ -0,0 +1,53 @@ +From 98cc8b6c0f116019e0b47a2c1a063d3dac5d5598 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Tue, 12 Nov 2019 19:30:14 +0800 +Subject: [PATCH 07/15] feat:add scripts to select fdt name + +Signed-off-by: Gao Nian +--- + include/configs/iot2050.h | 22 +++++++++++++++++++++- + 1 file changed, 21 insertions(+), 1 deletion(-) + +diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h +index 81dbf39537..8f7b344cb3 100644 +--- a/include/configs/iot2050.h ++++ b/include/configs/iot2050.h +@@ -79,6 +79,25 @@ + "uuid_compare=for uuid_other in ${uuids}; do if test ${uuid_conflict} = no && env exists uuid_get && test ${uuid_other} = ${uuid_get}; then echo \"** ERROR: uuid conflicts: \"${uuid}\" !!! **\"; setenv uuid_conflict yes; fi; done\0" \ + "uuid_verify=setenv uuid_conflict no; setenv uuid_break no; for target in ${boot_targets}; do if test ${uuid_break} = no; then env delete uuid_tmp; run uuid_get_${target}; setenv uuid_get ${uuid_tmp}; run uuid_list; run uuid_compare; if test ${target} = ${devtype}${devnum}; then setenv uuid_break yes; fi; fi; done\0" + ++#define EXTRA_ENV_SELECT_FDT \ ++ "fdt_found=no\0" \ ++ "fdt_select=if env exists board_name; then " \ ++ "if test ${board_name} = IOT2050-BASIC; then " \ ++ "env set fdtfile siemens/iot2050-basic.dtb;" \ ++ "env set fdt_found yes;" \ ++ "else if test ${board_name} = IOT2050-ADVANCED; then " \ ++ "env set fdtfile siemens/iot2050-advanced.dtb;" \ ++ "env set fdt_found yes;" \ ++ "else " \ ++ "echo ** ERROR: can not find fdt file for ${board_name} **;" \ ++ "env set fdt_found no;" \ ++ "fi; fi;" \ ++ "else " \ ++ "echo ** Warning: board_name is not defined, default boot as IOT2050-BASIC **;" \ ++ "env set fdtfile siemens/iot2050-basic.dtb;" \ ++ "env set fdt_found yes;" \ ++ "fi;\0" ++ + /* U-Boot general configuration */ + #define EXTRA_ENV_IOT2050_BOARD_SETTINGS \ + "loadaddr=0x80080000\0" \ +@@ -114,7 +133,8 @@ + #define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + EXTRA_ENV_IOT2050_BOARD_SETTINGS \ +- EXTRA_ENV_UUID_VERIFY ++ EXTRA_ENV_UUID_VERIFY \ ++ EXTRA_ENV_SELECT_FDT + #endif + + #define CONFIG_SUPPORT_EMMC_BOOT +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0008-feat-add-UUID-checking-before-run-distro_bootcmd.patch b/recipes-bsp/u-boot/files/0008-feat-add-UUID-checking-before-run-distro_bootcmd.patch new file mode 100644 index 000000000..771bea344 --- /dev/null +++ b/recipes-bsp/u-boot/files/0008-feat-add-UUID-checking-before-run-distro_bootcmd.patch @@ -0,0 +1,126 @@ +From d8aaae7d8b1ee73fb50a00abdde7f7a3c1e9a372 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Tue, 12 Nov 2019 19:31:47 +0800 +Subject: [PATCH 08/15] feat:add UUID checking before run distro_bootcmd + +Signed-off-by: Gao Nian +--- + include/configs/iot2050.h | 84 +++++++++++++++++++++++++++++++-------- + 1 file changed, 68 insertions(+), 16 deletions(-) + +diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h +index 8f7b344cb3..bd8bcb415b 100644 +--- a/include/configs/iot2050.h ++++ b/include/configs/iot2050.h +@@ -9,7 +9,6 @@ + #define __CONFIG_IOT2050_H + + #include +-#include + #include + + #define CONFIG_ENV_SIZE (128 << 10) +@@ -66,19 +65,6 @@ + "uuid_disk=${uuid_gpt_disk};" \ + "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" + +-#define EXTRA_ENV_UUID_VERIFY \ +- "uuid_devices=mmc1 mmc0 usb0 usb1 usb2\0" \ +- "uuid_get_mmc=part uuid mmc ${devno}:1 uuid_tmp\0" \ +- "uuid_get_mmc0=setenv devno 0; run uuid_get_mmc\0" \ +- "uuid_get_mmc1=setenv devno 1; run uuid_get_mmc\0" \ +- "uuid_get_usb=usb start; part uuid usb ${devno}:1 uuid_tmp\0" \ +- "uuid_get_usb0=setenv devno 0; run uuid_get_usb\0" \ +- "uuid_get_usb1=setenv devno 1; run uuid_get_usb\0" \ +- "uuid_get_usb2=setenv devno 2; run uuid_get_usb\0" \ +- "uuid_list=env delete uuids; for device in ${uuid_devices}; do if test ${target} != ${device}; then env delete uuid_tmp; run uuid_get_${device}; setenv uuids ${uuids} ${uuid_tmp}; fi; done\0" \ +- "uuid_compare=for uuid_other in ${uuids}; do if test ${uuid_conflict} = no && env exists uuid_get && test ${uuid_other} = ${uuid_get}; then echo \"** ERROR: uuid conflicts: \"${uuid}\" !!! **\"; setenv uuid_conflict yes; fi; done\0" \ +- "uuid_verify=setenv uuid_conflict no; setenv uuid_break no; for target in ${boot_targets}; do if test ${uuid_break} = no; then env delete uuid_tmp; run uuid_get_${target}; setenv uuid_get ${uuid_tmp}; run uuid_list; run uuid_compare; if test ${target} = ${devtype}${devnum}; then setenv uuid_break yes; fi; fi; done\0" +- + #define EXTRA_ENV_SELECT_FDT \ + "fdt_found=no\0" \ + "fdt_select=if env exists board_name; then " \ +@@ -129,12 +115,78 @@ + #endif + #include + ++#define UUID_DEVICES \ ++ "uuid_devices=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0" ++#define UUID_CONFLICT_CHECK \ ++ "uuid_conflict_check=" \ ++ "echo ====== uuid conflict check begin ======;" \ ++ "setenv uuid_conflict no;" \ ++ "run uuid_get_all;" \ ++ "setenv indexa a;" \ ++ "for uuida in ${uuidall}; do " \ ++ "setenv indexb a;" \ ++ "for uuidb in ${uuidall}; do " \ ++ "if test $indexa != $indexb && test ${uuida} = ${uuidb}; then " \ ++ "echo ** uuid conflict: ${uuida} **; echo ====== uuid conflict check end ======; setenv uuid_conflict yes; exit; fi;" \ ++ "setenv indexb ${indexb}a;" \ ++ "done;" \ ++ "setenv indexa ${indexa}a;" \ ++ "done;" \ ++ "echo ====== uuid conflict check end ======\0" ++#define UUID_GET_DEV(devtypeu, devtypel, instance) \ ++ "uuid_get_" #devtypel #instance "=" \ ++ "setenv devtype " #devtypel ";" \ ++ "setenv devnum " #instance ";" \ ++ "run uuid_get_" #devtypel "\0" ++#define UUID_GET_MMC_SHARE \ ++ "uuid_get_mmc=if mmc dev ${devnum}; then run uuid_get; fi\0" ++#define UUID_GET_USB_SHARE \ ++ "uuid_get_usb=if test ${usbreseted} = no; then usb reset; setenv usbreseted yes; fi; if usb dev ${devnum}; then run uuid_get; fi\0" ++#define UUID_GET_NET_SHARE \ ++ "uuid_get_net=echo net does not upport get uuid\0" ++#define UUID_GET \ ++ "uuid_get=" \ ++ "part list ${devtype} ${devnum} partlist;" \ ++ "if env exists partlist; then " \ ++ "for devpart in ${partlist}; do " \ ++ "if part uuid ${devtype} ${devnum}:${devpart} uuid; then " \ ++ "setenv uuids ${uuids} ${uuid};" \ ++ "fi;" \ ++ "done;" \ ++ "fi\0" ++#define UUID_GET_ALL \ ++ "uuid_get_all=" \ ++ "env delete uuidall;" \ ++ "setenv usbreseted no;" \ ++ "for device in ${uuid_devices}; do " \ ++ "env delete uuids;" \ ++ "run uuid_get_${device};" \ ++ "if env exists uuids; then " \ ++ "setenv uuidall ${uuidall} ${uuids};" \ ++ "fi;" \ ++ "done\0" ++ ++#define UUID_CONFLICT_CHECK_ENV \ ++ UUID_CONFLICT_CHECK \ ++ UUID_DEVICES \ ++ UUID_GET \ ++ UUID_GET_ALL \ ++ UUID_GET_MMC_SHARE \ ++ UUID_GET_USB_SHARE \ ++ UUID_GET_NET_SHARE \ ++ BOOT_TARGET_DEVICES(UUID_GET_DEV) ++ ++#ifdef CONFIG_BOOTCOMMAND ++#undef CONFIG_BOOTCOMMAND ++#define CONFIG_BOOTCOMMAND "run uuid_conflict_check; if test $uuid_conflict = no; then run distro_bootcmd; fi" ++#endif ++ + /* Incorporate settings into the U-Boot environment */ + #define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + EXTRA_ENV_IOT2050_BOARD_SETTINGS \ +- EXTRA_ENV_UUID_VERIFY \ +- EXTRA_ENV_SELECT_FDT ++ EXTRA_ENV_SELECT_FDT \ ++ UUID_CONFLICT_CHECK_ENV + #endif + + #define CONFIG_SUPPORT_EMMC_BOOT +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0009-setting-the-rj45-port-led-behavior.patch b/recipes-bsp/u-boot/files/0009-setting-the-rj45-port-led-behavior.patch new file mode 100644 index 000000000..3edb2a7f3 --- /dev/null +++ b/recipes-bsp/u-boot/files/0009-setting-the-rj45-port-led-behavior.patch @@ -0,0 +1,37 @@ +From 614ad3e26430bc19701c53cb7febe9862a329394 Mon Sep 17 00:00:00 2001 +From: zengchao +Date: Fri, 15 Nov 2019 17:55:33 +0800 +Subject: [PATCH 09/15] setting the rj45 port led behavior + +Signed-off-by: zengchao +--- + drivers/net/phy/ti.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c +index bfdd7aab40..c9eaf9e34f 100644 +--- a/drivers/net/phy/ti.c ++++ b/drivers/net/phy/ti.c +@@ -29,6 +29,10 @@ + #define DP83867_RGMIIDCTL 0x0086 + #define DP83867_IO_MUX_CFG 0x0170 + ++/*RJ45 led configuration*/ ++#define DP83867_LEDCR_1 0x0018 ++#define RJ45_LED_SETTING 0x665b ++ + #define DP83867_SW_RESET BIT(15) + #define DP83867_SW_RESTART BIT(14) + +@@ -410,6 +414,8 @@ static int dp83867_config(struct phy_device *phydev) + dp83867_config_port_mirroring(phydev); + + genphy_config_aneg(phydev); ++ phy_write_mmd_indirect(phydev, DP83867_LEDCR_1, ++ DP83867_DEVADDR, phydev->addr,RJ45_LED_SETTING); + return 0; + + err_out: +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0010-fix-rproc-init-error-in-u-boot.patch b/recipes-bsp/u-boot/files/0010-fix-rproc-init-error-in-u-boot.patch new file mode 100644 index 000000000..c9d189080 --- /dev/null +++ b/recipes-bsp/u-boot/files/0010-fix-rproc-init-error-in-u-boot.patch @@ -0,0 +1,45 @@ +From ec439a9f4fc648e0757b69d4a673cfa6fc0f18c8 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Thu, 2 Jan 2020 13:54:01 +0800 +Subject: [PATCH 10/15] fix:rproc init error in u-boot + +Signed-off-by: Gao Nian +--- + drivers/remoteproc/ti_k3_r5f_rproc.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/remoteproc/ti_k3_r5f_rproc.c b/drivers/remoteproc/ti_k3_r5f_rproc.c +index 9e6f6c179a..9976b6ff25 100644 +--- a/drivers/remoteproc/ti_k3_r5f_rproc.c ++++ b/drivers/remoteproc/ti_k3_r5f_rproc.c +@@ -542,6 +542,7 @@ static int k3_r5f_rproc_configure(struct k3_r5f_core *core) + { + struct k3_r5f_cluster *cluster = core->cluster; + u32 set_cfg = 0, clr_cfg = 0, cfg, ctrl, sts; ++ u32 lockstep_permitted; + u64 boot_vec = 0; + int ret; + +@@ -559,8 +560,8 @@ static int k3_r5f_rproc_configure(struct k3_r5f_core *core) + goto out; + + /* Sanity check for Lockstep mode */ +- if (cluster->mode && is_primary_core(core) && +- !(sts & PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED)) { ++ lockstep_permitted = sts & PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED; ++ if (cluster->mode && is_primary_core(core) && (!lockstep_permitted)) { + dev_err(core->dev, "LockStep mode not permitted on this device\n"); + ret = -EINVAL; + goto out; +@@ -572,7 +573,7 @@ static int k3_r5f_rproc_configure(struct k3_r5f_core *core) + clr_cfg |= PROC_BOOT_CFG_FLAG_R5_TEINIT; + if (cluster->mode == CLUSTER_MODE_LOCKSTEP) + set_cfg |= PROC_BOOT_CFG_FLAG_R5_LOCKSTEP; +- else ++ else if (lockstep_permitted) + clr_cfg |= PROC_BOOT_CFG_FLAG_R5_LOCKSTEP; + } + +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0011-feat-catch-up-100M-full-duplex-in-u-boot.patch b/recipes-bsp/u-boot/files/0011-feat-catch-up-100M-full-duplex-in-u-boot.patch new file mode 100644 index 000000000..39101e84e --- /dev/null +++ b/recipes-bsp/u-boot/files/0011-feat-catch-up-100M-full-duplex-in-u-boot.patch @@ -0,0 +1,549 @@ +From 305e35edf10a84ee2632651688034ba55b3dcfe4 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Tue, 7 Jan 2020 13:50:42 +0800 +Subject: [PATCH 11/15] feat: catch-up 100M full duplex in u-boot + +Signed-off-by: Gao Nian +--- + arch/arm/dts/iot2050-u-boot.dtsi | 1 + + drivers/net/ti/icssg-prueth.c | 349 ++++++++++++++++--------------- + 2 files changed, 186 insertions(+), 164 deletions(-) + +diff --git a/arch/arm/dts/iot2050-u-boot.dtsi b/arch/arm/dts/iot2050-u-boot.dtsi +index 025fdd1578..659efa0611 100644 +--- a/arch/arm/dts/iot2050-u-boot.dtsi ++++ b/arch/arm/dts/iot2050-u-boot.dtsi +@@ -32,6 +32,7 @@ + "ti-pruss/am65x-pru1-prueth-fw.elf", + "ti-pruss/am65x-rtu1-prueth-fw.elf"; + mii-g-rt = <&icssg0_mii_g_rt>; ++ mii-rt = <&icssg0_mii_rt>; + dma-coherent; + dmas = <&mcu_udmap &icssg0 0 UDMA_DIR_TX>, /* egress slice 0 */ + <&mcu_udmap &icssg0 1 UDMA_DIR_TX>, /* egress slice 0 */ +diff --git a/drivers/net/ti/icssg-prueth.c b/drivers/net/ti/icssg-prueth.c +index 8564389d5a..4090d22d03 100644 +--- a/drivers/net/ti/icssg-prueth.c ++++ b/drivers/net/ti/icssg-prueth.c +@@ -33,8 +33,6 @@ + #define ICSS_SLICE0 0 + #define ICSS_SLICE1 1 + +-#define MSMC_RAM_SIZE 0x10000 +- + #ifdef PKTSIZE_ALIGN + #define UDMA_RX_BUF_SIZE PKTSIZE_ALIGN + #else +@@ -59,11 +57,6 @@ enum prueth_port { + PRUETH_PORT_MII1, /* physical port MII 1 */ + }; + +-/* Below used to support 2 icssgs per pru port */ +-#define ICSSG0 0 +-#define ICSSG1 1 +-#define NUM_ICSSG 2 +- + /* Config region lies in shared RAM */ + #define ICSS_CONFIG_OFFSET_SLICE0 0 + #define ICSS_CONFIG_OFFSET_SLICE1 0x8000 +@@ -88,19 +81,20 @@ enum pruss_pru_id { + + struct prueth { + struct udevice *dev; +- struct regmap *miig_rt[NUM_ICSSG]; ++ struct regmap *miig_rt; ++ struct regmap *mii_rt; + fdt_addr_t mdio_base; +- phys_addr_t pruss_shrdram2[NUM_ICSSG]; +- phys_addr_t tmaddr[NUM_ICSSG]; ++ phys_addr_t pruss_shrdram2; ++ phys_addr_t tmaddr; + struct mii_dev *bus; + u32 port_id; +- u32 sram_pa[NUM_ICSSG]; ++ u32 sram_pa; + struct phy_device *phydev; + bool has_phy; + ofnode phy_node; + u32 phy_addr; + ofnode eth_node[PRUETH_NUM_MACS]; +- struct icssg_config config[NUM_ICSSG][PRUSS_NUM_PRUS]; ++ struct icssg_config config[PRUSS_NUM_PRUS]; + u32 mdio_freq; + int phy_interface; + struct clk mdiofck; +@@ -108,14 +102,88 @@ struct prueth { + struct dma dma_rx; + u32 rx_next; + u32 rx_pend; +- int slice[NUM_ICSSG]; +- int ingress_icssg; +- int ingress_slice; +- int egress_icssg; +- int egress_slice; +- bool dual_icssg; ++ int slice; + }; + ++/** ++ * TX IPG Values to be set for 100M and 1G link speeds. These values are ++ * in ocp_clk cycles. So need change if ocp_clk is changed for a specific ++ * h/w design. ++ */ ++#define MII_RT_TX_IPG_100M 0x166 ++#define MII_RT_TX_IPG_1G 0x18 ++ ++#define RGMII_CFG_OFFSET 4 ++ ++/* Constant to choose between MII0 and MII1 */ ++#define ICSS_MII0 0 ++#define ICSS_MII1 1 ++ ++/* RGMII CFG Register bits */ ++#define RGMII_CFG_GIG_EN_MII0 BIT(17) ++#define RGMII_CFG_GIG_EN_MII1 BIT(21) ++#define RGMII_CFG_FULL_DUPLEX_MII0 BIT(18) ++#define RGMII_CFG_FULL_DUPLEX_MII1 BIT(22) ++ ++/* PRUSS_MII_RT Registers */ ++#define PRUSS_MII_RT_RXCFG0 0x0 ++#define PRUSS_MII_RT_RXCFG1 0x4 ++#define PRUSS_MII_RT_TXCFG0 0x10 ++#define PRUSS_MII_RT_TXCFG1 0x14 ++#define PRUSS_MII_RT_TX_CRC0 0x20 ++#define PRUSS_MII_RT_TX_CRC1 0x24 ++#define PRUSS_MII_RT_TX_IPG0 0x30 ++#define PRUSS_MII_RT_TX_IPG1 0x34 ++#define PRUSS_MII_RT_PRS0 0x38 ++#define PRUSS_MII_RT_PRS1 0x3c ++#define PRUSS_MII_RT_RX_FRMS0 0x40 ++#define PRUSS_MII_RT_RX_FRMS1 0x44 ++#define PRUSS_MII_RT_RX_PCNT0 0x48 ++#define PRUSS_MII_RT_RX_PCNT1 0x4c ++#define PRUSS_MII_RT_RX_ERR0 0x50 ++#define PRUSS_MII_RT_RX_ERR1 0x54 ++ ++static inline void icssg_update_rgmii_cfg(struct regmap *miig_rt, bool gig_en, ++ bool full_duplex, int mii) ++{ ++ u32 gig_en_mask, gig_val = 0, full_duplex_mask, full_duplex_val = 0; ++ ++ gig_en_mask = (mii == ICSS_MII0) ? RGMII_CFG_GIG_EN_MII0 : ++ RGMII_CFG_GIG_EN_MII1; ++ if (gig_en) ++ gig_val = gig_en_mask; ++ regmap_update_bits(miig_rt, RGMII_CFG_OFFSET, gig_en_mask, gig_val); ++ ++ full_duplex_mask = (mii == ICSS_MII0) ? RGMII_CFG_FULL_DUPLEX_MII0 : ++ RGMII_CFG_FULL_DUPLEX_MII1; ++ if (full_duplex) ++ full_duplex_val = full_duplex_mask; ++ regmap_update_bits(miig_rt, RGMII_CFG_OFFSET, full_duplex_mask, ++ full_duplex_val); ++} ++ ++static inline void icssg_update_mii_rt_cfg(struct regmap *mii_rt, int speed, ++ int mii) ++{ ++ u32 ipg_reg, val; ++ ++ ipg_reg = (mii == ICSS_MII0) ? PRUSS_MII_RT_TX_IPG0 : ++ PRUSS_MII_RT_TX_IPG1; ++ switch (speed) { ++ case SPEED_1000: ++ val = MII_RT_TX_IPG_1G; ++ break; ++ case SPEED_100: ++ val = MII_RT_TX_IPG_100M; ++ break; ++ default: ++ /* Other links speeds not supported */ ++ pr_err("Unsupported link speed\n"); ++ return; ++ } ++ regmap_write(mii_rt, ipg_reg, val); ++} ++ + static int icssg_phy_init(struct udevice *dev) + { + struct prueth *priv = dev_get_priv(dev); +@@ -149,7 +217,7 @@ static int icssg_phy_init(struct udevice *dev) + return ret; + } + +-static int icssg_mdio_init(struct udevice *dev, int icssg) ++static int icssg_mdio_init(struct udevice *dev) + { + struct prueth *prueth = dev_get_priv(dev); + +@@ -162,28 +230,42 @@ static int icssg_mdio_init(struct udevice *dev, int icssg) + return 0; + } + +-static void icssg_config_set(struct prueth *prueth, int icssg, int slice) ++static void icssg_config_set(struct prueth *prueth) + { +- struct icssg_config *config; + void __iomem *va; +- int i; + +- config = &prueth->config[icssg][0]; +- memset(config, 0, sizeof(*config)); +- config->addr_lo = cpu_to_le32(lower_32_bits(prueth->sram_pa[icssg])); +- config->addr_hi = cpu_to_le32(upper_32_bits(prueth->sram_pa[icssg])); +- config->num_tx_threads = 0; +- config->rx_flow_id = 0; /* flow id for host port */ +- +- for (i = 8; i < 16; i++) +- config->tx_buf_sz[i] = cpu_to_le32(0x1800); ++ va = (void __iomem *)prueth->pruss_shrdram2 + prueth->slice * ++ ICSSG_CONFIG_OFFSET_SLICE1; + ++ memcpy_toio(va, &prueth->config[0], sizeof(prueth->config[0])); ++} + +- va = (void __iomem *)prueth->pruss_shrdram2[icssg] + +- slice * ICSSG_CONFIG_OFFSET_SLICE1; ++static int icssg_update_link(struct prueth *priv) ++{ ++ struct phy_device *phy = priv->phydev; ++ bool gig_en = false, full_duplex = false; ++ ++ if (phy->link) { /* link up */ ++ if (phy->speed == 1000) ++ gig_en = true; ++ if (phy->duplex == 0x1) ++ full_duplex = true; ++ if (phy->speed == 100) ++ gig_en = false; ++ /* Set the RGMII cfg for gig en and full duplex */ ++ icssg_update_rgmii_cfg(priv->miig_rt, gig_en, full_duplex, ++ priv->slice); ++ /* update the Tx IPG based on 100M/1G speed */ ++ icssg_update_mii_rt_cfg(priv->mii_rt, phy->speed, priv->slice); ++ ++ printf("link up on port %d, speed %d, %s duplex\n", ++ priv->port_id, phy->speed, ++ (phy->duplex == DUPLEX_FULL) ? "full" : "half"); ++ } else { ++ printf("link down on port %d\n", priv->port_id); ++ } + +- memcpy_toio(va, &prueth->config[icssg][0], +- sizeof(prueth->config[icssg][0])); ++ return phy->link; + } + + static int prueth_start(struct udevice *dev) +@@ -194,26 +276,14 @@ static int prueth_start(struct udevice *dev) + char tx_chn_name[16]; + char rx_chn_name[16]; + +- icssg_class_set_mac_addr(priv->miig_rt[priv->ingress_icssg], +- priv->ingress_slice, ++ icssg_class_set_mac_addr(priv->miig_rt, priv->slice, + (u8 *)pdata->enetaddr); +- icssg_class_default(priv->miig_rt[priv->ingress_icssg], +- priv->ingress_slice); ++ icssg_class_default(priv->miig_rt, priv->slice); ++ ++ /* To differentiate channels for SLICE0 vs SLICE1 */ ++ snprintf(tx_chn_name, sizeof(tx_chn_name), "tx%d-0", priv->slice); ++ snprintf(rx_chn_name, sizeof(rx_chn_name), "rx%d", priv->slice); + +- /* To differentiate channels for SLICE0 vs SLICE1 for single icssg +- * and ICSSG0 vs ICSSG1 for dual icssg +- */ +- if (!priv->dual_icssg) { +- snprintf(tx_chn_name, sizeof(tx_chn_name), "tx%d-0", +- priv->egress_slice); +- snprintf(rx_chn_name, sizeof(rx_chn_name), "rx%d", +- priv->ingress_slice); +- } else { +- snprintf(tx_chn_name, sizeof(tx_chn_name), "tx%d-0", +- priv->egress_icssg); +- snprintf(rx_chn_name, sizeof(rx_chn_name), "rx%d", +- priv->ingress_icssg); +- } + ret = dma_get_by_name(dev, tx_chn_name, &priv->dma_tx); + if (ret) + dev_err(dev, "TX dma get failed %d\n", ret); +@@ -248,7 +318,16 @@ static int prueth_start(struct udevice *dev) + goto phy_fail; + } + ++ ret = icssg_update_link(priv); ++ if (!ret) { ++ ret = -ENODEV; ++ goto phy_shut; ++ } ++ + return 0; ++ ++phy_shut: ++ phy_shutdown(priv->phydev); + phy_fail: + dma_disable(&priv->dma_rx); + rx_fail: +@@ -306,9 +385,8 @@ static int prueth_free_pkt(struct udevice *dev, uchar *packet, int length) + static void prueth_stop(struct udevice *dev) + { + struct prueth *priv = dev_get_priv(dev); +- int icssg = priv->ingress_icssg, slice = priv->ingress_slice; + +- icssg_class_disable(priv->miig_rt[icssg], slice); ++ icssg_class_disable(priv->miig_rt, priv->slice); + + phy_shutdown(priv->phydev); + +@@ -319,13 +397,7 @@ static void prueth_stop(struct udevice *dev) + dma_free(&priv->dma_rx); + + /* Workaround for shutdown command */ +- writel(0x0, priv->tmaddr[icssg] + slice * 0x200); +- if (!priv->dual_icssg) +- return; +- +- icssg = priv->egress_icssg; +- slice = priv->egress_slice; +- writel(0x0, priv->tmaddr[icssg] + slice * 0x200); ++ writel(0x0, priv->tmaddr + priv->slice * 0x200); + } + + static const struct eth_ops prueth_ops = { +@@ -402,82 +474,43 @@ static int prueth_config_rgmiidelay(struct prueth *prueth, + return 0; + } + +-static int get_pruss_info(struct prueth *prueth, +- ofnode node, ofnode *pruss_node, int icssg) +-{ +- struct udevice **prussdev = NULL; +- int err; +- +- *pruss_node = ofnode_get_parent(node); +- err = misc_init_by_ofnode(*pruss_node); +- if (err) +- return err; +- +- err = device_find_global_by_ofnode(*pruss_node, prussdev); +- if (err) +- dev_err(dev, "error getting the pruss dev\n"); +- +- err = pruss_request_shrmem_region(*prussdev, +- &prueth->pruss_shrdram2[icssg]); +- if (err) +- return err; +- +- if (icssg) +- prueth->miig_rt[icssg] = +- syscon_regmap_lookup_by_phandle(prueth->dev, +- "mii-g-rt-paired"); +- else +- prueth->miig_rt[icssg] = +- syscon_regmap_lookup_by_phandle(prueth->dev, +- "mii-g-rt"); +- if (!prueth->miig_rt[icssg]) { +- dev_err(dev, "No mii-g-rt syscon regmap for icssg %d\n", icssg); +- return -ENODEV; +- } +- +- return pruss_request_tm_region(*prussdev, &prueth->tmaddr[icssg]); +-} +- + static int prueth_probe(struct udevice *dev) + { +- ofnode eth0_node, eth1_node, node, pruss_node, mdio_node, sram_node, +- dev_node; + struct prueth *prueth; +- u32 err, sp, tmp[8]; +- int ret = 0; ++ int ret = 0, i; ++ ofnode eth0_node, eth1_node, node, pruss_node, mdio_node, sram_node; ++ u32 phandle, err, sp; ++ struct udevice **prussdev = NULL; ++ struct icssg_config *config; + + prueth = dev_get_priv(dev); + prueth->dev = dev; +- dev_node = dev_ofnode(dev); +- +- if (ofnode_device_is_compatible(dev_node, "ti,am654-dualicssg-prueth")) +- prueth->dual_icssg = true; +- +- if (prueth->dual_icssg) +- err = ofnode_read_u32_array(dev_node, "prus", tmp, 8); +- else +- err = ofnode_read_u32_array(dev_node, "prus", tmp, 4); ++ err = ofnode_read_u32(dev_ofnode(dev), "prus", &phandle); + if (err) + return err; + +- node = ofnode_get_by_phandle(tmp[0]); ++ node = ofnode_get_by_phandle(phandle); + if (!ofnode_valid(node)) + return -EINVAL; + +- ret = get_pruss_info(prueth, node, &pruss_node, ICSSG0); ++ pruss_node = ofnode_get_parent(node); ++ err = misc_init_by_ofnode(pruss_node); ++ if (err) ++ return err; ++ ++ ret = device_find_global_by_ofnode(pruss_node, prussdev); + if (ret) +- return ret; ++ dev_err(dev, "error getting the pruss dev\n"); + +- if (prueth->dual_icssg) { +- ofnode pruss_node_pair; ++ ret = pruss_request_shrmem_region(*prussdev, &prueth->pruss_shrdram2); ++ if (ret) ++ return ret; + +- node = ofnode_get_by_phandle(tmp[4]); +- ret = get_pruss_info(prueth, node, &pruss_node_pair, ICSSG1); +- if (ret) +- return ret; +- } ++ ret = pruss_request_tm_region(*prussdev, &prueth->tmaddr); ++ if (ret) ++ return ret; + +- node = dev_node; ++ node = dev_ofnode(dev); + eth0_node = ofnode_find_subnode(node, "ethernet-mii0"); + eth1_node = ofnode_find_subnode(node, "ethernet-mii1"); + /* one node must be present and available else we fail */ +@@ -497,43 +530,29 @@ static int prueth_probe(struct udevice *dev) + } + + if (ofnode_valid(eth0_node)) { +- if (!prueth->dual_icssg) { +- prueth->slice[ICSSG0] = 0; +- prueth->egress_icssg = ICSSG0; +- prueth->egress_slice = 0; +- prueth->ingress_icssg = ICSSG0; +- prueth->ingress_slice = 0; +- } else { +- prueth->slice[ICSSG0] = 0; +- prueth->slice[ICSSG1] = 1; +- prueth->egress_icssg = ICSSG1; +- prueth->egress_slice = 1; +- prueth->ingress_icssg = ICSSG0; +- prueth->ingress_slice = 0; +- } ++ prueth->slice = 0; + icssg_ofdata_parse_phy(dev, eth0_node); + prueth->eth_node[PRUETH_MAC0] = eth0_node; + } + + if (ofnode_valid(eth1_node)) { +- if (!prueth->dual_icssg) { +- prueth->slice[ICSSG0] = 1; +- prueth->egress_icssg = ICSSG0; +- prueth->egress_slice = 0; +- prueth->ingress_icssg = ICSSG0; +- prueth->ingress_slice = 0; +- } else { +- prueth->slice[ICSSG0] = 1; +- prueth->slice[ICSSG1] = 0; +- prueth->egress_icssg = ICSSG0; +- prueth->egress_slice = 1; +- prueth->ingress_icssg = ICSSG1; +- prueth->ingress_slice = 0; +- } ++ prueth->slice = 1; + icssg_ofdata_parse_phy(dev, eth1_node); + prueth->eth_node[PRUETH_MAC0] = eth1_node; + } + ++ prueth->miig_rt = syscon_regmap_lookup_by_phandle(dev, "mii-g-rt"); ++ if (!prueth->miig_rt) { ++ dev_err(dev, "couldn't get mii-g-rt syscon regmap\n"); ++ return -ENODEV; ++ } ++ ++ prueth->mii_rt = syscon_regmap_lookup_by_phandle(dev, "mii-rt"); ++ if (!prueth->mii_rt) { ++ dev_err(dev, "couldn't get mii-rt syscon regmap\n"); ++ return -ENODEV; ++ } ++ + ret = clk_get_by_name(dev, "mdio_fck", &prueth->mdiofck); + if (ret) { + dev_err(dev, "failed to get clock %d\n", ret); +@@ -545,7 +564,7 @@ static int prueth_probe(struct udevice *dev) + return ret; + } + +- ret = ofnode_read_u32(node, "sram", &sp); ++ ret = ofnode_read_u32(dev_ofnode(dev), "sram", &sp); + if (ret) { + dev_err(dev, "sram node fetch failed %d\n", ret); + return ret; +@@ -555,20 +574,15 @@ static int prueth_probe(struct udevice *dev) + if (!ofnode_valid(node)) + return -EINVAL; + +- prueth->sram_pa[ICSSG0] = ofnode_get_addr(sram_node); +- if (prueth->dual_icssg) +- prueth->sram_pa[ICSSG1] = +- prueth->sram_pa[ICSSG0] + MSMC_RAM_SIZE; ++ prueth->sram_pa = ofnode_get_addr(sram_node); + +- if (ofnode_valid(eth0_node)) { ++ if (!prueth->slice) { + ret = prueth_config_rgmiidelay(prueth, eth0_node); + if (ret) { + dev_err(dev, "prueth_config_rgmiidelay failed\n"); + return ret; + } +- } +- +- if (ofnode_valid(eth1_node)) { ++ } else { + ret = prueth_config_rgmiidelay(prueth, eth1_node); + if (ret) { + dev_err(dev, "prueth_config_rgmiidelay failed\n"); +@@ -580,7 +594,7 @@ static int prueth_probe(struct udevice *dev) + prueth->mdio_base = ofnode_get_addr(mdio_node); + ofnode_read_u32(mdio_node, "bus_freq", &prueth->mdio_freq); + +- ret = icssg_mdio_init(dev, ICSSG0); ++ ret = icssg_mdio_init(dev); + if (ret) + return ret; + +@@ -591,9 +605,17 @@ static int prueth_probe(struct udevice *dev) + } + + /* Set Load time configuration */ +- icssg_config_set(prueth, ICSSG0, prueth->slice[ICSSG0]); +- if (prueth->dual_icssg) +- icssg_config_set(prueth, ICSSG1, prueth->slice[ICSSG1]); ++ config = &prueth->config[0]; ++ memset(config, 0, sizeof(*config)); ++ config->addr_lo = cpu_to_le32(lower_32_bits(prueth->sram_pa)); ++ config->addr_hi = cpu_to_le32(upper_32_bits(prueth->sram_pa)); ++ config->num_tx_threads = 0; ++ config->rx_flow_id = 0; /* flow id for host port */ ++ ++ for (i = 8; i < 16; i++) ++ config->tx_buf_sz[i] = cpu_to_le32(0x1800); ++ ++ icssg_config_set(prueth); + + return 0; + out: +@@ -605,7 +627,6 @@ out: + + static const struct udevice_id prueth_ids[] = { + { .compatible = "ti,am654-icssg-prueth" }, +- { .compatible = "ti,am654-dualicssg-prueth" }, + { } + }; + +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0012-feat-add-the-flash-protect-for-winbond-flash.patch b/recipes-bsp/u-boot/files/0012-feat-add-the-flash-protect-for-winbond-flash.patch new file mode 100644 index 000000000..bd22f9212 --- /dev/null +++ b/recipes-bsp/u-boot/files/0012-feat-add-the-flash-protect-for-winbond-flash.patch @@ -0,0 +1,28 @@ +From 09622d175a5421e19dd6cf5cc65bfa3d061a8afb Mon Sep 17 00:00:00 2001 +From: zengchao +Date: Wed, 8 Jan 2020 11:46:39 +0800 +Subject: [PATCH 12/15] feat: add the flash protect for winbond flash + + as lack of the flash protect for winbond flash, + add the flash protect for windbond + +Signed-off-by: zengchao +--- + drivers/mtd/spi/spi-nor-core.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c +index 6933e99e47..b1643e3a6e 100644 +--- a/drivers/mtd/spi/spi-nor-core.c ++++ b/drivers/mtd/spi/spi-nor-core.c +@@ -2437,6 +2437,7 @@ int spi_nor_scan(struct spi_nor *nor) + if (JEDEC_MFR(info) == SNOR_MFR_ST || + JEDEC_MFR(info) == SNOR_MFR_MICRON || + JEDEC_MFR(info) == SNOR_MFR_SST || ++ JEDEC_MFR(info) == SNOR_MFR_WINBOND || + info->flags & SPI_NOR_HAS_LOCK) { + nor->flash_lock = stm_lock; + nor->flash_unlock = stm_unlock; +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0013-bugfix-set-gpio-direction-output-show-error.patch b/recipes-bsp/u-boot/files/0013-bugfix-set-gpio-direction-output-show-error.patch new file mode 100644 index 000000000..ac8191151 --- /dev/null +++ b/recipes-bsp/u-boot/files/0013-bugfix-set-gpio-direction-output-show-error.patch @@ -0,0 +1,40 @@ +From 487e7b37faf81c0af8c94b10bb1418da3cf7629d Mon Sep 17 00:00:00 2001 +From: zengchao +Date: Sat, 11 Jan 2020 14:17:59 +0800 +Subject: [PATCH 13/15] bugfix: set gpio direction output show error + + when gpio pin exceed 31,init the output pin value would show error + + cause:set the gpio pin logical value not setting the correctly gpio bank + fix:when set the logical value to pin should confirm gpio bank + +Signed-off-by: zengchao +--- + drivers/gpio/da8xx_gpio.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c +index 0deb034504..d5ac4ddbce 100644 +--- a/drivers/gpio/da8xx_gpio.c ++++ b/drivers/gpio/da8xx_gpio.c +@@ -15,6 +15,8 @@ + + #include "da8xx_gpio.h" + ++static int _gpio_set_value(struct davinci_gpio *bank, unsigned int gpio, int value); ++ + #ifndef CONFIG_DM_GPIO + #include + #include +@@ -345,7 +347,7 @@ int gpio_free(unsigned int gpio) + static int _gpio_direction_output(struct davinci_gpio *bank, unsigned int gpio, int value) + { + clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); +- gpio_set_value(gpio, value); ++ _gpio_set_value(bank, (gpio & 0x1f), value); + return 0; + } + +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0014-feat-add-config-for-skipping-certificate-verificatio.patch b/recipes-bsp/u-boot/files/0014-feat-add-config-for-skipping-certificate-verificatio.patch new file mode 100644 index 000000000..033aaf117 --- /dev/null +++ b/recipes-bsp/u-boot/files/0014-feat-add-config-for-skipping-certificate-verificatio.patch @@ -0,0 +1,146 @@ +From a0fc26a3b60381aac8183a6d7ef951c9c0077312 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Tue, 14 Jan 2020 22:46:46 +0800 +Subject: [PATCH 14/15] feat: add config for skipping certificate verification + +Signed-off-by: le.jin +--- + arch/arm/mach-k3/security.c | 42 ++++++++++++++++++++ + board/siemens/common/Kconfig | 7 +++- + configs/am65x_iot2050_advanced_a53_defconfig | 1 + + configs/am65x_iot2050_advanced_r5_defconfig | 13 +++--- + 4 files changed, 56 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c +index 52f49bf01f..b64e6ebae4 100644 +--- a/arch/arm/mach-k3/security.c ++++ b/arch/arm/mach-k3/security.c +@@ -12,8 +12,47 @@ + #include + #include + ++#ifdef CONFIG_FIT_IMAGE_POST_PROCESS_SKIP_CERT ++void skip_x509(u8 **body, size_t *image_size) ++{ ++ u32 len = 0; ++ u8 *cert = *body; ++ u8 *cert_len_ptr = (u8 *)&len; ++ ++ if(*cert != 0x30) ++ { ++ return; ++ } ++ len = *(cert + 1); ++ /* Check if the certificate is greater than 64KB */ ++ if((len > 0x80) && ++ (len != 0x82)) ++ { ++ return; ++ } ++ if(len == 0x82) ++ { ++ /* length takes 2 bytes */ ++ *cert_len_ptr = *(cert + 3); ++ *(cert_len_ptr + 1) = *(cert + 2); ++ /* add current offset */ ++ len += 3; ++ } ++ else ++ { ++ /* add current offset */ ++ len += 1; ++ } ++ len += 1; ++ *body = (u8 *)((u64)(*body) + len); ++ if(*image_size > len) ++ *image_size = *image_size - len; ++} ++#endif ++ + void board_fit_image_post_process(void **p_image, size_t *p_size) + { ++#ifndef CONFIG_FIT_IMAGE_POST_PROCESS_SKIP_CERT + struct udevice *dev; + struct ti_sci_handle *ti_sci; + struct ti_sci_proc_ops *proc_ops; +@@ -60,4 +99,7 @@ void board_fit_image_post_process(void **p_image, size_t *p_size) + IS_ENABLED(CONFIG_SPL_YMODEM_SUPPORT) && + spl_boot_device() == BOOT_DEVICE_UART)) + printf("Authentication passed\n"); ++#else ++ skip_x509((u8 **)p_image, p_size); ++#endif + } +diff --git a/board/siemens/common/Kconfig b/board/siemens/common/Kconfig +index 9a2cee1ff9..c103bff898 100644 +--- a/board/siemens/common/Kconfig ++++ b/board/siemens/common/Kconfig +@@ -12,4 +12,9 @@ config EEPROM_BUS_ADDRESS + config EEPROM_CHIP_ADDRESS + hex "Board EEPROM's I2C chip address" + range 0 0xff +- default 0x54 +\ No newline at end of file ++ default 0x54 ++ ++config FIT_IMAGE_POST_PROCESS_SKIP_CERT ++ bool "Skip certificate validation" ++ help ++ Skip certificate validation in image post process +diff --git a/configs/am65x_iot2050_advanced_a53_defconfig b/configs/am65x_iot2050_advanced_a53_defconfig +index d05fedd64f..38f61c2fea 100644 +--- a/configs/am65x_iot2050_advanced_a53_defconfig ++++ b/configs/am65x_iot2050_advanced_a53_defconfig +@@ -156,6 +156,7 @@ CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_TI_SECURE_DEVICE=y + CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y + CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_IMAGE_POST_PROCESS_SKIP_CERT=y + CONFIG_BLOCK_CACHE=y + CONFIG_SPL_BLOCK_CACHE=y + CONFIG_LED=y +diff --git a/configs/am65x_iot2050_advanced_r5_defconfig b/configs/am65x_iot2050_advanced_r5_defconfig +index dce7a3e0bd..7b67bb91e8 100644 +--- a/configs/am65x_iot2050_advanced_r5_defconfig ++++ b/configs/am65x_iot2050_advanced_r5_defconfig +@@ -1,5 +1,6 @@ + CONFIG_ARM=y + CONFIG_ARCH_K3=y ++CONFIG_TI_SECURE_DEVICE=y + CONFIG_SPL_GPIO_SUPPORT=y + CONFIG_SPL_LIBCOMMON_SUPPORT=y + CONFIG_SPL_LIBGENERIC_SUPPORT=y +@@ -16,6 +17,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y + CONFIG_SPL_SPI_SUPPORT=y + CONFIG_NR_DRAM_BANKS=2 + CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_IMAGE_POST_PROCESS_SKIP_CERT=y + CONFIG_USE_BOOTCOMMAND=y + # CONFIG_DISPLAY_CPUINFO is not set + CONFIG_SPL_STACK_R=y +@@ -98,6 +101,10 @@ CONFIG_DM_REGULATOR_LP873X=y + CONFIG_SPL_DM_REGULATOR_LP873X=y + CONFIG_DM_REGULATOR_TPS62360=y + CONFIG_K3_AVS0=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_BLOCK_CACHE=y ++CONFIG_SPL_BLOCK_CACHE=y + CONFIG_RAM=y + CONFIG_SPL_RAM=y + CONFIG_K3_SYSTEM_CONTROLLER=y +@@ -114,10 +121,4 @@ CONFIG_TIMER=y + CONFIG_SPL_TIMER=y + CONFIG_OMAP_TIMER=y + CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +-CONFIG_LED=y +-CONFIG_LED_GPIO=y +-CONFIG_TI_SECURE_DEVICE=y +-CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +-CONFIG_BLOCK_CACHE=y +-CONFIG_SPL_BLOCK_CACHE=y + CONFIG_SYS_K3_KEY="keys/custMpk.pem" +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/0015-feat-enable-verified-boot.patch b/recipes-bsp/u-boot/files/0015-feat-enable-verified-boot.patch new file mode 100644 index 000000000..61e3df910 --- /dev/null +++ b/recipes-bsp/u-boot/files/0015-feat-enable-verified-boot.patch @@ -0,0 +1,487 @@ +From a5588edb0176a045758165ea4b27ee51bbdd3b34 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Wed, 29 Jan 2020 21:22:51 +0800 +Subject: [PATCH 15/15] feat: enable verified boot + +Signed-off-by: le.jin +--- + Makefile | 9 ++++- + arch/arm/dts/iot2050-common.dtsi | 9 +++++ + arch/arm/dts/iot2050-r5-common.dtsi | 9 +++++ + arch/arm/mach-k3/config.mk | 1 + + arch/arm/mach-k3/config_secure.mk | 22 +++++----- + arch/arm/mach-k3/dtb_stub.its | 31 ++++++++++++++ + arch/arm/mach-k3/make_fit.py | 40 ++++++++++++++----- + common/spl/spl_fit.c | 14 ++++++- + configs/am65x_iot2050_advanced_a53_defconfig | 5 +++ + .../am65x_iot2050_advanced_gp_a53_defconfig | 6 +++ + .../am65x_iot2050_advanced_gp_r5_defconfig | 6 +++ + configs/am65x_iot2050_advanced_r5_defconfig | 5 +++ + configs/am65x_iot2050_basic_a53_defconfig | 6 +++ + configs/am65x_iot2050_basic_r5_defconfig | 6 +++ + scripts/Makefile.spl | 3 +- + tools/k3_fit_atf.sh | 19 +++++++++ + 16 files changed, 168 insertions(+), 23 deletions(-) + create mode 100644 arch/arm/mach-k3/dtb_stub.its + +diff --git a/Makefile b/Makefile +index 4d3d5cfa24..b75ef447a4 100644 +--- a/Makefile ++++ b/Makefile +@@ -898,7 +898,7 @@ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \ + + quiet_cmd_mkfitimage = MKIMAGE $@ + cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -D "-i $(obj) -i $(src)"\ +- -f $(U_BOOT_ITS) -E $@ -p $(CONFIG_FIT_EXTERNAL_OFFSET)\ ++ -f $(U_BOOT_ITS) $@ -p $(CONFIG_FIT_EXTERNAL_OFFSET)\ + >$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT)) + + quiet_cmd_cat = CAT $@ +@@ -1012,6 +1012,12 @@ dtbs: dts/dt.dtb + @: + dts/dt.dtb: u-boot + $(Q)$(MAKE) $(build)=dts dtbs ++ifdef CONFIG_ARCH_K3 ++ # Write public key to dtb ++ $(eval DTB_LIST=$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST)))) ++ @$(foreach dtb,$(DTB_LIST),$(objtree)/tools/mkimage -f $(srctree)/arch/arm/mach-k3/dtb_stub.its \ ++ -k $(KEY_DIR) -K $(dtb) -r $(basename $(dtb)).itb > $(MKIMAGEOUTPUT);) ++endif + + quiet_cmd_copy = COPY $@ + cmd_copy = cp $< $@ +@@ -1206,6 +1212,7 @@ ifndef U_BOOT_ITS + u-boot.img: $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin dts/dt.dtb,u-boot.bin) FORCE + $(call if_changed,mkimage) + else ++MKIMAGEFLAGS_u-boot.itb = -k $(KEY_DIR) + u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE + $(call if_changed,mkfitimage) + $(BOARD_SIZE_CHECK) +diff --git a/arch/arm/dts/iot2050-common.dtsi b/arch/arm/dts/iot2050-common.dtsi +index 9769818d69..2f4b839cf5 100644 +--- a/arch/arm/dts/iot2050-common.dtsi ++++ b/arch/arm/dts/iot2050-common.dtsi +@@ -14,6 +14,15 @@ + remoteproc1 = &mcu_r5fss0_core1; + }; + ++ signature { ++ key-custMpk { ++ required = "conf"; ++ algo = "sha256, rsa4096"; ++ key-name-hint = "custMpk"; ++ u-boot,dm-spl; ++ }; ++ }; ++ + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; +diff --git a/arch/arm/dts/iot2050-r5-common.dtsi b/arch/arm/dts/iot2050-r5-common.dtsi +index 32cd62ec05..6e0caddf3a 100644 +--- a/arch/arm/dts/iot2050-r5-common.dtsi ++++ b/arch/arm/dts/iot2050-r5-common.dtsi +@@ -20,6 +20,15 @@ + remoteproc2 = &a53_2; + }; + ++ signature { ++ key-custMpk { ++ required = "conf"; ++ algo = "sha256, rsa4096"; ++ key-name-hint = "custMpk"; ++ u-boot,dm-spl; ++ }; ++ }; ++ + a53_0: a53@0 { + compatible = "ti,am654-rproc"; + reg = <0x0 0x00a90000 0x0 0x10>; +diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk +index 10a6ff3940..54fc53c0bf 100644 +--- a/arch/arm/mach-k3/config.mk ++++ b/arch/arm/mach-k3/config.mk +@@ -25,6 +25,7 @@ endif + else + KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY)) + endif ++KEY_DIR=$(dir $(KEY)) + + quiet_cmd_k3secureimg = SECURE $@ + cmd_k3secureimg = \ +diff --git a/arch/arm/mach-k3/config_secure.mk b/arch/arm/mach-k3/config_secure.mk +index 5c8f1139c6..dd4a9ff9d4 100644 +--- a/arch/arm/mach-k3/config_secure.mk ++++ b/arch/arm/mach-k3/config_secure.mk +@@ -4,24 +4,28 @@ + # Andrew F. Davis + + %.dtb_HS: %.dtb FORCE +- $(call if_changed,k3secureimg,$(dir $(KEY))/x509-sysfw-template.txt) ++ $(call if_changed,k3secureimg,$(KEY_DIR)/x509-sysfw-template.txt) + + $(obj)/u-boot-spl-nodtb.bin_HS: $(obj)/u-boot-spl-nodtb.bin FORCE +- $(call if_changed,k3secureimg,$(dir $(KEY))/x509-sysfw-template.txt) ++ $(call if_changed,k3secureimg,$(KEY_DIR)/x509-sysfw-template.txt) ++ ++MKIMAGEFLAGS_tispl.bin_HS = -k $(KEY_DIR) + + tispl.bin_HS: $(obj)/u-boot-spl-nodtb.bin_HS $(patsubst %,$(obj)/dts/%.dtb_HS,$(subst ",,$(CONFIG_SPL_OF_LIST))) $(SPL_ITS) FORCE + $(call if_changed,mkfitimage) + +-MKIMAGEFLAGS_u-boot.img_HS = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ +- -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ +- -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \ +- $(patsubst %,-b arch/$(ARCH)/dts/%.dtb_HS,$(subst ",,$(CONFIG_OF_LIST))) ++MKIMAGEFLAGS_u-boot.img_HS = -k $(KEY_DIR) + + OF_LIST_TARGETS = $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) + $(OF_LIST_TARGETS): dtbs + + u-boot-nodtb.bin_HS: u-boot-nodtb.bin FORCE +- $(call if_changed,k3secureimg,$(dir $(KEY))/x509-sysfw-template.txt) ++ $(call if_changed,k3secureimg,$(KEY_DIR)/x509-sysfw-template.txt) ++ ++U_BOOT_ITS_HS := u_boot.its_HS ++$(U_BOOT_ITS_HS): ++ IS_HS=1 $(srctree)/arch/$(ARCH)/mach-k3/make_fit.py $(BOARD) \ ++ $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@ + +-u-boot.img_HS: u-boot-nodtb.bin_HS u-boot.img $(patsubst %.dtb,%.dtb_HS,$(OF_LIST_TARGETS)) FORCE +- $(call if_changed,mkimage) ++u-boot.img_HS: u-boot-nodtb.bin_HS u-boot.img $(patsubst %.dtb,%.dtb_HS,$(OF_LIST_TARGETS)) $(U_BOOT_ITS_HS) FORCE ++ $(objtree)/tools/mkimage -f $(U_BOOT_ITS_HS) $(MKIMAGEFLAGS_$(@F)) $@ -p $(CONFIG_FIT_EXTERNAL_OFFSET) +diff --git a/arch/arm/mach-k3/dtb_stub.its b/arch/arm/mach-k3/dtb_stub.its +new file mode 100644 +index 0000000000..e30b2f7b96 +--- /dev/null ++++ b/arch/arm/mach-k3/dtb_stub.its +@@ -0,0 +1,31 @@ ++/dts-v1/; ++ ++/ { ++ description = "Stub ITS"; ++ #address-cells = <0x1>; ++ images { ++ stub { ++ description = "Stub ITS"; ++ type = "firmware"; ++ arch = "arm"; ++ compression = "none"; ++ data=<0>; ++ hash-1 { ++ algo = "sha256"; ++ }; ++ }; ++ }; ++ configurations { ++ default = "conf-stub"; ++ conf-stub { ++ description = "stub"; ++ stub = "stub"; ++ signature { ++ algo = "sha256,rsa4096"; ++ key-name-hint = "custMpk"; ++ sign-images = "stub"; ++ }; ++ }; ++ }; ++}; ++ +diff --git a/arch/arm/mach-k3/make_fit.py b/arch/arm/mach-k3/make_fit.py +index 505aeda419..625c4a1bd3 100755 +--- a/arch/arm/mach-k3/make_fit.py ++++ b/arch/arm/mach-k3/make_fit.py +@@ -29,8 +29,10 @@ core_template = string.Template(""" + compression = "none"; + load = <$loadaddr>; + entry = <0x0>; +- data = /incbin/("u-boot-nodtb.bin"); +- ++ data = /incbin/("u-boot-nodtb.bin$hs"); ++ hash-1 { ++ algo = "sha256"; ++ }; + }; + + $dtbs +@@ -48,13 +50,24 @@ conf_template = string.Template(""" + description = "$dtb"; + firmware = "u-boot"; + fdt = "$dtb.dtb"; +- }; ++ signature { ++ algo = "sha256,rsa4096"; ++ key-name-hint = "custMpk"; ++ sign-images = "fdt", "firmware"; ++ }; ++ }; + """) + + fdt_template = string.Template(""" + $basename { + description = "$basename"; +- data = /incbin/("$dtbdir/$basename"); ++ data = /incbin/("$dtbdir/$basename$hs"); ++ type = "flat_dt"; ++ arch = "arm"; ++ compression = "none"; ++ hash-1 { ++ algo = "sha256"; ++ }; + }; + """) + +@@ -95,10 +108,10 @@ def generate_confs(dtbs): + return "\n".join(confs) + + +-def generate_fdts(dtbos, dtbdir): ++def generate_fdts(hs, dtbos, dtbdir): + fdts = [] + for dtbo in dtbos: +- fdts.append(fdt_template.substitute(basename=dtbo, dtbdir=dtbdir)) ++ fdts.append(fdt_template.substitute(hs=hs, basename=dtbo, dtbdir=dtbdir)) + return "\n".join(fdts) + + +@@ -114,17 +127,21 @@ def get_u_boot_test_base(): + return m.group(1) + + +-def generate_its(board, dtbs): ++def generate_its(board, hs, dtbs): + sys_text_base = get_u_boot_test_base() + dtbdir = '/'.join(dtbs[0].split('/')[:-1]) + dtbs = [dtb.split('/')[-1] for dtb in dtbs] +- ++ if (hs == "1") or (hs == "Y"): ++ hs = "_HS" ++ else: ++ hs = "" + print(core_template.substitute( + loadaddr=sys_text_base, + board=board, ++ hs=hs, + confs=generate_confs(dtbs), +- dtbs=generate_fdts(dtbs, dtbdir), +- overlays=generate_fdts(get_overlays(board), dtbdir)) ++ dtbs=generate_fdts(hs, dtbs, dtbdir), ++ overlays=generate_fdts(hs, get_overlays(board), dtbdir)) + ) + + +@@ -148,7 +165,8 @@ def main(): + + board = sys.argv[1] + dtbs = sys.argv[2:] +- generate_its(board, dtbs) ++ hs = os.getenv('IS_HS', "") ++ generate_its(board, hs, dtbs) + + + if __name__ == "__main__": +diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c +index 31dd33bdd8..536dacb316 100644 +--- a/common/spl/spl_fit.c ++++ b/common/spl/spl_fit.c +@@ -421,7 +421,7 @@ int spl_load_simple_fit_ex(struct spl_image_info *spl_image, + unsigned long count; + struct spl_image_info image_info; + int node = -1; +- int images, ret; ++ int images, configs, ret; + int base_offset, hsize, align_len = ARCH_DMA_MINALIGN - 1; + int index = 0; + +@@ -486,6 +486,18 @@ int spl_load_simple_fit_ex(struct spl_image_info *spl_image, + debug("%s: Cannot find /images node: %d\n", __func__, images); + return -1; + } ++#ifdef CONFIG_SPL_FIT_SIGNATURE ++ configs = fit_find_config_node(fit); ++ if (configs < 0) { ++ debug("%s: Cannot find /configurations node: %d\n", __func__, configs); ++ return -1; ++ } ++ printf("Using '%s' configuration\n", fdt_get_name(fit, configs, NULL)); ++ puts("## Verifying Hash Integrity ... "); ++ if(fit_config_verify(fit, configs)) ++ return -EPERM; ++ puts("OK\n"); ++#endif + + #ifdef CONFIG_SPL_FPGA_SUPPORT + node = spl_fit_get_image_node(fit, images, "fpga", 0); +diff --git a/configs/am65x_iot2050_advanced_a53_defconfig b/configs/am65x_iot2050_advanced_a53_defconfig +index 38f61c2fea..861b76697b 100644 +--- a/configs/am65x_iot2050_advanced_a53_defconfig ++++ b/configs/am65x_iot2050_advanced_a53_defconfig +@@ -162,3 +162,8 @@ CONFIG_SPL_BLOCK_CACHE=y + CONFIG_LED=y + CONFIG_LED_GPIO=y + CONFIG_SYS_K3_KEY="keys/custMpk.pem" ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_FIT_SIGNATURE=y ++CONFIG_IMAGE_FORMAT_LEGACY=y +\ No newline at end of file +diff --git a/configs/am65x_iot2050_advanced_gp_a53_defconfig b/configs/am65x_iot2050_advanced_gp_a53_defconfig +index 5a0a1f67cb..c0bb580d69 100644 +--- a/configs/am65x_iot2050_advanced_gp_a53_defconfig ++++ b/configs/am65x_iot2050_advanced_gp_a53_defconfig +@@ -159,3 +159,9 @@ CONFIG_HEXDUMP=y + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SPI_FLASH_SFDP_SUPPORT=y + CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SYS_K3_KEY="keys/custMpk.pem" ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_FIT_SIGNATURE=y ++CONFIG_IMAGE_FORMAT_LEGACY=y +\ No newline at end of file +diff --git a/configs/am65x_iot2050_advanced_gp_r5_defconfig b/configs/am65x_iot2050_advanced_gp_r5_defconfig +index 021900b5eb..48b3d14842 100644 +--- a/configs/am65x_iot2050_advanced_gp_r5_defconfig ++++ b/configs/am65x_iot2050_advanced_gp_r5_defconfig +@@ -123,3 +123,9 @@ CONFIG_OMAP_TIMER=y + CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 + CONFIG_SPI_FLASH_SFDP_SUPPORT=y + CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SYS_K3_KEY="keys/custMpk.pem" ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_FIT_SIGNATURE=y ++CONFIG_IMAGE_FORMAT_LEGACY=y +\ No newline at end of file +diff --git a/configs/am65x_iot2050_advanced_r5_defconfig b/configs/am65x_iot2050_advanced_r5_defconfig +index 7b67bb91e8..11cfb1386a 100644 +--- a/configs/am65x_iot2050_advanced_r5_defconfig ++++ b/configs/am65x_iot2050_advanced_r5_defconfig +@@ -122,3 +122,8 @@ CONFIG_SPL_TIMER=y + CONFIG_OMAP_TIMER=y + CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 + CONFIG_SYS_K3_KEY="keys/custMpk.pem" ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_FIT_SIGNATURE=y ++CONFIG_IMAGE_FORMAT_LEGACY=y +\ No newline at end of file +diff --git a/configs/am65x_iot2050_basic_a53_defconfig b/configs/am65x_iot2050_basic_a53_defconfig +index 124cc496fd..9f542dea2c 100644 +--- a/configs/am65x_iot2050_basic_a53_defconfig ++++ b/configs/am65x_iot2050_basic_a53_defconfig +@@ -159,3 +159,9 @@ CONFIG_HEXDUMP=y + CONFIG_OF_LIBFDT_OVERLAY=y + CONFIG_SPI_FLASH_SFDP_SUPPORT=y + CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SYS_K3_KEY="keys/custMpk.pem" ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_FIT_SIGNATURE=y ++CONFIG_IMAGE_FORMAT_LEGACY=y +\ No newline at end of file +diff --git a/configs/am65x_iot2050_basic_r5_defconfig b/configs/am65x_iot2050_basic_r5_defconfig +index f5c12f746f..a05a1e53c2 100644 +--- a/configs/am65x_iot2050_basic_r5_defconfig ++++ b/configs/am65x_iot2050_basic_r5_defconfig +@@ -123,3 +123,9 @@ CONFIG_OMAP_TIMER=y + CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 + CONFIG_SPI_FLASH_SFDP_SUPPORT=y + CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SYS_K3_KEY="keys/custMpk.pem" ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_FIT_SIGNATURE=y ++CONFIG_IMAGE_FORMAT_LEGACY=y +\ No newline at end of file +diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl +index 29626e0025..1f15479e33 100644 +--- a/scripts/Makefile.spl ++++ b/scripts/Makefile.spl +@@ -154,7 +154,7 @@ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \ + >$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT)) + + quiet_cmd_mkfitimage = MKIMAGE $@ +-cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(SPL_ITS) -E $@ \ ++cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(SPL_ITS) $@ \ + $(if $(KBUILD_VERBOSE:1=), MKIMAGEOUTPUT) + + MKIMAGEFLAGS_MLO = -T omapimage -a $(CONFIG_SPL_TEXT_BASE) +@@ -433,6 +433,7 @@ $(obj)/$(SPL_BIN).multidtb.fit.lzo: $(obj)/$(SPL_BIN).multidtb.fit + @lzop -f9 $< > $@ + + ifdef CONFIG_ARCH_K3 ++MKIMAGEFLAGS_tispl.bin = -k $(KEY_DIR) + tispl.bin: $(obj)/u-boot-spl-nodtb.bin $(SHRUNK_ARCH_DTB) $(SPL_ITS) FORCE + $(call if_changed,mkfitimage) + endif +diff --git a/tools/k3_fit_atf.sh b/tools/k3_fit_atf.sh +index 4e9f69c087..f7b9bbc24b 100755 +--- a/tools/k3_fit_atf.sh ++++ b/tools/k3_fit_atf.sh +@@ -42,6 +42,9 @@ cat << __HEADER_EOF + os = "arm-trusted-firmware"; + load = <0x70000000>; + entry = <0x70000000>; ++ hash-1 { ++ algo = "sha256"; ++ }; + }; + tee { + description = "OPTEE"; +@@ -52,6 +55,9 @@ cat << __HEADER_EOF + os = "tee"; + load = <0x9e800000>; + entry = <0x9e800000>; ++ hash-1 { ++ algo = "sha256"; ++ }; + }; + spl { + description = "SPL (64-bit)"; +@@ -62,6 +68,9 @@ cat << __HEADER_EOF + compression = "none"; + load = <0x80080000>; + entry = <0x80080000>; ++ hash-1 { ++ algo = "sha256"; ++ }; + }; + __HEADER_EOF + +@@ -74,6 +83,9 @@ do + type = "flat_dt"; + arch = "arm"; + compression = "none"; ++ hash-1 { ++ algo = "sha256"; ++ }; + }; + __FDT_IMAGE_EOF + done +@@ -92,7 +104,14 @@ do + description = "$(basename $dtname .dtb)"; + firmware = "atf"; + loadables = "tee", "spl"; ++ tee = "tee"; ++ spl = "spl"; + fdt = "$(basename $dtname)"; ++ signature { ++ algo = "sha256,rsa4096"; ++ key-name-hint = "custMpk"; ++ sign-images = "fdt", "firmware", "tee", "spl"; ++ }; + }; + __CONF_SECTION_EOF + done +-- +2.17.1 + diff --git a/recipes-bsp/u-boot/files/atf/0001-feat-add-atf-support-to-iot2050-platform.patch b/recipes-bsp/u-boot/files/atf/0001-feat-add-atf-support-to-iot2050-platform.patch new file mode 100644 index 000000000..5add8b173 --- /dev/null +++ b/recipes-bsp/u-boot/files/atf/0001-feat-add-atf-support-to-iot2050-platform.patch @@ -0,0 +1,98 @@ +From e6ac231f2d286d729f4ed8f04309757bffcc4856 Mon Sep 17 00:00:00 2001 +From: Sheng Long Wang +Date: Mon, 25 Nov 2019 16:29:27 +0800 +Subject: [PATCH] feat: add atf support to iot2050 platform + +Signed-off-by: Sheng Long Wang +--- + plat/ti/k3/board/iot2050/board.mk | 17 +++++++++++ + plat/ti/k3/board/iot2050/include/board_def.h | 31 ++++++++++++++++++++ + plat/ti/k3/include/platform_def.h | 7 +++++ + 3 files changed, 55 insertions(+) + create mode 100644 plat/ti/k3/board/iot2050/board.mk + create mode 100644 plat/ti/k3/board/iot2050/include/board_def.h + +diff --git a/plat/ti/k3/board/iot2050/board.mk b/plat/ti/k3/board/iot2050/board.mk +new file mode 100644 +index 00000000..bd897353 +--- /dev/null ++++ b/plat/ti/k3/board/iot2050/board.mk +@@ -0,0 +1,17 @@ ++# ++# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. ++# ++# SPDX-License-Identifier: BSD-3-Clause ++# ++ ++BL32_BASE ?= 0x9e800000 ++$(eval $(call add_define,BL32_BASE)) ++ ++PRELOADED_BL33_BASE ?= 0x80080000 ++$(eval $(call add_define,PRELOADED_BL33_BASE)) ++ ++K3_HW_CONFIG_BASE ?= 0x82000000 ++$(eval $(call add_define,K3_HW_CONFIG_BASE)) ++ ++PLAT_INCLUDES += \ ++ -Iplat/ti/k3/board/iot2050/include \ +diff --git a/plat/ti/k3/board/iot2050/include/board_def.h b/plat/ti/k3/board/iot2050/include/board_def.h +new file mode 100644 +index 00000000..490b975f +--- /dev/null ++++ b/plat/ti/k3/board/iot2050/include/board_def.h +@@ -0,0 +1,31 @@ ++/* ++ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++#ifndef BOARD_DEF_H ++#define BOARD_DEF_H ++ ++#include ++ ++/* The ports must be in order and contiguous */ ++#define K3_CLUSTER0_CORE_COUNT 2 ++#define K3_CLUSTER1_CORE_COUNT 2 ++#define K3_CLUSTER2_CORE_COUNT 2 ++#define K3_CLUSTER3_CORE_COUNT 2 ++ ++/* ++ * This RAM will be used for the bootloader including code, bss, and stacks. ++ * It may need to be increased if BL31 grows in size. ++ */ ++#define SEC_SRAM_BASE 0x70000000 /* Base of MSMC SRAM */ ++#define SEC_SRAM_SIZE 0x00020000 /* 128k */ ++ ++#define PLAT_MAX_OFF_STATE U(2) ++#define PLAT_MAX_RET_STATE U(1) ++ ++#define PLAT_PROC_START_ID 32 ++#define PLAT_PROC_DEVICE_START_ID 202 ++ ++#endif /* BOARD_DEF_H */ +diff --git a/plat/ti/k3/include/platform_def.h b/plat/ti/k3/include/platform_def.h +index 690c68e5..ccb9f2dc 100644 +--- a/plat/ti/k3/include/platform_def.h ++++ b/plat/ti/k3/include/platform_def.h +@@ -91,9 +91,16 @@ + + /* Platform default console definitions */ + #ifndef K3_USART_BASE ++ ++#if TARGET_BOARD == iot2050 ++/*MAIN_UART1*/ ++#define K3_USART_BASE 0x02810000 ++#else + #define K3_USART_BASE 0x02800000 + #endif + ++#endif ++ + /* USART has a default size for address space */ + #define K3_USART_SIZE 0x1000 + +-- +2.22.0 + diff --git a/recipes-bsp/u-boot/files/iot2050-uboot-build-rules b/recipes-bsp/u-boot/files/iot2050-uboot-build-rules new file mode 100755 index 000000000..e10212a9d --- /dev/null +++ b/recipes-bsp/u-boot/files/iot2050-uboot-build-rules @@ -0,0 +1,104 @@ +#!/usr/bin/make -f + +# Debian rules for custom U-Boot build +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +ifneq ($(DEB_BUILD_GNU_TYPE),$(DEB_HOST_GNU_TYPE)) +export CROSS_COMPILE=$(DEB_HOST_GNU_TYPE)- +SET_CROSS_BUILD_TOOLS=CROSS_BUILD_TOOLS=y +endif + +WORKDIR=$(shell cd ..; pwd) +S=$(WORKDIR)/git +UBOOT_R5_BUILD_DIR=r5 +PREBUILD_DIR=$(WORKDIR)/prebuild +KEY=$(WORKDIR)/keys/custMpk.pem +TEMPLATE=$(WORKDIR)/keys/x509-sysfw-template.txt + +ifeq ($(IOT2050_VARIANTS), ADVANCED) + UBOOT_CONFIG_A53=am65x_iot2050_advanced_a53_defconfig + UBOOT_CONFIG_R5=am65x_iot2050_advanced_r5_defconfig + SEBOOT_IMG=$(PREBUILD_DIR)/tiboot3_advanced.bin + SOC_SECURITY = SE +else + UBOOT_CONFIG_A53=am65x_iot2050_basic_a53_defconfig + UBOOT_CONFIG_R5=am65x_iot2050_basic_r5_defconfig + SEBOOT_IMG=$(PREBUILD_DIR)/tiboot3_basic.bin + SOC_SECURITY = NONE +endif + +ifeq ($(SOC_SECURITY), SE) + PARALLEL_BUILD=-j 1 + UBOOT_SYSFW=$(PREBUILD_DIR)/sysfw.itb_HS + UBOOT_A53_SPL_IMAGE=tispl.bin_HS + UBOOT_A53_IMAGE=u-boot.img_HS + UBOOT_ATF=$(PREBUILD_DIR)/bl31.bin_HS + UBOOT_TEE=$(PREBUILD_DIR)/bl32.bin_HS +else + PARALLEL_BUILD=-j $(shell echo $$(($$(nproc) * 2))) + UBOOT_SYSFW=$(PREBUILD_DIR)/sysfw.itb + UBOOT_A53_SPL_IMAGE=tispl.bin + UBOOT_A53_IMAGE=u-boot.itb + UBOOT_ATF=$(PREBUILD_DIR)/bl31.bin + UBOOT_TEE=$(PREBUILD_DIR)/bl32.bin +endif + +override_dh_auto_build: + # Prepare certificate + @cp -a $(WORKDIR)/keys ./ + @cp -a $(WORKDIR)/git/tools/k3_gen_x509_cert.sh $(WORKDIR) + + # R5 core + $(MAKE) $(PARALLEL_BUILD) ARCH=arm CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) $(UBOOT_CONFIG_R5) O=$(UBOOT_R5_BUILD_DIR) + $(MAKE) $(PARALLEL_BUILD) ARCH=arm CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) O=$(UBOOT_R5_BUILD_DIR) + @cp -a $(SEBOOT_IMG) $(UBOOT_R5_BUILD_DIR)/tiboot3.bin + + # ATF + $(MAKE) $(PARALLEL_BUILD) -C $(WORKDIR)/atf \ + PLAT=k3 TARGET_BOARD=iot2050 SPD=opteed + # Optee + ${MAKE} $(PARALLEL_BUILD) -C $(WORKDIR)/optee \ + PLATFORM=k3-am65x PLATFORM_FLAVOR_iot2050=y CFG_ARM64_core=y CFG_TEE_CORE_LOG_LEVEL=2 ta-targets=ta_arm64 + +ifeq ($(SOC_SECURITY), SE) + #Sign ATF + $(WORKDIR)/k3_gen_x509_cert.sh -c 16 \ + -b $(WORKDIR)/atf/build/k3/iot2050/release/bl31.bin \ + -o $(PREBUILD_DIR)/bl31.bin_HS -l 0x70000000 -k $(KEY) -t $(TEMPLATE) + + #Sign optee + $(WORKDIR)/k3_gen_x509_cert.sh -c 16 \ + -b $(WORKDIR)/optee/out/arm-plat-k3/core/tee-pager.bin \ + -o $(PREBUILD_DIR)/bl32.bin_HS -l 0x9e800000 -k $(KEY) -t $(TEMPLATE) +else + cp $(WORKDIR)/atf/build/k3/iot2050/release/bl31.bin $(PREBUILD_DIR)/bl31.bin + cp $(WORKDIR)/optee/out/arm-plat-k3/core/tee-pager.bin $(PREBUILD_DIR)/bl32.bin +endif + # A53 core + $(MAKE) $(PARALLEL_BUILD) CROSS_COMPILE=$(CROSS_COMPILE) $(UBOOT_CONFIG_A53) + $(MAKE) $(PARALLEL_BUILD) CROSS_COMPILE=$(CROSS_COMPILE) ATF=$(UBOOT_ATF) TEE=$(UBOOT_TEE) + +ifeq ($(SOC_SECURITY), SE) + mv $(UBOOT_A53_SPL_IMAGE) tispl.bin +endif + rm u-boot.img + mv $(UBOOT_A53_IMAGE) u-boot.img + cp $(UBOOT_SYSFW) sysfw.itb + # Tools + $(MAKE) $(PARALLEL_BUILD) $(SET_CROSS_BUILD_TOOLS) CROSS_COMPILE=$(CROSS_COMPILE) NO_SDL=1 tools-only envtools + +override_dh_auto_install: + mv tools/env/lib.a tools/env/libubootenv.a + +override_dh_auto_test: + +%: + CFLAGS= LDFLAGS= dh $@ --parallel diff --git a/recipes-bsp/u-boot/files/keys/custMpk.crt b/recipes-bsp/u-boot/files/keys/custMpk.crt new file mode 100644 index 000000000..1f1e7fd52 --- /dev/null +++ b/recipes-bsp/u-boot/files/keys/custMpk.crt @@ -0,0 +1,35 @@ +-----BEGIN CERTIFICATE----- +MIIGETCCA/mgAwIBAgIUYLFPq6WLVJQOWomi2f7aEU8t8XowDQYJKoZIhvcNAQEL +BQAwgZcxCzAJBgNVBAYTAkNOMRAwDgYDVQQIDAdTaWNodWFuMRAwDgYDVQQHDAdD +aGVuZ2R1MRMwEQYDVQQKDApTaWVtZW5zIEFHMQ0wCwYDVQQLDARTRVdDMRMwEQYD +VQQDDApTaWVtZW5zIEFHMSswKQYJKoZIhvcNAQkBFhxJT1QyMDAwLmluZHVzdHJ5 +QHNpZW1lbnMuY29tMB4XDTIwMDIwODEzNDE0M1oXDTIwMDMwOTEzNDE0M1owgZcx +CzAJBgNVBAYTAkNOMRAwDgYDVQQIDAdTaWNodWFuMRAwDgYDVQQHDAdDaGVuZ2R1 +MRMwEQYDVQQKDApTaWVtZW5zIEFHMQ0wCwYDVQQLDARTRVdDMRMwEQYDVQQDDApT +aWVtZW5zIEFHMSswKQYJKoZIhvcNAQkBFhxJT1QyMDAwLmluZHVzdHJ5QHNpZW1l +bnMuY29tMIICIjANBgkqhkiG9w0BAQEFAAOCAg8AMIICCgKCAgEAwK6pqIVbX0ZD +zU/ARlMr6kPtKbSuj6Vm9xh6dpZJI8sHJ6HdXCo8zdQFoRsxLCNGXIJ/j0McKfVZ +3w8dVK5pDSpFPhri7JVJ9FEyeb5RLZS60IN783/AmRd7BmXRhf32une8WTEdPxUQ +Pp6piTa/zPxSjGGPytW7yQOajhV3pOmcYZdf7Vl4PAPaQxryOHnDJefleHwW6uWN +cYqQ5ojR2nlMusLKEuog1SZnHepS7qfPJBCMy7Nsc7YkxronQRPrlE9fDVlUjNvZ +Crs8zyNC5ixga8tAPVf7174Q7b2w0ZWx4CsFJUMlMb5QRFKEJNzxSdy3mJYmZLPe +aBrg77tBKNaZ67M8jCE1nqrj7bOqiYm/pMMKo7SlYoaewqZF7eKpCDkXBA8PHkko +7gQrNRExDsIv5fR2bMxTCIFP0Td3R2th9cPMPXGyf18QNJLSLnfkzuJji1efViDS +QDTb/qunYdC0McefgRuVaCRpszlVp+M1dV9O3UB5En6OPaykZ84DnkP0ebTJcLuX +3aGKf95aPDslO80PSIZKgS6BvVycjs3FNSQohdvhiW/uKFebRCA7BCoxsIrZdISr +OdIlT8tMycRTiAyOTuTdBtRifnDRSWkbJYLTEJBHoG+3shWNcf8rqu2cFHFiRPCv +ZhKYEA/yZSG9qRQno3Xhzp7Hl7rZ8fUCAwEAAaNTMFEwHQYDVR0OBBYEFN0WmYM/ +m5wF1G6EQcjRJt4B2z44MB8GA1UdIwQYMBaAFN0WmYM/m5wF1G6EQcjRJt4B2z44 +MA8GA1UdEwEB/wQFMAMBAf8wDQYJKoZIhvcNAQELBQADggIBAEDgFH9/Y2wiOn4Z +7jcv8RQErWrzPF57a2CiiBR4UWS1KXAROaz9+xowJSqNVG6QSMMC6cMyumC2l5pZ +WVOehJ4TsHx4fG/MGUcY5PjJNak9NK0TKTVxJzyLas9DeVS7Ix6G2JwYh7nfsbOM +XQYQ+2WWN5RAM1xS2lnixwL92bN6ZmHUM32a94Yr3BPg9KPJqRJ3Z3dC8csMkJE3 +DvAftEOVQghlZJeKL8/mrG5Hg6oP6w+5WiY8dVw1XgxdsXmvB6NIZkvkVPmYthtq +biXh+XTKQkrJcr7XIoJE+CsF14TOoKbMzB3nKHD6Ua7RL+ogS66cOax5j1c22VWu +i3T1STuakU4hjsuFz6mcQi00HqWOImhJiULi8rN//AKKlCiO4ZEYHUsJwaNlKXtp +EOzN3e5X8TGJucfNJCZSkS+BqdT74VWPoxg4U/l6jVtH+zRG/Fv3BSjX5UzG+ZPd +GkmS9i8Z44SNUXt2F73V8yGHKdiPZ5bhhPUf9aRmPfCWXnQNP4f2KOHfln4o8dlU +8ZCKj6yr+up025KjTChuV0+XaoOcTXZs0cxqP5/mmvh559vd/6JOCIya56RvY+ap +By3qaszeejJeBr/uDc8lXuTaCvGk/qiC4JUpHpIjNO2EXQ+rq2Dp2TeGf0ye9qPk +JuS79cquhH3Rua7fBfdTlsa4Rm85 +-----END CERTIFICATE----- diff --git a/recipes-bsp/u-boot/files/keys/custMpk.key b/recipes-bsp/u-boot/files/keys/custMpk.key new file mode 120000 index 000000000..29025cabb --- /dev/null +++ b/recipes-bsp/u-boot/files/keys/custMpk.key @@ -0,0 +1 @@ +custMpk.pem \ No newline at end of file diff --git a/recipes-bsp/u-boot/files/keys/custMpk.pem b/recipes-bsp/u-boot/files/keys/custMpk.pem new file mode 100644 index 000000000..eb20bbe03 --- /dev/null +++ b/recipes-bsp/u-boot/files/keys/custMpk.pem @@ -0,0 +1,52 @@ +-----BEGIN PRIVATE KEY----- +MIIJQgIBADANBgkqhkiG9w0BAQEFAASCCSwwggkoAgEAAoICAQDArqmohVtfRkPN +T8BGUyvqQ+0ptK6PpWb3GHp2lkkjywcnod1cKjzN1AWhGzEsI0Zcgn+PQxwp9Vnf +Dx1UrmkNKkU+GuLslUn0UTJ5vlEtlLrQg3vzf8CZF3sGZdGF/fa6d7xZMR0/FRA+ +nqmJNr/M/FKMYY/K1bvJA5qOFXek6Zxhl1/tWXg8A9pDGvI4ecMl5+V4fBbq5Y1x +ipDmiNHaeUy6wsoS6iDVJmcd6lLup88kEIzLs2xztiTGuidBE+uUT18NWVSM29kK +uzzPI0LmLGBry0A9V/vXvhDtvbDRlbHgKwUlQyUxvlBEUoQk3PFJ3LeYliZks95o +GuDvu0Eo1pnrszyMITWequPts6qJib+kwwqjtKVihp7CpkXt4qkIORcEDw8eSSju +BCs1ETEOwi/l9HZszFMIgU/RN3dHa2H1w8w9cbJ/XxA0ktIud+TO4mOLV59WINJA +NNv+q6dh0LQxx5+BG5VoJGmzOVWn4zV1X07dQHkSfo49rKRnzgOeQ/R5tMlwu5fd +oYp/3lo8OyU7zQ9IhkqBLoG9XJyOzcU1JCiF2+GJb+4oV5tEIDsEKjGwitl0hKs5 +0iVPy0zJxFOIDI5O5N0G1GJ+cNFJaRslgtMQkEegb7eyFY1x/yuq7ZwUcWJE8K9m +EpgQD/JlIb2pFCejdeHOnseXutnx9QIDAQABAoICACxcyoEbWyM/eULfFsTaR2Uj +iIouqHY4PdGsWB3Pkj1kdFxCn0WmD+PP6g/iw9qGsJ+CCD6C1AwxCiUaRMWHdnZq +ghC/ffm8kY9n1nhDQkt9T9nMPBCfHEfjKRcbADeadmEOSlY6waIRhnD0dNI7wcM/ +YP4jREkOFrM8WixWcvqMMs4hXRu3msAunuUOYjBwkGa80o9/+oLQoVU/8waw/6gO +f4UMbhwWvcJ1mg5AMiHyjvWdvdz0jYbCrAr5Nyp7nKTD9X2MULQxtfILk/+Y/cEi +/Hw1CrBU/o34m8sw/nHyxkZ3gTLIF9sxFyfz26rlF8TKxZajE2niI9XSQnHPqjuG +8yERhYuWlcR50vPLhi7BgXIL7TQgNFhZwrtKBx+wFswfoF9C+NAW1dsp+e37D+jC +wu0T1no/TZRXoGZUTHGpY1Q9U2AovclcNPumujWvkTwKpKp5sKksNPRnhUMBqmxE +I63BcdFVcyGvLYqRqusr9qltbcsYN/n8tPM3L1K7vxoUB5S9vA6yLi+YrG5CHoRI +lEoJKry0A4kQdpX3NwOxY3+Qs3NjF/5bU4o/5OjJkH57D21SrbycJ7ExLXaOV8oh +gb5uYEWPOn4HFhNCvoMyp9xf03846HFN29qnT+dKZoay9ovFe/a8ML+/6klOOO8R +Lfc+VFRlArmTUm5GVOxBAoIBAQD3yAE0h+/GNvw67p9QCPND9H5FBOn4Br9wPXa9 +U/5777eKfW6XBvCQMRmreMH9E52d9+o44TqdFJPyQbyjSemlwNngFI6ZMNso5K1T +QX5Txd1H5SrcGdmjYO1o1mtg5y3RHtuCVmoMc6iwjsSubDlNOygWFjZcC+QPwSIV +eWLtcTEl7PeTcCqZl17yxhJKFtp2orp+Om8awqjIZozqrGkK/HXMF71rc6pQnZpD +e/zQohJf3DDMrVK1Pk6ix026aHGaZ0Rm4p8zqUvdr3NF5RqVPhXHjSyMbFS8hD+F +0mjhO+8+JHjOkKGmDX21xP4afTqa3t8/LnUKjWsJnPbo/ieRAoIBAQDHEssufy7W +c0H+F5WAqRBzOZ+j4uBg4GNLID9+smtVlHp2TF+c6i6CSZ9hp024Nkh/HGHjmJ8p +MKan6iFTTZXdTAw4Atni8QErHo0+AbVjKvqzCA3Rb1kVjsQa1aMwvBCHptBSbKeS +K1ktHr/MOQFYAPaA3bSMul+JrSmAFcvEu8rV0+spU3+KryWLsrd5RiypkzTIlVSu +qTuqvVfPQF1ETKRUrA3n3QZxr7UggTHbnPKcv3ZO1ylT+cgRTy8uj0TRRxWVGZOA +0GyJeHRCFcR/sbZ6jMYY3cCOhI2i6OJt5nwoCln1yYHmWuxFPbtOCHocyANKb60z +Tk4jCT72wZolAoIBAQC2MTVZp/7Rs8qhlqZEFmCxfgx+uY9EVcncQQWXTzSXcvt1 +dKelm2+1xrTGVcPmT88cwZdS/aG4sNHcVyPauVV5EKXj05nK4Ja1qfgceNLnzFza +KZLrRoK2VGYdKVTJaxNQai0j2GCgCUdnk4LhcihsNmxSWUDdS80FHJDwU1I/n3Rx +G54rplVcnGYvgx8dpVI724nfmR3rAmlS+bzyLZYLgvkm+enJIcKBBnHQ31FVI2b5 +X5HuXh+rr0XpAT2RLI0j6HzuXgKL3RcwyXqsUTrLtFwVYCP6mQlxmJiQ0NdXjldr +TSwbT1PdIpxl1JS3a491Ix3qekGLYdLrvaP8TC1RAoIBACI7wyD90goiy+hsGdOE +P0XxVNiT/U3riGe05fZdrEONQvnw7EhJpTHWg0gBw0W4YAMr2FGRP12P9jjN9Gkk +4G6r0zYWl22FUFQf7t4I4S5qh64d5nJrmYAxituqfWO2E4mgUBa8hJyIQ8+UiBsQ +eoCtubYzagcBTciZNJfIJ8BvItRemwQCTd6FfAln9FEwliGbJOqRc3yNsasM4HrN +cLx8CY5eAA4tXhxSwO0UCoTfmoEGE8w/B+Ze/96qJUz2ajkq5jU7rrfqH6AMTMHI +iIAFCYJNjwtbpu9bMBghwD5x8kvYa9vuiR4Z6KOHmBw1LPqiEp7MUZaPErTHtEIu +zNkCggEAcLWGaQAgarwBvBZZhSuQPsT0MsY2weML/C4ebYxiqx6kGHFEQqSo+a30 +xWFN8XlAxi99BU/HdoGjoMOQ3VX/Czm0Ruo2QyEM3p7HIagXDhbi8LBxTwX0RuPR +jHw4lzLT8Eg4NKKdVD0sPsQunZioHE+Tw//NXFEzVjhuMmEHM1iNB6wM2GYWTS6C +KJcPKVsI3boGe3VVqdQJSXlymHmVMuw063B7pUeJc++PSOTzQWgF0rc6vDnRceGP +wobxa7qectmRYhzuaFvPYO6Vaf3HyBij3psrOHEjun1Enph4/pPoGPh1LSosyDPM +nLdZ5bI2pL9G4VAC4WxE8EEIFJONnA== +-----END PRIVATE KEY----- diff --git a/recipes-bsp/u-boot/files/keys/x509-sysfw-template.txt b/recipes-bsp/u-boot/files/keys/x509-sysfw-template.txt new file mode 100644 index 000000000..9befe2f58 --- /dev/null +++ b/recipes-bsp/u-boot/files/keys/x509-sysfw-template.txt @@ -0,0 +1,32 @@ +[ req ] +distinguished_name = req_distinguished_name +x509_extensions = v3_ca +prompt = no +dirstring_type = nobmp + +[ req_distinguished_name ] +C = US +ST = TX +L = Dallas +O = Texas Instruments Incorporated +OU = Processors +CN = TI Support +emailAddress = support@ti.com + +[ v3_ca ] +basicConstraints = CA:true +1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv +1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity +1.3.6.1.4.1.294.1.35 = ASN1:SEQUENCE:sysfw_image_load + +[ swrv ] +swrv = INTEGER:0 + +[ sysfw_image_integrity ] +shaType = OID:2.16.840.1.101.3.4.2.3 +shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL +imageSize = INTEGER:TEST_IMAGE_LENGTH + +[ sysfw_image_load ] +destAddr = FORMAT:HEX,OCT:TEST_BOOT_ADDR +authInPlace = INTEGER:2 diff --git a/recipes-bsp/u-boot/files/optee/0001-feat-add-optee-support-to-iot2050-platform.patch b/recipes-bsp/u-boot/files/optee/0001-feat-add-optee-support-to-iot2050-platform.patch new file mode 100644 index 000000000..9cab356a2 --- /dev/null +++ b/recipes-bsp/u-boot/files/optee/0001-feat-add-optee-support-to-iot2050-platform.patch @@ -0,0 +1,31 @@ +From 5029d8c4dcef1dfee31b0bcafa779ed4c1194f50 Mon Sep 17 00:00:00 2001 +From: Sheng Long Wang +Date: Mon, 25 Nov 2019 16:34:43 +0800 +Subject: [PATCH] feat:add optee support to iot2050 platform + +Signed-off-by: Sheng Long Wang +--- + core/arch/arm/plat-k3/platform_config.h | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/core/arch/arm/plat-k3/platform_config.h b/core/arch/arm/plat-k3/platform_config.h +index 186e7e69..893d4bf5 100644 +--- a/core/arch/arm/plat-k3/platform_config.h ++++ b/core/arch/arm/plat-k3/platform_config.h +@@ -13,8 +13,13 @@ + #define UART1_BASE 0x02810000 + #define UART2_BASE 0x02820000 + ++#if defined(PLATFORM_FLAVOR_iot2050) ++/*MAIN_UART1*/ ++#define CONSOLE_UART_BASE UART1_BASE ++#else + /* UART0 */ + #define CONSOLE_UART_BASE UART0_BASE ++#endif + #define CONSOLE_BAUDRATE 115200 + #define CONSOLE_UART_CLK_IN_HZ 48000000 + +-- +2.22.0 + diff --git a/recipes-bsp/u-boot/files/prebuild/am65x-pru0-prueth-fw.elf b/recipes-bsp/u-boot/files/prebuild/am65x-pru0-prueth-fw.elf new file mode 100644 index 000000000..e6be2c171 Binary files /dev/null and b/recipes-bsp/u-boot/files/prebuild/am65x-pru0-prueth-fw.elf differ diff --git a/recipes-bsp/u-boot/files/prebuild/am65x-pru1-prueth-fw.elf b/recipes-bsp/u-boot/files/prebuild/am65x-pru1-prueth-fw.elf new file mode 100644 index 000000000..fa318489d Binary files /dev/null and b/recipes-bsp/u-boot/files/prebuild/am65x-pru1-prueth-fw.elf differ diff --git a/recipes-bsp/u-boot/files/prebuild/am65x-rtu0-prueth-fw.elf b/recipes-bsp/u-boot/files/prebuild/am65x-rtu0-prueth-fw.elf new file mode 100644 index 000000000..e097bce04 Binary files /dev/null and b/recipes-bsp/u-boot/files/prebuild/am65x-rtu0-prueth-fw.elf differ diff --git a/recipes-bsp/u-boot/files/prebuild/am65x-rtu1-prueth-fw.elf b/recipes-bsp/u-boot/files/prebuild/am65x-rtu1-prueth-fw.elf new file mode 100644 index 000000000..b8a12ef64 Binary files /dev/null and b/recipes-bsp/u-boot/files/prebuild/am65x-rtu1-prueth-fw.elf differ diff --git a/recipes-bsp/u-boot/files/prebuild/sysfw.itb b/recipes-bsp/u-boot/files/prebuild/sysfw.itb new file mode 100644 index 000000000..1ba6373df Binary files /dev/null and b/recipes-bsp/u-boot/files/prebuild/sysfw.itb differ diff --git a/recipes-bsp/u-boot/files/prebuild/sysfw.itb_HS b/recipes-bsp/u-boot/files/prebuild/sysfw.itb_HS new file mode 100644 index 000000000..00074ac1c Binary files /dev/null and b/recipes-bsp/u-boot/files/prebuild/sysfw.itb_HS differ diff --git a/recipes-bsp/u-boot/files/prebuild/tiboot3_advanced.bin b/recipes-bsp/u-boot/files/prebuild/tiboot3_advanced.bin new file mode 100644 index 000000000..b49902c1d Binary files /dev/null and b/recipes-bsp/u-boot/files/prebuild/tiboot3_advanced.bin differ diff --git a/recipes-bsp/u-boot/files/prebuild/tiboot3_basic.bin b/recipes-bsp/u-boot/files/prebuild/tiboot3_basic.bin new file mode 100644 index 000000000..5efb97ae3 Binary files /dev/null and b/recipes-bsp/u-boot/files/prebuild/tiboot3_basic.bin differ diff --git a/recipes-bsp/u-boot/u-boot-iot2050.bb b/recipes-bsp/u-boot/u-boot-iot2050.bb new file mode 100644 index 000000000..3a36d5f85 --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-iot2050.bb @@ -0,0 +1,76 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# +inherit meta-version +require recipes-bsp/u-boot/u-boot-custom.inc + +SRC_URI += " \ + git://git.ti.com/processor-sdk/processor-sdk-u-boot.git;branch=${U_BOOT_BRANCH};rev=${U_BOOT_REV} \ + git://github.com/ARM-software/arm-trusted-firmware.git;rev=${ATF_REV};destsuffix=atf \ + git://github.com/OP-TEE/optee_os.git;rev=${OPTEE_REV};destsuffix=optee \ + file://0001-feat-add-iot2050-platform-support.patch \ + file://0002-am654x-frequency-update-for-both-arm-clusters-and-bu.patch \ + file://0003-iot2050-turn-on-red-led-when-something-goes-wrong.patch \ + file://0004-am65x-fix-usb-hub-issue-for-disabling-charge-detect.patch \ + file://0005-am654x-remove-dependency-of-TI_SECURE_DEV_PKG.patch \ + file://0006-mmc-change-SD-to-mmc0-and-EMMC-Flash-to-mmc1.patch \ + file://0007-feat-add-scripts-to-select-fdt-name.patch \ + file://0008-feat-add-UUID-checking-before-run-distro_bootcmd.patch \ + file://0009-setting-the-rj45-port-led-behavior.patch \ + file://0010-fix-rproc-init-error-in-u-boot.patch \ + file://0011-feat-catch-up-100M-full-duplex-in-u-boot.patch \ + file://0012-feat-add-the-flash-protect-for-winbond-flash.patch \ + file://0013-bugfix-set-gpio-direction-output-show-error.patch \ + file://0014-feat-add-config-for-skipping-certificate-verificatio.patch \ + file://0015-feat-enable-verified-boot.patch \ + file://atf/0001-feat-add-atf-support-to-iot2050-platform.patch;patchdir=${WORKDIR}/atf \ + file://optee/0001-feat-add-optee-support-to-iot2050-platform.patch;patchdir=${WORKDIR}/optee \ + file://iot2050-uboot-build-rules \ + file://keys \ + file://prebuild \ + " + +U_BOOT_BRANCH = "processor-sdk-u-boot-2019.01" +U_BOOT_REV = "029e4c009aaeaee2d06aa8271dbd3a9e73a28aa7" +U_BOOT_BIN = "u-boot.img" +export ATF_REV = "996d37930996c2fa39eb091508b5ad4e0d69ad35" +export OPTEE_REV = "e260ea8dde9669308336d194abec8dcc18784216" + +S = "${WORKDIR}/git" + +# Build environment +CROSS_COMPILE_ARMV7 = "arm-linux-gnueabihf-" +BUILD_DEPENDS =. "openssl, libssl-dev:native, libssl-dev:arm64, python-crypto:native, crossbuild-essential-armhf:native, python3-pyelftools," + +do_prepare_build_append() { + cp ${WORKDIR}/iot2050-uboot-build-rules ${S}/debian/rules + echo "r5/tiboot3.bin /usr/lib/u-boot/${MACHINE}" >> \ + ${S}/debian/u-boot-${MACHINE}.install + echo "tispl.bin /usr/lib/u-boot/${MACHINE}" >> \ + ${S}/debian/u-boot-${MACHINE}.install + echo "sysfw.itb /usr/lib/u-boot/${MACHINE}" >> \ + ${S}/debian/u-boot-${MACHINE}.install + echo "../prebuild/am65x-pru0-prueth-fw.elf /usr/lib/u-boot/${MACHINE}" >> \ + ${S}/debian/u-boot-${MACHINE}.install + echo "../prebuild/am65x-pru1-prueth-fw.elf /usr/lib/u-boot/${MACHINE}" >> \ + ${S}/debian/u-boot-${MACHINE}.install + echo "../prebuild/am65x-rtu0-prueth-fw.elf /usr/lib/u-boot/${MACHINE}" >> \ + ${S}/debian/u-boot-${MACHINE}.install + echo "../prebuild/am65x-rtu1-prueth-fw.elf /usr/lib/u-boot/${MACHINE}" >> \ + ${S}/debian/u-boot-${MACHINE}.install + version=-$(get_meta_version) + echo $version > ${S}/.scmversion +} + +do_build[dirs] += "${DEPLOY_DIR_IMAGE}" + +dpkg_runbuild_prepend() { + export CROSS_COMPILE_ARMV7=${CROSS_COMPILE_ARMV7} + export IOT2050_VARIANTS=${IOT2050_VARIANTS} +} diff --git a/recipes-core/customizations-base/customizations-base_0.1-iot2050-debian.bb b/recipes-core/customizations-base/customizations-base_0.1-iot2050-debian.bb new file mode 100644 index 000000000..1d086346e --- /dev/null +++ b/recipes-core/customizations-base/customizations-base_0.1-iot2050-debian.bb @@ -0,0 +1,36 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +inherit dpkg-raw + +DESCRIPTION = "IOT2050 reference image customizations" + +DEBIAN_DEPENDS = "u-boot-tools" + +SRC_URI = " \ + file://postinst \ + file://ti-pruss/am65x-pru0-prueth-fw.elf \ + file://ti-pruss/am65x-pru1-prueth-fw.elf \ + file://ti-pruss/am65x-rtu0-prueth-fw.elf \ + file://ti-pruss/am65x-rtu1-prueth-fw.elf \ + file://rti_dwwdtest/iot2050/csl_rti_dwwd_test_app_mcu1_0_release.xer5f \ + file://hosts" + +do_install() { + install -v -d ${D}/lib/firmware/ti-pruss + install -v -m 644 ${WORKDIR}/ti-pruss/* ${D}/lib/firmware/ti-pruss + + install -v -d ${D}/lib/firmware/rti_dwwdtest/iot2050 + install -v -m 644 ${WORKDIR}/rti_dwwdtest/iot2050/* ${D}/lib/firmware/rti_dwwdtest/iot2050 + + install -v -d ${D}/etc + install -v -m 644 ${WORKDIR}/hosts ${D}/etc/hosts +} + diff --git a/recipes-core/customizations-base/files/hosts b/recipes-core/customizations-base/files/hosts new file mode 100644 index 000000000..6d658eabc --- /dev/null +++ b/recipes-core/customizations-base/files/hosts @@ -0,0 +1,7 @@ +127.0.0.1 localhost +127.0.1.1 iot2050-debian + +# The following lines are desirable for IPv6 capable hosts +::1 localhost ip6-localhost ip6-loopback +ff02::1 ip6-allnodes +ff02::2 ip6-allrouters diff --git a/recipes-core/customizations-base/files/postinst b/recipes-core/customizations-base/files/postinst new file mode 100644 index 000000000..0307797a3 --- /dev/null +++ b/recipes-core/customizations-base/files/postinst @@ -0,0 +1,20 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +echo "iot2050-debian" > /etc/hostname + +# set nodejs environment for module searching +echo "NODE_PATH=\"/usr/lib/node_modules/:/usr/local/lib/node_modules/\"" >> /etc/environment + +# set the u-boot tool's config +sed -i '\/dev\/mtd1/c\/dev\/mtd3\t\t0x0000\t\t0x20000\t\t0x10000' /etc/fw_env.config +sed -i '\/dev\/mtd2/c\/dev\/mtd4\t\t0x0000\t\t0x20000\t\t0x10000' /etc/fw_env.config + +ln -sf /lib/firmware/rti_dwwdtest/iot2050/csl_rti_dwwd_test_app_mcu1_0_release.xer5f /lib/firmware/am65x-mcu-r5f0_0-fw diff --git a/recipes-core/customizations-base/files/rti_dwwdtest/iot2050/csl_rti_dwwd_test_app_mcu1_0_release.xer5f b/recipes-core/customizations-base/files/rti_dwwdtest/iot2050/csl_rti_dwwd_test_app_mcu1_0_release.xer5f new file mode 100644 index 000000000..d23294461 Binary files /dev/null and b/recipes-core/customizations-base/files/rti_dwwdtest/iot2050/csl_rti_dwwd_test_app_mcu1_0_release.xer5f differ diff --git a/recipes-core/customizations-base/files/ti-pruss/am65x-pru0-prueth-fw.elf b/recipes-core/customizations-base/files/ti-pruss/am65x-pru0-prueth-fw.elf new file mode 100644 index 000000000..e6be2c171 Binary files /dev/null and b/recipes-core/customizations-base/files/ti-pruss/am65x-pru0-prueth-fw.elf differ diff --git a/recipes-core/customizations-base/files/ti-pruss/am65x-pru1-prueth-fw.elf b/recipes-core/customizations-base/files/ti-pruss/am65x-pru1-prueth-fw.elf new file mode 100644 index 000000000..fa318489d Binary files /dev/null and b/recipes-core/customizations-base/files/ti-pruss/am65x-pru1-prueth-fw.elf differ diff --git a/recipes-core/customizations-base/files/ti-pruss/am65x-rtu0-prueth-fw.elf b/recipes-core/customizations-base/files/ti-pruss/am65x-rtu0-prueth-fw.elf new file mode 100644 index 000000000..e097bce04 Binary files /dev/null and b/recipes-core/customizations-base/files/ti-pruss/am65x-rtu0-prueth-fw.elf differ diff --git a/recipes-core/customizations-base/files/ti-pruss/am65x-rtu1-prueth-fw.elf b/recipes-core/customizations-base/files/ti-pruss/am65x-rtu1-prueth-fw.elf new file mode 100644 index 000000000..b8a12ef64 Binary files /dev/null and b/recipes-core/customizations-base/files/ti-pruss/am65x-rtu1-prueth-fw.elf differ diff --git a/recipes-core/customizations-example/customizations-example_0.1-iot2050-debian.bb b/recipes-core/customizations-example/customizations-example_0.1-iot2050-debian.bb new file mode 100644 index 000000000..90cca9b03 --- /dev/null +++ b/recipes-core/customizations-example/customizations-example_0.1-iot2050-debian.bb @@ -0,0 +1,43 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +inherit dpkg-raw + +DESCRIPTION = "IOT2050 reference image customizations example" + +# The bluez and pulseaudio-module-bluetooth must be install before this package, +# that's because the 'passwd --expire root' command in the 'postinst' file +DEBIAN_DEPENDS = "openssh-server, bluez, pulseaudio-module-bluetooth" + +SRC_URI = " \ + file://status-led \ + file://postinst \ + file://board-configuration \ + file://board-configuration.service \ + file://board-configuration.json \ + file://cellular-4g \ + file://eth0-default" + +do_install() { + # add board status led service (SysV LSB) + install -v -d ${D}/etc/init.d + install -v -m 644 ${WORKDIR}/status-led ${D}/etc/init.d/ + # add board configuration service + install -v -d ${D}/usr/bin + install -v -d ${D}/lib/systemd/system/ + install -v -m 755 ${WORKDIR}/board-configuration ${D}/usr/bin + install -v -m 644 ${WORKDIR}/board-configuration.service ${D}/lib/systemd/system/ + install -v -m 644 ${WORKDIR}/board-configuration.json ${D}/etc/ + # add cellular support + install -v -d ${D}/etc/NetworkManager/system-connections/ + install -v -m 600 ${WORKDIR}/cellular-4g ${D}/etc/NetworkManager/system-connections/ + # add eth0 default ip configuration + install -v -m 600 ${WORKDIR}/eth0-default ${D}/etc/NetworkManager/system-connections/ +} diff --git a/recipes-core/customizations-example/files/board-configuration b/recipes-core/customizations-example/files/board-configuration new file mode 100755 index 000000000..23b1106ac --- /dev/null +++ b/recipes-core/customizations-example/files/board-configuration @@ -0,0 +1,106 @@ +#! /usr/bin/python3 + +import json +import subprocess +import mraa +import sys +from collections import OrderedDict + + +configure_file = '/etc/board-configuration.json' + + +def getConfig(): + with open(configure_file, 'r') as f: + config = json.load(f, object_pairs_hook=OrderedDict) + return config + + +def saveConfig(jsonSrc): + with open(configure_file, "w") as f: + json.dump(jsonSrc, f, indent=4, separators=(',', ': ')) + + +config = getConfig() + + +def setPinmux(index, mode): + MODE = mode.upper() + if 'GPIO' in MODE: + direction = mode.split('_')[1].lstrip().rstrip().lower() + pullMode = config['User_configuration']['IO' + str(index) + '_PULL_MODE'] + pullModeMap = {'Hiz': mraa.MODE_HIZ, + 'Pull-up': mraa.MODE_PULLUP, + 'Pull-down': mraa.MODE_PULLDOWN} + gpio = mraa.Gpio(index) + gpio.dir(mraa.DIR_OUT if direction == 'output' else mraa.DIR_IN) + if direction == 'output': + gpio.write(0) + gpio.mode(pullModeMap[pullMode]) + elif 'ADC' in MODE or 'PWM' in MODE: + mraaFuncs = {'ADC': mraa.Aio, + 'PWM': mraa.Pwm} + funcName = MODE.split('_')[0].lstrip().rstrip() + pin = int(MODE.split('_')[1].lstrip().rstrip()) + mraaFuncs[funcName](pin) + elif 'I2C_SDA' in MODE: + mraa.I2c(0) + elif 'SPI_SS' in MODE: + mraa.Spi(0) + elif 'UART_RX' in MODE: + mraa.Uart(0) + elif 'UART_CTS' in MODE: + uart = mraa.Uart(0) + uart.setFlowcontrol(False, True) + + +def initAruinoPins(): + for i in range(0, 20): + io = 'IO' + str(i) + mode = config['User_configuration'][io + '_MODE'] + if mode in config['Arduino_pinmux_map'][io]: + setPinmux(i, mode) + else: + sys.stderr.write("ERROR: " + io + + " configuration mode [" + mode + + "] do not match the pinmux [" + + ', '.join(config['Arduino_pinmux_map'][io]) + + "]\n") + + +def initExternalSerialMode(): + command = 'grep -a -o -P "IOT2050-\w*" /proc/device-tree/model' + boardType = subprocess.check_output(command, shell=True).lstrip().rstrip().decode('utf-8') + initMode = config['User_configuration']['External_Serial_Init_Mode'] + currentMode = config['User_configuration']['External_Serial_Current_Mode'] + terminate = config['User_configuration']['External_Serial_Terminate'] + + if initMode != currentMode: + config['User_configuration']['External_Serial_Current_Mode'] = initMode + saveConfig(config) + + command = "" + if boardType == "IOT2050-BASIC": + command = "switchserialmode ttyuart -D /dev/ttyS2 -m " + initMode + elif boardType == "IOT2050-ADVANCED": + if initMode == "RS232": + command = "switchserialmode cp210x -D cp2102n24 -m gpio -v 0" + elif initMode == "RS485": + command = "switchserialmode cp210x -D cp2102n24 -m RS485 -g 1" + elif initMode == "RS422": + command = "switchserialmode cp210x -D cp2102n24 -m gpio -v 1" + + subprocess.call(command, shell=True) + terminateOpt = '' + if (initMode == 'RS485') or (initMode == 'RS422'): + terminateOpt = ' -t' if terminate == 'on' else '' + subprocess.call("switchserialmode -m " + initMode + terminateOpt, shell=True) + + +def main(): + initExternalSerialMode() + initAruinoPins() + + +if __name__ == '__main__': + main() diff --git a/recipes-core/customizations-example/files/board-configuration.json b/recipes-core/customizations-example/files/board-configuration.json new file mode 100644 index 000000000..44ab30ac6 --- /dev/null +++ b/recipes-core/customizations-example/files/board-configuration.json @@ -0,0 +1,156 @@ +{ + "User_configuration": { + "External_Serial_Init_Mode": "RS232", + "External_Serial_Current_Mode": "RS232", + "External_Serial_Terminate": "off", + "IO0_MODE": "GPIO_Input", + "IO1_MODE": "GPIO_Input", + "IO2_MODE": "GPIO_Input", + "IO3_MODE": "GPIO_Input", + "IO4_MODE": "GPIO_Input", + "IO5_MODE": "GPIO_Input", + "IO6_MODE": "GPIO_Input", + "IO7_MODE": "GPIO_Input", + "IO8_MODE": "GPIO_Input", + "IO9_MODE": "GPIO_Input", + "IO10_MODE": "GPIO_Input", + "IO11_MODE": "GPIO_Input", + "IO12_MODE": "GPIO_Input", + "IO13_MODE": "GPIO_Input", + "IO14_MODE": "GPIO_Input", + "IO15_MODE": "GPIO_Input", + "IO16_MODE": "GPIO_Input", + "IO17_MODE": "GPIO_Input", + "IO18_MODE": "GPIO_Input", + "IO19_MODE": "GPIO_Input", + "IO0_PULL_MODE": "Hiz", + "IO1_PULL_MODE": "Hiz", + "IO2_PULL_MODE": "Hiz", + "IO3_PULL_MODE": "Hiz", + "IO4_PULL_MODE": "Hiz", + "IO5_PULL_MODE": "Hiz", + "IO6_PULL_MODE": "Hiz", + "IO7_PULL_MODE": "Hiz", + "IO8_PULL_MODE": "Hiz", + "IO9_PULL_MODE": "Hiz", + "IO10_PULL_MODE": "Hiz", + "IO11_PULL_MODE": "Hiz", + "IO12_PULL_MODE": "Hiz", + "IO13_PULL_MODE": "Hiz", + "IO14_PULL_MODE": "Hiz", + "IO15_PULL_MODE": "Hiz", + "IO16_PULL_MODE": "Hiz", + "IO17_PULL_MODE": "Hiz", + "IO18_PULL_MODE": "Hiz", + "IO19_PULL_MODE": "Hiz" + }, + "Arduino_pinmux_map": { + "IO0": [ + "GPIO_Input", + "GPIO_Output", + "UART_RX" + ], + "IO1": [ + "GPIO_Input", + "GPIO_Output", + "UART_TX" + ], + "IO2": [ + "GPIO_Input", + "GPIO_Output", + "UART_CTS" + ], + "IO3": [ + "GPIO_Input", + "GPIO_Output", + "UART_RTS" + ], + "IO4": [ + "GPIO_Input", + "GPIO_Output", + "PWM_4" + ], + "IO5": [ + "GPIO_Input", + "GPIO_Output", + "PWM_5" + ], + "IO6": [ + "GPIO_Input", + "GPIO_Output", + "PWM_6" + ], + "IO7": [ + "GPIO_Input", + "GPIO_Output", + "PWM_7" + ], + "IO8": [ + "GPIO_Input", + "GPIO_Output", + "PWM_8" + ], + "IO9": [ + "GPIO_Input", + "GPIO_Output", + "PWM_9" + ], + "IO10": [ + "GPIO_Input", + "GPIO_Output", + "SPI_SS" + ], + "IO11": [ + "GPIO_Input", + "GPIO_Output", + "SPI_MOSI" + ], + "IO12": [ + "GPIO_Input", + "GPIO_Output", + "SPI_MISO" + ], + "IO13": [ + "GPIO_Input", + "GPIO_Output", + "SPI_SCK" + ], + "IO14": [ + "GPIO_Input", + "GPIO_Output", + "ADC_0" + ], + "IO15": [ + "GPIO_Input", + "GPIO_Output", + "ADC_1" + ], + "IO16": [ + "GPIO_Input", + "GPIO_Output", + "ADC_2" + ], + "IO17": [ + "GPIO_Input", + "GPIO_Output", + "ADC_3" + ], + "IO18": [ + "GPIO_Input", + "GPIO_Output", + "I2C_SDA", + "ADC_4" + ], + "IO19": [ + "GPIO_Input", + "GPIO_Output", + "I2C_SCL", + "ADC_5" + ] + }, + "Gpio_pull_mode": [ + "Pull-down", + "Pull-up", + "Hiz" + ] +} \ No newline at end of file diff --git a/recipes-core/customizations-example/files/board-configuration.service b/recipes-core/customizations-example/files/board-configuration.service new file mode 100644 index 000000000..ba2021b1d --- /dev/null +++ b/recipes-core/customizations-example/files/board-configuration.service @@ -0,0 +1,10 @@ +[Unit] +Description="IOT2050 Board Configuration" + +[Service] +Type=idle +ExecStart=/usr/bin/board-configuration +StandardOutput=tty + +[Install] +WantedBy=multi-user.target diff --git a/recipes-core/customizations-example/files/cellular-4g b/recipes-core/customizations-example/files/cellular-4g new file mode 100644 index 000000000..e55ef951d --- /dev/null +++ b/recipes-core/customizations-example/files/cellular-4g @@ -0,0 +1,19 @@ +[connection] +id=cellular-4g +uuid=ce204ddd-8e3e-4a15-8435-e4b7f399e353 +type=gsm +permissions= +autoconnect=false + +[gsm] +apn=ctnet +number=*99# + +[ipv4] +dns-search= +method=auto + +[ipv6] +addr-gen-mode=stable-privacy +dns-search= +method=auto diff --git a/recipes-core/customizations-example/files/eth0-default b/recipes-core/customizations-example/files/eth0-default new file mode 100644 index 000000000..95e400ddb --- /dev/null +++ b/recipes-core/customizations-example/files/eth0-default @@ -0,0 +1,13 @@ +[connection] +id=eth0-default +uuid=2f479c0e-43f7-3460-958d-4d44617ae118 +type=ethernet +interface-name=eth0 + +[ipv4] +address1=192.168.200.1/24 +method=manual + +[ipv6] +addr-gen-mode=stable-privacy +method=auto diff --git a/recipes-core/customizations-example/files/postinst b/recipes-core/customizations-example/files/postinst new file mode 100644 index 000000000..004f45c78 --- /dev/null +++ b/recipes-core/customizations-example/files/postinst @@ -0,0 +1,35 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +echo "PermitRootLogin yes" >> /etc/ssh/sshd_config + +# Pluseaudio service +mkdir -p /etc/systemd/user/default.target.wants/ +mkdir -p /etc/systemd/user/sockets.target.wants/ +ln -s /usr/lib/systemd/user/pulseaudio.service /etc/systemd/user/default.target.wants/pulseaudio.service +ln -s /usr/lib/systemd/user/pulseaudio.sockets /etc/systemd/user/sockets.target.wants/pulseaudio.sockets +# TCF service +ln -s /etc/systemd/system/tcf-agent.service /etc/systemd/system/multi-user.target.wants/tcf-agent.service +# Networkmanager service +systemctl disable systemd-networkd.service +systemctl disable systemd-resolved.service +systemctl enable NetworkManager.service +chmod 600 /etc/NetworkManager/system-connections/cellular-4g +chmod 600 /etc/NetworkManager/system-connections/eth0-default +echo "\n\n[device]\nwifi.scan-rand-mac-address=no" >> /etc/NetworkManager/NetworkManager.conf +# Status LED service +update-rc.d status-led defaults >/dev/null +invoke-rc.d status-led start +# Board configuration service +systemctl enable board-configuration.service +# Force user to change the password of root upon first login +passwd --expire root +# node-red +systemctl enable node-red.service diff --git a/recipes-core/customizations-example/files/status-led b/recipes-core/customizations-example/files/status-led new file mode 100755 index 000000000..537775bae --- /dev/null +++ b/recipes-core/customizations-example/files/status-led @@ -0,0 +1,32 @@ +#!/bin/sh + +### BEGIN INIT INFO +# Provides: status-led +# Required-Start: $remote_fs $syslog +# Required-Stop: $remote_fs $syslog +# Default-Start: 2 3 4 5 +# Default-Stop: 0 1 6 +# Short-Description: System status LED indicator +### END INIT INFO + +set -e + +case "$1" in + start) + echo timer > /sys/class/leds/status-led-green/trigger + ;; + stop) + echo gpio > /sys/class/leds/status-led-green/trigger + echo 0 > /sys/class/leds/status-led-green/inverted + ;; + force-reload|restart) + echo gpio > /sys/class/leds/status-led-green/trigger + echo 0 > /sys/class/leds/status-led-green/inverted + ;; + *) + echo "Usage: $0 {start|stop|restart|force-reload}" 1>&2 + exit 1 + ;; +esac + +exit 0 diff --git a/recipes-core/images/iot2050-image-base.bb b/recipes-core/images/iot2050-image-base.bb new file mode 100644 index 000000000..2628bd285 --- /dev/null +++ b/recipes-core/images/iot2050-image-base.bb @@ -0,0 +1,55 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +inherit image + +DESCRIPTION = "IOT2050 Debian Base Image" +IMAGE_INSTALL += "customizations-base" + +SDK_PREINSTALL += "zlib1g-dev" + +python aggregate_mainline_apt_sources () { + import shutil + + aggregated_sources_fp = '%s/bootstrap.list' % d.getVar("WORKDIR", True) + raw_apt_sources_list = d.getVar("DISTRO_APT_SOURCES_MAINLINE_LIST", True) or "" + apt_sources_list = raw_apt_sources_list.strip().split() + + if len(apt_sources_list) == 0: + bb.fatal("Cannot parse DISTRO_APT_SOURCES_MAINLINE_LIST: %s" % + raw_apt_sources_list) + + with open(aggregated_sources_fp, "wb") as out_fd: + for entry in apt_sources_list: + entry_real = bb.parse.resolve_file(entry, d) + with open(entry_real, "rb") as in_fd: + shutil.copyfileobj(in_fd, out_fd, 1024*1024*10) + out_fd.write("\n".encode()) +} + +install_mainline_sources_list () { + sudo rm -f '${IMAGE_ROOTFS}/etc/apt/sources-list' + sudo install -m 644 '${WORKDIR}/bootstrap.list' '${IMAGE_ROOTFS}/etc/apt/sources-list' + sudo rm -f '${WORKDIR}/bootstrap.list' +} + +# For rootfs build using debian snapshot packages, restore the source list file +# with the mainline sources list, so that users can update packages via +# `apt update`. +# TODO: this code should be merged to ISAR. +ROOTFS_POSTPROCESS_COMMAND =+ "image_postprocess_restore_sources_list" +python image_postprocess_restore_sources_list () { + pkg_selection = d.getVar("PACKAGES_SELECTION", True) or "" + if pkg_selection == 'packages-snapshot': + bb.build.exec_func("aggregate_mainline_apt_sources", d) + bb.build.exec_func("install_mainline_sources_list", d) + else: + bb.note('No need to restore sources for mainline packages') +} diff --git a/recipes-core/images/iot2050-image-boot.bb b/recipes-core/images/iot2050-image-boot.bb new file mode 100644 index 000000000..f31810fe1 --- /dev/null +++ b/recipes-core/images/iot2050-image-boot.bb @@ -0,0 +1,20 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# +inherit image + +DESCRIPTION = "IOT2050 Boot Image" + +ISAR_RELEASE_CMD = "git -C ${LAYERDIR_meta-iot2050} describe --tags --dirty --match 'v[0-9].[0-9]*' --always || echo unknown" +# Only boot files +IMAGE_INSTALL = "u-boot-tools" +IMAGE_PREINSTALL = "" + +do_copy_boot_files() { +} diff --git a/recipes-core/images/iot2050-image-example.bb b/recipes-core/images/iot2050-image-example.bb new file mode 100644 index 000000000..71437874a --- /dev/null +++ b/recipes-core/images/iot2050-image-example.bb @@ -0,0 +1,99 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Su Baocheng +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +require recipes-core/images/iot2050-image-base.bb + +DESCRIPTION = "IOT2050 Debian Example Image" + +DEPENDS += "openssl" + +# debug tools +IOT2050_DEBIAN_DEBUG_PACKAGES = " \ + busybox \ + bash-completion \ + less \ + vim \ + psmisc \ + bsdmainutils \ + haveged \ + nano \ + ifupdown \ + iputils-ping \ + ssh \ + pciutils \ + usbutils \ + ethtool \ + rt-tests \ + stress-ng \ + build-essential \ + python3 \ + gawk \ + curl \ + wget \ + ca-certificates \ + resolvconf \ + python3-newt \ + gdb \ + gdbserver \ + network-manager \ + modemmanager \ + ppp \ + isc-dhcp-client \ + cmake \ + autoconf \ + autotools-dev \ + default-jdk \ + mosquitto \ + mosquitto-clients \ + nodejs \ + npm \ + teamd \ + rsyslog \ + net-tools \ + i2c-tools \ + sudo \ + " + +# wifi support +IOT2050_DEBIAN_WIFI_PACKAGES = " \ + iw \ + wpasupplicant \ + firmware-iwlwifi \ + " + +# bluetooth support +IOT2050_DEBIAN_BT_PACKAGES = " \ + bluez \ + pulseaudio-module-bluetooth \ + " +# alsa support +IOT2050_DEBIAN_ALSA_PACKAGES = " \ + alsa-utils \ + alsa-tools \ + " +IMAGE_PREINSTALL += " \ + ${IOT2050_DEBIAN_DEBUG_PACKAGES} \ + ${IOT2050_DEBIAN_WIFI_PACKAGES} \ + ${IOT2050_DEBIAN_BT_PACKAGES} \ + ${IOT2050_DEBIAN_ALSA_PACKAGES} \ + " + +IMAGE_INSTALL += " \ + expand-on-first-boot \ + sshd-regen-keys \ + regen-rootfs-uuid \ + customizations-example \ + switchserialmode \ + iot2050setup \ + tcf-agent \ + mraa \ + node-red \ + node-red-gpio \ + " diff --git a/recipes-core/images/iot2050-image-lxde.bb b/recipes-core/images/iot2050-image-lxde.bb new file mode 100644 index 000000000..0a2b9e95e --- /dev/null +++ b/recipes-core/images/iot2050-image-lxde.bb @@ -0,0 +1,15 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +require recipes-core/images/iot2050-image-example.bb + +DESCRIPTION = "IOT2050 LXDE Image" + +IMAGE_INSTALL += "lxde-touch" diff --git a/recipes-core/lxde-touch/files/postinst b/recipes-core/lxde-touch/files/postinst new file mode 100644 index 000000000..fa0c7dd08 --- /dev/null +++ b/recipes-core/lxde-touch/files/postinst @@ -0,0 +1,8 @@ +# +# Copyright (c) Siemens AG, 2018 +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +echo "keyboard=onboard" >> /etc/lightdm/lightdm-gtk-greeter.conf diff --git a/recipes-core/lxde-touch/lxde-touch_0.1.bb b/recipes-core/lxde-touch/lxde-touch_0.1.bb new file mode 100644 index 000000000..ea85341ba --- /dev/null +++ b/recipes-core/lxde-touch/lxde-touch_0.1.bb @@ -0,0 +1,14 @@ +# +# Copyright (c) Siemens AG, 2018 +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +inherit dpkg-raw + +DESCRIPTION = "LXDE desktop with touch display support" + +DEBIAN_DEPENDS = "task-desktop, xdg-utils, task-lxde-desktop, lxtask, onboard" + +SRC_URI = "file://postinst" diff --git a/recipes-core/regen-rootfs-uuid/files/postinst b/recipes-core/regen-rootfs-uuid/files/postinst new file mode 100644 index 000000000..4f56d4941 --- /dev/null +++ b/recipes-core/regen-rootfs-uuid/files/postinst @@ -0,0 +1,3 @@ +#!/bin/sh + +systemctl enable regen-rootfs-uuid-on-first-boot.service diff --git a/recipes-core/regen-rootfs-uuid/files/regen-rootfs-uuid-on-first-boot.service b/recipes-core/regen-rootfs-uuid/files/regen-rootfs-uuid-on-first-boot.service new file mode 100644 index 000000000..cf87289f1 --- /dev/null +++ b/recipes-core/regen-rootfs-uuid/files/regen-rootfs-uuid-on-first-boot.service @@ -0,0 +1,26 @@ +# +# Copyright (c) Siemens AG, 2020 +# +# Authors: +# Jan Kiszka +# +# SPDX-License-Identifier: MIT + +[Unit] +Description=Generate new UUID for rootfs partition +DefaultDependencies=no +Conflicts=shutdown.target +After=systemd-remount-fs.service +Before=sysinit.target shutdown.target +ConditionPathIsReadWrite=/etc + +[Service] +Type=simple +RemainAfterExit=yes +ExecStart=/usr/share/regen-rootfs-uuid/regen-rootfs-uuid.sh +ExecStartPost=-/bin/systemctl disable regen-rootfs-uuid-on-first-boot.service +StandardOutput=syslog +StandardError=syslog + +[Install] +WantedBy=sysinit.target diff --git a/recipes-core/regen-rootfs-uuid/files/regen-rootfs-uuid.sh b/recipes-core/regen-rootfs-uuid/files/regen-rootfs-uuid.sh new file mode 100644 index 000000000..6f7986012 --- /dev/null +++ b/recipes-core/regen-rootfs-uuid/files/regen-rootfs-uuid.sh @@ -0,0 +1,25 @@ +#!/bin/sh +# +# Copyright (c) Siemens AG, 2020 +# +# Authors: +# Jan Kiszka +# +# SPDX-License-Identifier: MIT + +ROOT_DEV="$(findmnt / -o source -n)" +BOOT_DEV="$(echo "${ROOT_DEV}" | sed 's/p\?[0-9]*$//')" +ROOT_PART="$(echo "${ROOT_DEV}" | sed 's/.*[^0-9]\([0-9]*\)$/\1/')" + +if [ "${ROOT_DEV}" = "${BOOT_DEV}" ]; then + echo "Boot device equals root device - no partitioning found" >&2 + exit 1 +fi + +OLD_UUID=$(sfdisk --part-uuid ${BOOT_DEV} ${ROOT_PART}) +NEW_UUID=$(uuidgen) + +sfdisk --part-uuid ${BOOT_DEV} ${ROOT_PART} ${NEW_UUID} + +sed -i 's/'${OLD_UUID}'/'${NEW_UUID}'/i' /etc/default/u-boot-script +update-u-boot-script diff --git a/recipes-core/regen-rootfs-uuid/regen-rootfs-uuid_1.0.bb b/recipes-core/regen-rootfs-uuid/regen-rootfs-uuid_1.0.bb new file mode 100644 index 000000000..166d1b92b --- /dev/null +++ b/recipes-core/regen-rootfs-uuid/regen-rootfs-uuid_1.0.bb @@ -0,0 +1,26 @@ +# +# Copyright (c) Siemens AG, 2020 +# +# Authors: +# Jan Kiszka +# +# SPDX-License-Identifier: MIT + +inherit dpkg-raw + +DESCRIPTION = "This service generates an individual UUID for the rootfs during first boot" + +DEBIAN_DEPENDS = "systemd, u-boot-script, fdisk, util-linux, uuid-runtime" + +SRC_URI = " \ + file://regen-rootfs-uuid-on-first-boot.service \ + file://regen-rootfs-uuid.sh \ + file://postinst" + +do_install() { + install -d -m 755 ${D}/lib/systemd/system + install -m 644 ${WORKDIR}/regen-rootfs-uuid-on-first-boot.service ${D}/lib/systemd/system/ + + install -d -m 755 ${D}/usr/share/regen-rootfs-uuid + install -m 755 ${WORKDIR}/regen-rootfs-uuid.sh ${D}/usr/share/regen-rootfs-uuid/ +} diff --git a/recipes-kernel/linux/files/0001-iot2050-add-iot2050-platform-support.patch b/recipes-kernel/linux/files/0001-iot2050-add-iot2050-platform-support.patch new file mode 100644 index 000000000..f7d3f38c0 --- /dev/null +++ b/recipes-kernel/linux/files/0001-iot2050-add-iot2050-platform-support.patch @@ -0,0 +1,972 @@ +From 5283cfac179d7c6a40d659d26d121747df9f73e3 Mon Sep 17 00:00:00 2001 +From: Le Jin +Date: Mon, 18 Nov 2019 17:58:08 +0800 +Subject: [PATCH 01/23] iot2050: add iot2050 platform support + +Add support for two iot2050 variants, BASIC and ADVANCED. +Also add support for fixed gpio number naming. + +Signed-off-by: le.jin +--- + arch/arm64/boot/dts/Makefile | 1 + + arch/arm64/boot/dts/siemens/Makefile | 17 + + .../boot/dts/siemens/iot2050-advanced.dts | 51 ++ + arch/arm64/boot/dts/siemens/iot2050-basic.dts | 55 ++ + .../boot/dts/siemens/iot2050-common.dtsi | 742 ++++++++++++++++++ + drivers/gpio/gpio-davinci.c | 10 + + drivers/tty/serial/8250/8250_port.c | 5 +- + 7 files changed, 879 insertions(+), 2 deletions(-) + create mode 100644 arch/arm64/boot/dts/siemens/Makefile + create mode 100644 arch/arm64/boot/dts/siemens/iot2050-advanced.dts + create mode 100644 arch/arm64/boot/dts/siemens/iot2050-basic.dts + create mode 100644 arch/arm64/boot/dts/siemens/iot2050-common.dtsi + +diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile +index 4690364d584b..c9c616ec8d48 100644 +--- a/arch/arm64/boot/dts/Makefile ++++ b/arch/arm64/boot/dts/Makefile +@@ -20,6 +20,7 @@ subdir-y += qcom + subdir-y += realtek + subdir-y += renesas + subdir-y += rockchip ++subdir-y += siemens + subdir-y += socionext + subdir-y += sprd + subdir-y += synaptics +diff --git a/arch/arm64/boot/dts/siemens/Makefile b/arch/arm64/boot/dts/siemens/Makefile +new file mode 100644 +index 000000000000..39173d4ae1a4 +--- /dev/null ++++ b/arch/arm64/boot/dts/siemens/Makefile +@@ -0,0 +1,17 @@ ++# SPDX-License-Identifier: GPL-2.0 ++# ++# Make file to build device tree binaries for IOT2050 boards ++# ++# Copyright (C) 2018-2019 Siemens AG ++# ++ ++DTC_FLAGS += -@ ++ ++dtb-$(CONFIG_ARCH_K3_AM6_SOC) += iot2050-basic.dtb \ ++ iot2050-advanced.dtb ++ ++$(obj)/%.dtbo: $(src)/%.dtso FORCE ++ $(call if_changed_dep,dtc) ++ ++always := $(dtb-y) ++clean-files := *.dtb *.dtbo +diff --git a/arch/arm64/boot/dts/siemens/iot2050-advanced.dts b/arch/arm64/boot/dts/siemens/iot2050-advanced.dts +new file mode 100644 +index 000000000000..88b04c974294 +--- /dev/null ++++ b/arch/arm64/boot/dts/siemens/iot2050-advanced.dts +@@ -0,0 +1,51 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++ ++/dts-v1/; ++ ++#include "../ti/k3-am654.dtsi" ++#include "iot2050-common.dtsi" ++ ++/ { ++ model = "SIMATIC IOT2050-ADVANCED"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ /* 2G RAM */ ++ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; ++ }; ++}; ++ ++&main_uart0 { ++ status = "disabled"; ++}; ++ ++&main_pmx0 { ++ main_mmc0_pins_default: main-mmc0-pins-default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ ++ AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ ++ AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ ++ AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ ++ AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ ++ AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ ++ AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ ++ AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ ++ AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ ++ AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ ++ AM65X_IOPAD(0x01B8, PIN_OUTPUT_PULLUP, 7) /* (B23) MMC0_SDWP */ ++ AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ ++ AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ ++ >; ++ }; ++}; ++ ++&sdhci0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_mmc0_pins_default>; ++ bus-width = <8>; ++ non-removable; ++ ti,driver-strength-ohm = <50>; ++}; +\ No newline at end of file +diff --git a/arch/arm64/boot/dts/siemens/iot2050-basic.dts b/arch/arm64/boot/dts/siemens/iot2050-basic.dts +new file mode 100644 +index 000000000000..471f9b131db0 +--- /dev/null ++++ b/arch/arm64/boot/dts/siemens/iot2050-basic.dts +@@ -0,0 +1,55 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++ ++/dts-v1/; ++/* TBD: should include the Dual Core dtsi*/ ++#include "../ti/k3-am654.dtsi" ++#include "iot2050-common.dtsi" ++ ++/ { ++ model = "SIMATIC IOT2050-BASIC"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ /* 1G RAM */ ++ reg = <0x00000000 0x80000000 0x00000000 0x40000000>; ++ }; ++ ++ cpus { ++ cpu-map { ++ /delete-node/ cluster1; ++ }; ++ /delete-node/ cpu@100; ++ /delete-node/ cpu@101; ++ }; ++}; ++ ++&main_pmx0 { ++ main_uart0_pins_default: main-uart0-pins-default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ ++ AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ ++ AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ ++ AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ ++ AM65X_IOPAD(0x0188, PIN_INPUT, 1) /* (D25) UART0_DCDn */ ++ AM65X_IOPAD(0x018c, PIN_INPUT, 1) /* (B26) UART0_DSRn */ ++ AM65X_IOPAD(0x0190, PIN_OUTPUT, 1) /* (A24) UART0_DTRn */ ++ AM65X_IOPAD(0x0194, PIN_INPUT, 1) /* (E24) UART0_RIN */ ++ >; ++ }; ++}; ++ ++&main_uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_uart0_pins_default>; ++ ++ /* workaround for uart issues (DMA warnings and RCU preempt) */ ++ /delete-property/ dmas; ++ /delete-property/ dma-names; ++}; ++ ++&sdhci0 { ++ status = "disabled"; ++}; +diff --git a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +new file mode 100644 +index 000000000000..e1ba5572dcea +--- /dev/null ++++ b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +@@ -0,0 +1,742 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * (C) Copyright 2019 Siemens AG ++ */ ++#include ++#include ++#include ++ ++/ { ++ compatible = "siemens,am654-iot2050", "ti,am654"; ++ model = "SIMATIC IOT2050 common"; ++ ++ aliases { ++ ethernet1 = &pruss0_emac0; ++ ethernet2 = &pruss0_emac1; ++ gpio0 = &main_gpio0; ++ gpio96 = &main_gpio1; ++ gpio186 = &wkup_gpio0; ++ spi0 = &mcu_spi0; ++ }; ++ ++ chosen { ++ stdout-path = "serial3:115200n8"; ++ bootargs = "earlycon=ns16550a,mmio32,0x02800000"; ++ }; ++ ++ reserved_memory: reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ secure_ddr: secure_ddr@9e800000 { ++ reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ ++ alignment = <0x1000>; ++ no-map; ++ }; ++ ++ mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { ++ compatible = "shared-dma-pool"; ++ reg = <0 0xa0000000 0 0x100000>; ++ no-map; ++ }; ++ ++ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { ++ compatible = "shared-dma-pool"; ++ reg = <0 0xa0100000 0 0xf00000>; ++ no-map; ++ }; ++ ++ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { ++ compatible = "shared-dma-pool"; ++ reg = <0 0xa1000000 0 0x100000>; ++ no-map; ++ }; ++ ++ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { ++ compatible = "shared-dma-pool"; ++ reg = <0 0xa1100000 0 0xf00000>; ++ no-map; ++ }; ++ ++ rtos_ipc_memory_region: ipc-memories@a2000000 { ++ reg = <0x00 0xa2000000 0x00 0x00200000>; ++ alignment = <0x1000>; ++ no-map; ++ }; ++ }; ++ ++ /* Dual Ethernet application node on PRU-ICSSG0 */ ++ pruss0_eth { ++ compatible = "ti,am654-icssg-prueth"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&icssg0_rgmii_pins_default>; ++ sram = <&msmc_ram>; ++ interrupt-parent = <&main_udmass_inta>; ++ ++ prus = <&pru0_0>, <&rtu0_0>, <&pru0_1>, <&rtu0_1>; ++ firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf", ++ "ti-pruss/am65x-rtu0-prueth-fw.elf", ++ "ti-pruss/am65x-pru1-prueth-fw.elf", ++ "ti-pruss/am65x-rtu1-prueth-fw.elf"; ++ mii-g-rt = <&icssg0_mii_g_rt>; ++ mii-rt = <&icssg0_mii_rt>; ++ dma-coherent; ++ dmas = <&main_udmap &icssg0 0 UDMA_DIR_TX>, /* egress slice 0 */ ++ <&main_udmap &icssg0 1 UDMA_DIR_TX>, /* egress slice 0 */ ++ <&main_udmap &icssg0 2 UDMA_DIR_TX>, /* egress slice 0 */ ++ <&main_udmap &icssg0 3 UDMA_DIR_TX>, /* egress slice 0 */ ++ <&main_udmap &icssg0 4 UDMA_DIR_TX>, /* egress slice 1 */ ++ <&main_udmap &icssg0 5 UDMA_DIR_TX>, /* egress slice 1 */ ++ <&main_udmap &icssg0 6 UDMA_DIR_TX>, /* egress slice 1 */ ++ <&main_udmap &icssg0 7 UDMA_DIR_TX>, /* egress slice 1 */ ++ ++ <&main_udmap &icssg0 0 UDMA_DIR_RX>, /* ingress slice 0 */ ++ <&main_udmap &icssg0 1 UDMA_DIR_RX>, /* ingress slice 1 */ ++ <&main_udmap &icssg0 2 UDMA_DIR_RX>, /* mgmnt rsp slice 0 */ ++ <&main_udmap &icssg0 3 UDMA_DIR_RX>; /* mgmnt rsp slice 1 */ ++ dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", ++ "tx1-0", "tx1-1", "tx1-2", "tx1-3", ++ "rx0", "rx1", ++ "rxmgm0", "rxmgm1"; ++ ++ pruss0_emac0: ethernet-mii0 { ++ phy-handle = <&pruss0_eth0_phy>; ++ phy-mode = "rgmii-rxid"; ++ syscon-rgmii-delay = <&scm_conf 0x4100>; ++ iep = <&icssg0_iep0>; ++ /* Filled in by bootloader */ ++ local-mac-address = [00 00 00 00 00 00]; ++ }; ++ ++ pruss0_emac1: ethernet-mii1 { ++ phy-handle = <&pruss0_eth1_phy>; ++ phy-mode = "rgmii-rxid"; ++ syscon-rgmii-delay = <&scm_conf 0x4104>; ++ iep = <&icssg0_iep1>; ++ /* Filled in by bootloader */ ++ local-mac-address = [00 00 00 00 00 00]; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&leds_pins_default>; ++ ++ status-led-red { ++ gpios = <&wkup_gpio0 32 GPIO_ACTIVE_HIGH>; ++ panic-indicator; ++ linux,default-trigger = "gpio"; ++ }; ++ ++ status-led-green { ++ gpios = <&wkup_gpio0 24 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "gpio"; ++ }; ++ ++ user-led0-red { ++ gpios = <&pcal9535_3 14 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "gpio"; ++ }; ++ ++ user-led0-green { ++ gpios = <&pcal9535_2 15 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "gpio"; ++ }; ++ ++ user-led1-red { ++ gpios = <&wkup_gpio0 17 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "gpio"; ++ }; ++ ++ user-led1-green { ++ gpios = <&wkup_gpio0 22 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "gpio"; ++ }; ++ }; ++ ++ dp_refclk: clock { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <19200000>; ++ }; ++}; ++ ++&wkup_pmx0 { ++ wkup_i2c0_pins_default: wkup-i2c0-pins-default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ ++ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ ++ >; ++ }; ++ ++ mcu_i2c0_pins_default: mcu_i2c0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */ ++ AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */ ++ >; ++ }; ++ ++ arduino_i2c_aio_switch_pins_default: arduino_i2c_aio_switch_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0024, PIN_OUTPUT, 7) /* (R2) WKUP_GPIO0_21 */ ++ >; ++ }; ++ ++ push_button_pins_default: push_button_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ ++ >; ++ }; ++ ++ arduino_uart_pins_default: arduino_uart_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_UART0_RXD */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4)/* (P5) MCU_UART0_TXD */ ++ >; ++ }; ++ ++ arduino_io_d2_to_d3_pins_default: arduino_io_d2_to_d3_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x004C, PIN_OUTPUT, 7)/* (P1) WKUP_GPIO0_31 */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 7)/* (N3) WKUP_GPIO0_33 */ ++ >; ++ }; ++ ++ arduino_io_oe_pins_default: arduino_io_oe_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 7)/* (N4) WKUP_GPIO0_34 */ ++ AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 7)/* (M2) WKUP_GPIO0_36 */ ++ AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 7)/* (M3) WKUP_GPIO0_37 */ ++ AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 7)/* (M4) WKUP_GPIO0_38 */ ++ AM65X_WKUP_IOPAD(0x0074, PIN_OUTPUT, 7)/* (M1) WKUP_GPIO0_41 */ ++ >; ++ }; ++ ++ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ ++ AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ ++ AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ ++ AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ ++ >; ++ }; ++ ++ db9_com_mode_pins_default: db9_com_mode_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7) /* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */ ++ AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT, 7) /* (AC3) WKUP_GPIO0_4, used as uart0 mode 1 */ ++ AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 7) /* (AC1) WKUP_GPIO0_7, used as uart0 term */ ++ AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AC2) WKUP_GPIO0_6, used as uart0 en */ ++ >; ++ }; ++ ++ leds_pins_default: leds_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7) /* (T2) WKUP_GPIO0_17, used as user led1 red */ ++ AM65X_WKUP_IOPAD(0x0028, PIN_OUTPUT, 7) /* (R3) WKUP_GPIO0_22, used as user led1 green */ ++ AM65X_WKUP_IOPAD(0x0030, PIN_OUTPUT, 7) /* (R5) WKUP_GPIO0_24, used as status led red */ ++ AM65X_WKUP_IOPAD(0x0050, PIN_OUTPUT, 7) /* (R5) WKUP_GPIO0_32, used as status led green */ ++ >; ++ }; ++ ++ mcu_spi0_pins_default: mcu_spi0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* (Y1) MCU_SPI0_CLK */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* (Y3) MCU_SPI0_D0 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (Y2) MCU_SPI0_D1 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (Y4) MCU_SPI0_CS0 */ ++ >; ++ }; ++ ++ minipcie_pins_default: minipcie_pins_default { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7) /* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */ ++ >; ++ }; ++}; ++ ++&main_pmx0 { ++ main_uart1_pins_default: main_uart1_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */ ++ AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) UART1_TXD */ ++ AM65X_IOPAD(0x0178, PIN_INPUT, 6) /* (AD22) UART1_CTSn */ ++ AM65X_IOPAD(0x017c, PIN_OUTPUT, 6) /* (AC21) UART1_RTSn */ ++ >; ++ }; ++ ++ main_i2c3_pins_default: main_i2c3_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01c0, PIN_INPUT, 2) /* (AF13) I2C3_SCL */ ++ AM65X_IOPAD(0x01d4, PIN_INPUT, 2) /* (AG12) I2C3_SDA */ ++ >; ++ }; ++ ++ main_mmc1_pins_default: main_mmc1_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ ++ AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ ++ AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */ ++ AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */ ++ AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */ ++ AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */ ++ AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */ ++ AM65X_IOPAD(0x02e0, PIN_INPUT_PULLUP, 0) /* (C24) MMC1_SDWP */ ++ >; ++ }; ++ ++ usb0_pins_default: usb0_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ ++ >; ++ }; ++ ++ usb1_pins_default: usb1_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ ++ >; ++ }; ++ ++ arduino_io_d4_to_d9_pins_default: arduino_io_d4_to_d9_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0084, PIN_OUTPUT, 7)/* (AG18) GPIO0_33 */ ++ AM65X_IOPAD(0x008C, PIN_OUTPUT, 7)/* (AF17) GPIO0_35 */ ++ AM65X_IOPAD(0x0098, PIN_OUTPUT, 7)/* (AH16) GPIO0_38 */ ++ AM65X_IOPAD(0x00AC, PIN_OUTPUT, 7)/* (AH15) GPIO0_43 */ ++ AM65X_IOPAD(0x00C0, PIN_OUTPUT, 7)/* (AG15) GPIO0_48 */ ++ AM65X_IOPAD(0x00CC, PIN_OUTPUT, 7)/* (AD15) GPIO0_51 */ ++ >; ++ }; ++ ++ icssg0_mdio_pins_default: icssg0_mdio_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */ ++ AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */ ++ >; ++ }; ++ ++ icssg0_rgmii_pins_default: icssg0_rgmii_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */ ++ AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */ ++ AM65X_IOPAD(0x024c, PIN_INPUT, 2) /* (AC27) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */ ++ AM65X_IOPAD(0x0250, PIN_INPUT, 2) /* (AB26) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */ ++ AM65X_IOPAD(0x0274, PIN_OUTPUT, 2) /* (AC25) PRG0_PRU1_GPO12.PRG0_RGMII2_TD0 */ ++ AM65X_IOPAD(0x0278, PIN_OUTPUT, 2) /* (AD25) PRG0_PRU1_GPO13.PRG0_RGMII2_TD1 */ ++ AM65X_IOPAD(0x027c, PIN_OUTPUT, 2) /* (AD24) PRG0_PRU1_GPO14.PRG0_RGMII2_TD2 */ ++ AM65X_IOPAD(0x0280, PIN_OUTPUT, 2) /* (AE27) PRG0_PRU1_GPO15.PRG0_RGMII2_TD3 */ ++ AM65X_IOPAD(0x0284, PIN_INPUT, 2) /* (AC24) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */ ++ AM65X_IOPAD(0x0270, PIN_OUTPUT, 2) /* (AB24) PRG0_PRU1_GPO11.PRG0_RGMII2_TX_CTL */ ++ AM65X_IOPAD(0x025c, PIN_INPUT, 2) /* (AB27) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */ ++ AM65X_IOPAD(0x0254, PIN_INPUT, 2) /* (AA25) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */ ++ ++ AM65X_IOPAD(0x01f4, PIN_INPUT, 2) /* (V24) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */ ++ AM65X_IOPAD(0x01f8, PIN_INPUT, 2) /* (W25) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */ ++ AM65X_IOPAD(0x01fc, PIN_INPUT, 2) /* (W24) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */ ++ AM65X_IOPAD(0x0200, PIN_INPUT, 2) /* (AA27) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */ ++ AM65X_IOPAD(0x0224, PIN_OUTPUT, 2) /* (AD27) PRG0_PRU0_GPO12.PRG0_RGMII1_TD0 */ ++ AM65X_IOPAD(0x0228, PIN_OUTPUT, 2) /* (AC26) PRG0_PRU0_GPO13.PRG0_RGMII1_TD1 */ ++ AM65X_IOPAD(0x022c, PIN_OUTPUT, 2) /* (AD26) PRG0_PRU0_GPO14.PRG0_RGMII1_TD2 */ ++ AM65X_IOPAD(0x0230, PIN_OUTPUT, 2) /* (AA24) PRG0_PRU0_GPO15.PRG0_RGMII1_TD3 */ ++ AM65X_IOPAD(0x0234, PIN_INPUT, 2) /* (AD28) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */ ++ AM65X_IOPAD(0x0220, PIN_OUTPUT, 2) /* (AB25) PRG0_PRU0_GPO11.PRG0_RGMII1_TX_CTL */ ++ AM65X_IOPAD(0x020c, PIN_INPUT, 2) /* (Y25) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */ ++ AM65X_IOPAD(0x0204, PIN_INPUT, 2) /* (Y24) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */ ++ >; ++ }; ++ ++ dss_vout1_pins_default: dss_vout1_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0000, PIN_OUTPUT, 1) /* VOUT1_DATA0 */ ++ AM65X_IOPAD(0x0004, PIN_OUTPUT, 1) /* VOUT1_DATA1 */ ++ AM65X_IOPAD(0x0008, PIN_OUTPUT, 1) /* VOUT1_DATA2 */ ++ AM65X_IOPAD(0x000c, PIN_OUTPUT, 1) /* VOUT1_DATA3 */ ++ AM65X_IOPAD(0x0010, PIN_OUTPUT, 1) /* VOUT1_DATA4 */ ++ AM65X_IOPAD(0x0014, PIN_OUTPUT, 1) /* VOUT1_DATA5 */ ++ AM65X_IOPAD(0x0018, PIN_OUTPUT, 1) /* VOUT1_DATA6 */ ++ AM65X_IOPAD(0x001c, PIN_OUTPUT, 1) /* VOUT1_DATA7 */ ++ AM65X_IOPAD(0x0020, PIN_OUTPUT, 1) /* VOUT1_DATA8 */ ++ AM65X_IOPAD(0x0024, PIN_OUTPUT, 1) /* VOUT1_DATA9 */ ++ AM65X_IOPAD(0x0028, PIN_OUTPUT, 1) /* VOUT1_DATA10 */ ++ AM65X_IOPAD(0x002c, PIN_OUTPUT, 1) /* VOUT1_DATA11 */ ++ AM65X_IOPAD(0x0030, PIN_OUTPUT, 1) /* VOUT1_DATA12 */ ++ AM65X_IOPAD(0x0034, PIN_OUTPUT, 1) /* VOUT1_DATA13 */ ++ AM65X_IOPAD(0x0038, PIN_OUTPUT, 1) /* VOUT1_DATA14 */ ++ AM65X_IOPAD(0x003c, PIN_OUTPUT, 1) /* VOUT1_DATA15 */ ++ AM65X_IOPAD(0x0040, PIN_OUTPUT, 1) /* VOUT1_DATA16 */ ++ AM65X_IOPAD(0x0044, PIN_OUTPUT, 1) /* VOUT1_DATA17 */ ++ AM65X_IOPAD(0x0048, PIN_OUTPUT, 1) /* VOUT1_DATA18 */ ++ AM65X_IOPAD(0x004c, PIN_OUTPUT, 1) /* VOUT1_DATA19 */ ++ AM65X_IOPAD(0x0050, PIN_OUTPUT, 1) /* VOUT1_DATA20 */ ++ AM65X_IOPAD(0x0054, PIN_OUTPUT, 1) /* VOUT1_DATA21 */ ++ AM65X_IOPAD(0x0058, PIN_OUTPUT, 1) /* VOUT1_DATA22 */ ++ AM65X_IOPAD(0x005c, PIN_OUTPUT, 1) /* VOUT1_DATA23 */ ++ AM65X_IOPAD(0x0060, PIN_OUTPUT, 1) /* VOUT1_VSYNC */ ++ AM65X_IOPAD(0x0064, PIN_OUTPUT, 1) /* VOUT1_HSYNC */ ++ AM65X_IOPAD(0x0068, PIN_OUTPUT, 1) /* VOUT1_PCLK */ ++ AM65X_IOPAD(0x006c, PIN_OUTPUT, 1) /* VOUT1_DE */ ++ >; ++ }; ++ ++ dp_pins_default: dp_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (AF18) DP rst_n */ ++ >; ++ }; ++ ++ main_i2c2_pins_default: main_i2c2_pins_default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) I2C2_SCL */ ++ AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) I2C2_SDA */ ++ >; ++ }; ++}; ++ ++&main_pmx1 { ++ main_i2c0_pins_default: main-i2c0-pins-default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ ++ AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ ++ >; ++ }; ++ ++ main_i2c1_pins_default: main-i2c1-pins-default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ ++ AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ ++ >; ++ }; ++ ++ ecap0_pins_default: ecap0-pins-default { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ ++ >; ++ }; ++}; ++ ++&wkup_uart0 { ++ /* Wakeup UART is used by System firmware */ ++ status = "disabled"; ++}; ++ ++&main_uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_uart1_pins_default>; ++ ++ /* workaround for uart issues (DMA warnings and RCU preempt) */ ++ /delete-property/ dmas; ++ /delete-property/ dma-names; ++}; ++ ++&main_uart2 { ++ status = "disabled"; ++}; ++ ++&mcu_uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&arduino_uart_pins_default>; ++ ++ /* workaround for uart issues (DMA warnings and RCU preempt) */ ++ /delete-property/ dmas; ++ /delete-property/ dma-names; ++}; ++ ++&main_gpio0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&arduino_io_d4_to_d9_pins_default>; ++}; ++ ++&wkup_gpio0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&arduino_io_d2_to_d3_pins_default ++ &arduino_i2c_aio_switch_pins_default ++ &arduino_io_oe_pins_default ++ &push_button_pins_default ++ &db9_com_mode_pins_default>; ++}; ++ ++&wkup_i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wkup_i2c0_pins_default>; ++ clock-frequency = <400000>; ++}; ++ ++&mcu_i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_i2c0_pins_default>; ++ clock-frequency = <400000>; ++ ++ psu: tps62363@60 { ++ compatible = "ti,tps62363"; ++ reg = <0x60>; ++ regulator-name = "tps62363-vout"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-boot-on; ++ /* ti,vsel0-gpio = <&gpio1 16 0>; */ ++ /* ti,vsel1-gpio = <&gpio1 17 0>; */ ++ ti,vsel0-state-high; ++ ti,vsel1-state-high; ++ /* ti,enable-pull-down; */ ++ /* ti,enable-force-pwm; */ ++ ti,enable-vout-discharge; ++ }; ++}; ++ ++&main_i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c0_pins_default>; ++ clock-frequency = <400000>; ++ ++ rtc:rtc8564@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ }; ++ ++ eeprom: eeprom@54 { ++ compatible = "atmel,24c08"; ++ reg = <0x54>; ++ pagesize = <16>; ++ }; ++}; ++ ++&main_i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c1_pins_default>; ++ clock-frequency = <400000>; ++}; ++ ++&main_i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c2_pins_default>; ++ clock-frequency = <400000>; ++ ++ /*D4200*/ ++ pcal9535_1: gpio@20 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x20>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ }; ++ ++ /*D4201*/ ++ pcal9535_2: gpio@21 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x21>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ }; ++ ++ /*D4202*/ ++ pcal9535_3: gpio@25 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x25>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ }; ++}; ++ ++&main_i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c3_pins_default>; ++ clock-frequency = <400000>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ edp-bridge@f { ++ compatible = "toshiba,tc358867", "toshiba,tc358767"; ++ reg = <0x0f>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&dp_pins_default>; ++ reset-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; ++ ++ clock-names = "ref"; ++ clocks = <&dp_refclk>; ++ ++ toshiba,hpd-pin = <0>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@1 { ++ reg = <1>; ++ ++ bridge_in: endpoint { ++ remote-endpoint = <&dpi_out>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&mcu_cpsw { ++ status = "disabled"; ++}; ++ ++ ++&ecap0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ecap0_pins_default>; ++}; ++ ++&sdhci1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_mmc1_pins_default>; ++ ti,driver-strength-ohm = <50>; ++}; ++ ++&gpu { ++ status = "okay"; ++}; ++ ++&dwc3_1 { ++ status = "okay"; ++}; ++ ++&usb1_phy { ++ status = "okay"; ++}; ++ ++&usb1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb1_pins_default>; ++ dr_mode = "otg"; ++}; ++ ++&dwc3_0 { ++ status = "okay"; ++}; ++ ++&usb0_phy { ++ status = "okay"; ++}; ++ ++&usb0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb0_pins_default>; ++ dr_mode = "host"; ++}; ++ ++&mcu_spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_spi0_pins_default>; ++ ++ #address-cells = <1>; ++ #size-cells= <0>; ++ ti,pindir-d0-out-d1-in = <1>; ++ ++ spidev@0x00 { ++ compatible = "rohm,dh2228fv"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ }; ++}; ++ ++&tscadc0 { ++ status = "disabled"; ++}; ++ ++&tscadc1 { ++ adc { ++ ti,adc-channels = <0 1 2 3 4 5>; ++ }; ++}; ++ ++&mcu_r5fss0_core0 { ++ memory-region = <&mcu_r5fss0_core0_dma_memory_region>, ++ <&mcu_r5fss0_core0_memory_region>; ++}; ++ ++&mcu_r5fss0_core1 { ++ memory-region = <&mcu_r5fss0_core1_dma_memory_region>, ++ <&mcu_r5fss0_core1_memory_region>; ++}; ++ ++&ospi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; ++ ++ flash@0{ ++ compatible = "jedec,spi-nor"; ++ reg = <0x0>; ++ spi-tx-bus-width = <1>; ++ spi-rx-bus-width = <1>; ++ spi-max-frequency = <50000000>; ++ cdns,tshsl-ns = <60>; ++ cdns,tsd2d-ns = <60>; ++ cdns,tchsh-ns = <60>; ++ cdns,tslch-ns = <60>; ++ cdns,read-delay = <2>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ }; ++}; ++ ++&dss { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&dss_vout1_pins_default>; ++ ++ assigned-clocks = <&k3_clks 67 2>; ++ assigned-clock-parents = <&k3_clks 67 5>; ++}; ++ ++&dss_ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ port@1 { ++ reg = <1>; ++ ++ dpi_out: endpoint { ++ remote-endpoint = <&bridge_in>; ++ }; ++ }; ++}; ++ ++&icssg0_mdio { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&icssg0_mdio_pins_default>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pruss0_eth0_phy: ethernet-phy@0 { ++ reg = <0>; ++ ti,rx-internal-delay = ; ++ ti,fifo-depth = ; ++ }; ++ ++ pruss0_eth1_phy: ethernet-phy@1 { ++ reg = <1>; ++ ti,rx-internal-delay = ; ++ ti,fifo-depth = ; ++ }; ++}; ++ ++&serdes1 { ++ status = "okay"; ++}; ++ ++&pcie1_rc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&minipcie_pins_default>; ++ ++ phys = <&serdes1 PHY_TYPE_PCIE 0>; ++ phy-names = "pcie-phy0"; ++ reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++/* Disable crypto and eip76d_trng temporarily, because the HS system firmware has taken them up */ ++&crypto { ++ status = "disabled"; ++}; ++ ++&eip76d_trng { ++ status = "disabled"; ++}; +diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c +index 994ecd597abe..5030a14e86b5 100644 +--- a/drivers/gpio/gpio-davinci.c ++++ b/drivers/gpio/gpio-davinci.c +@@ -174,6 +174,7 @@ static int davinci_gpio_probe(struct platform_device *pdev) + struct device *dev = &pdev->dev; + struct resource *res; + char label[MAX_LABEL_SIZE]; ++ int gpio_alias_id; + + pdata = davinci_gpio_get_pdata(pdev); + if (!pdata) { +@@ -251,6 +252,15 @@ static int davinci_gpio_probe(struct platform_device *pdev) + chips->chip.request = gpiochip_generic_request; + chips->chip.free = gpiochip_generic_free; + } ++ /* ++ * Traditionally the base is given out in first-come-first-serve order. ++ * This might shuffle the numbering of gpios if the probe order changes. ++ * So make the base deterministical if the device tree specifies alias ++ * ids. ++ */ ++ gpio_alias_id = of_alias_get_id(dev->of_node, "gpio"); ++ if (gpio_alias_id >= 0) ++ chips->chip.base = gpio_alias_id; + #endif + spin_lock_init(&chips->lock); + bank_base += ngpio; +diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c +index e26d87b6ffc5..e8de5f087401 100644 +--- a/drivers/tty/serial/8250/8250_port.c ++++ b/drivers/tty/serial/8250/8250_port.c +@@ -1868,8 +1868,9 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir) + spin_lock_irqsave(&port->lock, flags); + + status = serial_port_in(port, UART_LSR); +- +- if (status & (UART_LSR_DR | UART_LSR_BI)) { ++ /* '&& iir & UART_IIR_RDI UART_IIR_RDI' will affect hardware flow control */ ++ if (status & (UART_LSR_DR | UART_LSR_BI) && ++ iir & UART_IIR_RDI) { + if (!up->dma || handle_rx_dma(up, iir)) + status = serial8250_rx_chars(up, status); + } +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0002-Add-support-for-U9300C-TD-LTE-module.patch b/recipes-kernel/linux/files/0002-Add-support-for-U9300C-TD-LTE-module.patch new file mode 100644 index 000000000..2c315f233 --- /dev/null +++ b/recipes-kernel/linux/files/0002-Add-support-for-U9300C-TD-LTE-module.patch @@ -0,0 +1,36 @@ +From 17d74fd2df7c080e2c8978579e35e35a88144ec5 Mon Sep 17 00:00:00 2001 +From: Su Bao Cheng +Date: Tue, 23 Apr 2019 10:07:17 +0800 +Subject: [PATCH 02/23] Add support for U9300C TD-LTE module + +Author: Gao Nian +Signed-off-by: Su Bao Cheng +--- + drivers/usb/serial/option.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c +index e0a4749ba565..c83d2022ce95 100644 +--- a/drivers/usb/serial/option.c ++++ b/drivers/usb/serial/option.c +@@ -392,6 +392,9 @@ static void option_instat_callback(struct urb *urb); + /* iBall 3.5G connect wireless modem */ + #define IBALL_3_5G_CONNECT 0x9605 + ++/* LONGSUNG U9300C TD-LTE wireless modem */ ++#define LONGSUNG_U9300C 0x9b3c ++ + /* Zoom */ + #define ZOOM_PRODUCT_4597 0x9607 + +@@ -1808,6 +1811,7 @@ static const struct usb_device_id option_ids[] = { + .driver_info = RSVD(4) }, + { USB_DEVICE(LONGCHEER_VENDOR_ID, ZOOM_PRODUCT_4597) }, + { USB_DEVICE(LONGCHEER_VENDOR_ID, IBALL_3_5G_CONNECT) }, ++ { USB_DEVICE(LONGCHEER_VENDOR_ID, LONGSUNG_U9300C) }, + { USB_DEVICE(HAIER_VENDOR_ID, HAIER_PRODUCT_CE100) }, + { USB_DEVICE_AND_INTERFACE_INFO(HAIER_VENDOR_ID, HAIER_PRODUCT_CE81B, 0xff, 0xff, 0xff) }, + /* Pirelli */ +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0003-feat-Add-CP210x-driver-support-to-software-flow-cont.patch b/recipes-kernel/linux/files/0003-feat-Add-CP210x-driver-support-to-software-flow-cont.patch new file mode 100644 index 000000000..cbb4d2b11 --- /dev/null +++ b/recipes-kernel/linux/files/0003-feat-Add-CP210x-driver-support-to-software-flow-cont.patch @@ -0,0 +1,190 @@ +From 307404678bae5bf3d3eb2c39bd852def482ebaee Mon Sep 17 00:00:00 2001 +From: Su Bao Cheng +Date: Mon, 15 Jul 2019 15:46:09 +0800 +Subject: [PATCH 03/23] feat: Add CP210x driver support to software flow + control + +Signed-off-by: Wang Sheng Long +--- + drivers/usb/serial/cp210x.c | 126 ++++++++++++++++++++++++++++++++++-- + 1 file changed, 121 insertions(+), 5 deletions(-) + +diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c +index e732949f6567..638bae915453 100644 +--- a/drivers/usb/serial/cp210x.c ++++ b/drivers/usb/serial/cp210x.c +@@ -380,6 +380,10 @@ static struct usb_serial_driver * const serial_drivers[] = { + #define CP210X_PARTNUM_CP2102N_QFN20 0x22 + #define CP210X_PARTNUM_UNKNOWN 0xFF + ++/*vstart and vstop define*/ ++#define CP210X_VSTART 0x11 ++#define CP210X_VSTOP 0x13 ++ + /* CP210X_GET_COMM_STATUS returns these 0x13 bytes */ + struct cp210x_comm_status { + __le32 ulErrors; +@@ -391,6 +395,16 @@ struct cp210x_comm_status { + u8 bReserved; + } __packed; + ++/* Characrters Respones 6 bytes*/ ++struct cp210x_chars_respones{ ++ u8 bEofchar; ++ u8 bErrochar; ++ u8 bBreakchar; ++ u8 bEventchar; ++ u8 bXonchar; ++ u8 bXoffchar; ++} __packed; ++ + /* + * CP210X_PURGE - 16 bits passed in wValue of USB request. + * SiLabs app note AN571 gives a strange description of the 4 bits: +@@ -624,6 +638,52 @@ static int cp210x_read_vendor_block(struct usb_serial *serial, u8 type, u16 val, + return result; + } + ++/* ++ *func: Read and Write Characrters Respones ++ * operate Register SET_CHARS/GET_CHATS ++ */ ++static int cp210x_operate_chars_block(struct usb_serial_port *port, u8 req, u8 type, ++ void *buf, int bufsize) ++{ ++ struct usb_serial *serial = port->serial; ++ struct cp210x_port_private *port_priv = usb_get_serial_port_data(port); ++ void *dmabuf; ++ int result; ++ ++ dmabuf = kmemdup(buf,bufsize, GFP_KERNEL); ++ if (!dmabuf) { ++ /* ++ * FIXME Some callers don't bother to check for error, ++ * at least give them consistent junk until they are fixed ++ */ ++ memset(buf, 0, bufsize); ++ return -ENOMEM; ++ } ++ ++ result = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0), ++ req, type, 0, port_priv->bInterfaceNumber, dmabuf, bufsize, ++ USB_CTRL_SET_TIMEOUT); ++ if (result == bufsize) { ++ memcpy(buf, dmabuf, bufsize); ++ result = 0; ++ } else { ++ dev_err(&port->dev, "failed get req 0x%x size %d status: %d\n", ++ req, bufsize, result); ++ if (result >= 0) ++ result = -EIO; ++ ++ /* ++ * FIXME Some callers don't bother to check for error, ++ * at least give them consistent junk until they are fixed ++ */ ++ memset(buf, 0, bufsize); ++ } ++ ++ kfree(dmabuf); ++ ++ return result; ++} ++ + /* + * Writes any 16-bit CP210X_ register (req) whose value is passed + * entirely in the wValue field of the USB request. +@@ -1134,11 +1194,18 @@ static void cp210x_set_termios(struct tty_struct *tty, + struct usb_serial_port *port, struct ktermios *old_termios) + { + struct device *dev = &port->dev; +- unsigned int cflag, old_cflag; ++ struct usb_serial *serial = port->serial; ++ struct cp210x_chars_respones *CharsRes = NULL; ++ struct cp210x_flow_ctl flow_ctl; ++ unsigned int cflag, old_cflag, iflag; + u16 bits; ++ int result; ++ u32 ctl_hs; ++ u32 flow_repl; + + cflag = tty->termios.c_cflag; + old_cflag = old_termios->c_cflag; ++ iflag = tty->termios.c_iflag; + + if (tty->termios.c_ospeed != old_termios->c_ospeed) + cp210x_change_speed(tty, port, old_termios); +@@ -1212,10 +1279,6 @@ static void cp210x_set_termios(struct tty_struct *tty, + } + + if ((cflag & CRTSCTS) != (old_cflag & CRTSCTS)) { +- struct cp210x_flow_ctl flow_ctl; +- u32 ctl_hs; +- u32 flow_repl; +- + cp210x_read_reg_block(port, CP210X_GET_FLOW, &flow_ctl, + sizeof(flow_ctl)); + ctl_hs = le32_to_cpu(flow_ctl.ulControlHandshake); +@@ -1252,6 +1315,59 @@ static void cp210x_set_termios(struct tty_struct *tty, + sizeof(flow_ctl)); + } + ++ /* Set Software Flow Control ++ * Xon/Xoff code ++ * Check the IXOFF/IXON status in the iflag component of the ++ * termios structure. ++ * ++ */ ++ if ((iflag & IXOFF) || (iflag & IXON)) { ++ /*set vstart/vstop chars */ ++ CharsRes = kmalloc(sizeof(*CharsRes), GFP_KERNEL); ++ if (!CharsRes) { ++ dev_err(dev, "Characrters Respones kmalloc failed " ++ "xon/xoff software flow control\n"); ++ return; ++ } ++ result = cp210x_operate_chars_block(port, CP210X_GET_CHARS, ++ REQTYPE_DEVICE_TO_HOST, CharsRes, sizeof(*CharsRes)); ++ dev_dbg(dev, "%s - bXonchar=0x%x bXoffchar=0x%x \n", ++ __func__, CharsRes->bXonchar ,CharsRes->bXoffchar); ++ if (result < 0){ ++ kfree(CharsRes); ++ dev_err(dev, "Read Characrters Respones failed " ++ "xon/xoff software flow control\n"); ++ return; ++ } ++ CharsRes->bXonchar = CP210X_VSTART; ++ CharsRes->bXoffchar = CP210X_VSTOP; ++ result = cp210x_operate_chars_block(port, CP210X_SET_CHARS, ++ REQTYPE_HOST_TO_INTERFACE, CharsRes, sizeof(*CharsRes)); ++ if (result < 0){ ++ kfree(CharsRes); ++ dev_err(dev, "Write Characrters Respones failed" ++ "xon/xoff software flow control\n"); ++ return; ++ } ++ kfree(CharsRes); ++ /*Set Rx/Tx Flow Contrl Flag in ulFlowReplace*/ ++ cp210x_read_reg_block(port, CP210X_GET_FLOW, &flow_ctl,sizeof(flow_ctl)); ++ flow_repl = le32_to_cpu(flow_ctl.ulFlowReplace); ++ dev_dbg(dev, "%s - read ulControlHandshake=0x%08x, ulFlowReplace=0x%08x\n", ++ __func__, ctl_hs, flow_repl); ++ if (iflag & IXOFF) ++ flow_repl |= CP210X_SERIAL_AUTO_RECEIVE; ++ else ++ flow_repl &= ~CP210X_SERIAL_AUTO_RECEIVE; ++ ++ if (iflag & IXON) ++ flow_repl |= CP210X_SERIAL_AUTO_TRANSMIT; ++ else ++ flow_repl &= ~CP210X_SERIAL_AUTO_TRANSMIT; ++ ++ flow_ctl.ulFlowReplace = cpu_to_le32(flow_repl); ++ cp210x_write_reg_block(port, CP210X_SET_FLOW, &flow_ctl,sizeof(flow_ctl)); ++ } + } + + static int cp210x_tiocmset(struct tty_struct *tty, +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0004-fix-disable-usb-lpm-to-fix-usb-device-reset.patch b/recipes-kernel/linux/files/0004-fix-disable-usb-lpm-to-fix-usb-device-reset.patch new file mode 100644 index 000000000..540c31d58 --- /dev/null +++ b/recipes-kernel/linux/files/0004-fix-disable-usb-lpm-to-fix-usb-device-reset.patch @@ -0,0 +1,25 @@ +From a5e11cc5941248ff5f1aa2f2f263be4a300232bc Mon Sep 17 00:00:00 2001 +From: Sheng Long Wang +Date: Tue, 13 Aug 2019 09:30:38 +0800 +Subject: [PATCH 04/23] fix: disable usb lpm to fix usb device reset + +--- + drivers/usb/core/hub.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c +index eb24ec0e160d..4668b5d5cfe6 100644 +--- a/drivers/usb/core/hub.c ++++ b/drivers/usb/core/hub.c +@@ -4420,7 +4420,7 @@ static void hub_set_initial_usb2_lpm_policy(struct usb_device *udev) + struct usb_hub *hub = usb_hub_to_struct_hub(udev->parent); + int connect_type = USB_PORT_CONNECT_TYPE_UNKNOWN; + +- if (!udev->usb2_hw_lpm_capable || !udev->bos) ++ //if (!udev->usb2_hw_lpm_capable || !udev->bos) + return; + + if (hub) +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0005-Fix-DP-maybe-not-display-problem.patch b/recipes-kernel/linux/files/0005-Fix-DP-maybe-not-display-problem.patch new file mode 100644 index 000000000..b836e0f46 --- /dev/null +++ b/recipes-kernel/linux/files/0005-Fix-DP-maybe-not-display-problem.patch @@ -0,0 +1,385 @@ +From 6494ab018e65022d1689559eed188e5ed43dd8ea Mon Sep 17 00:00:00 2001 +From: Sheng Long Wang +Date: Tue, 13 Aug 2019 10:27:44 +0800 +Subject: [PATCH 05/23] Fix: DP maybe not display problem. + +Three reasons: + 1. No entry link training phase + 2. In Link training phase but link training failed + 3. max_tu_symbol value Calculate's way erro + +For 1. Modifying reducing polling cycle and it can solve it. + +For 2. link training failed because of the interlane alignment + flag is missing during link training(hotpulg maybe + also have this problem).In the DP specification, + the receiver may defer setting INTERLANE_ALIGN_DONE bit + until the receiver may defer setting INTERLANE_ALIGN_DONE + bit.And make it optimize is completed. + So,try to repeat link training to solve this problem. + +For 3. max_tu_symbol was programmed to TU_SIZE_RECOMMENDED - 1, + which is not what the spec says,It may cause some + DP-to-VGA apdaters not dispaly.So,Calculate the value as + recommended in the spec. + This fixes artifacts in some videomodes (e.g.1024x768@60 + on 2-lanes & 1.62Gbps was pretty bad for me). + +Signed-off-by: Sheng Long Wang +--- + drivers/gpu/drm/bridge/tc358767.c | 288 +++++++++++++++-------------- + drivers/gpu/drm/drm_probe_helper.c | 2 +- + 2 files changed, 151 insertions(+), 139 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c +index 665bc3f38275..0327546ab4ef 100644 +--- a/drivers/gpu/drm/bridge/tc358767.c ++++ b/drivers/gpu/drm/bridge/tc358767.c +@@ -686,6 +686,8 @@ static int tc_set_video_mode(struct tc_data *tc, + int upper_margin = mode->vtotal - mode->vsync_end; + int lower_margin = mode->vsync_start - mode->vdisplay; + int vsync_len = mode->vsync_end - mode->vsync_start; ++ u32 bits_per_pixel = 24; ++ u32 in_bw, out_bw; + + /* + * Recommended maximum number of symbols transferred in a transfer unit: +@@ -693,7 +695,9 @@ static int tc_set_video_mode(struct tc_data *tc, + * (output active video bandwidth in bytes)) + * Must be less than tu_size. + */ +- max_tu_symbol = TU_SIZE_RECOMMENDED - 1; ++ in_bw = mode->clock * bits_per_pixel / 8; ++ out_bw = tc->link.base.num_lanes * tc->link.base.rate; ++ max_tu_symbol = DIV_ROUND_UP(in_bw * TU_SIZE_RECOMMENDED, out_bw); + + dev_dbg(tc->dev, "set mode %dx%d\n", + mode->hdisplay, mode->vdisplay); +@@ -795,166 +799,174 @@ static int tc_main_link_enable(struct tc_data *tc) + int ret; + u8 tmp[8]; + u32 error; ++ int retry; + + dev_dbg(tc->dev, "link enable\n"); ++ for (retry = 0; retry < 10; retry++) ++ { + +- tc_write(DP0CTL, 0); ++ tc_write(DP0CTL, 0); + +- tc_write(DP0_SRCCTRL, tc_srcctrl(tc)); +- /* SSCG and BW27 on DP1 must be set to the same as on DP0 */ +- tc_write(DP1_SRCCTRL, +- (tc->link.spread ? DP0_SRCCTRL_SSCG : 0) | +- ((tc->link.base.rate != 162000) ? DP0_SRCCTRL_BW27 : 0)); ++ tc_write(DP0_SRCCTRL, tc_srcctrl(tc)); ++ /* SSCG and BW27 on DP1 must be set to the same as on DP0 */ ++ tc_write(DP1_SRCCTRL, ++ (tc->link.spread ? DP0_SRCCTRL_SSCG : 0) | ++ ((tc->link.base.rate != 162000) ? DP0_SRCCTRL_BW27 : 0)); + +- rate = clk_get_rate(tc->refclk); +- switch (rate) { +- case 38400000: +- value = REF_FREQ_38M4; +- break; +- case 26000000: +- value = REF_FREQ_26M; +- break; +- case 19200000: +- value = REF_FREQ_19M2; +- break; +- case 13000000: +- value = REF_FREQ_13M; +- break; +- default: +- return -EINVAL; +- } +- value |= SYSCLK_SEL_LSCLK | LSCLK_DIV_2; +- tc_write(SYS_PLLPARAM, value); +- +- /* Setup Main Link */ +- dp_phy_ctrl = BGREN | PWR_SW_EN | PHY_A0_EN | PHY_M0_EN; +- if (tc->link.base.num_lanes == 2) +- dp_phy_ctrl |= PHY_2LANE; +- tc_write(DP_PHY_CTRL, dp_phy_ctrl); +- +- /* PLL setup */ +- tc_write(DP0_PLLCTRL, PLLUPDATE | PLLEN); +- tc_wait_pll_lock(tc); +- +- tc_write(DP1_PLLCTRL, PLLUPDATE | PLLEN); +- tc_wait_pll_lock(tc); +- +- /* Reset/Enable Main Links */ +- dp_phy_ctrl |= DP_PHY_RST | PHY_M1_RST | PHY_M0_RST; +- tc_write(DP_PHY_CTRL, dp_phy_ctrl); +- usleep_range(100, 200); +- dp_phy_ctrl &= ~(DP_PHY_RST | PHY_M1_RST | PHY_M0_RST); +- tc_write(DP_PHY_CTRL, dp_phy_ctrl); +- +- timeout = 1000; +- do { +- tc_read(DP_PHY_CTRL, &value); +- udelay(1); +- } while ((!(value & PHY_RDY)) && (--timeout)); +- +- if (timeout == 0) { +- dev_err(dev, "timeout waiting for phy become ready"); +- return -ETIMEDOUT; +- } +- +- /* Set misc: 8 bits per color */ +- ret = regmap_update_bits(tc->regmap, DP0_MISC, BPC_8, BPC_8); +- if (ret) +- goto err; ++ rate = clk_get_rate(tc->refclk); ++ switch (rate) { ++ case 38400000: ++ value = REF_FREQ_38M4; ++ break; ++ case 26000000: ++ value = REF_FREQ_26M; ++ break; ++ case 19200000: ++ value = REF_FREQ_19M2; ++ break; ++ case 13000000: ++ value = REF_FREQ_13M; ++ break; ++ default: ++ return -EINVAL; ++ } ++ value |= SYSCLK_SEL_LSCLK | LSCLK_DIV_2; ++ tc_write(SYS_PLLPARAM, value); ++ ++ /* Setup Main Link */ ++ dp_phy_ctrl = BGREN | PWR_SW_EN | PHY_A0_EN | PHY_M0_EN; ++ if (tc->link.base.num_lanes == 2) ++ dp_phy_ctrl |= PHY_2LANE; ++ tc_write(DP_PHY_CTRL, dp_phy_ctrl); ++ ++ /* PLL setup */ ++ tc_write(DP0_PLLCTRL, PLLUPDATE | PLLEN); ++ tc_wait_pll_lock(tc); ++ ++ tc_write(DP1_PLLCTRL, PLLUPDATE | PLLEN); ++ tc_wait_pll_lock(tc); ++ ++ /* Reset/Enable Main Links */ ++ dp_phy_ctrl |= DP_PHY_RST | PHY_M1_RST | PHY_M0_RST; ++ tc_write(DP_PHY_CTRL, dp_phy_ctrl); ++ usleep_range(100, 200); ++ dp_phy_ctrl &= ~(DP_PHY_RST | PHY_M1_RST | PHY_M0_RST); ++ tc_write(DP_PHY_CTRL, dp_phy_ctrl); ++ ++ timeout = 1000; ++ do { ++ tc_read(DP_PHY_CTRL, &value); ++ udelay(1); ++ } while ((!(value & PHY_RDY)) && (--timeout)); ++ ++ if (timeout == 0) { ++ dev_err(dev, "timeout waiting for phy become ready"); ++ return -ETIMEDOUT; ++ } + +- /* +- * ASSR mode +- * on TC358767 side ASSR configured through strap pin +- * seems there is no way to change this setting from SW +- * +- * check is tc configured for same mode +- */ +- if (tc->assr != tc->link.assr) { +- dev_dbg(dev, "Trying to set display to ASSR: %d\n", +- tc->assr); +- /* try to set ASSR on display side */ +- tmp[0] = tc->assr; +- ret = drm_dp_dpcd_writeb(aux, DP_EDP_CONFIGURATION_SET, tmp[0]); +- if (ret < 0) +- goto err_dpcd_read; +- /* read back */ +- ret = drm_dp_dpcd_readb(aux, DP_EDP_CONFIGURATION_SET, tmp); +- if (ret < 0) +- goto err_dpcd_read; ++ /* Set misc: 8 bits per color */ ++ ret = regmap_update_bits(tc->regmap, DP0_MISC, BPC_8, BPC_8); ++ if (ret) ++ goto err; + +- if (tmp[0] != tc->assr) { +- dev_dbg(dev, "Failed to switch display ASSR to %d, falling back to unscrambled mode\n", +- tc->assr); +- /* trying with disabled scrambler */ +- tc->link.scrambler_dis = true; ++ /* ++ * ASSR mode ++ * on TC358767 side ASSR configured through strap pin ++ * seems there is no way to change this setting from SW ++ * ++ * check is tc configured for same mode ++ */ ++ if (tc->assr != tc->link.assr) { ++ dev_dbg(dev, "Trying to set display to ASSR: %d\n", ++ tc->assr); ++ /* try to set ASSR on display side */ ++ tmp[0] = tc->assr; ++ ret = drm_dp_dpcd_writeb(aux, DP_EDP_CONFIGURATION_SET, tmp[0]); ++ if (ret < 0) ++ goto err_dpcd_read; ++ /* read back */ ++ ret = drm_dp_dpcd_readb(aux, DP_EDP_CONFIGURATION_SET, tmp); ++ if (ret < 0) ++ goto err_dpcd_read; ++ ++ if (tmp[0] != tc->assr) { ++ dev_dbg(dev, "Failed to switch display ASSR to %d, falling back to unscrambled mode\n", ++ tc->assr); ++ /* trying with disabled scrambler */ ++ tc->link.scrambler_dis = true; ++ } + } +- } + +- /* Setup Link & DPRx Config for Training */ +- ret = drm_dp_link_configure(aux, &tc->link.base); +- if (ret < 0) +- goto err_dpcd_write; ++ /* Setup Link & DPRx Config for Training */ ++ ret = drm_dp_link_configure(aux, &tc->link.base); ++ if (ret < 0) ++ goto err_dpcd_write; + +- /* DOWNSPREAD_CTRL */ +- tmp[0] = tc->link.spread ? DP_SPREAD_AMP_0_5 : 0x00; +- /* MAIN_LINK_CHANNEL_CODING_SET */ +- tmp[1] = DP_SET_ANSI_8B10B; +- ret = drm_dp_dpcd_write(aux, DP_DOWNSPREAD_CTRL, tmp, 2); +- if (ret < 0) +- goto err_dpcd_write; ++ /* DOWNSPREAD_CTRL */ ++ tmp[0] = tc->link.spread ? DP_SPREAD_AMP_0_5 : 0x00; ++ /* MAIN_LINK_CHANNEL_CODING_SET */ ++ tmp[1] = DP_SET_ANSI_8B10B; ++ ret = drm_dp_dpcd_write(aux, DP_DOWNSPREAD_CTRL, tmp, 2); ++ if (ret < 0) ++ goto err_dpcd_write; + +- // Reset voltage-swing & pre-emphasis +- tmp[0] = tmp[1] = DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_0; +- ret = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, tmp, 2); +- if (ret < 0) +- goto err_dpcd_write; ++ // Reset voltage-swing & pre-emphasis ++ tmp[0] = tmp[1] = DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_0; ++ ret = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, tmp, 2); ++ if (ret < 0) ++ goto err_dpcd_write; + +- /* LINK TRAINING PATTERN 1 */ ++ /* LINK TRAINING PATTERN 1 */ + +- /* Set DPCD 0x102 for Training Pattern 1 */ +- tc_write(DP0_SNKLTCTRL, DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1); ++ /* Set DPCD 0x102 for Training Pattern 1 */ ++ tc_write(DP0_SNKLTCTRL, DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1); + +- tc_write(DP0_LTLOOPCTRL, +- (15 << 28) | /* Defer Iteration Count */ +- (15 << 24) | /* Loop Iteration Count */ +- (0xd << 0)); /* Loop Timer Delay */ ++ tc_write(DP0_LTLOOPCTRL, ++ (15 << 28) | /* Defer Iteration Count */ ++ (15 << 24) | /* Loop Iteration Count */ ++ (0xd << 0)); /* Loop Timer Delay */ + +- tc_write(DP0_SRCCTRL, tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | DP0_SRCCTRL_AUTOCORRECT | +- DP0_SRCCTRL_TP1); ++ tc_write(DP0_SRCCTRL, tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | DP0_SRCCTRL_AUTOCORRECT | ++ DP0_SRCCTRL_TP1); + +- /* Enable DP0 to start Link Training */ +- tc_write(DP0CTL, +- ((tc->link.base.capabilities & DP_LINK_CAP_ENHANCED_FRAMING) ? EF_EN : 0) | +- DP_EN); ++ /* Enable DP0 to start Link Training */ ++ tc_write(DP0CTL, ++ ((tc->link.base.capabilities & DP_LINK_CAP_ENHANCED_FRAMING) ? EF_EN : 0) | ++ DP_EN); + +- /* wait */ +- ret = tc_wait_link_training(tc, &error); +- if (ret) +- goto err; ++ /* wait */ ++ ret = tc_wait_link_training(tc, &error); ++ if (ret) ++ goto err; + +- if (error) { +- dev_err(tc->dev, "Link training phase 1 failed: %s\n", +- training_pattern1_errors[error]); +- ret = -ENODEV; +- goto err; +- } ++ if (error) { ++ dev_dbg(tc->dev, "Link training phase 1 failed: %s\n", ++ training_pattern1_errors[error]); ++ continue; ++ } + +- /* LINK TRAINING PATTERN 2 */ ++ /* LINK TRAINING PATTERN 2 */ + +- /* Set DPCD 0x102 for Training Pattern 2 */ +- tc_write(DP0_SNKLTCTRL, DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_2); ++ /* Set DPCD 0x102 for Training Pattern 2 */ ++ tc_write(DP0_SNKLTCTRL, DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_2); + +- tc_write(DP0_SRCCTRL, tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | DP0_SRCCTRL_AUTOCORRECT | +- DP0_SRCCTRL_TP2); ++ tc_write(DP0_SRCCTRL, tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | DP0_SRCCTRL_AUTOCORRECT | ++ DP0_SRCCTRL_TP2); + +- /* wait */ +- ret = tc_wait_link_training(tc, &error); +- if (ret) +- goto err; ++ /* wait */ ++ ret = tc_wait_link_training(tc, &error); ++ if (ret) ++ goto err; + +- if (error) { +- dev_err(tc->dev, "Link training phase 2 failed: %s\n", +- training_pattern2_errors[error]); ++ if (error) { ++ dev_dbg(tc->dev, "Link training phase 2 failed: %s\n", ++ training_pattern2_errors[error]); ++ }else{ ++ break; ++ } ++ } ++ if (retry == 10) { ++ dev_err(tc->dev, "Link training failed \n"); + ret = -ENODEV; + goto err; + } +diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c +index d18b7e27ef64..0afb91ab5eeb 100644 +--- a/drivers/gpu/drm/drm_probe_helper.c ++++ b/drivers/gpu/drm/drm_probe_helper.c +@@ -203,7 +203,7 @@ enum drm_mode_status drm_connector_mode_valid(struct drm_connector *connector, + return connector_funcs->mode_valid(connector, mode); + } + +-#define DRM_OUTPUT_POLL_PERIOD (10*HZ) ++#define DRM_OUTPUT_POLL_PERIOD (3*HZ) + /** + * drm_kms_helper_poll_enable - re-enable output polling. + * @dev: drm_device +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0006-fix-fix-the-hardware-flow-function-of-cp2102n24.patch b/recipes-kernel/linux/files/0006-fix-fix-the-hardware-flow-function-of-cp2102n24.patch new file mode 100644 index 000000000..a2bc9d1a3 --- /dev/null +++ b/recipes-kernel/linux/files/0006-fix-fix-the-hardware-flow-function-of-cp2102n24.patch @@ -0,0 +1,53 @@ +From 4d26330948ffe13fa3118d209acdf2342a07661f Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Wed, 21 Aug 2019 16:22:30 +0800 +Subject: [PATCH 06/23] fix:fix the hardware flow function of cp2102n24 + +Signed-off-by: Gao Nian +--- + drivers/usb/serial/cp210x.c | 14 +++++++++++++- + 1 file changed, 13 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c +index 638bae915453..0a7f153d1ff8 100644 +--- a/drivers/usb/serial/cp210x.c ++++ b/drivers/usb/serial/cp210x.c +@@ -270,6 +270,8 @@ static struct usb_serial_driver cp210x_device = { + .break_ctl = cp210x_break_ctl, + .set_termios = cp210x_set_termios, + .tx_empty = cp210x_tx_empty, ++ .throttle = usb_serial_generic_throttle, ++ .unthrottle = usb_serial_generic_unthrottle, + .tiocmget = cp210x_tiocmget, + .tiocmset = cp210x_tiocmset, + .attach = cp210x_attach, +@@ -952,6 +954,7 @@ static void cp210x_get_termios_port(struct usb_serial_port *port, + u32 baud; + u16 bits; + u32 ctl_hs; ++ u32 flow_repl; + + cp210x_read_u32_reg(port, CP210X_GET_BAUDRATE, &baud); + +@@ -1050,8 +1053,17 @@ static void cp210x_get_termios_port(struct usb_serial_port *port, + cp210x_read_reg_block(port, CP210X_GET_FLOW, &flow_ctl, + sizeof(flow_ctl)); + ctl_hs = le32_to_cpu(flow_ctl.ulControlHandshake); ++ flow_repl = le32_to_cpu(flow_ctl.ulFlowReplace); ++ /* CP210x hardware disables RTS but leaves CTS when in hardware flow control mode and port is closed. ++ * This allows data to flow out, but new data will not come into the port. ++ * When re-opening the port, if CTS is enabled, then RTS must manually be re-enabled. */ + if (ctl_hs & CP210X_SERIAL_CTS_HANDSHAKE) { +- dev_dbg(dev, "%s - flow control = CRTSCTS\n", __func__); ++ flow_repl &= ~CP210X_SERIAL_RTS_MASK; ++ flow_repl |= CP210X_SERIAL_RTS_SHIFT(CP210X_SERIAL_RTS_FLOW_CTL); ++ dev_dbg(dev, "%s - flow control = CRTSCTS, write ulControlHandshake=0x%08x, ulFlowReplace=0x%08x\n", __func__, ctl_hs, flow_repl); ++ flow_ctl.ulControlHandshake = cpu_to_le32(ctl_hs); ++ flow_ctl.ulFlowReplace = cpu_to_le32(flow_repl); ++ cp210x_write_reg_block(port, CP210X_SET_FLOW, &flow_ctl, sizeof(flow_ctl)); + cflag |= CRTSCTS; + } else { + dev_dbg(dev, "%s - flow control = NONE\n", __func__); +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0007-serial-8250-8250_omap-Fix-DMA-teardown-sequence-duri.patch b/recipes-kernel/linux/files/0007-serial-8250-8250_omap-Fix-DMA-teardown-sequence-duri.patch new file mode 100644 index 000000000..8ef5a261b --- /dev/null +++ b/recipes-kernel/linux/files/0007-serial-8250-8250_omap-Fix-DMA-teardown-sequence-duri.patch @@ -0,0 +1,73 @@ +From c1b5b5013e492b3162d8ca914d958454ab98b328 Mon Sep 17 00:00:00 2001 +From: Vignesh Raghavendra +Date: Tue, 17 Sep 2019 14:53:27 +0530 +Subject: [PATCH 07/23] serial: 8250: 8250_omap: Fix DMA teardown sequence + during RX timeout + +Calling dmaengine_terminate_async() does not guarantee all the data that +is picked up DMA and is in flight to memory is flushed immediately, +therefore poll for the in flight data to be flushed before pushing +buffer to tty ldisc. +Ideal way to solve this without polling is to call +dmaengine_synchronize() before pushing data to tty layer, but that +cannot be done in interrupt context and code cannot be moved to bottom +half as we need to hold rx_dma_lock spinlock. +Therefore introduce a bounded polling mechanism to know data has been +flushed. Since this is a flush at DMA hardware level, sequence should be +quite deterministic and loop upper bound is set to 5 times the observed +value. + +Signed-off-by: Vignesh Raghavendra +--- + drivers/tty/serial/8250/8250_omap.c | 25 ++++++++++++++++++++++--- + 1 file changed, 22 insertions(+), 3 deletions(-) + +diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c +index d3d55a634313..77c1a18d4f43 100644 +--- a/drivers/tty/serial/8250/8250_omap.c ++++ b/drivers/tty/serial/8250/8250_omap.c +@@ -788,6 +788,8 @@ static void __dma_rx_do_complete(struct uart_8250_port *p) + struct omap8250_priv *priv = p->port.private_data; + struct uart_8250_dma *dma = p->dma; + struct tty_port *tty_port = &p->port.state->port; ++ struct dma_chan *rxchan = dma->rxchan; ++ dma_cookie_t cookie; + struct dma_tx_state state; + int count; + unsigned long flags; +@@ -798,12 +800,29 @@ static void __dma_rx_do_complete(struct uart_8250_port *p) + if (!dma->rx_running) + goto unlock; + ++ cookie = dma->rx_cookie; + dma->rx_running = 0; +- dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); ++ dmaengine_tx_status(rxchan, cookie, &state); + + count = dma->rx_size - state.residue + state.in_flight_bytes; +- if (count < dma->rx_size) +- dmaengine_terminate_async(dma->rxchan); ++ if (count < dma->rx_size) { ++ dmaengine_terminate_async(rxchan); ++ ++ /* ++ * Poll for teardown to complete which guarantees in ++ * flight data is drained. ++ */ ++ if (state.in_flight_bytes) { ++ int poll_count = 25; ++ ++ while (dmaengine_tx_status(rxchan, cookie, NULL) && ++ poll_count--) ++ cpu_relax(); ++ ++ if (!poll_count) ++ dev_err(p->port.dev, "teardown incomplete\n"); ++ } ++ } + if (!count) + goto unlock; + ret = tty_insert_flip_string(tty_port, dma->rx_buf, count); +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0008-serial-8250-8250_omap-Remove-redundant-call-to-omap_.patch b/recipes-kernel/linux/files/0008-serial-8250-8250_omap-Remove-redundant-call-to-omap_.patch new file mode 100644 index 000000000..b93b11ec5 --- /dev/null +++ b/recipes-kernel/linux/files/0008-serial-8250-8250_omap-Remove-redundant-call-to-omap_.patch @@ -0,0 +1,31 @@ +From e4be373b1fbf9822e0d02c7d763980348ab254c9 Mon Sep 17 00:00:00 2001 +From: Vignesh Raghavendra +Date: Tue, 17 Sep 2019 14:53:28 +0530 +Subject: [PATCH 08/23] serial: 8250: 8250_omap: Remove redundant call to + omap_8250_rx_dma_flush + +omap_8250_rx_dma_flush() is called twice in am654_8250_handle_rx_dma() +and first call quite redundant in case of second one. Drop the redundant +call. + +Reported-by: Peter Ujfalusi +Signed-off-by: Vignesh Raghavendra +--- + drivers/tty/serial/8250/8250_omap.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c +index 77c1a18d4f43..088232f6aa75 100644 +--- a/drivers/tty/serial/8250/8250_omap.c ++++ b/drivers/tty/serial/8250/8250_omap.c +@@ -1105,7 +1105,6 @@ static unsigned char am654_8250_handle_rx_dma(struct uart_8250_port *up, + if (!up->dma->rx_running) { + omap_8250_rx_dma(up); + } else { +- omap_8250_rx_dma_flush(up); + /* + * Disable RX timeout, read IIR to clear + * current timeout condition, clear EFR2 to +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0009-feat-add-io-expander-pcal9535-support.patch b/recipes-kernel/linux/files/0009-feat-add-io-expander-pcal9535-support.patch new file mode 100644 index 000000000..f971be970 --- /dev/null +++ b/recipes-kernel/linux/files/0009-feat-add-io-expander-pcal9535-support.patch @@ -0,0 +1,363 @@ +From 242bd3c176b132223ab67b05e1779a4653350691 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Wed, 9 Oct 2019 17:08:43 +0800 +Subject: [PATCH 09/23] feat:add io expander pcal9535 support + +Signed-off-by: le.jin +--- + drivers/gpio/gpio-pca953x.c | 76 ++++++++++++++++++++++++++++++++++- + drivers/gpio/gpiolib-sysfs.c | 67 ++++++++++++++++++++++++++++++ + drivers/gpio/gpiolib.c | 18 +++++++++ + drivers/gpio/gpiolib.h | 4 ++ + include/asm-generic/gpio.h | 5 +++ + include/linux/gpio.h | 10 +++++ + include/linux/gpio/consumer.h | 9 +++++ + include/linux/gpio/driver.h | 2 + + 8 files changed, 190 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c +index 2873b6e1d8b9..a5c26756d129 100644 +--- a/drivers/gpio/gpio-pca953x.c ++++ b/drivers/gpio/gpio-pca953x.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -137,6 +138,8 @@ struct pca953x_chip { + unsigned gpio_start; + u8 reg_output[MAX_BANK]; + u8 reg_direction[MAX_BANK]; ++ u8 reg_pull_en[MAX_BANK]; ++ u8 reg_pull_sel[MAX_BANK]; + struct mutex i2c_lock; + + #ifdef CONFIG_GPIO_PCA953X_IRQ +@@ -287,6 +290,60 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) + return 0; + } + ++static int pca953x_gpio_set_drive(struct gpio_chip *gc, ++ unsigned off, unsigned mode) ++{ ++ struct pca953x_chip *chip; ++ u8 pull_en_reg_val, pull_sel_reg_val; ++ int ret = 0; ++ ++ chip = gpiochip_get_data(gc); ++ ++ if (PCA_CHIP_TYPE(chip->driver_data) != PCA953X_TYPE) ++ return -EINVAL; ++ ++ mutex_lock(&chip->i2c_lock); ++ ++ switch (mode) { ++ case GPIOF_DRIVE_PULLUP: ++ pull_en_reg_val = chip->reg_pull_en[off / BANK_SZ] ++ | (1u << (off % BANK_SZ)); ++ pull_sel_reg_val = chip->reg_pull_sel[off / BANK_SZ] ++ | (1u << (off % BANK_SZ)); ++ break; ++ case GPIOF_DRIVE_PULLDOWN: ++ pull_en_reg_val = chip->reg_pull_en[off / BANK_SZ] ++ | (1u << (off % BANK_SZ)); ++ pull_sel_reg_val = chip->reg_pull_sel[off / BANK_SZ] ++ & ~(1u << (off % BANK_SZ)); ++ break; ++ case GPIOF_DRIVE_STRONG: ++ case GPIOF_DRIVE_HIZ: ++ pull_en_reg_val = chip->reg_pull_en[off / BANK_SZ] ++ & ~(1u << (off % BANK_SZ)); ++ pull_sel_reg_val = chip->reg_pull_sel[off / BANK_SZ]; ++ break; ++ default: ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ret = pca953x_write_single(chip, PCAL953X_PULL_EN, ++ pull_en_reg_val, off); ++ if (ret) ++ goto exit; ++ chip->reg_pull_en[off / BANK_SZ] = pull_en_reg_val; ++ ++ ret = pca953x_write_single(chip, PCAL953X_PULL_SEL, ++ pull_sel_reg_val, off); ++ if (ret) ++ goto exit; ++ chip->reg_pull_sel[off / BANK_SZ] = pull_sel_reg_val; ++exit: ++ mutex_unlock(&chip->i2c_lock); ++ return ret; ++} ++ + static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) + { + struct pca953x_chip *chip = gpiochip_get_data(gc); +@@ -453,6 +510,9 @@ static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) + gc->parent = &chip->client->dev; + gc->owner = THIS_MODULE; + gc->names = chip->names; ++ ++ if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) ++ gc->set_drive = pca953x_gpio_set_drive; + } + + #ifdef CONFIG_GPIO_PCA953X_IRQ +@@ -723,8 +783,9 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, + + static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) + { +- int ret; ++ int i, ret; + u8 val[MAX_BANK]; ++ u32 pull_en_reg_val, pull_sel_reg_val; + + chip->regs = &pca953x_regs; + +@@ -737,6 +798,18 @@ static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) + if (ret) + goto out; + ++ for (i = 0; i < NBANK(chip); i++) { ++ ret = pca953x_read_single(chip, PCAL953X_PULL_EN, &pull_en_reg_val, i*BANK_SZ); ++ chip->reg_pull_en[i] = (u8)pull_en_reg_val; ++ if (ret) ++ goto out; ++ ++ ret = pca953x_read_single(chip, PCAL953X_PULL_SEL, &pull_sel_reg_val, i*BANK_SZ); ++ chip->reg_pull_sel[i] = (u8)pull_sel_reg_val; ++ if (ret) ++ goto out; ++ } ++ + /* set platform specific polarity inversion */ + if (invert) + memset(val, 0xFF, NBANK(chip)); +@@ -957,6 +1030,7 @@ static const struct of_device_id pca953x_dt_ids[] = { + { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, + { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, + { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, ++ { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_INT | PCA_PCAL), }, + { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, + { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, + { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, +diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c +index 3dbaf489a8a5..ace48f06bc35 100644 +--- a/drivers/gpio/gpiolib-sysfs.c ++++ b/drivers/gpio/gpiolib-sysfs.c +@@ -362,6 +362,72 @@ static ssize_t active_low_store(struct device *dev, + } + static DEVICE_ATTR_RW(active_low); + ++static ssize_t drive_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct gpiod_data *data = dev_get_drvdata(dev); ++ struct gpio_desc *desc = data->desc; ++ ssize_t status; ++ ++ mutex_lock(&data->mutex); ++ ++ if (test_bit(FLAG_PULLUP, &desc->flags)) ++ status = sprintf(buf, "pullup\n"); ++ else if (test_bit(FLAG_PULLDOWN, &desc->flags)) ++ status = sprintf(buf, "pulldown\n"); ++ else if (test_bit(FLAG_STRONG, &desc->flags)) ++ status = sprintf(buf, "strong\n"); ++ else if (test_bit(FLAG_HIZ, &desc->flags)) ++ status = sprintf(buf, "hiz\n"); ++ else ++ status = -EINVAL; ++ ++ mutex_unlock(&data->mutex); ++ return status; ++} ++ ++static ssize_t drive_store(struct device *dev, ++ struct device_attribute *attr, const char *buf, size_t size) ++{ ++ struct gpiod_data *data = dev_get_drvdata(dev); ++ struct gpio_desc *desc = data->desc; ++ ssize_t status; ++ ++ mutex_lock(&data->mutex); ++ ++ clear_bit(FLAG_PULLUP, &desc->flags); ++ clear_bit(FLAG_PULLDOWN, &desc->flags); ++ clear_bit(FLAG_STRONG, &desc->flags); ++ clear_bit(FLAG_HIZ, &desc->flags); ++ if (sysfs_streq(buf, "pullup")) { ++ status = gpiod_set_drive(desc, GPIOF_DRIVE_PULLUP); ++ if (!status) { ++ set_bit(FLAG_PULLUP, &desc->flags); ++ } ++ } else if (sysfs_streq(buf, "pulldown")) { ++ status = gpiod_set_drive(desc, GPIOF_DRIVE_PULLDOWN); ++ if (!status) { ++ set_bit(FLAG_PULLDOWN, &desc->flags); ++ } ++ } else if (sysfs_streq(buf, "strong")) { ++ status = gpiod_set_drive(desc, GPIOF_DRIVE_STRONG); ++ if (!status) { ++ set_bit(FLAG_STRONG, &desc->flags); ++ } ++ } else if (sysfs_streq(buf, "hiz")) { ++ status = gpiod_set_drive(desc, GPIOF_DRIVE_HIZ); ++ if (!status) { ++ set_bit(FLAG_HIZ, &desc->flags); ++ } ++ } else { ++ status = -EINVAL; ++ } ++ ++ mutex_unlock(&data->mutex); ++ return status ? : size; ++} ++static DEVICE_ATTR_RW(drive); ++ + static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr, + int n) + { +@@ -389,6 +455,7 @@ static struct attribute *gpio_attrs[] = { + &dev_attr_edge.attr, + &dev_attr_value.attr, + &dev_attr_active_low.attr, ++ &dev_attr_drive.attr, + NULL, + }; + +diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c +index fd713326dcfc..48a39d553392 100644 +--- a/drivers/gpio/gpiolib.c ++++ b/drivers/gpio/gpiolib.c +@@ -2745,6 +2745,24 @@ int gpiod_is_active_low(const struct gpio_desc *desc) + } + EXPORT_SYMBOL_GPL(gpiod_is_active_low); + ++int gpiod_set_drive(struct gpio_desc *desc, unsigned mode) ++{ ++ struct gpio_chip *chip; ++ ++ VALIDATE_DESC(desc); ++ chip = desc->gdev->chip; ++ if (!chip || !chip->set || !chip->set_drive) ++ goto fail; ++ ++ might_sleep_if(chip->can_sleep); ++ ++ return chip->set_drive(chip, gpio_chip_hwgpio(desc), mode); ++ ++fail: ++ return -EINVAL; ++} ++EXPORT_SYMBOL_GPL(gpiod_set_drive); ++ + /* I/O calls are only valid after configuration completed; the relevant + * "is this a valid GPIO" error checks should already have been done. + * +diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h +index a7e49fef73d4..6c3abc5ecbcf 100644 +--- a/drivers/gpio/gpiolib.h ++++ b/drivers/gpio/gpiolib.h +@@ -216,6 +216,10 @@ struct gpio_desc { + #define FLAG_USED_AS_IRQ 9 /* GPIO is connected to an IRQ */ + #define FLAG_IS_HOGGED 11 /* GPIO is hogged */ + #define FLAG_TRANSITORY 12 /* GPIO may lose value in sleep or reset */ ++#define FLAG_PULLUP 13 /* Gpio drive is resistive pullup */ ++#define FLAG_PULLDOWN 14 /* Gpio drive is resistive pulldown */ ++#define FLAG_STRONG 15 /* Gpio drive is strong (fast output) */ ++#define FLAG_HIZ 16 /* Gpio drive is Hi-Z (input) */ + + /* Connection label */ + const char *label; +diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h +index 19eadac415c4..4cbba8308161 100644 +--- a/include/asm-generic/gpio.h ++++ b/include/asm-generic/gpio.h +@@ -81,6 +81,11 @@ static inline int gpio_set_debounce(unsigned gpio, unsigned debounce) + return gpiod_set_debounce(gpio_to_desc(gpio), debounce); + } + ++static inline int gpio_set_drive(unsigned gpio, unsigned mode) ++{ ++ return gpiod_set_drive(gpio_to_desc(gpio), mode); ++} ++ + static inline int gpio_get_value_cansleep(unsigned gpio) + { + return gpiod_get_raw_value_cansleep(gpio_to_desc(gpio)); +diff --git a/include/linux/gpio.h b/include/linux/gpio.h +index 39745b8bdd65..8b7f8afe7c1a 100644 +--- a/include/linux/gpio.h ++++ b/include/linux/gpio.h +@@ -41,6 +41,11 @@ + #define GPIOF_EXPORT_DIR_FIXED (GPIOF_EXPORT) + #define GPIOF_EXPORT_DIR_CHANGEABLE (GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE) + ++#define GPIOF_DRIVE_PULLUP (1 << 7) ++#define GPIOF_DRIVE_PULLDOWN (1 << 8) ++#define GPIOF_DRIVE_STRONG (1 << 9) ++#define GPIOF_DRIVE_HIZ (1 << 10) ++ + /** + * struct gpio - a structure describing a GPIO with configuration + * @gpio: the GPIO number +@@ -159,6 +164,11 @@ static inline int gpio_set_debounce(unsigned gpio, unsigned debounce) + return -ENOSYS; + } + ++static inline int gpio_set_drive(unsigned gpio, unsigned mode) ++{ ++ return -ENOSYS; ++} ++ + static inline int gpio_get_value(unsigned gpio) + { + /* GPIO can never have been requested or set as {in,out}put */ +diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h +index acc4279ad5e3..50c333d82dc5 100644 +--- a/include/linux/gpio/consumer.h ++++ b/include/linux/gpio/consumer.h +@@ -138,6 +138,8 @@ int gpiod_set_raw_array_value_cansleep(unsigned int array_size, + int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce); + int gpiod_set_transitory(struct gpio_desc *desc, bool transitory); + ++int gpiod_set_drive(struct gpio_desc *desc, unsigned mode); ++ + int gpiod_is_active_low(const struct gpio_desc *desc); + int gpiod_cansleep(const struct gpio_desc *desc); + +@@ -445,6 +447,13 @@ static inline int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) + return -ENOSYS; + } + ++static inline int gpiod_set_drive(unsigned gpio, unsigned mode) ++{ ++ /* GPIO can never have been requested */ ++ WARN_ON(1); ++ return -ENOSYS; ++} ++ + static inline int gpiod_is_active_low(const struct gpio_desc *desc) + { + /* GPIO can never have been requested */ +diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h +index a4d5eb37744a..c3af8cf978f6 100644 +--- a/include/linux/gpio/driver.h ++++ b/include/linux/gpio/driver.h +@@ -258,6 +258,8 @@ struct gpio_chip { + int (*set_config)(struct gpio_chip *chip, + unsigned offset, + unsigned long config); ++ int (*set_drive)(struct gpio_chip *chip, ++ unsigned offset, unsigned mode); + int (*to_irq)(struct gpio_chip *chip, + unsigned offset); + +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0010-feat-modify-kernel-to-load-fw-from-MTD-for-pru-rtu.patch b/recipes-kernel/linux/files/0010-feat-modify-kernel-to-load-fw-from-MTD-for-pru-rtu.patch new file mode 100644 index 000000000..717eabca8 --- /dev/null +++ b/recipes-kernel/linux/files/0010-feat-modify-kernel-to-load-fw-from-MTD-for-pru-rtu.patch @@ -0,0 +1,130 @@ +From e2348e65a09f34c6d4896abdc1b920c08396ecaa Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Fri, 25 Oct 2019 14:54:06 +0800 +Subject: [PATCH 10/23] feat:modify kernel to load fw from MTD for pru&rtu + +Signed-off-by: Gao Nian +--- + .../boot/dts/siemens/iot2050-common.dtsi | 8 +-- + drivers/base/firmware_loader/main.c | 65 ++++++++++++++++--- + 2 files changed, 59 insertions(+), 14 deletions(-) + +diff --git a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +index e1ba5572dcea..c0ac25d2f60c 100644 +--- a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +@@ -75,10 +75,10 @@ + interrupt-parent = <&main_udmass_inta>; + + prus = <&pru0_0>, <&rtu0_0>, <&pru0_1>, <&rtu0_1>; +- firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf", +- "ti-pruss/am65x-rtu0-prueth-fw.elf", +- "ti-pruss/am65x-pru1-prueth-fw.elf", +- "ti-pruss/am65x-rtu1-prueth-fw.elf"; ++ firmware-name = "mtd://pru0-fw", ++ "mtd://rtu0-fw", ++ "mtd://pru1-fw", ++ "mtd://rtu1-fw"; + mii-g-rt = <&icssg0_mii_g_rt>; + mii-rt = <&icssg0_mii_rt>; + dma-coherent; +diff --git a/drivers/base/firmware_loader/main.c b/drivers/base/firmware_loader/main.c +index 8e9213b36e31..bcf8aeef2823 100644 +--- a/drivers/base/firmware_loader/main.c ++++ b/drivers/base/firmware_loader/main.c +@@ -33,7 +33,7 @@ + #include + #include + #include +- ++#include + #include + + #include "../base.h" +@@ -346,6 +346,39 @@ fw_get_filesystem_firmware(struct device *device, struct fw_priv *fw_priv) + return rc; + } + ++static int fw_get_mtd_firmware(struct device *device, struct fw_priv *fw_priv, const char *fw_name) ++{ ++ int ret = 0; ++ size_t retlen = 0; ++ size_t size = 0; ++ unsigned char *buf = NULL; ++ ++ struct mtd_info *mtd = get_mtd_device_nm(fw_name); ++ if (!mtd) { ++ dev_err(device, "%s: get_mtd_device_nm [%s] failed\n", __func__, fw_priv->fw_name); ++ return -ENODEV; ++ } ++ ++ size = mtd->size; ++ ++ buf = (unsigned char *)vmalloc(size); ++ if (!buf) { ++ dev_err(device, "%s: vmalloc(0x%lx) failed\n", __func__, size); ++ return -ENOMEM; ++ } ++ ++ ret = mtd_read(mtd, 0, size, &retlen, buf); ++ if (ret || (retlen != size)) { ++ dev_err(device, "%s: mtd_read() failed\n", __func__); ++ return -EIO; ++ } ++ ++ fw_priv->data = (void *)buf; ++ fw_priv->size = size; ++ ++ return 0; ++} ++ + /* firmware holds the ownership of pages */ + static void firmware_free_data(const struct firmware *fw) + { +@@ -570,6 +603,9 @@ _request_firmware(const struct firmware **firmware_p, const char *name, + { + struct firmware *fw = NULL; + int ret; ++ struct fw_priv *priv = NULL; ++ const char *PRURTS_FW_PFEFIX = "mtd://"; ++ const unsigned int len = strlen(PRURTS_FW_PFEFIX); + + if (!firmware_p) + return -EINVAL; +@@ -584,15 +620,24 @@ _request_firmware(const struct firmware **firmware_p, const char *name, + if (ret <= 0) /* error or already assigned */ + goto out; + +- ret = fw_get_filesystem_firmware(device, fw->priv); +- if (ret) { +- if (!(opt_flags & FW_OPT_NO_WARN)) +- dev_warn(device, +- "Direct firmware load for %s failed with error %d\n", +- name, ret); +- ret = firmware_fallback_sysfs(fw, name, device, opt_flags, ret); +- } else +- ret = assign_fw(fw, device, opt_flags); ++ priv = (struct fw_priv *)fw->priv; ++ if (!strncmp(priv->fw_name, PRURTS_FW_PFEFIX, len)) { ++ ret = fw_get_mtd_firmware(device, fw->priv, &(priv->fw_name[len])); ++ if (ret) ++ dev_err(device, "Load firmware for %s failed with error %d\n", device->kobj.name, ret); ++ else ++ ret = assign_fw(fw, device, opt_flags); ++ } else { ++ ret = fw_get_filesystem_firmware(device, fw->priv); ++ if (ret) { ++ if (!(opt_flags & FW_OPT_NO_WARN)) ++ dev_warn(device, ++ "Direct firmware load for %s failed with error %d\n", ++ name, ret); ++ ret = firmware_fallback_sysfs(fw, name, device, opt_flags, ret); ++ } else ++ ret = assign_fw(fw, device, opt_flags); ++ } + + out: + if (ret < 0) { +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0011-setting-the-RJ45-port-led-behavior.patch b/recipes-kernel/linux/files/0011-setting-the-RJ45-port-led-behavior.patch new file mode 100644 index 000000000..cd2cd1ca7 --- /dev/null +++ b/recipes-kernel/linux/files/0011-setting-the-RJ45-port-led-behavior.patch @@ -0,0 +1,37 @@ +From 5809de4e53c2ace180563fae1b7a7c35ee01ce76 Mon Sep 17 00:00:00 2001 +From: zengchao +Date: Wed, 6 Nov 2019 11:21:49 +0800 +Subject: [PATCH 11/23] setting the RJ45 port led behavior + +Signed-off-by: zengchao +--- + drivers/net/phy/dp83867.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c +index 5f9e9e85788e..88cd51af334c 100644 +--- a/drivers/net/phy/dp83867.c ++++ b/drivers/net/phy/dp83867.c +@@ -41,6 +41,10 @@ + #define DP83867_RGMIIDCTL 0x0086 + #define DP83867_IO_MUX_CFG 0x0170 + ++/*RJ45 led configuration*/ ++#define DP83867_LEDCR_1 0x0018 ++#define RJ45_LED_SETTING 0x665b ++ + #define DP83867_SW_RESET BIT(15) + #define DP83867_SW_RESTART BIT(14) + #define STRAP_STS2_FLD_MASK BIT(10) +@@ -332,6 +336,8 @@ static int dp83867_config_init(struct phy_device *phydev) + val |= (dp83867->clk_output_sel << DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT); + phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_IO_MUX_CFG, val); + } ++ /*Set the RJ45 led action*/ ++ phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_LEDCR_1, RJ45_LED_SETTING); + + return 0; + } +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0012-fix-clear-the-cycle-buffer-of-serial.patch b/recipes-kernel/linux/files/0012-fix-clear-the-cycle-buffer-of-serial.patch new file mode 100644 index 000000000..636b1b066 --- /dev/null +++ b/recipes-kernel/linux/files/0012-fix-clear-the-cycle-buffer-of-serial.patch @@ -0,0 +1,29 @@ +From 6b72637818243212847489a51048f9ce5a2577d3 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Tue, 26 Nov 2019 09:05:56 +0800 +Subject: [PATCH 12/23] fix:clear the cycle buffer of serial + +1.the last residual data will be sent next time + +Signed-off-by: Gao Nian +--- + drivers/tty/serial/8250/8250_omap.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c +index 088232f6aa75..32c2568df552 100644 +--- a/drivers/tty/serial/8250/8250_omap.c ++++ b/drivers/tty/serial/8250/8250_omap.c +@@ -706,6 +706,9 @@ static void omap_8250_shutdown(struct uart_port *port) + serial_out(up, UART_LCR, up->lcr & ~UART_LCR_SBC); + serial_out(up, UART_FCR, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); + ++ /* Clear the circ buffuer to clean the residual data */ ++ uart_circ_clear(&port->state->xmit); ++ + pm_runtime_mark_last_busy(port->dev); + pm_runtime_put_autosuspend(port->dev); + free_irq(port->irq, port); +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0013-fix-4169461-fixed-eth-link-down-when-autoneg-off.patch b/recipes-kernel/linux/files/0013-fix-4169461-fixed-eth-link-down-when-autoneg-off.patch new file mode 100644 index 000000000..44e477a9e --- /dev/null +++ b/recipes-kernel/linux/files/0013-fix-4169461-fixed-eth-link-down-when-autoneg-off.patch @@ -0,0 +1,49 @@ +From 1da9df7f4ea442863cf4af24e3cba29d79de5ea3 Mon Sep 17 00:00:00 2001 +From: Sheng Long Wang +Date: Fri, 13 Dec 2019 12:35:56 +0800 +Subject: [PATCH 13/23] fix(4169461):fixed eth link down when autoneg off + +1.dp83867: enable robust auto-mdix + +CFG3[9] Robust Auto-MDIX option allows significantly improve link +detection in case dp83867 is configured in manual mode and reduce +link detection time. +DM says: "If link partners are configured to operational modes that +are not supported by normal Auto MDI/MDIX mode (like Auto-Neg versus +Force 100Base-TX or Force 100Base-TX versus Force 100Base-TX), this +Robust Auto MDI/MDIX mode allows MDI/MDIX resolution and prevents +deadlock." + +Hence, enable this option by default as there are no known reasons not +to do so. + +Signed-off-by: Sheng Long Wang +--- + drivers/net/phy/dp83867.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c +index 88cd51af334c..68d7667f1297 100644 +--- a/drivers/net/phy/dp83867.c ++++ b/drivers/net/phy/dp83867.c +@@ -319,12 +319,13 @@ static int dp83867_config_init(struct phy_device *phydev) + } + } + ++ val = phy_read(phydev, DP83867_CFG3); ++ + /* Enable Interrupt output INT_OE in CFG3 register */ +- if (phy_interrupt_is_valid(phydev)) { +- val = phy_read(phydev, DP83867_CFG3); ++ if (phy_interrupt_is_valid(phydev)) + val |= BIT(7); +- phy_write(phydev, DP83867_CFG3, val); +- } ++ val |= BIT(9); ++ phy_write(phydev, DP83867_CFG3, val); + + if (dp83867->port_mirroring != DP83867_PORT_MIRROING_KEEP) + dp83867_config_port_mirroring(phydev); +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0014-refactor-move-ioexpander-node-to-mcu-i2c0-for-LM5.patch b/recipes-kernel/linux/files/0014-refactor-move-ioexpander-node-to-mcu-i2c0-for-LM5.patch new file mode 100644 index 000000000..16e9fff51 --- /dev/null +++ b/recipes-kernel/linux/files/0014-refactor-move-ioexpander-node-to-mcu-i2c0-for-LM5.patch @@ -0,0 +1,79 @@ +From 7ce1011ad4a74b3dd0931ae633ca918a4dd18331 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Tue, 10 Dec 2019 11:33:37 +0800 +Subject: [PATCH 14/23] refactor:move ioexpander node to mcu-i2c0 for LM5 + +Signed-off-by: Gao Nian +--- + .../boot/dts/siemens/iot2050-common.dtsi | 48 +++++++++---------- + 1 file changed, 24 insertions(+), 24 deletions(-) + +diff --git a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +index c0ac25d2f60c..0b5e05ea8ba0 100644 +--- a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +@@ -483,6 +483,30 @@ + /* ti,enable-force-pwm; */ + ti,enable-vout-discharge; + }; ++ ++ /*D4200*/ ++ pcal9535_1: gpio@20 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x20>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ }; ++ ++ /*D4201*/ ++ pcal9535_2: gpio@21 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x21>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ }; ++ ++ /*D4202*/ ++ pcal9535_3: gpio@25 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x25>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ }; + }; + + &main_i2c0 { +@@ -512,30 +536,6 @@ + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c2_pins_default>; + clock-frequency = <400000>; +- +- /*D4200*/ +- pcal9535_1: gpio@20 { +- compatible = "nxp,pcal9535"; +- reg = <0x20>; +- #gpio-cells = <2>; +- gpio-controller; +- }; +- +- /*D4201*/ +- pcal9535_2: gpio@21 { +- compatible = "nxp,pcal9535"; +- reg = <0x21>; +- #gpio-cells = <2>; +- gpio-controller; +- }; +- +- /*D4202*/ +- pcal9535_3: gpio@25 { +- compatible = "nxp,pcal9535"; +- reg = <0x25>; +- #gpio-cells = <2>; +- gpio-controller; +- }; + }; + + &main_i2c3 { +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0015-fix-rproc-r5-0-set_config-failed-in-linux.patch b/recipes-kernel/linux/files/0015-fix-rproc-r5-0-set_config-failed-in-linux.patch new file mode 100644 index 000000000..dcf8f9a06 --- /dev/null +++ b/recipes-kernel/linux/files/0015-fix-rproc-r5-0-set_config-failed-in-linux.patch @@ -0,0 +1,46 @@ +From f390154dd87aec7ccee4f7f11ccb7c9d2be30bc4 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Thu, 2 Jan 2020 14:00:09 +0800 +Subject: [PATCH 15/23] fix: rproc r5-0 set_config failed in linux + +Signed-off-by: Gao Nian +--- + drivers/remoteproc/ti_k3_r5_remoteproc.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/remoteproc/ti_k3_r5_remoteproc.c b/drivers/remoteproc/ti_k3_r5_remoteproc.c +index f9c2e474c4ea..8b9e9037ecd8 100644 +--- a/drivers/remoteproc/ti_k3_r5_remoteproc.c ++++ b/drivers/remoteproc/ti_k3_r5_remoteproc.c +@@ -680,6 +680,7 @@ static int k3_r5_rproc_configure(struct k3_r5_rproc *kproc) + u32 ctrl = 0, cfg = 0, stat = 0; + u32 set_cfg = 0, clr_cfg = 0; + u64 boot_vec = 0; ++ u32 lockstep_en; + int ret; + + core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); +@@ -693,8 +694,8 @@ static int k3_r5_rproc_configure(struct k3_r5_rproc *kproc) + dev_dbg(dev, "boot_vector = 0x%llx, cfg = 0x%x ctrl = 0x%x stat = 0x%x\n", + boot_vec, cfg, ctrl, stat); + +- if (!(stat & PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED) && +- cluster->mode) { ++ lockstep_en = stat & PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED; ++ if ((!lockstep_en) && cluster->mode) { + dev_err(cluster->dev, "lockstep mode not permitted, force configuring for split-mode\n"); + cluster->mode = 0; + } +@@ -703,7 +704,8 @@ static int k3_r5_rproc_configure(struct k3_r5_rproc *kproc) + boot_vec = 0x0; + if (core == core0) { + clr_cfg = PROC_BOOT_CFG_FLAG_R5_TEINIT; +- clr_cfg |= PROC_BOOT_CFG_FLAG_R5_LOCKSTEP; ++ if (lockstep_en) ++ clr_cfg |= PROC_BOOT_CFG_FLAG_R5_LOCKSTEP; + } + + if (core->atcm_enable) +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0016-feat-extend-led-panic-indicator-on-and-off.patch b/recipes-kernel/linux/files/0016-feat-extend-led-panic-indicator-on-and-off.patch new file mode 100644 index 000000000..851c8dbc0 --- /dev/null +++ b/recipes-kernel/linux/files/0016-feat-extend-led-panic-indicator-on-and-off.patch @@ -0,0 +1,138 @@ +From 02d8a735b979126c08d7e40204f8854f0be09004 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Fri, 3 Jan 2020 14:50:16 +0800 +Subject: [PATCH 16/23] feat:extend led panic-indicator on and off + +Signed-off-by: Gao Nian +--- + arch/arm64/boot/dts/siemens/iot2050-common.dtsi | 1 + + drivers/leds/led-triggers.c | 10 ++++++++-- + drivers/leds/leds-gpio.c | 13 ++++++++++--- + drivers/leds/trigger/ledtrig-panic.c | 5 ++++- + include/linux/leds.h | 8 +++++++- + 5 files changed, 30 insertions(+), 7 deletions(-) + +diff --git a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +index 0b5e05ea8ba0..89f354528830 100644 +--- a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +@@ -132,6 +132,7 @@ + + status-led-green { + gpios = <&wkup_gpio0 24 GPIO_ACTIVE_HIGH>; ++ panic-indicator-off; + linux,default-trigger = "gpio"; + }; + +diff --git a/drivers/leds/led-triggers.c b/drivers/leds/led-triggers.c +index 17d73db1456e..29bbcb0795f6 100644 +--- a/drivers/leds/led-triggers.c ++++ b/drivers/leds/led-triggers.c +@@ -321,8 +321,14 @@ void led_trigger_event(struct led_trigger *trig, + return; + + read_lock(&trig->leddev_list_lock); +- list_for_each_entry(led_cdev, &trig->led_cdevs, trig_list) +- led_set_brightness(led_cdev, brightness); ++ list_for_each_entry(led_cdev, &trig->led_cdevs, trig_list) { ++ if (led_cdev->flags & LED_PANIC_INDICATOR) ++ led_set_brightness(led_cdev, brightness); ++ else if (led_cdev->flags & LED_PANIC_INDICATOR_OFF) ++ led_set_brightness(led_cdev, LED_OFF); ++ else if (led_cdev->flags & LED_PANIC_INDICATOR_ON) ++ led_set_brightness(led_cdev, LED_FULL); ++ } + read_unlock(&trig->leddev_list_lock); + } + EXPORT_SYMBOL_GPL(led_trigger_event); +diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c +index 764c31301f90..2cdc529874d5 100644 +--- a/drivers/leds/leds-gpio.c ++++ b/drivers/leds/leds-gpio.c +@@ -132,8 +132,12 @@ static int create_gpio_led(const struct gpio_led *template, + led_dat->cdev.brightness = state ? LED_FULL : LED_OFF; + if (!template->retain_state_suspended) + led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME; +- if (template->panic_indicator) ++ if (template->panic_indicator == LEDS_PANICINDICATOR_BLINK) + led_dat->cdev.flags |= LED_PANIC_INDICATOR; ++ else if (template->panic_indicator == LEDS_PANICINDICATOR_OFF) ++ led_dat->cdev.flags |= LED_PANIC_INDICATOR_OFF; ++ else if (template->panic_indicator == LEDS_PANICINDICATOR_ON) ++ led_dat->cdev.flags |= LED_PANIC_INDICATOR_ON; + if (template->retain_state_shutdown) + led_dat->cdev.flags |= LED_RETAIN_AT_SHUTDOWN; + +@@ -210,8 +214,11 @@ static struct gpio_leds_priv *gpio_leds_create(struct platform_device *pdev) + if (fwnode_property_present(child, "retain-state-shutdown")) + led.retain_state_shutdown = 1; + if (fwnode_property_present(child, "panic-indicator")) +- led.panic_indicator = 1; +- ++ led.panic_indicator = LEDS_PANICINDICATOR_BLINK; ++ else if (fwnode_property_present(child, "panic-indicator-off")) ++ led.panic_indicator = LEDS_PANICINDICATOR_OFF; ++ else if (fwnode_property_present(child, "panic-indicator-on")) ++ led.panic_indicator = LEDS_PANICINDICATOR_ON; + ret = create_gpio_led(&led, led_dat, dev, np, NULL); + if (ret < 0) { + fwnode_handle_put(child); +diff --git a/drivers/leds/trigger/ledtrig-panic.c b/drivers/leds/trigger/ledtrig-panic.c +index d735526b9db4..21af54355cf8 100644 +--- a/drivers/leds/trigger/ledtrig-panic.c ++++ b/drivers/leds/trigger/ledtrig-panic.c +@@ -36,6 +36,7 @@ static void led_trigger_set_panic(struct led_classdev *led_cdev) + /* Avoid the delayed blink path */ + led_cdev->blink_delay_on = 0; + led_cdev->blink_delay_off = 0; ++ led_cdev->work_flags = 0; + + led_cdev->trigger = trig; + if (trig->activate) +@@ -50,7 +51,9 @@ static int led_trigger_panic_notifier(struct notifier_block *nb, + struct led_classdev *led_cdev; + + list_for_each_entry(led_cdev, &leds_list, node) +- if (led_cdev->flags & LED_PANIC_INDICATOR) ++ if ((led_cdev->flags & LED_PANIC_INDICATOR) ++ || (led_cdev->flags & LED_PANIC_INDICATOR_OFF) ++ || (led_cdev->flags & LED_PANIC_INDICATOR_ON)) + led_trigger_set_panic(led_cdev); + return NOTIFY_DONE; + } +diff --git a/include/linux/leds.h b/include/linux/leds.h +index 577dadc4990a..73090c752808 100644 +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -51,6 +51,8 @@ struct led_classdev { + #define LED_PANIC_INDICATOR BIT(20) + #define LED_BRIGHT_HW_CHANGED BIT(21) + #define LED_RETAIN_AT_SHUTDOWN BIT(22) ++#define LED_PANIC_INDICATOR_OFF BIT(23) ++#define LED_PANIC_INDICATOR_ON BIT(24) + + /* set_brightness_work / blink_timer flags, atomic, private. */ + unsigned long work_flags; +@@ -421,7 +423,7 @@ struct gpio_led { + unsigned gpio; + unsigned active_low : 1; + unsigned retain_state_suspended : 1; +- unsigned panic_indicator : 1; ++ unsigned panic_indicator : 2; + unsigned default_state : 2; + unsigned retain_state_shutdown : 1; + /* default_state should be one of LEDS_GPIO_DEFSTATE_(ON|OFF|KEEP) */ +@@ -431,6 +433,10 @@ struct gpio_led { + #define LEDS_GPIO_DEFSTATE_ON 1 + #define LEDS_GPIO_DEFSTATE_KEEP 2 + ++#define LEDS_PANICINDICATOR_BLINK 1 ++#define LEDS_PANICINDICATOR_OFF 2 ++#define LEDS_PANICINDICATOR_ON 3 ++ + struct gpio_led_platform_data { + int num_leds; + const struct gpio_led *leds; +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0017-fix-can-not-auto-negotiate-to-100M-with-4-wire.patch b/recipes-kernel/linux/files/0017-fix-can-not-auto-negotiate-to-100M-with-4-wire.patch new file mode 100644 index 000000000..03a93751a --- /dev/null +++ b/recipes-kernel/linux/files/0017-fix-can-not-auto-negotiate-to-100M-with-4-wire.patch @@ -0,0 +1,102 @@ +From 55b5f9b868edd8e99b993052107d586315ad5e43 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Tue, 4 Feb 2020 22:03:52 +0800 +Subject: [PATCH 17/23] fix:can not auto negotiate to 100M with 4-wire + +Signed-off-by: Gao Nian +--- + drivers/net/phy/dp83867.c | 48 +++++++++++++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c +index 68d7667f1297..3160c4335ecc 100644 +--- a/drivers/net/phy/dp83867.c ++++ b/drivers/net/phy/dp83867.c +@@ -26,8 +26,10 @@ + #define DP83867_DEVADDR 0x1f + + #define MII_DP83867_PHYCTRL 0x10 ++#define MII_DP83867_PHYSTS 0x11 + #define MII_DP83867_MICR 0x12 + #define MII_DP83867_ISR 0x13 ++#define DP83867_CFG2 0x14 + #define DP83867_CTRL 0x1f + #define DP83867_CFG3 0x1e + +@@ -86,6 +88,15 @@ + #define DP83867_IO_MUX_CFG_CLK_O_SEL_MASK (0x1f << 8) + #define DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT 8 + ++/* PHY STS bits */ ++#define DP83867_PHYSTS_1000 BIT(15) ++#define DP83867_PHYSTS_100 BIT(14) ++#define DP83867_PHYSTS_DUPLEX BIT(13) ++#define DP83867_PHYSTS_LINK BIT(10) ++ ++/* CFG2 bits */ ++#define DP83867_SPEED_OPTOMIZED_EN (BIT(8) | BIT(9)) ++ + /* CFG4 bits */ + #define DP83867_CFG4_PORT_MIRROR_EN BIT(0) + +@@ -139,6 +150,34 @@ static int dp83867_config_intr(struct phy_device *phydev) + return phy_write(phydev, MII_DP83867_MICR, micr_status); + } + ++static int dp83867_read_status(struct phy_device *phydev) ++{ ++ int status = phy_read(phydev, MII_DP83867_PHYSTS); ++ ++ if (status & DP83867_PHYSTS_DUPLEX) ++ phydev->duplex = DUPLEX_FULL; ++ else ++ phydev->duplex = DUPLEX_HALF; ++ ++ if (status & DP83867_PHYSTS_1000) ++ phydev->speed = SPEED_1000; ++ else if (status & DP83867_PHYSTS_100) ++ phydev->speed = SPEED_100; ++ else ++ phydev->speed = SPEED_10; ++ ++ if (status & DP83867_PHYSTS_LINK) ++ phydev->link = 1; ++ else ++ phydev->link = 0; ++ ++ phydev->pause = 0; ++ phydev->asym_pause = 0; ++ phydev->lp_advertising = 0; ++ ++ return 0; ++} ++ + static int dp83867_config_port_mirroring(struct phy_device *phydev) + { + struct dp83867_private *dp83867 = +@@ -223,6 +262,13 @@ static int dp83867_config_init(struct phy_device *phydev) + int ret, val, bs; + u16 delay; + ++ /* Force the speed opotimization for the PHY even if it strapped */ ++ val = phy_read(phydev, DP83867_CFG2); ++ val |= DP83867_SPEED_OPTOMIZED_EN; ++ ret = phy_write(phydev, DP83867_CFG2, val); ++ if (ret) ++ return ret; ++ + if (!phydev->priv) { + dp83867 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83867), + GFP_KERNEL); +@@ -365,6 +411,8 @@ static struct phy_driver dp83867_driver[] = { + .config_init = dp83867_config_init, + .soft_reset = dp83867_phy_reset, + ++ .read_status = dp83867_read_status, ++ + /* IRQ related */ + .ack_interrupt = dp83867_ack_interrupt, + .config_intr = dp83867_config_intr, +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0018-change-OSPI-clock-id-to-support-sysfw-19.12.patch b/recipes-kernel/linux/files/0018-change-OSPI-clock-id-to-support-sysfw-19.12.patch new file mode 100644 index 000000000..3875f7caa --- /dev/null +++ b/recipes-kernel/linux/files/0018-change-OSPI-clock-id-to-support-sysfw-19.12.patch @@ -0,0 +1,44 @@ +From 7e8f41a7aa4ca5ac70c328447843a733a47419f9 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Mon, 2 Mar 2020 23:01:32 +0800 +Subject: [PATCH 18/23] change OSPI clock id to support sysfw 19.12 + +Signed-off-by: le.jin +--- + arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +index c3fe81cb884e..450456460182 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +@@ -382,11 +382,11 @@ + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x50000000>; +- clocks = <&k3_clks 55 5>; +- assigned-clocks = <&k3_clks 55 5>; +- assigned-clock-parents = <&k3_clks 55 7>; ++ clocks = <&k3_clks 248 0>; ++ assigned-clocks = <&k3_clks 248 0>; ++ assigned-clock-parents = <&k3_clks 248 2>; + assigned-clock-rates = <166666666>; +- power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>; ++ power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + dma-coherent; +@@ -400,8 +400,8 @@ + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x58000000>; +- clocks = <&k3_clks 55 16>; +- power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>; ++ clocks = <&k3_clks 249 6>; ++ power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + dma-coherent; +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0019-feat-set-sdhci0-clock-frequency-to-142.86MHz.patch b/recipes-kernel/linux/files/0019-feat-set-sdhci0-clock-frequency-to-142.86MHz.patch new file mode 100644 index 000000000..efe0525b0 --- /dev/null +++ b/recipes-kernel/linux/files/0019-feat-set-sdhci0-clock-frequency-to-142.86MHz.patch @@ -0,0 +1,714 @@ +From cbd91e849e606e1b7d24fc454620f266be5defed Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Mon, 17 Feb 2020 11:56:33 +0800 +Subject: [PATCH 19/23] feat: set sdhci0 clock frequency to 142.86MHz + +1. catch up eth sdhci driver of SDK6.3 +2. merge the patch files provided by TI: + (1) sdhci_am654: Enable SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN for AM654 + (2) dts: Set sdhci0 clock frequency to 142.86MHz + +Signed-off-by: Gao Nian +--- + .../boot/dts/siemens/iot2050-advanced.dts | 9 + + .../boot/dts/siemens/iot2050-common.dtsi | 7 + + drivers/mmc/core/block.c | 157 +++++++----------- + drivers/mmc/core/queue.c | 9 +- + drivers/mmc/core/sd.c | 6 + + drivers/mmc/core/sdio_irq.c | 9 +- + drivers/mmc/host/cqhci.c | 3 +- + drivers/mmc/host/mmci.c | 27 +-- + drivers/mmc/host/mmci.h | 6 +- + drivers/mmc/host/sdhci-of-arasan.c | 3 +- + drivers/mmc/host/sdhci-omap.c | 2 +- + drivers/mmc/host/sdhci.c | 22 ++- + drivers/mmc/host/sdhci.h | 2 + + drivers/mmc/host/sdhci_am654.c | 32 ++-- + 14 files changed, 153 insertions(+), 141 deletions(-) + +diff --git a/arch/arm64/boot/dts/siemens/iot2050-advanced.dts b/arch/arm64/boot/dts/siemens/iot2050-advanced.dts +index 88b04c974294..9a83edbbeae1 100644 +--- a/arch/arm64/boot/dts/siemens/iot2050-advanced.dts ++++ b/arch/arm64/boot/dts/siemens/iot2050-advanced.dts +@@ -43,9 +43,18 @@ + }; + + &sdhci0 { ++ /* ++ * Swap clock TISCI clock IDs between sdhci0 and sdhci1 to work ++ * around an issue in System Firmware 2019.12a (and earlier) known ++ * as SYSFW-3179. ++ */ ++ clocks = <&k3_clks 48 0>, <&k3_clks 48 1>; ++ assigned-clocks = <&k3_clks 48 1>; ++ assigned-clock-rates = <142860000>; + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc0_pins_default>; + bus-width = <8>; + non-removable; + ti,driver-strength-ohm = <50>; ++ disable-wp; + }; +\ No newline at end of file +diff --git a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +index 89f354528830..c58ae32547a2 100644 +--- a/arch/arm64/boot/dts/siemens/iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/siemens/iot2050-common.dtsi +@@ -585,9 +585,16 @@ + }; + + &sdhci1 { ++ /* ++ * Swap clock TISCI clock IDs between sdhci0 and sdhci1 to work ++ * around an issue in System Firmware 2019.12a (and earlier) known ++ * as SYSFW-3179. ++ */ ++ clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc1_pins_default>; + ti,driver-strength-ohm = <50>; ++ disable-wp; + }; + + &gpu { +diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c +index eee004fb3c3e..60eac66dc9f0 100644 +--- a/drivers/mmc/core/block.c ++++ b/drivers/mmc/core/block.c +@@ -409,38 +409,6 @@ static int mmc_blk_ioctl_copy_to_user(struct mmc_ioc_cmd __user *ic_ptr, + return 0; + } + +-static int ioctl_rpmb_card_status_poll(struct mmc_card *card, u32 *status, +- u32 retries_max) +-{ +- int err; +- u32 retry_count = 0; +- +- if (!status || !retries_max) +- return -EINVAL; +- +- do { +- err = __mmc_send_status(card, status, 5); +- if (err) +- break; +- +- if (!R1_STATUS(*status) && +- (R1_CURRENT_STATE(*status) != R1_STATE_PRG)) +- break; /* RPMB programming operation complete */ +- +- /* +- * Rechedule to give the MMC device a chance to continue +- * processing the previous command without being polled too +- * frequently. +- */ +- usleep_range(1000, 5000); +- } while (++retry_count < retries_max); +- +- if (retry_count == retries_max) +- err = -EPERM; +- +- return err; +-} +- + static int ioctl_do_sanitize(struct mmc_card *card) + { + int err; +@@ -469,6 +437,58 @@ static int ioctl_do_sanitize(struct mmc_card *card) + return err; + } + ++static inline bool mmc_blk_in_tran_state(u32 status) ++{ ++ /* ++ * Some cards mishandle the status bits, so make sure to check both the ++ * busy indication and the card state. ++ */ ++ return status & R1_READY_FOR_DATA && ++ (R1_CURRENT_STATE(status) == R1_STATE_TRAN); ++} ++ ++static int card_busy_detect(struct mmc_card *card, unsigned int timeout_ms, ++ u32 *resp_errs) ++{ ++ unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); ++ int err = 0; ++ u32 status; ++ ++ do { ++ bool done = time_after(jiffies, timeout); ++ ++ err = __mmc_send_status(card, &status, 5); ++ if (err) { ++ dev_err(mmc_dev(card->host), ++ "error %d requesting status\n", err); ++ return err; ++ } ++ ++ /* Accumulate any response error bits seen */ ++ if (resp_errs) ++ *resp_errs |= status; ++ ++ /* ++ * Timeout if the device never becomes ready for data and never ++ * leaves the program state. ++ */ ++ if (done) { ++ dev_err(mmc_dev(card->host), ++ "Card stuck in wrong state! %s status: %#x\n", ++ __func__, status); ++ return -ETIMEDOUT; ++ } ++ ++ /* ++ * Some cards mishandle the status bits, ++ * so make sure to check both the busy ++ * indication and the card state. ++ */ ++ } while (!mmc_blk_in_tran_state(status)); ++ ++ return err; ++} ++ + static int __mmc_blk_ioctl_cmd(struct mmc_card *card, struct mmc_blk_data *md, + struct mmc_blk_ioc_data *idata) + { +@@ -478,7 +498,6 @@ static int __mmc_blk_ioctl_cmd(struct mmc_card *card, struct mmc_blk_data *md, + struct scatterlist sg; + int err; + unsigned int target_part; +- u32 status = 0; + + if (!card || !md || !idata) + return -EINVAL; +@@ -612,16 +631,12 @@ static int __mmc_blk_ioctl_cmd(struct mmc_card *card, struct mmc_blk_data *md, + + memcpy(&(idata->ic.response), cmd.resp, sizeof(cmd.resp)); + +- if (idata->rpmb) { ++ if (idata->rpmb || (cmd.flags & MMC_RSP_R1B)) { + /* +- * Ensure RPMB command has completed by polling CMD13 ++ * Ensure RPMB/R1B command has completed by polling CMD13 + * "Send Status". + */ +- err = ioctl_rpmb_card_status_poll(card, &status, 5); +- if (err) +- dev_err(mmc_dev(card->host), +- "%s: Card Status=0x%08X, error %d\n", +- __func__, status, err); ++ err = card_busy_detect(card, MMC_BLK_TIMEOUT_MS, NULL); + } + + return err; +@@ -971,58 +986,6 @@ static unsigned int mmc_blk_data_timeout_ms(struct mmc_host *host, + return ms; + } + +-static inline bool mmc_blk_in_tran_state(u32 status) +-{ +- /* +- * Some cards mishandle the status bits, so make sure to check both the +- * busy indication and the card state. +- */ +- return status & R1_READY_FOR_DATA && +- (R1_CURRENT_STATE(status) == R1_STATE_TRAN); +-} +- +-static int card_busy_detect(struct mmc_card *card, unsigned int timeout_ms, +- struct request *req, u32 *resp_errs) +-{ +- unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); +- int err = 0; +- u32 status; +- +- do { +- bool done = time_after(jiffies, timeout); +- +- err = __mmc_send_status(card, &status, 5); +- if (err) { +- pr_err("%s: error %d requesting status\n", +- req->rq_disk->disk_name, err); +- return err; +- } +- +- /* Accumulate any response error bits seen */ +- if (resp_errs) +- *resp_errs |= status; +- +- /* +- * Timeout if the device never becomes ready for data and never +- * leaves the program state. +- */ +- if (done) { +- pr_err("%s: Card stuck in wrong state! %s %s status: %#x\n", +- mmc_hostname(card->host), +- req->rq_disk->disk_name, __func__, status); +- return -ETIMEDOUT; +- } +- +- /* +- * Some cards mishandle the status bits, +- * so make sure to check both the busy +- * indication and the card state. +- */ +- } while (!mmc_blk_in_tran_state(status)); +- +- return err; +-} +- + static int mmc_blk_reset(struct mmc_blk_data *md, struct mmc_host *host, + int type) + { +@@ -1678,7 +1641,7 @@ static int mmc_blk_fix_state(struct mmc_card *card, struct request *req) + + mmc_blk_send_stop(card, timeout); + +- err = card_busy_detect(card, timeout, req, NULL); ++ err = card_busy_detect(card, timeout, NULL); + + mmc_retune_release(card->host); + +@@ -1902,7 +1865,7 @@ static int mmc_blk_card_busy(struct mmc_card *card, struct request *req) + if (mmc_host_is_spi(card->host) || rq_data_dir(req) == READ) + return 0; + +- err = card_busy_detect(card, MMC_BLK_TIMEOUT_MS, req, &status); ++ err = card_busy_detect(card, MMC_BLK_TIMEOUT_MS, &status); + + /* + * Do not assume data transferred correctly if there are any error bits +@@ -2384,12 +2347,6 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card, + snprintf(md->disk->disk_name, sizeof(md->disk->disk_name), + "mmcblk%u%s", card->host->index, subname ? subname : ""); + +- if (mmc_card_mmc(card)) +- blk_queue_logical_block_size(md->queue.queue, +- card->ext_csd.data_sector_size); +- else +- blk_queue_logical_block_size(md->queue.queue, 512); +- + set_capacity(md->disk, size); + + if (mmc_host_cmd23(card->host)) { +diff --git a/drivers/mmc/core/queue.c b/drivers/mmc/core/queue.c +index 18aae28845ec..becc6594a8a4 100644 +--- a/drivers/mmc/core/queue.c ++++ b/drivers/mmc/core/queue.c +@@ -355,6 +355,7 @@ static void mmc_setup_queue(struct mmc_queue *mq, struct mmc_card *card) + { + struct mmc_host *host = card->host; + u64 limit = BLK_BOUNCE_HIGH; ++ unsigned block_size = 512; + + if (mmc_dev(host)->dma_mask && *mmc_dev(host)->dma_mask) + limit = (u64)dma_max_pfn(mmc_dev(host)) << PAGE_SHIFT; +@@ -368,7 +369,13 @@ static void mmc_setup_queue(struct mmc_queue *mq, struct mmc_card *card) + blk_queue_max_hw_sectors(mq->queue, + min(host->max_blk_count, host->max_req_size / 512)); + blk_queue_max_segments(mq->queue, host->max_segs); +- blk_queue_max_segment_size(mq->queue, host->max_seg_size); ++ ++ if (mmc_card_mmc(card)) ++ block_size = card->ext_csd.data_sector_size; ++ ++ blk_queue_logical_block_size(mq->queue, block_size); ++ blk_queue_max_segment_size(mq->queue, ++ round_down(host->max_seg_size, block_size)); + + INIT_WORK(&mq->recovery_work, mmc_mq_recovery_handler); + INIT_WORK(&mq->complete_work, mmc_blk_mq_complete_work); +diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c +index cfb8ee24eaba..04738359ec02 100644 +--- a/drivers/mmc/core/sd.c ++++ b/drivers/mmc/core/sd.c +@@ -1277,6 +1277,12 @@ int mmc_attach_sd(struct mmc_host *host) + goto err; + } + ++ /* ++ * Some SD cards claims an out of spec VDD voltage range. Let's treat ++ * these bits as being in-valid and especially also bit7. ++ */ ++ ocr &= ~0x7FFF; ++ + rocr = mmc_select_voltage(host, ocr); + + /* +diff --git a/drivers/mmc/core/sdio_irq.c b/drivers/mmc/core/sdio_irq.c +index b299a24d33f9..d206f2de80d2 100644 +--- a/drivers/mmc/core/sdio_irq.c ++++ b/drivers/mmc/core/sdio_irq.c +@@ -35,6 +35,7 @@ static int process_sdio_pending_irqs(struct mmc_host *host) + { + struct mmc_card *card = host->card; + int i, ret, count; ++ bool sdio_irq_pending = host->sdio_irq_pending; + unsigned char pending; + struct sdio_func *func; + +@@ -42,13 +43,16 @@ static int process_sdio_pending_irqs(struct mmc_host *host) + if (mmc_card_suspended(card)) + return 0; + ++ /* Clear the flag to indicate that we have processed the IRQ. */ ++ host->sdio_irq_pending = false; ++ + /* + * Optimization, if there is only 1 function interrupt registered + * and we know an IRQ was signaled then call irq handler directly. + * Otherwise do the full probe. + */ + func = card->sdio_single_irq; +- if (func && host->sdio_irq_pending) { ++ if (func && sdio_irq_pending) { + func->irq_handler(func); + return 1; + } +@@ -100,7 +104,6 @@ void sdio_run_irqs(struct mmc_host *host) + { + mmc_claim_host(host); + if (host->sdio_irqs) { +- host->sdio_irq_pending = true; + process_sdio_pending_irqs(host); + if (host->ops->ack_sdio_irq) + host->ops->ack_sdio_irq(host); +@@ -119,6 +122,7 @@ void sdio_irq_work(struct work_struct *work) + + void sdio_signal_irq(struct mmc_host *host) + { ++ host->sdio_irq_pending = true; + queue_delayed_work(system_wq, &host->sdio_irq_work, 0); + } + EXPORT_SYMBOL_GPL(sdio_signal_irq); +@@ -164,7 +168,6 @@ static int sdio_irq_thread(void *_host) + if (ret) + break; + ret = process_sdio_pending_irqs(host); +- host->sdio_irq_pending = false; + mmc_release_host(host); + + /* +diff --git a/drivers/mmc/host/cqhci.c b/drivers/mmc/host/cqhci.c +index a8af682a9182..28f5aaca505a 100644 +--- a/drivers/mmc/host/cqhci.c ++++ b/drivers/mmc/host/cqhci.c +@@ -617,7 +617,8 @@ static int cqhci_request(struct mmc_host *mmc, struct mmc_request *mrq) + cq_host->slot[tag].flags = 0; + + cq_host->qcnt += 1; +- ++ /* Make sure descriptors are ready before ringing the doorbell */ ++ wmb(); + cqhci_writel(cq_host, 1 << tag, CQHCI_TDBR); + if (!(cqhci_readl(cq_host, CQHCI_TDBR) & (1 << tag))) + pr_debug("%s: cqhci: doorbell not set for tag %d\n", +diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c +index eb1a65cb878f..fa6268c0f123 100644 +--- a/drivers/mmc/host/mmci.c ++++ b/drivers/mmc/host/mmci.c +@@ -895,14 +895,18 @@ static void + mmci_data_irq(struct mmci_host *host, struct mmc_data *data, + unsigned int status) + { ++ unsigned int status_err; ++ + /* Make sure we have data to handle */ + if (!data) + return; + + /* First check for errors */ +- if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT | +- host->variant->start_err | +- MCI_TXUNDERRUN | MCI_RXOVERRUN)) { ++ status_err = status & (host->variant->start_err | ++ MCI_DATACRCFAIL | MCI_DATATIMEOUT | ++ MCI_TXUNDERRUN | MCI_RXOVERRUN); ++ ++ if (status_err) { + u32 remain, success; + + /* Terminate the DMA transfer */ +@@ -922,18 +926,18 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, + success = data->blksz * data->blocks - remain; + + dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", +- status, success); +- if (status & MCI_DATACRCFAIL) { ++ status_err, success); ++ if (status_err & MCI_DATACRCFAIL) { + /* Last block was not successful */ + success -= 1; + data->error = -EILSEQ; +- } else if (status & MCI_DATATIMEOUT) { ++ } else if (status_err & MCI_DATATIMEOUT) { + data->error = -ETIMEDOUT; +- } else if (status & MCI_STARTBITERR) { ++ } else if (status_err & MCI_STARTBITERR) { + data->error = -ECOMM; +- } else if (status & MCI_TXUNDERRUN) { ++ } else if (status_err & MCI_TXUNDERRUN) { + data->error = -EIO; +- } else if (status & MCI_RXOVERRUN) { ++ } else if (status_err & MCI_RXOVERRUN) { + if (success > host->variant->fifosize) + success -= host->variant->fifosize; + else +@@ -1790,7 +1794,7 @@ static int mmci_probe(struct amba_device *dev, + goto clk_disable; + } + +- writel(MCI_IRQENABLE, host->base + MMCIMASK0); ++ writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0); + + amba_set_drvdata(dev, mmc); + +@@ -1877,7 +1881,8 @@ static void mmci_restore(struct mmci_host *host) + writel(host->datactrl_reg, host->base + MMCIDATACTRL); + writel(host->pwr_reg, host->base + MMCIPOWER); + } +- writel(MCI_IRQENABLE, host->base + MMCIMASK0); ++ writel(MCI_IRQENABLE | host->variant->start_err, ++ host->base + MMCIMASK0); + mmci_reg_delay(host); + + spin_unlock_irqrestore(&host->lock, flags); +diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h +index 517591d219e9..613d37ab08d2 100644 +--- a/drivers/mmc/host/mmci.h ++++ b/drivers/mmc/host/mmci.h +@@ -181,9 +181,9 @@ + #define MMCIFIFO 0x080 /* to 0x0bc */ + + #define MCI_IRQENABLE \ +- (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \ +- MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ +- MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_STARTBITERRMASK) ++ (MCI_CMDCRCFAILMASK | MCI_DATACRCFAILMASK | MCI_CMDTIMEOUTMASK | \ ++ MCI_DATATIMEOUTMASK | MCI_TXUNDERRUNMASK | MCI_RXOVERRUNMASK | \ ++ MCI_CMDRESPENDMASK | MCI_CMDSENTMASK) + + /* These interrupts are directed to IRQ1 when two IRQ lines are available */ + #define MCI_IRQ1MASK \ +diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c +index 7fdac277e382..9c77bfe4334f 100644 +--- a/drivers/mmc/host/sdhci-of-arasan.c ++++ b/drivers/mmc/host/sdhci-of-arasan.c +@@ -788,7 +788,8 @@ static int sdhci_arasan_probe(struct platform_device *pdev) + + ret = mmc_of_parse(host->mmc); + if (ret) { +- dev_err(&pdev->dev, "parsing dt failed (%d)\n", ret); ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "parsing dt failed (%d)\n", ret); + goto unreg_clk; + } + +diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c +index 56e7bc62c218..7367bf2a967d 100644 +--- a/drivers/mmc/host/sdhci-omap.c ++++ b/drivers/mmc/host/sdhci-omap.c +@@ -383,7 +383,7 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) + * on temperature + */ + if (temperature < -20000) +- phase_delay = min(max_window + 4 * max_len - 24, ++ phase_delay = min((max_window + 4 * (max_len - 1)) - 24, + max_window + + DIV_ROUND_UP(13 * max_len, 16) * 4); + else if (temperature < 20000) +diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c +index c749d3dc1d36..369817a29c22 100644 +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -2244,8 +2244,8 @@ static void __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode) + sdhci_send_tuning(host, opcode); + + if (!host->tuning_done) { +- pr_info("%s: Tuning timeout, falling back to fixed sampling clock\n", +- mmc_hostname(host->mmc)); ++ pr_debug("%s: Tuning timeout, falling back to fixed sampling clock\n", ++ mmc_hostname(host->mmc)); + sdhci_abort_tuning(host, opcode); + return; + } +@@ -2718,6 +2718,7 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *intmask_p) + static void sdhci_adma_show_error(struct sdhci_host *host) + { + void *desc = host->adma_table; ++ dma_addr_t dma = host->adma_addr; + + sdhci_dumpregs(host); + +@@ -2725,18 +2726,21 @@ static void sdhci_adma_show_error(struct sdhci_host *host) + struct sdhci_adma2_64_desc *dma_desc = desc; + + if (host->flags & SDHCI_USE_64_BIT_DMA) +- DBG("%p: DMA 0x%08x%08x, LEN 0x%04x, Attr=0x%02x\n", +- desc, le32_to_cpu(dma_desc->addr_hi), ++ SDHCI_DUMP("%08llx: DMA 0x%08x%08x, LEN 0x%04x, Attr=0x%02x\n", ++ (unsigned long long)dma, ++ le32_to_cpu(dma_desc->addr_hi), + le32_to_cpu(dma_desc->addr_lo), + le16_to_cpu(dma_desc->len), + le16_to_cpu(dma_desc->cmd)); + else +- DBG("%p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n", +- desc, le32_to_cpu(dma_desc->addr_lo), ++ SDHCI_DUMP("%08llx: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n", ++ (unsigned long long)dma, ++ le32_to_cpu(dma_desc->addr_lo), + le16_to_cpu(dma_desc->len), + le16_to_cpu(dma_desc->cmd)); + + desc += host->desc_sz; ++ dma += host->desc_sz; + + if (dma_desc->cmd & cpu_to_le16(ADMA2_END)) + break; +@@ -2812,7 +2816,8 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) + != MMC_BUS_TEST_R) + host->data->error = -EILSEQ; + else if (intmask & SDHCI_INT_ADMA_ERROR) { +- pr_err("%s: ADMA error\n", mmc_hostname(host->mmc)); ++ pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), ++ intmask); + sdhci_adma_show_error(host); + host->data->error = -EIO; + if (host->ops->adma_workaround) +@@ -3544,6 +3549,9 @@ int sdhci_setup_host(struct sdhci_host *host) + mmc_hostname(mmc), host->version); + } + ++ if (host->quirks & SDHCI_QUIRK_BROKEN_CQE) ++ mmc->caps2 &= ~MMC_CAP2_CQE; ++ + if (host->quirks & SDHCI_QUIRK_FORCE_DMA) + host->flags |= SDHCI_USE_SDMA; + else if (!(host->caps & SDHCI_CAN_DO_SDMA)) +diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h +index 0f8c4f3ccafc..c0372e3443fd 100644 +--- a/drivers/mmc/host/sdhci.h ++++ b/drivers/mmc/host/sdhci.h +@@ -391,6 +391,8 @@ struct sdhci_host { + #define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15) + /* Controller reports inverted write-protect state */ + #define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16) ++/* Controller has unusable command queue engine */ ++#define SDHCI_QUIRK_BROKEN_CQE (1<<17) + /* Controller does not like fast PIO transfers */ + #define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18) + /* Controller has to be forced to use block size of 2048 bytes */ +diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c +index 7ef2d37fcfc6..2340a5e412a8 100644 +--- a/drivers/mmc/host/sdhci_am654.c ++++ b/drivers/mmc/host/sdhci_am654.c +@@ -47,6 +47,8 @@ + #define SEL100_MASK BIT(SEL100_SHIFT) + #define FREQSEL_SHIFT 8 + #define FREQSEL_MASK GENMASK(10, 8) ++#define CLKBUFSEL_SHIFT 0 ++#define CLKBUFSEL_MASK GENMASK(2, 0) + #define DLL_TRIM_ICP_SHIFT 4 + #define DLL_TRIM_ICP_MASK GENMASK(7, 4) + #define DR_TY_SHIFT 20 +@@ -84,6 +86,7 @@ struct sdhci_am654_data { + struct regmap *base; + bool legacy_otapdly; + int otap_del_sel[11]; ++ int clkbuf_sel; + int trm_icp; + int drv_strength; + bool dll_on; +@@ -231,7 +234,6 @@ void sdhci_j721e_4bit_set_clock(struct sdhci_host *host, unsigned int clock) + struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); + unsigned char timing = host->mmc->ios.timing; + u32 otap_del_sel; +- u32 otap_del_ena; + u32 mask, val; + + /* Setup DLL Output TAP delay */ +@@ -240,12 +242,14 @@ void sdhci_j721e_4bit_set_clock(struct sdhci_host *host, unsigned int clock) + else + otap_del_sel = sdhci_am654->otap_del_sel[timing]; + +- otap_del_ena = (timing > MMC_TIMING_UHS_SDR25) ? 1 : 0; + mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK; +- val = (otap_del_ena << OTAPDLYENA_SHIFT) | ++ val = (0x1 << OTAPDLYENA_SHIFT) | + (otap_del_sel << OTAPDLYSEL_SHIFT); + regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val); + ++ regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK, ++ sdhci_am654->clkbuf_sel); ++ + sdhci_set_clock(host, clock); + } + +@@ -294,8 +298,8 @@ struct sdhci_ops sdhci_am654_ops = { + + static const struct sdhci_pltfm_data sdhci_am654_pdata = { + .ops = &sdhci_am654_ops, +- .quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT | +- SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, ++ .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 | ++ SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, + }; + +@@ -331,8 +335,7 @@ struct sdhci_ops sdhci_j721e_8bit_ops = { + + static const struct sdhci_pltfm_data sdhci_j721e_8bit_pdata = { + .ops = &sdhci_j721e_8bit_ops, +- .quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT | +- SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, ++ .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, + }; + +@@ -355,8 +358,7 @@ struct sdhci_ops sdhci_j721e_4bit_ops = { + + static const struct sdhci_pltfm_data sdhci_j721e_4bit_pdata = { + .ops = &sdhci_j721e_4bit_ops, +- .quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT | +- SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, ++ .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, + }; + +@@ -451,6 +453,7 @@ static int sdhci_am654_init(struct sdhci_host *host) + { + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); ++ struct device *dev = mmc_dev(host->mmc); + u32 ctl_cfg_2 = 0; + u32 mask; + u32 val; +@@ -503,10 +506,11 @@ static int sdhci_am654_init(struct sdhci_host *host) + ret = sdhci_am654_get_otap_delay(host, sdhci_am654); + if (ret) + goto err_cleanup_host; +- +- ret = sdhci_am654_cqe_add_host(host); +- if (ret) +- goto err_cleanup_host; ++ if (!of_device_is_compatible(dev->of_node, "ti,am654-sdhci-5.1")) { ++ ret = sdhci_am654_cqe_add_host(host); ++ if (ret) ++ goto err_cleanup_host; ++ } + + ret = __sdhci_add_host(host); + if (ret) +@@ -560,6 +564,8 @@ static int sdhci_am654_get_of_property(struct platform_device *pdev, + } + + device_property_read_u32(dev, "ti,strobe-sel", &sdhci_am654->strb_sel); ++ device_property_read_u32(dev, "ti,clkbuf-sel", ++ &sdhci_am654->clkbuf_sel); + + sdhci_get_of_property(pdev); + +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0020-feat-change-mmc-order-using-alias-in-dts.patch b/recipes-kernel/linux/files/0020-feat-change-mmc-order-using-alias-in-dts.patch new file mode 100644 index 000000000..f02ffcd13 --- /dev/null +++ b/recipes-kernel/linux/files/0020-feat-change-mmc-order-using-alias-in-dts.patch @@ -0,0 +1,79 @@ +From 6d7ccabd9df5c304a67d692233f6060b744e6b93 Mon Sep 17 00:00:00 2001 +From: "le.jin" +Date: Wed, 9 Oct 2019 15:22:09 +0800 +Subject: [PATCH 20/23] feat:change mmc order using alias in dts + +1. modify kernel to support mmc alias in dts +2. change SD to mmc0 and EMMC to mmc1 via alias in dts + +Signed-off-by: Gao Nian +--- + .../boot/dts/siemens/iot2050-advanced.dts | 5 ++++ + drivers/mmc/core/host.c | 23 +++++++++++++++---- + 2 files changed, 23 insertions(+), 5 deletions(-) + +diff --git a/arch/arm64/boot/dts/siemens/iot2050-advanced.dts b/arch/arm64/boot/dts/siemens/iot2050-advanced.dts +index 9a83edbbeae1..946520f863cf 100644 +--- a/arch/arm64/boot/dts/siemens/iot2050-advanced.dts ++++ b/arch/arm64/boot/dts/siemens/iot2050-advanced.dts +@@ -11,6 +11,11 @@ + / { + model = "SIMATIC IOT2050-ADVANCED"; + ++ aliases { ++ mmc0 = &sdhci1; ++ mmc1 = &sdhci0; ++ }; ++ + memory@80000000 { + device_type = "memory"; + /* 2G RAM */ +diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c +index f57f5de54206..5db720c6591b 100644 +--- a/drivers/mmc/core/host.c ++++ b/drivers/mmc/core/host.c +@@ -357,8 +357,8 @@ EXPORT_SYMBOL(mmc_of_parse); + */ + struct mmc_host *mmc_alloc_host(int extra, struct device *dev) + { +- int err; + struct mmc_host *host; ++ int of_id = -1, id = -1; + + host = kzalloc(sizeof(struct mmc_host) + extra, GFP_KERNEL); + if (!host) +@@ -367,14 +367,27 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev) + /* scanning will be enabled when we're ready */ + host->rescan_disable = 1; + +- err = ida_simple_get(&mmc_host_ida, 0, 0, GFP_KERNEL); +- if (err < 0) { ++ if (dev->of_node) { ++ of_id = of_alias_get_id(dev->of_node, "mmc"); ++ } ++ ++ if (of_id >= 0) { ++ id = ida_simple_get(&mmc_host_ida, of_id, of_id + 1, GFP_NOWAIT); ++ if (id < 0) ++ dev_warn(dev, "aliases ID %d not available\n", of_id); ++ } ++ ++ if (id < 0) ++ id = ida_simple_get(&mmc_host_ida, 0, 0, GFP_NOWAIT); ++ ++ if (id >= 0) ++ host->index = id; ++ ++ if (id < 0) { + kfree(host); + return NULL; + } + +- host->index = err; +- + dev_set_name(&host->class_dev, "mmc%d", host->index); + + host->parent = dev; +-- +2.17.1 + diff --git a/recipes-kernel/linux/files/0021-fix-PLL4_DCO-freq-over-range-cause-DP-not-display.patch b/recipes-kernel/linux/files/0021-fix-PLL4_DCO-freq-over-range-cause-DP-not-display.patch new file mode 100644 index 000000000..adb98fee5 --- /dev/null +++ b/recipes-kernel/linux/files/0021-fix-PLL4_DCO-freq-over-range-cause-DP-not-display.patch @@ -0,0 +1,262 @@ +From 02e86566ee70f66cfdb4fb49535ed5d78b20754d Mon Sep 17 00:00:00 2001 +From: Sheng Long Wang +Date: Tue, 7 Apr 2020 15:30:06 +0800 +Subject: [PATCH 21/23] fix:PLL4_DCO freq over range cause DP not display + + 1.some DP may be can not display. + 2.reason: TI sysfw can not correct set PLL4 some frequency + division parameter(M,N,M2),It will cause DCO over range, + calculate DCO frequency not between HS1 and HS2 mode, + So,CLKOUT is bypass mode,only out 25Mhz,Then DSS_PLL_CLKOUT + and DPI_1_IN_CLK is always 25MHz,and It don't match the + frequency of the monitor,so can not display. + + so,through dynamic acquisition of monitor frequency(Rate), + calculation (M,N,M2) value and set correlation register. + +Signed-off-by: Sheng Long Wang +--- + drivers/gpu/drm/tidss/tidss_dispc7.c | 208 ++++++++++++++++++++++++++- + 1 file changed, 207 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/tidss/tidss_dispc7.c b/drivers/gpu/drm/tidss/tidss_dispc7.c +index 3c81b1186e..74d2fb4c51 100644 +--- a/drivers/gpu/drm/tidss/tidss_dispc7.c ++++ b/drivers/gpu/drm/tidss/tidss_dispc7.c +@@ -33,6 +33,21 @@ + #include "tidss_scale_coefs.h" + #include "tidss_dispc7.h" + ++ ++#define DSS_PLL_BASE_ADDR 0x00684000 ++#define PLL_KICK0_OFFSET 0x0010 ++#define PLL_KICK1_OFFSET 0x0014 ++#define PLL_FREQ_CTRL0_OFFSET 0x0020 ++#define PLL_FREQ_CTRL1_OFFSET 0x0024 ++#define PLL_CLKDIV_OFFSET 0x0028 ++#define PLL_PROG_OFFSET 0x002C ++#define PLL_CTRL_OFFSET 0x0030 ++#define PLL_STAT_OFFSET 0x0034 ++#define KICK0_UNLOCK 0x68EF3490 ++#define KICK1_UNLOCK 0xD172BC5A ++#define KICK_LOCK 0x00000000 ++ ++ + static const struct dispc7_features dispc7_am6_feats = { + .min_pclk = 1000, + .max_pclk = 200000000, +@@ -989,11 +1004,147 @@ static unsigned int dispc7_pclk_diff(unsigned long rate, + return (unsigned int)(abs(((rr - r) * 100) / r)); + } + ++ ++static void dss_pll4_reg_write(u32 reg, u32 val) ++{ ++ void __iomem *regval; ++ ++ regval = ioremap(DSS_PLL_BASE_ADDR + reg ,SZ_4); ++ writel(val, regval); ++ mdelay(2); ++ iounmap(regval); ++} ++ ++static u32 dss_pll4_reg_read(u32 reg) ++{ ++ void __iomem *regval; ++ u32 data; ++ ++ regval = ioremap(DSS_PLL_BASE_ADDR + reg,SZ_4); ++ data = readl(regval); ++ iounmap(regval); ++ ++ return data; ++} ++ ++static int get_dp_clock_parameter(int Rate, u16 *M_INT, u8 *N_DIV, u8 *M2, u8 *choose_flag) ++{ ++ u16 m2_div[127] = {0}; ++ u16 result[127][3] = {0}; ++ u16 hs2_dco_freq = 0; ++ u16 hs1_dco_freq = 0; ++ u16 start,ck,N,M; ++ u16 first = 0, second = 0, mid = 0; ++ ++ u8 hs2_data_exist = 0; ++ u8 hs1_data_exist = 0; ++ u8 count = 0, ret = 0, i = 0; ++ ++ if (Rate < 6 || Rate > 2500) { ++ return 0; ++ } ++ ++ for (start = 750 / Rate + (750%Rate!=0); start <= 2500 / Rate; ++start) { ++ if (start >= 1 && start <= 127) { ++ m2_div[count] = start; ++ count++; ++ } ++ } ++ ++ for (i = 0; i < count; ++i) { ++ ck = Rate * m2_div[i]; ++ for ( N = 0; N <= 255; ++N) { ++ M = (N + 1) * ck / 25; ++ if ((M * 25 == (N + 1) * ck) && (M >= 2) && (M <= 4095)) { ++ printk(KERN_DEBUG "M2=%d, N=%d, M=%d\n", m2_div[i], N, M); ++ result[i][0] = m2_div[i]; ++ result[i][1] = M; ++ result[i][2] = N; ++ ret = 1; ++ } ++ } ++ } ++ ++ if (!ret) { ++ return 0; ++ } ++ ++ for (i = 0; i < count; ++i) { ++ if (Rate * m2_div[i] <= 1500) first++; ++ if (Rate * m2_div[i] >= 1250) ++ second++; ++ else ++ mid++; ++ } ++ ++ if (first == 0) { ++ hs2_data_exist = 1; ++ } ++ ++ if (second == 0) { ++ hs1_data_exist = 1; ++ } ++ ++ if((hs1_data_exist == 0) && (hs2_data_exist == 0)) { ++ ++ hs2_dco_freq = 25 * result[first / 2][1] / (result[first / 2][2] + 1); ++ hs1_dco_freq = 25 * result[second / 2 + mid][1] / ( result[second / 2 + mid][2] +1); ++ ++ if((abs(hs2_dco_freq - 1125) > abs(hs1_dco_freq - 1875))) { ++ printk(KERN_DEBUG "(hs1 mode) [1250-2500] : M2=%d, M=%d, N=%d\n", ++ result[second / 2 + mid][0], result[second / 2 + mid][1], result[second / 2 + mid][2]); ++ *M_INT = (u16)(result[second / 2 + mid][1]); ++ *N_DIV = (u8)(result[second / 2 + mid][2]); ++ *M2 = (u8)(result[second / 2 + mid][0]); ++ *choose_flag = 2; ++ } ++ else { ++ printk(KERN_DEBUG "(hs2 mode)[750-1500] : M2=%d, M=%d, N=%d\n", ++ result[first / 2][0], result[first / 2][1], result[first / 2][2]); ++ *M_INT = (u16)(result[first / 2][1]); ++ *N_DIV = (u8)(result[first / 2][2]); ++ *M2 = (u8)(result[first / 2][0]); ++ *choose_flag = 1; ++ } ++ ++ } ++ else { ++ ++ if((hs2_data_exist == 0) && (hs1_data_exist == 1)) { ++ printk(KERN_DEBUG "(hs2 mode)[750-1500] : M2=%d, M=%d, N=%d\n", ++ result[first / 2][0], result[first / 2][1], result[first / 2][2]); ++ *M_INT = (u16)(result[first / 2][1]); ++ *N_DIV = (u8)(result[first / 2][2]); ++ *M2 = (u8)(result[first / 2][0]); ++ *choose_flag = 1; ++ }else if((hs2_data_exist == 1) && (hs1_data_exist == 0)) { ++ printk(KERN_DEBUG "(hs1 mode)[1250--2500] : M2=%d, M=%d, N=%d\n", ++ result[second / 2 + mid][0], result[second / 2 + mid][1], result[second / 2 + mid][2]); ++ *M_INT = (u16)(result[second / 2 + mid][1]); ++ *N_DIV = (u8)(result[second / 2 + mid][2]); ++ *M2 = (u8)(result[second / 2 + mid][0]); ++ *choose_flag = 2; ++ }else { ++ return 0; ++ } ++ ++ } ++ ++ return 1; ++ ++} ++ ++ + static int dispc7_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport, + unsigned long rate) + { + int r; + unsigned long new_rate; ++ u32 data; ++ u16 M_INT; ++ u8 N_DIV; ++ u8 M2; ++ u8 choose_flag = 0; + + r = clk_set_rate(dispc->vp_clk[hw_videoport], rate); + if (r) { +@@ -1012,7 +1163,62 @@ static int dispc7_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport, + dev_dbg(dispc->dev, "vp%d: new rate %lu Hz (requested %lu Hz)\n", + hw_videoport, clk_get_rate(dispc->vp_clk[hw_videoport]), rate); + +- return 0; ++ /**dynamic Get (M,N,M2) value**/ ++ r = get_dp_clock_parameter(rate/1000000, &M_INT, &N_DIV, &M2, &choose_flag); ++ if(!r){ ++ dev_err(dispc->dev,"get DP PLL parameter erro \n"); ++ return 0; ++ } ++ mdelay(2); ++ ++ /**Unlock PLL registers**/ ++ dss_pll4_reg_write(PLL_KICK0_OFFSET,KICK0_UNLOCK); ++ dss_pll4_reg_write(PLL_KICK1_OFFSET,KICK1_UNLOCK); ++ ++ /**Switch PLL outputs to bypass freq**/ ++ dss_pll4_reg_write(PLL_CTRL_OFFSET,0x2100099); ++ ++ /**Prepare PLL for programming**/ ++ dss_pll4_reg_write(PLL_PROG_OFFSET,0); ++ ++ /** DSS Clock Set **/ ++ data = dss_pll4_reg_read(PLL_FREQ_CTRL0_OFFSET); ++ data &= 0xFFF00000; //clear bit [0:19] ++ data |= (u32)N_DIV; ++ data |= (u32)(M_INT << 8); ++ dss_pll4_reg_write(PLL_FREQ_CTRL0_OFFSET,data); //set M,N ++ if(choose_flag == 1) ++ dss_pll4_reg_write(PLL_FREQ_CTRL1_OFFSET,0x02000000); //set M.f HS2 ++ else if (choose_flag == 2) ++ dss_pll4_reg_write(PLL_FREQ_CTRL1_OFFSET,0x04000000); //set M.f HS1 ++ ++ ++ /**Set M2 **/ ++ data = dss_pll4_reg_read(PLL_CLKDIV_OFFSET); ++ data &= ~((0x7F << 8)); //clear bit [8:14] ++ data |= (u32)(M2 << 8); ++ dss_pll4_reg_write(PLL_CLKDIV_OFFSET,data); ++ ++ /**Trigger PLL update to new values**/ ++ dss_pll4_reg_write(PLL_PROG_OFFSET,0x2); ++ ++ /**Trigger PLL update to new values**/ ++ dss_pll4_reg_write(PLL_PROG_OFFSET,0x102); ++ ++ /** Trigger PLL lock to new values**/ ++ dss_pll4_reg_write(PLL_PROG_OFFSET,0x103); ++ ++ /** Send PLL to idle**/ ++ dss_pll4_reg_write(PLL_PROG_OFFSET,0x1); ++ ++ /** Switch PLL outputs to locked freq**/ ++ dss_pll4_reg_write(PLL_CTRL_OFFSET,0x2100019); ++ ++ /**Lock PLL registers **/ ++ dss_pll4_reg_write(PLL_KICK0_OFFSET,KICK_LOCK); ++ dss_pll4_reg_write(PLL_KICK1_OFFSET,KICK_LOCK); ++ ++ return 0; + } + + /* OVR */ +-- +2.22.0 + diff --git a/recipes-kernel/linux/files/0022-iot2050-Roll-back-basic-dtb-to-V01.00.00.1-release.patch b/recipes-kernel/linux/files/0022-iot2050-Roll-back-basic-dtb-to-V01.00.00.1-release.patch new file mode 100644 index 000000000..ce609f9f5 --- /dev/null +++ b/recipes-kernel/linux/files/0022-iot2050-Roll-back-basic-dtb-to-V01.00.00.1-release.patch @@ -0,0 +1,37 @@ +From 0ef3b310bb5c63aeb1f1468c06a739a4e69b2066 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Sat, 2 May 2020 11:02:12 +0200 +Subject: [PATCH 22/23] iot2050: Roll back basic dtb to V01.00.00.1 release + +That release came with sysfw 19.7.1 which had some... variations. + +Signed-off-by: Jan Kiszka +--- + arch/arm64/boot/dts/siemens/iot2050-basic.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/siemens/iot2050-basic.dts b/arch/arm64/boot/dts/siemens/iot2050-basic.dts +index 471f9b131db0..fe5900219a19 100644 +--- a/arch/arm64/boot/dts/siemens/iot2050-basic.dts ++++ b/arch/arm64/boot/dts/siemens/iot2050-basic.dts +@@ -53,3 +53,17 @@ + &sdhci0 { + status = "disabled"; + }; ++ ++/* Compat support for bootloader V01.00.00.1 */ ++ ++&ospi0 { ++ clocks = <&k3_clks 55 5>; ++ assigned-clocks = <&k3_clks 55 5>; ++ assigned-clock-parents = <&k3_clks 55 7>; ++ power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>; ++}; ++ ++&ospi1 { ++ clocks = <&k3_clks 55 16>; ++ power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>; ++}; +-- +2.16.4 + diff --git a/recipes-kernel/linux/files/0023-iot2050-Roll-back-advanced-dtb-to-V01.00.00.1-releas.patch b/recipes-kernel/linux/files/0023-iot2050-Roll-back-advanced-dtb-to-V01.00.00.1-releas.patch new file mode 100644 index 000000000..caf66f635 --- /dev/null +++ b/recipes-kernel/linux/files/0023-iot2050-Roll-back-advanced-dtb-to-V01.00.00.1-releas.patch @@ -0,0 +1,39 @@ +From 7766a625d82ba40facf3bd33ffa7bdeab638d6c5 Mon Sep 17 00:00:00 2001 +From: Gao Nian +Date: Fri, 8 May 2020 16:09:23 +0800 +Subject: [PATCH 23/23] iot2050: Roll back advanced dtb to V01.00.00.1 release + +Signed-off-by: Gao Nian +--- + .../arm64/boot/dts/siemens/iot2050-advanced.dts | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/siemens/iot2050-advanced.dts b/arch/arm64/boot/dts/siemens/iot2050-advanced.dts +index 946520f863cf..a0d8b50010de 100644 +--- a/arch/arm64/boot/dts/siemens/iot2050-advanced.dts ++++ b/arch/arm64/boot/dts/siemens/iot2050-advanced.dts +@@ -62,4 +62,19 @@ + non-removable; + ti,driver-strength-ohm = <50>; + disable-wp; +-}; +\ No newline at end of file ++}; ++ ++/* Compat support for bootloader V01.00.00.1 */ ++ ++&ospi0 { ++ clocks = <&k3_clks 55 5>; ++ assigned-clocks = <&k3_clks 55 5>; ++ assigned-clock-parents = <&k3_clks 55 7>; ++ power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>; ++}; ++ ++&ospi1 { ++ clocks = <&k3_clks 55 16>; ++ power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>; ++}; ++ +-- +2.25.1 + diff --git a/recipes-kernel/linux/files/iot2050_defconfig_base b/recipes-kernel/linux/files/iot2050_defconfig_base new file mode 100644 index 000000000..4cce9efb7 --- /dev/null +++ b/recipes-kernel/linux/files/iot2050_defconfig_base @@ -0,0 +1,6413 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 4.19.59 Kernel Configuration +# + +# +# Compiler: aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0 +# +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=80300 +CONFIG_CLANG_VERSION=0 +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_SWAP_ENABLED=y +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_SOCK_CGROUP_DATA=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +# CONFIG_PROFILING is not set +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=16 +CONFIG_ARM64_CONT_SHIFT=5 +CONFIG_ARCH_MMAP_RND_BITS_MIN=14 +CONFIG_ARCH_MMAP_RND_BITS_MAX=29 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=7 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA32=y +CONFIG_HAVE_GENERIC_GUP=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +CONFIG_ARCH_K3=y +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# + +# +# Cadence PCIe controllers support +# +CONFIG_PCIE_CADENCE=y +CONFIG_PCIE_CADENCE_HOST=y +CONFIG_PCIE_CADENCE_EP=y +CONFIG_PCI_J721E=y +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +# CONFIG_PCI_XGENE is not set +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_HOST_THUNDER_ECAM=y + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_DW_EP=y +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCIE_DW_PLAT_EP is not set +CONFIG_PCI_KEYSTONE=y +CONFIG_PCI_KEYSTONE_HOST=y +CONFIG_PCI_KEYSTONE_EP=y +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set + +# +# PCI Endpoint +# +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y +CONFIG_PCI_EPF_TEST=y + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1463225=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +# CONFIG_CAVIUM_ERRATUM_30115 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set +# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +# CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set +# CONFIG_ARM64_4K_PAGES is not set +# CONFIG_ARM64_16K_PAGES is not set +CONFIG_ARM64_64K_PAGES=y +# CONFIG_ARM64_VA_BITS_42 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +# CONFIG_ARM64_PA_BITS_52 is not set +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=64 +CONFIG_HOTPLUG_CPU=y +# CONFIG_NUMA is not set +CONFIG_HOLES_IN_ZONE=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_SECCOMP=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=14 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDEN_EL2_VECTORS=y +CONFIG_ARM64_SSBD=y +# CONFIG_ARMV8_DEPRECATED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y + +# +# ARMv8.2 architectural features +# +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_RANDOMIZE_BASE is not set + +# +# Boot options +# +CONFIG_CMDLINE="" +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_EFI is not set +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# CPU Power Management +# + +# +# CPU Idle +# +# CONFIG_CPU_IDLE is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set +# CONFIG_QORIQ_CPUFREQ is not set + +# +# Firmware Drivers +# +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_SCMI_PROTOCOL is not set +# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# Tegra firmware driver +# +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64_CE=m +CONFIG_CRYPTO_SHA3_ARM64=m +CONFIG_CRYPTO_SM3_ARM64_CE=m +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m +CONFIG_CRYPTO_CRC32_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m +CONFIG_CRYPTO_CHACHA20_NEON=m +CONFIG_CRYPTO_AES_ARM64_BS=m + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_KPROBES is not set +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_CC_HAS_STACKPROTECTOR_NONE=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=14 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=7 +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_REFCOUNT_FULL=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_PLUGIN_HOSTCC="" +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_CFQ_GROUP_IOSCHED is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_TRANSPARENT_HUGE_PAGECACHE=y +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=m +CONFIG_XFRM_USER=m +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_ROUTE_CLASSID=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +# CONFIG_INET_ESP_OFFLOAD is not set +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=m +# CONFIG_INET6_ESP is not set +CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_FAMILY_ARP=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=m +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +CONFIG_NF_CONNTRACK_TFTP=m +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_PROTO_DCCP=y +CONFIG_NF_NAT_PROTO_UDPLITE=y +CONFIG_NF_NAT_PROTO_SCTP=y +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_TFTP=m +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=m +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_POLICY=m +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +CONFIG_NETFILTER_XT_MATCH_SCTP=m +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +CONFIG_IP_VS=m +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +# CONFIG_IP_VS_PROTO_TCP is not set +# CONFIG_IP_VS_PROTO_UDP is not set +# CONFIG_IP_VS_PROTO_ESP is not set +# CONFIG_IP_VS_PROTO_AH is not set +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +# CONFIG_IP_VS_WRR is not set +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_FO is not set +# CONFIG_IP_VS_OVF is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_MH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +# CONFIG_IP_VS_NFCT is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=y +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_NF_NAT_IPV6=m +CONFIG_NF_NAT_MASQUERADE_IPV6=y +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +# CONFIG_IP6_NF_TARGET_NPT is not set +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_OBJCNT is not set +CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1 is not set +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set +CONFIG_SCTP_COOKIE_HMAC_MD5=y +# CONFIG_SCTP_COOKIE_HMAC_SHA1 is not set +CONFIG_INET_SCTP_DIAG=m +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFB=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +# CONFIG_NET_SCH_CBS is not set +# CONFIG_NET_SCH_ETF is not set +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_MQPRIO=m +# CONFIG_NET_SCH_SKBPRIO is not set +CONFIG_NET_SCH_CHOKE=m +CONFIG_NET_SCH_QFQ=m +CONFIG_NET_SCH_CODEL=m +CONFIG_NET_SCH_FQ_CODEL=m +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +CONFIG_NET_SCH_INGRESS=m +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +# CONFIG_CLS_U32_PERF is not set +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_CLS_CGROUP=m +# CONFIG_NET_CLS_BPF is not set +# CONFIG_NET_CLS_FLOWER is not set +# CONFIG_NET_CLS_MATCHALL is not set +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_TEXT=m +# CONFIG_NET_EMATCH_CANID is not set +# CONFIG_NET_EMATCH_IPT is not set +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=m +# CONFIG_NET_ACT_SAMPLE is not set +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_ACT_CSUM=m +# CONFIG_NET_ACT_VLAN is not set +# CONFIG_NET_ACT_BPF is not set +# CONFIG_NET_ACT_SKBMOD is not set +# CONFIG_NET_ACT_IFE is not set +# CONFIG_NET_ACT_TUNNEL_KEY is not set +CONFIG_NET_CLS_IND=y +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +CONFIG_HSR_PRP=y +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_XILINXCAN is not set +CONFIG_CAN_C_CAN=m +CONFIG_CAN_C_CAN_PLATFORM=m +# CONFIG_CAN_C_CAN_PCI is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +CONFIG_CAN_M_CAN=m +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_BT=m +CONFIG_BT_BREDR=y +# CONFIG_BT_RFCOMM is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=m +# CONFIG_BT_HS is not set +# CONFIG_BT_LE is not set +CONFIG_BT_LEDS=y +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_DEBUGFS is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_RTL=m +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_SERDEV=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_NOKIA is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +CONFIG_BT_HCIUART_LL=y +# CONFIG_BT_HCIUART_3WIRE is not set +# CONFIG_BT_HCIUART_INTEL is not set +CONFIG_BT_HCIUART_BCM=y +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKUART is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_CFG80211=m +CONFIG_NL80211_TESTMODE=y +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +# CONFIG_MAC80211_RC_MINSTREL_VHT is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +CONFIG_RPMSG_PROTO=m +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +# CONFIG_NET_DEVLINK is not set +CONFIG_MAY_USE_DEVLINK=y +CONFIG_FAILOVER=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=24 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +CONFIG_GENERIC_ARCH_TOPOLOGY=y + +# +# Bus devices +# +# CONFIG_BRCMSTB_GISB_ARB is not set +CONFIG_SIMPLE_PM_BUS=y +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=y +CONFIG_MTD_TESTS=m +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# Partition parsers +# + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PHYSMAP_OF is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_GPIO_ADDR is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_LATCH_ADDR is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_ECC_BCH is not set +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set +CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_DOCG4 is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_MT81xx_NOR is not set +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_SPI_CADENCE_QUADSPI=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_BLOCK is not set +CONFIG_MTD_HYPERBUS=y +CONFIG_HBMC_AM654=y +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_VIRTIO_BLK_SCSI is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=m +CONFIG_BLK_DEV_NVME=m +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TARGET is not set + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +CONFIG_PCI_ENDPOINT_TEST=m +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC & related support +# + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# VOP Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# + +# +# VOP Driver +# +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_MQ_DEFAULT=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=m +CONFIG_SCSI_SAS_LIBSAS=m +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +CONFIG_SCSI_HISI_SAS=m +CONFIG_SCSI_HISI_SAS_PCI=m +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +CONFIG_SCSI_UFS_CDNS_PLATFORM=y +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +CONFIG_SCSI_UFS_BSG=y +CONFIG_SCSI_UFS_TI_J721E=y +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=m +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=m +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=m +CONFIG_AHCI_CEVA=m +CONFIG_AHCI_XGENE=m +CONFIG_AHCI_QORIQ=m +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +CONFIG_SATA_SIL24=m +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_PLATFORM=m +CONFIG_PATA_OF_PLATFORM=m +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=m +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_IFB is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +CONFIG_IPVLAN=m +# CONFIG_IPVTAP is not set +CONFIG_VXLAN=m +# CONFIG_GENEVE is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +CONFIG_TIGON3=m +CONFIG_TIGON3_HWMON=y +# CONFIG_BNX2X is not set +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CADENCE=y +CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +# CONFIG_MACB_PCI is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HP is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_HINIC is not set +# CONFIG_NET_VENDOR_I825XX is not set +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +CONFIG_E1000=m +CONFIG_E1000E=m +# CONFIG_IGB is not set +CONFIG_IGBVF=y +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set +CONFIG_SKGE=m +# CONFIG_SKGE_DEBUG is not set +# CONFIG_SKGE_GENESIS is not set +CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set +CONFIG_SMSC911X=y +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +CONFIG_TI_DAVINCI_MDIO=y +CONFIG_TI_CPSW_PHY_SEL=y +CONFIG_TI_CPSW_ALE=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_TI_AM65_CPTS=y +# CONFIG_TLAN is not set +CONFIG_TI_PRUETH=m +CONFIG_TI_ICSSG_PRUETH=m +# CONFIG_TI_PTP_BC is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MMIOREG=y +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_THUNDER is not set +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +CONFIG_AT803X_PHY=m +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +CONFIG_DP83848_PHY=y +CONFIG_DP83867_PHY=y +CONFIG_FIXED_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_LXT_PHY is not set +CONFIG_MARVELL_PHY=y +CONFIG_MARVELL_10G_PHY=m +CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=m +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# Host-side USB support is needed for USB Network Adapter support +# +CONFIG_USB_NET_DRIVERS=m +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_ATH10K_DEBUGFS is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +CONFIG_B43=m +CONFIG_B43_BCMA=y +CONFIG_B43_SSB=y +CONFIG_B43_BUSES_BCMA_AND_SSB=y +# CONFIG_B43_BUSES_BCMA is not set +# CONFIG_B43_BUSES_SSB is not set +CONFIG_B43_PCI_AUTOSELECT=y +CONFIG_B43_PCICORE_AUTOSELECT=y +# CONFIG_B43_SDIO is not set +CONFIG_B43_BCMA_PIO=y +CONFIG_B43_PIO=y +CONFIG_B43_PHY_G=y +CONFIG_B43_PHY_N=y +CONFIG_B43_PHY_LP=y +CONFIG_B43_PHY_HT=y +CONFIG_B43_LEDS=y +CONFIG_B43_HWRNG=y +# CONFIG_B43_DEBUG is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +CONFIG_IWLWIFI=m +CONFIG_IWLWIFI_LEDS=y +CONFIG_IWLDVM=m +CONFIG_IWLMVM=m +CONFIG_IWLWIFI_OPMODE_MODULAR=y +# CONFIG_IWLWIFI_BCAST_FILTERING is not set +# CONFIG_IWLWIFI_PCIE_RTPM is not set + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_MWIFIEX=m +# CONFIG_MWIFIEX_SDIO is not set +CONFIG_MWIFIEX_PCIE=m +# CONFIG_MWIFIEX_USB is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PEARL_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=m +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +CONFIG_KEYBOARD_MATRIX=m +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +CONFIG_TOUCHSCREEN_GOODIX=m +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +CONFIG_TOUCHSCREEN_EDT_FT5X06=m +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +CONFIG_TOUCHSCREEN_TI_AM335X_TSC=m +CONFIG_TOUCHSCREEN_PIXCIR=m +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +CONFIG_INPUT_GPIO_DECODER=m +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PALMAS_PWRBUTTON is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_LDISC_AUTOLOAD=y +CONFIG_DEVMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=10 +CONFIG_SERIAL_8250_RUNTIME_UARTS=10 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_FSL=y +# CONFIG_SERIAL_8250_DW is not set +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_8250_OMAP=y +CONFIG_SERIAL_8250_OMAP_TTYO_FIXUP=y +# CONFIG_SERIAL_8250_MOXA is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_TTY_PRINTK is not set +CONFIG_HVC_DRIVER=y +# CONFIG_HVC_DCC is not set +CONFIG_VIRTIO_CONSOLE=y +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_OMAP=m +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_CAVIUM=m +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_RAW_DRIVER is not set +CONFIG_TCG_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_CROS_EC_TUNNEL=y +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_OMAP24XX=y +CONFIG_SPI_PL022=y +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_PALMAS is not set +# CONFIG_PINCTRL_RK805 is not set +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +CONFIG_GPIO_DAVINCI=y +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +CONFIG_GPIO_MB86S7X=y +# CONFIG_GPIO_MOCKUP is not set +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GPIO_PCF857X=y +CONFIG_GPIO_TPIC2810=m + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_BD9571MWV is not set +CONFIG_GPIO_MAX77620=y +# CONFIG_GPIO_PALMAS is not set + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +CONFIG_GPIO_PISOSR=m +# CONFIG_GPIO_XRA1403 is not set + +# +# USB GPIO expanders +# +CONFIG_W1=m + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2405 is not set +# CONFIG_W1_SLAVE_DS2408 is not set +# CONFIG_W1_SLAVE_DS2413 is not set +# CONFIG_W1_SLAVE_DS2406 is not set +# CONFIG_W1_SLAVE_DS2423 is not set +# CONFIG_W1_SLAVE_DS2805 is not set +# CONFIG_W1_SLAVE_DS2431 is not set +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2438 is not set +# CONFIG_W1_SLAVE_DS2780 is not set +# CONFIG_W1_SLAVE_DS2781 is not set +# CONFIG_W1_SLAVE_DS28E04 is not set +# CONFIG_W1_SLAVE_DS28E17 is not set +CONFIG_POWER_AVS=y +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_LEGO_EV3 is not set +CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +CONFIG_BATTERY_BQ27XXX_HDQ=m +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1721X is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LTC3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_CROS_USBPD is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=m +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_THERMAL_EMULATION=y +CONFIG_K3_THERMAL=y +# CONFIG_MAX77620_THERMAL is not set +# CONFIG_QORIQ_THERMAL is not set + +# +# ACPI INT340X thermal drivers +# +# CONFIG_QCOM_SPMI_TEMP_ALARM is not set +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +CONFIG_ARM_SP805_WATCHDOG=y +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +CONFIG_KEYSTONE_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB=m +CONFIG_SSB_SPROM=y +CONFIG_SSB_BLOCKIO=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_B43_PCI_BRIDGE=y +CONFIG_SSB_SDIOHOST_POSSIBLE=y +# CONFIG_SSB_SDIOHOST is not set +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y +# CONFIG_SSB_DRIVER_GPIO is not set +CONFIG_BCMA_POSSIBLE=y +CONFIG_BCMA=m +CONFIG_BCMA_BLOCKIO=y +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +CONFIG_BCMA_HOST_PCI=y +# CONFIG_BCMA_HOST_SOC is not set +CONFIG_BCMA_DRIVER_PCI=y +# CONFIG_BCMA_DRIVER_GMAC_CMN is not set +# CONFIG_BCMA_DRIVER_GPIO is not set +# CONFIG_BCMA_DEBUG is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=y +# CONFIG_MFD_AXP20X_I2C is not set +CONFIG_MFD_CROS_EC=y +CONFIG_MFD_CROS_EC_CHARDEV=m +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +CONFIG_MFD_HI6421_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +CONFIG_MFD_TI_AM335X_TSCADC=m +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +CONFIG_MFD_PALMAS=y +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_RAVE_SP_CORE is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_BD9571MWV=y +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_HI6421 is not set +CONFIG_REGULATOR_HI6421V530=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77620=y +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MT6311 is not set +CONFIG_REGULATOR_PALMAS=y +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_VCTRL=m +CONFIG_RC_CORE=m +CONFIG_RC_MAP=m +# CONFIG_LIRC is not set +CONFIG_RC_DECODERS=y +# CONFIG_IR_NEC_DECODER is not set +# CONFIG_IR_RC5_DECODER is not set +# CONFIG_IR_RC6_DECODER is not set +# CONFIG_IR_JVC_DECODER is not set +# CONFIG_IR_SONY_DECODER is not set +# CONFIG_IR_SANYO_DECODER is not set +# CONFIG_IR_SHARP_DECODER is not set +# CONFIG_IR_MCE_KBD_DECODER is not set +# CONFIG_IR_XMP_DECODER is not set +# CONFIG_IR_IMON_DECODER is not set +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_IMON_RAW is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_CONTROLLER=y +# CONFIG_MEDIA_CONTROLLER_DVB is not set +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_PCI_SKELETON is not set +CONFIG_V4L2_MEM2MEM_DEV=m +CONFIG_V4L2_FWNODE=m +CONFIG_DVB_CORE=y +# CONFIG_DVB_MMAP is not set +# CONFIG_DVB_NET is not set +CONFIG_DVB_MAX_ADAPTERS=16 +# CONFIG_DVB_DYNAMIC_MINORS is not set +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB is not set +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_SOC_CAMERA is not set +# CONFIG_VIDEO_XILINX is not set +CONFIG_VIDEO_TI_CAL=m +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_VIDEO_SH_VEU is not set +CONFIG_VIDEO_IMG_VXD_DEC=m +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_CYPRESS_FIRMWARE is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_DMA_CONTIG=m +CONFIG_VIDEOBUF2_VMALLOC=m +CONFIG_VIDEOBUF2_DMA_SG=m + +# +# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +CONFIG_MEDIA_ATTACH=y +CONFIG_VIDEO_IR_I2C=m + +# +# I2C Encoders, decoders, sensors and other helper chips +# + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set + +# +# Camera sensor devices +# +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_OV2640 is not set +CONFIG_VIDEO_OV2659=m +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +CONFIG_VIDEO_OV5640=m +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +CONFIG_VIDEO_OV1063X=m +CONFIG_VIDEO_OV490=m +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +CONFIG_VIDEO_MT9T11X=m +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set + +# +# SDR tuner chips +# + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set + +# +# Sensors used on soc_camera driver +# + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set + +# +# Media SPI Adapters +# +CONFIG_CXD2880_SPI_DRV=m +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m +CONFIG_DVB_M88DS3103=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_AF9013=m +CONFIG_DVB_EC100=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_RTL2830=m +CONFIG_DVB_RTL2832=m +CONFIG_DVB_SI2168=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_CXD2880=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT3306A=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m +CONFIG_DVB_MN88443X=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_DRX39XYJ=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_CXD2099=m +CONFIG_DVB_SP2=m + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_VM=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +CONFIG_DRM_I2C_NXP_TDA998X=y +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set + +# +# ACP (Audio CoProcessor) Configuration +# + +# +# AMD Library routines +# +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_LVDS is not set +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS=y +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_CDNS_DSI is not set +CONFIG_DRM_CDNS_MHDP=m +CONFIG_DRM_CDNS_MHDP_J721E=y +# CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LVDS_ENCODER is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_SIL_SII8620 is not set +CONFIG_DRM_SII902X=y +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +CONFIG_DRM_TOSHIBA_TC358767=y +CONFIG_DRM_TOSHIBA_TC358768=y +CONFIG_DRM_TI_TFP410=y +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_TINYDRM is not set +# CONFIG_DRM_PL111 is not set +CONFIG_DRM_TIDSS=y +CONFIG_DRM_TIDSS_DSS6=y +CONFIG_DRM_TIDSS_DSS7=y +CONFIG_DRM_LEGACY=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_BACKLIGHT=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_SIMPLE is not set +CONFIG_FB_SSD1307=y +# CONFIG_FB_SM712 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +CONFIG_BACKLIGHT_LP855X=m +CONFIG_BACKLIGHT_GPIO=y +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +CONFIG_BACKLIGHT_LED=y +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_PREALLOC_SIZE=64 +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set + +# +# STMicroelectronics STM32 SOC audio support +# + +# +# Audio support for Texas Instruments SoCs +# +CONFIG_SND_SOC_TI_UDMA_PCM=y + +# +# Texas Instruments DAI support for: +# +CONFIG_SND_SOC_DAVINCI_MCASP=y + +# +# Audio support for boards with Texas Instruments SoCs +# +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +CONFIG_SND_SOC_PCM3168A=m +CONFIG_SND_SOC_PCM3168A_I2C=m +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +CONFIG_SND_SOC_TLV320AIC31XX=m +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +CONFIG_SND_SOC_TLV320AIC3X=m +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +CONFIG_SND_SIMPLE_CARD_UTILS=m +CONFIG_SND_SIMPLE_CARD=m +CONFIG_SND_SIMPLE_SCU_CARD=m +CONFIG_SND_AUDIO_GRAPH_CARD=m +CONFIG_SND_AUDIO_GRAPH_SCU_CARD=m + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOOGLE_HAMMER is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=m +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set + +# +# I2C HID support +# +CONFIG_I2C_HID=m +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=m +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=m +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=m +CONFIG_USB_XHCI_PLATFORM=m +CONFIG_USB_EHCI_HCD=m +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=m +CONFIG_USB_EHCI_HCD_PLATFORM=m +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_HCD_PCI=m +# CONFIG_USB_OHCI_HCD_SSB is not set +CONFIG_USB_OHCI_HCD_PLATFORM=m +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_BCMA is not set +# CONFIG_USB_HCD_SSB is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +CONFIG_USB_CDNS3=m +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_USB_CDNS3_TI=m +CONFIG_USB_MUSB_HDRC=m +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_DWC3=m +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_HAPS=m +CONFIG_USB_DWC3_KEYSTONE=m +CONFIG_USB_DWC3_OF_SIMPLE=m +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +CONFIG_USB_ISP1760=m +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=m +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=m +CONFIG_USB_SERIAL_OPTION=m +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +CONFIG_USB_TEST=m +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=m +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=m +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=32 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_F_ACM=m +CONFIG_USB_F_SS_LB=m +CONFIG_USB_U_SERIAL=m +CONFIG_USB_U_ETHER=m +CONFIG_USB_U_AUDIO=m +CONFIG_USB_F_SERIAL=m +CONFIG_USB_F_OBEX=m +CONFIG_USB_F_NCM=m +CONFIG_USB_F_ECM=m +CONFIG_USB_F_EEM=m +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_F_MASS_STORAGE=m +CONFIG_USB_F_FS=m +CONFIG_USB_F_UAC1=m +CONFIG_USB_F_UAC2=m +CONFIG_USB_F_UVC=m +CONFIG_USB_F_MIDI=m +CONFIG_USB_F_HID=m +CONFIG_USB_F_PRINTER=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_UAC1=y +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_CONFIGFS_F_UVC=y +CONFIG_USB_CONFIGFS_F_PRINTER=y +CONFIG_USB_ZERO=m +# CONFIG_USB_ZERO_HNPTEST is not set +CONFIG_USB_AUDIO=m +# CONFIG_GADGET_UAC1 is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_FUNCTIONFS_ETH=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +CONFIG_USB_FUNCTIONFS_GENERIC=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_G_PRINTER=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_G_ACM_MS=m +CONFIG_USB_G_MULTI=m +CONFIG_USB_G_MULTI_RNDIS=y +CONFIG_USB_G_MULTI_CDC=y +CONFIG_USB_G_HID=m +CONFIG_USB_G_DBGP=m +# CONFIG_USB_G_DBGP_PRINTK is not set +CONFIG_USB_G_DBGP_SERIAL=y +CONFIG_USB_G_WEBCAM=m +# CONFIG_TYPEC is not set +# CONFIG_USB_ROLE_SWITCH is not set +# CONFIG_USB_LED_TRIG is not set +CONFIG_USB_ULPI_BUS=y +# CONFIG_UWB is not set +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_F_SDH30=y +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MMC_SDHCI_OMAP=y +CONFIG_MMC_SDHCI_AM654=y +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +CONFIG_LEDS_PWM=y +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +CONFIG_LEDS_TLC591XX=y +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +CONFIG_LEDS_SYSCON=y +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +CONFIG_LEDS_TRIGGER_DISK=y +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +CONFIG_LEDS_TRIGGER_CPU=y +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +CONFIG_LEDS_TRIGGER_PANIC=y +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_PALMAS is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV8803 is not set +CONFIG_RTC_DRV_S5M=y + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_CROS_EC=y + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_SNVS is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +# CONFIG_BCM_SBA_RAID is not set +# CONFIG_DW_AXI_DMAC is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_MV_XOR_V2=y +CONFIG_PL330_DMA=y +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +CONFIG_QCOM_HIDMA_MGMT=y +CONFIG_QCOM_HIDMA=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +CONFIG_TI_K3_UDMA=y +CONFIG_TI_K3_UDMA_GLUE_LAYER=y + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y +CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_R8822BE is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7606 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1210 is not set +# CONFIG_FB_SM750 is not set +# CONFIG_FB_XGI is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_ANDROID_VSOC is not set +CONFIG_ION=y +CONFIG_ION_SYSTEM_HEAP=y +CONFIG_ION_CARVEOUT_HEAP=y +CONFIG_ION_CHUNK_HEAP=y +# CONFIG_ION_CMA_HEAP is not set +CONFIG_ION_TI=y +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_MTD_SPINAND_MT29F is not set +# CONFIG_DGNC is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +# CONFIG_MOST is not set +# CONFIG_KS7010 is not set +# CONFIG_GREYBUS is not set +# CONFIG_PI433 is not set +# CONFIG_MTK_MMC is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_EROFS_FS is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +CONFIG_CROS_EC_CTL=m +CONFIG_CROS_EC_I2C=y +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_PROTO=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +# CONFIG_COMMON_CLK_VERSATILE is not set +# CONFIG_CLK_HSDK is not set +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_PALMAS is not set +CONFIG_COMMON_CLK_PWM=y +# CONFIG_COMMON_CLK_VC5 is not set +CONFIG_TI_SCI_CLK=y +CONFIG_TI_SYSCON_CLK=y +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_OMAP=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_ARM_TIMER_SP804 is not set +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +CONFIG_OMAP2PLUS_MBOX=y +CONFIG_OMAP_MBOX_KFIFO_SIZE=256 +# CONFIG_ALTERA_MBOX is not set +CONFIG_TI_MESSAGE_MANAGER=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_V3=y + +# +# Remoteproc drivers +# +CONFIG_REMOTEPROC=m +CONFIG_PRU_REMOTEPROC=m +CONFIG_TI_K3_R5_REMOTEPROC=m +CONFIG_TI_K3_DSP_REMOTEPROC=m + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +# CONFIG_RPMSG_CHAR is not set +CONFIG_RPMSG_QCOM_GLINK_NATIVE=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +CONFIG_RPMSG_VIRTIO=m +CONFIG_RPMSG_PRU=m + +# +# Rpmsg virtual device drivers +# +CONFIG_RPMSG_KDRV=y +CONFIG_RPMSG_KDRV_DISPLAY=y +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set + +# +# NXP/Freescale QorIQ SoC drivers +# + +# +# i.MX SoC drivers +# + +# +# Qualcomm SoC drivers +# +CONFIG_ARCH_K3_AM6_SOC=y +CONFIG_ARCH_K3_J721E_SOC=y +CONFIG_SOC_TI=y +CONFIG_TI_SCI_PM_DOMAINS=y +CONFIG_TI_PRUSS=m +CONFIG_TI_K3_RINGACC=y +# CONFIG_TI_K3_RINGACC_DEBUG is not set +CONFIG_TI_K3_UDMA_DESC_POOL=y + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +CONFIG_EXTCON_PALMAS=m +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=m +CONFIG_EXTCON_USBC_CROS_EC=y +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD799X is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_NAU7802 is not set +# CONFIG_PALMAS_GPADC is not set +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8688 is not set +CONFIG_TI_AM335X_ADC=m +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_VZ89X is not set +CONFIG_IIO_CROS_EC_SENSORS_CORE=m +CONFIG_IIO_CROS_EC_SENSORS=m + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Counters +# + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_LTC2632 is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_VF610_DAC is not set + +# +# IIO dummy driver +# + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +CONFIG_IIO_CROS_EC_LIGHT_PROX=m +# CONFIG_GP2AP020A00F is not set +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set + +# +# Inclinometer sensors +# + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_TPL0102 is not set + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +CONFIG_IIO_CROS_EC_BARO=m +# CONFIG_HP03 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S1200 is not set + +# +# Temperature sensors +# +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_TIECAP=y +CONFIG_PWM_TIEHRPWM=y + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_PARTITION_PERCPU=y +CONFIG_TI_SCI_INTR_IRQCHIP=y +CONFIG_TI_SCI_INTA_IRQCHIP=y +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_TI_SCI=y +CONFIG_RESET_TI_SYSCON=y +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_PHY_XGENE=y +# CONFIG_BCM_KONA_USB2_PHY is not set +CONFIG_PHY_CADENCE_DP=y +CONFIG_PHY_CADENCE_SIERRA=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set +CONFIG_PHY_AM654_SERDES=y +CONFIG_PHY_J721E_WIZ=y +CONFIG_OMAP_USB2=m +# CONFIG_PHY_TUSB1210 is not set +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +CONFIG_ARM_PMU=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +CONFIG_RAS=y + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +CONFIG_TEE=y + +# +# TEE drivers +# +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +CONFIG_MULTIPLEXER=y + +# +# Multiplexer drivers +# +# CONFIG_MUX_ADG792A is not set +# CONFIG_MUX_ADGS1408 is not set +# CONFIG_MUX_GPIO is not set +CONFIG_MUX_MMIO=y +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_CHILDREN=y +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +# CONFIG_UBIFS_FS_ENCRYPTION is not set +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +# CONFIG_SQUASHFS_XZ is not set +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_ACL=y +CONFIG_CIFS_DEBUG=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set +# CONFIG_CIFS_DFS_UPCALL is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=m +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECDH=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_MCRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_AEGIS128L is not set +# CONFIG_CRYPTO_AEGIS256 is not set +# CONFIG_CRYPTO_MORUS640 is not set +# CONFIG_CRYPTO_MORUS1280 is not set +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_POLY1305 is not set +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +CONFIG_CRYPTO_CHACHA20=m +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +CONFIG_CRYPTO_DEV_VIRTIO=m +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +CONFIG_CRYPTO_DEV_SA2UL=m +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +# CONFIG_INDIRECT_PIO is not set +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=m +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=m +CONFIG_ZSTD_DECOMPRESS=m +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_RADIX_TREE_MULTIORDER=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_DMA_DIRECT_OPS=y +CONFIG_SWIOTLB=y +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +# CONFIG_IRQ_POLL is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_SPLIT=y +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set + +# +# Compile-time checks and compiler options +# +# CONFIG_DEBUG_INFO is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +# CONFIG_KASAN is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +# CONFIG_SOFTLOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +CONFIG_SCHEDSTATS=y +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_DEBUG_PREEMPT is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DMA_API_DEBUG is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_BITFIELD is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +CONFIG_MEMTEST=y +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +CONFIG_SAMPLES=y +# CONFIG_SAMPLE_KOBJECT is not set +# CONFIG_SAMPLE_HW_BREAKPOINT is not set +# CONFIG_SAMPLE_KFIFO is not set +CONFIG_SAMPLE_RPMSG_CLIENT=m +# CONFIG_SAMPLE_CONFIGFS is not set +# CONFIG_SAMPLE_SECCOMP is not set +# CONFIG_SAMPLE_VFIO_MDEV_MDPY_FB is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set diff --git a/recipes-kernel/linux/files/iot2050_defconfig_base-rt b/recipes-kernel/linux/files/iot2050_defconfig_base-rt new file mode 100644 index 000000000..1081ccbd3 --- /dev/null +++ b/recipes-kernel/linux/files/iot2050_defconfig_base-rt @@ -0,0 +1,6349 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 4.19.59 Kernel Configuration +# + +# +# Compiler: aarch64-linux-gnu-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0 +# +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=80300 +CONFIG_CLANG_VERSION=0 +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +# CONFIG_AUDIT is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y +CONFIG_PREEMPT_RT_BASE=y +CONFIG_HAVE_PREEMPT_LAZY=y +CONFIG_PREEMPT_LAZY=y +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT__LL is not set +# CONFIG_PREEMPT_RTB is not set +CONFIG_PREEMPT_RT_FULL=y +CONFIG_PREEMPT_COUNT=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_BOOST=y +CONFIG_RCU_BOOST_DELAY=500 +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_SWAP_ENABLED=y +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_SOCK_CGROUP_DATA=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SYSTEM_DATA_VERIFICATION=y +# CONFIG_PROFILING is not set +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA32=y +CONFIG_HAVE_GENERIC_GUP=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +CONFIG_ARCH_K3=y +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# + +# +# Cadence PCIe controllers support +# +CONFIG_PCIE_CADENCE=y +CONFIG_PCIE_CADENCE_HOST=y +CONFIG_PCIE_CADENCE_EP=y +CONFIG_PCI_J721E=y +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +# CONFIG_PCI_XGENE is not set +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_HOST_THUNDER_ECAM=y + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_DW_EP=y +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCIE_DW_PLAT_EP is not set +CONFIG_PCI_KEYSTONE=y +CONFIG_PCI_KEYSTONE_HOST=y +CONFIG_PCI_KEYSTONE_EP=y +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set + +# +# PCI Endpoint +# +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y +CONFIG_PCI_EPF_TEST=y + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1463225=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +# CONFIG_CAVIUM_ERRATUM_30115 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set +# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +# CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=64 +CONFIG_HOTPLUG_CPU=y +# CONFIG_NUMA is not set +CONFIG_HOLES_IN_ZONE=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_SECCOMP=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDEN_EL2_VECTORS=y +CONFIG_ARM64_SSBD=y +# CONFIG_ARMV8_DEPRECATED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y + +# +# ARMv8.2 architectural features +# +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_RANDOMIZE_BASE is not set + +# +# Boot options +# +CONFIG_CMDLINE="" +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_EFI is not set +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y + +# +# Power management options +# +# CONFIG_SUSPEND is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# CPU Power Management +# + +# +# CPU Idle +# +# CONFIG_CPU_IDLE is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Firmware Drivers +# +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_SCMI_PROTOCOL is not set +# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# Tegra firmware driver +# +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set +CONFIG_ARM64_CRYPTO=y +# CONFIG_CRYPTO_SHA256_ARM64 is not set +# CONFIG_CRYPTO_SHA512_ARM64 is not set +CONFIG_CRYPTO_CRC32_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=m + +# +# General architecture-dependent options +# +# CONFIG_KPROBES is not set +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_CC_HAS_STACKPROTECTOR_NONE=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_REFCOUNT_FULL=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_PLUGIN_HOSTCC="" +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_CFQ_GROUP_IOSCHED is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +CONFIG_ASN1=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +# CONFIG_HWPOISON_INJECT is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=m +CONFIG_XFRM_USER=m +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_ROUTE_CLASSID=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +# CONFIG_INET_ESP_OFFLOAD is not set +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=m +# CONFIG_INET6_ESP is not set +CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_FAMILY_ARP=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=m +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +CONFIG_NF_CONNTRACK_TFTP=m +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_PROTO_DCCP=y +CONFIG_NF_NAT_PROTO_UDPLITE=y +CONFIG_NF_NAT_PROTO_SCTP=y +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_TFTP=m +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=m +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_POLICY=m +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +CONFIG_NETFILTER_XT_MATCH_SCTP=m +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +CONFIG_IP_VS=m +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +# CONFIG_IP_VS_PROTO_TCP is not set +# CONFIG_IP_VS_PROTO_UDP is not set +# CONFIG_IP_VS_PROTO_ESP is not set +# CONFIG_IP_VS_PROTO_AH is not set +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +# CONFIG_IP_VS_WRR is not set +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_FO is not set +# CONFIG_IP_VS_OVF is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_MH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +# CONFIG_IP_VS_NFCT is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=y +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_NF_NAT_IPV6=m +CONFIG_NF_NAT_MASQUERADE_IPV6=y +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +# CONFIG_IP6_NF_TARGET_NPT is not set +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_OBJCNT is not set +CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1 is not set +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set +CONFIG_SCTP_COOKIE_HMAC_MD5=y +# CONFIG_SCTP_COOKIE_HMAC_SHA1 is not set +CONFIG_INET_SCTP_DIAG=m +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFB=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +# CONFIG_NET_SCH_CBS is not set +# CONFIG_NET_SCH_ETF is not set +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_MQPRIO=m +# CONFIG_NET_SCH_SKBPRIO is not set +CONFIG_NET_SCH_CHOKE=m +CONFIG_NET_SCH_QFQ=m +CONFIG_NET_SCH_CODEL=m +CONFIG_NET_SCH_FQ_CODEL=m +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +CONFIG_NET_SCH_INGRESS=m +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +# CONFIG_CLS_U32_PERF is not set +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_CLS_CGROUP=m +# CONFIG_NET_CLS_BPF is not set +# CONFIG_NET_CLS_FLOWER is not set +# CONFIG_NET_CLS_MATCHALL is not set +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_TEXT=m +# CONFIG_NET_EMATCH_CANID is not set +# CONFIG_NET_EMATCH_IPT is not set +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=m +# CONFIG_NET_ACT_SAMPLE is not set +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_ACT_CSUM=m +# CONFIG_NET_ACT_VLAN is not set +# CONFIG_NET_ACT_BPF is not set +# CONFIG_NET_ACT_SKBMOD is not set +# CONFIG_NET_ACT_IFE is not set +# CONFIG_NET_ACT_TUNNEL_KEY is not set +CONFIG_NET_CLS_IND=y +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +CONFIG_HSR_PRP=y +# CONFIG_NET_SWITCHDEV is not set +CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_XILINXCAN is not set +CONFIG_CAN_C_CAN=m +CONFIG_CAN_C_CAN_PLATFORM=m +# CONFIG_CAN_C_CAN_PCI is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +CONFIG_CAN_M_CAN=m +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_BT=m +CONFIG_BT_BREDR=y +# CONFIG_BT_RFCOMM is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=m +# CONFIG_BT_HS is not set +# CONFIG_BT_LE is not set +CONFIG_BT_LEDS=y +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_DEBUGFS is not set + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_RTL=m +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_SERDEV=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_NOKIA is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +CONFIG_BT_HCIUART_LL=y +# CONFIG_BT_HCIUART_3WIRE is not set +# CONFIG_BT_HCIUART_INTEL is not set +CONFIG_BT_HCIUART_BCM=y +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKUART is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_CFG80211=m +CONFIG_NL80211_TESTMODE=y +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +# CONFIG_MAC80211_RC_MINSTREL_VHT is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +CONFIG_RPMSG_PROTO=m +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +# CONFIG_NET_DEVLINK is not set +CONFIG_MAY_USE_DEVLINK=y +CONFIG_FAILOVER=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=24 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +CONFIG_GENERIC_ARCH_TOPOLOGY=y + +# +# Bus devices +# +# CONFIG_BRCMSTB_GISB_ARB is not set +CONFIG_SIMPLE_PM_BUS=y +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=y +CONFIG_MTD_TESTS=m +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# Partition parsers +# + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PHYSMAP_OF is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_GPIO_ADDR is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_LATCH_ADDR is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_ECC_BCH is not set +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set +CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_DOCG4 is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_MT81xx_NOR is not set +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_SPI_CADENCE_QUADSPI=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_BLOCK is not set +CONFIG_MTD_HYPERBUS=y +CONFIG_HBMC_AM654=y +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_VIRTIO_BLK_SCSI is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=m +CONFIG_BLK_DEV_NVME=m +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TARGET is not set + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +CONFIG_PCI_ENDPOINT_TEST=m +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC & related support +# + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# VOP Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# + +# +# VOP Driver +# +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_MQ_DEFAULT=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=m +CONFIG_SCSI_SAS_LIBSAS=m +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +CONFIG_SCSI_HISI_SAS=m +CONFIG_SCSI_HISI_SAS_PCI=m +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +CONFIG_SCSI_UFS_CDNS_PLATFORM=y +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +CONFIG_SCSI_UFS_BSG=y +CONFIG_SCSI_UFS_TI_J721E=y +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=m +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=m +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=m +CONFIG_AHCI_CEVA=m +CONFIG_AHCI_XGENE=m +CONFIG_AHCI_QORIQ=m +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +CONFIG_SATA_SIL24=m +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_PLATFORM=m +CONFIG_PATA_OF_PLATFORM=m +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=m +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_IFB is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +CONFIG_IPVLAN=m +# CONFIG_IPVTAP is not set +CONFIG_VXLAN=m +# CONFIG_GENEVE is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +CONFIG_TIGON3=m +CONFIG_TIGON3_HWMON=y +# CONFIG_BNX2X is not set +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +# CONFIG_NET_VENDOR_BROCADE is not set +CONFIG_NET_VENDOR_CADENCE=y +CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +# CONFIG_MACB_PCI is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HP is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_HINIC is not set +# CONFIG_NET_VENDOR_I825XX is not set +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +CONFIG_E1000=m +CONFIG_E1000E=m +# CONFIG_IGB is not set +CONFIG_IGBVF=y +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set +CONFIG_SKGE=m +# CONFIG_SKGE_DEBUG is not set +# CONFIG_SKGE_GENESIS is not set +CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set +CONFIG_SMSC911X=y +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +CONFIG_TI_DAVINCI_MDIO=y +CONFIG_TI_CPSW_PHY_SEL=y +CONFIG_TI_CPSW_ALE=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_TI_AM65_CPTS=y +# CONFIG_TLAN is not set +CONFIG_TI_PRUETH=m +CONFIG_TI_ICSSG_PRUETH=m +# CONFIG_TI_PTP_BC is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MMIOREG=y +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_THUNDER is not set +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +CONFIG_AT803X_PHY=m +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +CONFIG_DP83848_PHY=y +CONFIG_DP83867_PHY=y +CONFIG_FIXED_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_LXT_PHY is not set +CONFIG_MARVELL_PHY=y +CONFIG_MARVELL_10G_PHY=m +CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=m +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# Host-side USB support is needed for USB Network Adapter support +# +CONFIG_USB_NET_DRIVERS=m +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_ATH10K_DEBUGFS is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +CONFIG_B43=m +CONFIG_B43_BCMA=y +CONFIG_B43_SSB=y +CONFIG_B43_BUSES_BCMA_AND_SSB=y +# CONFIG_B43_BUSES_BCMA is not set +# CONFIG_B43_BUSES_SSB is not set +CONFIG_B43_PCI_AUTOSELECT=y +CONFIG_B43_PCICORE_AUTOSELECT=y +# CONFIG_B43_SDIO is not set +CONFIG_B43_BCMA_PIO=y +CONFIG_B43_PIO=y +CONFIG_B43_PHY_G=y +CONFIG_B43_PHY_N=y +CONFIG_B43_PHY_LP=y +CONFIG_B43_PHY_HT=y +CONFIG_B43_LEDS=y +CONFIG_B43_HWRNG=y +# CONFIG_B43_DEBUG is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +CONFIG_IWLWIFI=m +CONFIG_IWLWIFI_LEDS=y +CONFIG_IWLDVM=m +CONFIG_IWLMVM=m +CONFIG_IWLWIFI_OPMODE_MODULAR=y +# CONFIG_IWLWIFI_BCAST_FILTERING is not set +# CONFIG_IWLWIFI_PCIE_RTPM is not set + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_MWIFIEX=m +# CONFIG_MWIFIEX_SDIO is not set +CONFIG_MWIFIEX_PCIE=m +# CONFIG_MWIFIEX_USB is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PEARL_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_NETDEVSIM is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=m +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +CONFIG_KEYBOARD_MATRIX=m +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +CONFIG_TOUCHSCREEN_GOODIX=m +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +CONFIG_TOUCHSCREEN_EDT_FT5X06=m +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +CONFIG_TOUCHSCREEN_TI_AM335X_TSC=m +CONFIG_TOUCHSCREEN_PIXCIR=m +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +CONFIG_INPUT_GPIO_DECODER=m +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PALMAS_PWRBUTTON is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_LDISC_AUTOLOAD=y +CONFIG_DEVMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=10 +CONFIG_SERIAL_8250_RUNTIME_UARTS=10 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_FSL=y +# CONFIG_SERIAL_8250_DW is not set +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_8250_OMAP=y +CONFIG_SERIAL_8250_OMAP_TTYO_FIXUP=y +# CONFIG_SERIAL_8250_MOXA is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_TTY_PRINTK is not set +CONFIG_HVC_DRIVER=y +# CONFIG_HVC_DCC is not set +CONFIG_VIRTIO_CONSOLE=y +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_OMAP=m +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_CAVIUM=m +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_RAW_DRIVER is not set +CONFIG_TCG_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_CROS_EC_TUNNEL=y +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_OMAP24XX=y +CONFIG_SPI_PL022=y +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_PALMAS is not set +# CONFIG_PINCTRL_RK805 is not set +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +CONFIG_GPIO_DAVINCI=y +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +CONFIG_GPIO_MB86S7X=y +# CONFIG_GPIO_MOCKUP is not set +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GPIO_PCF857X=y +CONFIG_GPIO_TPIC2810=m + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_BD9571MWV is not set +CONFIG_GPIO_MAX77620=y +# CONFIG_GPIO_PALMAS is not set + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +CONFIG_GPIO_PISOSR=m +# CONFIG_GPIO_XRA1403 is not set + +# +# USB GPIO expanders +# +CONFIG_W1=m + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2405 is not set +# CONFIG_W1_SLAVE_DS2408 is not set +# CONFIG_W1_SLAVE_DS2413 is not set +# CONFIG_W1_SLAVE_DS2406 is not set +# CONFIG_W1_SLAVE_DS2423 is not set +# CONFIG_W1_SLAVE_DS2805 is not set +# CONFIG_W1_SLAVE_DS2431 is not set +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2438 is not set +# CONFIG_W1_SLAVE_DS2780 is not set +# CONFIG_W1_SLAVE_DS2781 is not set +# CONFIG_W1_SLAVE_DS28E04 is not set +# CONFIG_W1_SLAVE_DS28E17 is not set +CONFIG_POWER_AVS=y +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_LEGO_EV3 is not set +CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +CONFIG_BATTERY_BQ27XXX_HDQ=m +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1721X is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LTC3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_CROS_USBPD is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=m +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +# CONFIG_CLOCK_THERMAL is not set +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_THERMAL_EMULATION=y +CONFIG_K3_THERMAL=y +# CONFIG_MAX77620_THERMAL is not set +# CONFIG_QORIQ_THERMAL is not set + +# +# ACPI INT340X thermal drivers +# +# CONFIG_QCOM_SPMI_TEMP_ALARM is not set +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +CONFIG_ARM_SP805_WATCHDOG=y +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +CONFIG_KEYSTONE_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB=m +CONFIG_SSB_SPROM=y +CONFIG_SSB_BLOCKIO=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_B43_PCI_BRIDGE=y +CONFIG_SSB_SDIOHOST_POSSIBLE=y +# CONFIG_SSB_SDIOHOST is not set +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y +# CONFIG_SSB_DRIVER_GPIO is not set +CONFIG_BCMA_POSSIBLE=y +CONFIG_BCMA=m +CONFIG_BCMA_BLOCKIO=y +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +CONFIG_BCMA_HOST_PCI=y +# CONFIG_BCMA_HOST_SOC is not set +CONFIG_BCMA_DRIVER_PCI=y +# CONFIG_BCMA_DRIVER_GMAC_CMN is not set +# CONFIG_BCMA_DRIVER_GPIO is not set +# CONFIG_BCMA_DEBUG is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=y +# CONFIG_MFD_AXP20X_I2C is not set +CONFIG_MFD_CROS_EC=y +CONFIG_MFD_CROS_EC_CHARDEV=m +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +CONFIG_MFD_HI6421_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +CONFIG_MFD_TI_AM335X_TSCADC=m +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +CONFIG_MFD_PALMAS=y +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_RAVE_SP_CORE is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_BD9571MWV=y +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_HI6421 is not set +CONFIG_REGULATOR_HI6421V530=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77620=y +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MT6311 is not set +CONFIG_REGULATOR_PALMAS=y +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_VCTRL=m +CONFIG_RC_CORE=m +CONFIG_RC_MAP=m +# CONFIG_LIRC is not set +CONFIG_RC_DECODERS=y +# CONFIG_IR_NEC_DECODER is not set +# CONFIG_IR_RC5_DECODER is not set +# CONFIG_IR_RC6_DECODER is not set +# CONFIG_IR_JVC_DECODER is not set +# CONFIG_IR_SONY_DECODER is not set +# CONFIG_IR_SANYO_DECODER is not set +# CONFIG_IR_SHARP_DECODER is not set +# CONFIG_IR_MCE_KBD_DECODER is not set +# CONFIG_IR_XMP_DECODER is not set +# CONFIG_IR_IMON_DECODER is not set +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_IMON_RAW is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_CONTROLLER=y +# CONFIG_MEDIA_CONTROLLER_DVB is not set +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_PCI_SKELETON is not set +CONFIG_V4L2_MEM2MEM_DEV=m +CONFIG_V4L2_FWNODE=m +CONFIG_DVB_CORE=y +# CONFIG_DVB_MMAP is not set +# CONFIG_DVB_NET is not set +CONFIG_DVB_MAX_ADAPTERS=16 +# CONFIG_DVB_DYNAMIC_MINORS is not set +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB is not set +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_SOC_CAMERA is not set +# CONFIG_VIDEO_XILINX is not set +CONFIG_VIDEO_TI_CAL=m +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_VIDEO_SH_VEU is not set +CONFIG_VIDEO_IMG_VXD_DEC=m +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_CYPRESS_FIRMWARE is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_DMA_CONTIG=m +CONFIG_VIDEOBUF2_VMALLOC=m +CONFIG_VIDEOBUF2_DMA_SG=m + +# +# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +CONFIG_MEDIA_ATTACH=y +CONFIG_VIDEO_IR_I2C=m + +# +# I2C Encoders, decoders, sensors and other helper chips +# + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA1997X is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_UDA1342 is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_SONY_BTF_MPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9903 is not set +# CONFIG_VIDEO_TW9906 is not set +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AD9389B is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_THS8200 is not set + +# +# Camera sensor devices +# +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_OV2640 is not set +CONFIG_VIDEO_OV2659=m +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +CONFIG_VIDEO_OV5640=m +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set +# CONFIG_VIDEO_OV7640 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +CONFIG_VIDEO_OV1063X=m +CONFIG_VIDEO_OV490=m +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +CONFIG_VIDEO_MT9T11X=m +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set + +# +# SDR tuner chips +# + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_I2C is not set + +# +# Sensors used on soc_camera driver +# + +# +# SPI helper chips +# +# CONFIG_VIDEO_GS1662 is not set + +# +# Media SPI Adapters +# +CONFIG_CXD2880_SPI_DRV=m +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6110x=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m +CONFIG_DVB_M88DS3103=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_AF9013=m +CONFIG_DVB_EC100=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_RTL2830=m +CONFIG_DVB_RTL2832=m +CONFIG_DVB_SI2168=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_CXD2880=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT3306A=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m +CONFIG_DVB_MN88443X=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_DRX39XYJ=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_CXD2099=m +CONFIG_DVB_SP2=m + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_VM=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +CONFIG_DRM_I2C_NXP_TDA998X=y +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set + +# +# ACP (Audio CoProcessor) Configuration +# + +# +# AMD Library routines +# +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_LVDS is not set +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS=y +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_CDNS_DSI is not set +CONFIG_DRM_CDNS_MHDP=m +CONFIG_DRM_CDNS_MHDP_J721E=y +# CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LVDS_ENCODER is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_SIL_SII8620 is not set +CONFIG_DRM_SII902X=y +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +CONFIG_DRM_TOSHIBA_TC358767=y +CONFIG_DRM_TOSHIBA_TC358768=y +CONFIG_DRM_TI_TFP410=y +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_TINYDRM is not set +# CONFIG_DRM_PL111 is not set +CONFIG_DRM_TIDSS=y +CONFIG_DRM_TIDSS_DSS6=y +CONFIG_DRM_TIDSS_DSS7=y +CONFIG_DRM_LEGACY=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_BACKLIGHT=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_SIMPLE is not set +CONFIG_FB_SSD1307=y +# CONFIG_FB_SM712 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +CONFIG_BACKLIGHT_LP855X=m +CONFIG_BACKLIGHT_GPIO=y +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +CONFIG_BACKLIGHT_LED=y +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDA_PREALLOC_SIZE=64 +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set + +# +# STMicroelectronics STM32 SOC audio support +# + +# +# Audio support for Texas Instruments SoCs +# +CONFIG_SND_SOC_TI_UDMA_PCM=y + +# +# Texas Instruments DAI support for: +# +CONFIG_SND_SOC_DAVINCI_MCASP=y + +# +# Audio support for boards with Texas Instruments SoCs +# +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +CONFIG_SND_SOC_PCM3168A=m +CONFIG_SND_SOC_PCM3168A_I2C=m +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +CONFIG_SND_SOC_TLV320AIC31XX=m +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +CONFIG_SND_SOC_TLV320AIC3X=m +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +CONFIG_SND_SIMPLE_CARD_UTILS=m +CONFIG_SND_SIMPLE_CARD=m +CONFIG_SND_SIMPLE_SCU_CARD=m +CONFIG_SND_AUDIO_GRAPH_CARD=m +CONFIG_SND_AUDIO_GRAPH_SCU_CARD=m + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOOGLE_HAMMER is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +CONFIG_HID_MULTITOUCH=m +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set + +# +# I2C HID support +# +CONFIG_I2C_HID=m +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=m +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=m +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=m +CONFIG_USB_XHCI_PLATFORM=m +CONFIG_USB_EHCI_HCD=m +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=m +CONFIG_USB_EHCI_HCD_PLATFORM=m +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_HCD_PCI=m +# CONFIG_USB_OHCI_HCD_SSB is not set +CONFIG_USB_OHCI_HCD_PLATFORM=m +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_BCMA is not set +# CONFIG_USB_HCD_SSB is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +CONFIG_USB_CDNS3=m +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_USB_CDNS3_TI=m +CONFIG_USB_MUSB_HDRC=m +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_DWC3=m +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_HAPS=m +CONFIG_USB_DWC3_KEYSTONE=m +CONFIG_USB_DWC3_OF_SIMPLE=m +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +CONFIG_USB_ISP1760=m +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_SIMPLE is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +CONFIG_USB_SERIAL_CP210X=m +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_F8153X is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MXUPORT is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=m +CONFIG_USB_SERIAL_OPTION=m +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_UPD78F0730 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +CONFIG_USB_TEST=m +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=m +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=m +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=32 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_F_ACM=m +CONFIG_USB_F_SS_LB=m +CONFIG_USB_U_SERIAL=m +CONFIG_USB_U_ETHER=m +CONFIG_USB_U_AUDIO=m +CONFIG_USB_F_SERIAL=m +CONFIG_USB_F_OBEX=m +CONFIG_USB_F_NCM=m +CONFIG_USB_F_ECM=m +CONFIG_USB_F_EEM=m +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_F_MASS_STORAGE=m +CONFIG_USB_F_FS=m +CONFIG_USB_F_UAC1=m +CONFIG_USB_F_UAC2=m +CONFIG_USB_F_UVC=m +CONFIG_USB_F_MIDI=m +CONFIG_USB_F_HID=m +CONFIG_USB_F_PRINTER=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_UAC1=y +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_CONFIGFS_F_UVC=y +CONFIG_USB_CONFIGFS_F_PRINTER=y +CONFIG_USB_ZERO=m +# CONFIG_USB_ZERO_HNPTEST is not set +CONFIG_USB_AUDIO=m +# CONFIG_GADGET_UAC1 is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_FUNCTIONFS_ETH=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +CONFIG_USB_FUNCTIONFS_GENERIC=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_G_PRINTER=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_G_ACM_MS=m +CONFIG_USB_G_MULTI=m +CONFIG_USB_G_MULTI_RNDIS=y +CONFIG_USB_G_MULTI_CDC=y +CONFIG_USB_G_HID=m +CONFIG_USB_G_DBGP=m +# CONFIG_USB_G_DBGP_PRINTK is not set +CONFIG_USB_G_DBGP_SERIAL=y +CONFIG_USB_G_WEBCAM=m +# CONFIG_TYPEC is not set +# CONFIG_USB_ROLE_SWITCH is not set +# CONFIG_USB_LED_TRIG is not set +CONFIG_USB_ULPI_BUS=y +# CONFIG_UWB is not set +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_F_SDH30=y +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MMC_SDHCI_OMAP=y +CONFIG_MMC_SDHCI_AM654=y +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +CONFIG_LEDS_PWM=y +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +CONFIG_LEDS_TLC591XX=y +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +CONFIG_LEDS_SYSCON=y +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +CONFIG_LEDS_TRIGGER_DISK=y +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +CONFIG_LEDS_TRIGGER_PANIC=y +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_PALMAS is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV8803 is not set +CONFIG_RTC_DRV_S5M=y + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_CROS_EC=y + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_SNVS is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +# CONFIG_BCM_SBA_RAID is not set +# CONFIG_DW_AXI_DMAC is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_MV_XOR_V2=y +CONFIG_PL330_DMA=y +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +CONFIG_QCOM_HIDMA_MGMT=y +CONFIG_QCOM_HIDMA=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +CONFIG_TI_K3_UDMA=y +CONFIG_TI_K3_UDMA_GLUE_LAYER=y + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y +CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set + +# +# Microsoft Hyper-V guest support +# +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_R8822BE is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7606 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1210 is not set +# CONFIG_FB_SM750 is not set +# CONFIG_FB_XGI is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ASHMEM is not set +# CONFIG_ANDROID_VSOC is not set +CONFIG_ION=y +CONFIG_ION_SYSTEM_HEAP=y +CONFIG_ION_CARVEOUT_HEAP=y +CONFIG_ION_CHUNK_HEAP=y +# CONFIG_ION_CMA_HEAP is not set +CONFIG_ION_TI=y +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_MTD_SPINAND_MT29F is not set +# CONFIG_DGNC is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +# CONFIG_MOST is not set +# CONFIG_KS7010 is not set +# CONFIG_GREYBUS is not set +# CONFIG_PI433 is not set +# CONFIG_MTK_MMC is not set + +# +# Gasket devices +# +# CONFIG_STAGING_GASKET_FRAMEWORK is not set +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_EROFS_FS is not set +# CONFIG_GOLDFISH is not set +CONFIG_CHROME_PLATFORMS=y +CONFIG_CROS_EC_CTL=m +CONFIG_CROS_EC_I2C=y +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_PROTO=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +# CONFIG_COMMON_CLK_VERSATILE is not set +# CONFIG_CLK_HSDK is not set +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_PALMAS is not set +CONFIG_COMMON_CLK_PWM=y +# CONFIG_COMMON_CLK_VC5 is not set +CONFIG_TI_SCI_CLK=y +CONFIG_TI_SYSCON_CLK=y +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_OMAP=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_ARM_TIMER_SP804 is not set +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +CONFIG_OMAP2PLUS_MBOX=y +CONFIG_OMAP_MBOX_KFIFO_SIZE=256 +# CONFIG_ALTERA_MBOX is not set +CONFIG_TI_MESSAGE_MANAGER=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_V3=y + +# +# Remoteproc drivers +# +CONFIG_REMOTEPROC=m +CONFIG_PRU_REMOTEPROC=m +CONFIG_TI_K3_R5_REMOTEPROC=m +CONFIG_TI_K3_DSP_REMOTEPROC=m + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +# CONFIG_RPMSG_CHAR is not set +CONFIG_RPMSG_QCOM_GLINK_NATIVE=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +CONFIG_RPMSG_VIRTIO=m +CONFIG_RPMSG_PRU=m + +# +# Rpmsg virtual device drivers +# +CONFIG_RPMSG_KDRV=y +CONFIG_RPMSG_KDRV_DISPLAY=y +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set + +# +# NXP/Freescale QorIQ SoC drivers +# + +# +# i.MX SoC drivers +# + +# +# Qualcomm SoC drivers +# +CONFIG_ARCH_K3_AM6_SOC=y +CONFIG_ARCH_K3_J721E_SOC=y +CONFIG_SOC_TI=y +CONFIG_TI_SCI_PM_DOMAINS=y +CONFIG_TI_PRUSS=m +CONFIG_TI_K3_RINGACC=y +# CONFIG_TI_K3_RINGACC_DEBUG is not set +CONFIG_TI_K3_UDMA_DESC_POOL=y + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +CONFIG_EXTCON_PALMAS=m +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=m +CONFIG_EXTCON_USBC_CROS_EC=y +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD799X is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_NAU7802 is not set +# CONFIG_PALMAS_GPADC is not set +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8688 is not set +CONFIG_TI_AM335X_ADC=m +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_VZ89X is not set +CONFIG_IIO_CROS_EC_SENSORS_CORE=m +CONFIG_IIO_CROS_EC_SENSORS=m + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Counters +# + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_LTC2632 is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_VF610_DAC is not set + +# +# IIO dummy driver +# + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +CONFIG_IIO_CROS_EC_LIGHT_PROX=m +# CONFIG_GP2AP020A00F is not set +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set + +# +# Inclinometer sensors +# + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_TPL0102 is not set + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +CONFIG_IIO_CROS_EC_BARO=m +# CONFIG_HP03 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S1200 is not set + +# +# Temperature sensors +# +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_PCA9685 is not set +CONFIG_PWM_TIECAP=y +CONFIG_PWM_TIEHRPWM=y + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_PARTITION_PERCPU=y +CONFIG_TI_SCI_INTR_IRQCHIP=y +CONFIG_TI_SCI_INTA_IRQCHIP=y +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_TI_SCI=y +CONFIG_RESET_TI_SYSCON=y +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_PHY_XGENE=y +# CONFIG_BCM_KONA_USB2_PHY is not set +CONFIG_PHY_CADENCE_DP=y +CONFIG_PHY_CADENCE_SIERRA=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set +CONFIG_PHY_AM654_SERDES=y +CONFIG_PHY_J721E_WIZ=y +CONFIG_OMAP_USB2=m +# CONFIG_PHY_TUSB1210 is not set +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +CONFIG_ARM_PMU=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +CONFIG_RAS=y + +# +# Android +# +CONFIG_ANDROID=y +# CONFIG_ANDROID_BINDER_IPC is not set +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +CONFIG_TEE=y + +# +# TEE drivers +# +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +CONFIG_MULTIPLEXER=y + +# +# Multiplexer drivers +# +# CONFIG_MUX_ADG792A is not set +# CONFIG_MUX_ADGS1408 is not set +# CONFIG_MUX_GPIO is not set +CONFIG_MUX_MMIO=y +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_CHILDREN=y +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_ATIME_SUPPORT is not set +CONFIG_UBIFS_FS_XATTR=y +# CONFIG_UBIFS_FS_ENCRYPTION is not set +CONFIG_UBIFS_FS_SECURITY=y +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +# CONFIG_SQUASHFS_XZ is not set +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_ACL=y +CONFIG_CIFS_DEBUG=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set +# CONFIG_CIFS_DFS_UPCALL is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=m +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECDH=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_MCRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_ENGINE=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_AEGIS128L is not set +# CONFIG_CRYPTO_AEGIS256 is not set +# CONFIG_CRYPTO_MORUS640 is not set +# CONFIG_CRYPTO_MORUS1280 is not set +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_POLY1305 is not set +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_SM3 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +CONFIG_CRYPTO_DEV_VIRTIO=m +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +CONFIG_CRYPTO_DEV_SA2UL=m +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +# CONFIG_INDIRECT_PIO is not set +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=m +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=m +CONFIG_ZSTD_DECOMPRESS=m +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_DMA_DIRECT_OPS=y +CONFIG_SWIOTLB=y +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +# CONFIG_IRQ_POLL is not set +CONFIG_MPILIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_SPLIT=y +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set + +# +# Compile-time checks and compiler options +# +# CONFIG_DEBUG_INFO is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +# CONFIG_KASAN is not set +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +# CONFIG_SOFTLOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_INFO=y +CONFIG_SCHEDSTATS=y +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_DEBUG_PREEMPT is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DMA_API_DEBUG is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_BITFIELD is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +CONFIG_MEMTEST=y +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +CONFIG_SAMPLES=y +# CONFIG_SAMPLE_KOBJECT is not set +# CONFIG_SAMPLE_HW_BREAKPOINT is not set +# CONFIG_SAMPLE_KFIFO is not set +CONFIG_SAMPLE_RPMSG_CLIENT=m +# CONFIG_SAMPLE_CONFIGFS is not set +# CONFIG_SAMPLE_SECCOMP is not set +# CONFIG_SAMPLE_VFIO_MDEV_MDPY_FB is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set diff --git a/recipes-kernel/linux/files/iot2050_defconfig_extra.cfg b/recipes-kernel/linux/files/iot2050_defconfig_extra.cfg new file mode 100644 index 000000000..d49f014da --- /dev/null +++ b/recipes-kernel/linux/files/iot2050_defconfig_extra.cfg @@ -0,0 +1,106 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_RELAY=y +CONFIG_BT_INTEL=y +CONFIG_BT_BCM=y +CONFIG_BT_RTL=y +CONFIG_BT_QCA=y +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_NOKIA=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_BT_HCIUART_INTEL=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIUART_AG6XX=y +CONFIG_BT_HCIUART_MRVL=y +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_MRVL=m +CONFIG_BT_ATH3K=m +CONFIG_BT_WILINK=m +CONFIG_CDROM_PKTCDVD=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_PPP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_FILTER=y +CONFIG_ATH_COMMON=m +CONFIG_ATH9K=m +CONFIG_ATH9K_PCI=y +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +# CONFIG_ATH9K_COMMON_DEBUG is not set +# CONFIG_ATH9K_DFS_DEBUGFS is not set +# CONFIG_ATH9K_DEBUGFS is not set +# CONFIG_IWLWIFI_DEBUGFS is not set +CONFIG_SPI_SPIDEV=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_TPS62360=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_RTC_DRV_PCF8563=y +CONFIG_OMAP_USB2=y +CONFIG_ISO9660_FS=y +CONFIG_UDF_FS=y +CONFIG_PWM_TIEHRPWM=y +# CONFIG_PWM_TIECAP is not set +CONFIG_BONDING=m +CONFIG_NET_TEAM=m +CONFIG_NET_TEAM_MODE_BROADCAST=m +CONFIG_NET_TEAM_MODE_ROUNDROBIN=m +CONFIG_NET_TEAM_MODE_RANDOM=m +CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m +CONFIG_NET_TEAM_MODE_LOADBALANCE=m +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y + +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_KEYSTONE=y + +CONFIG_ATH9K_HTC=m +CONFIG_CARL9170=m +CONFIG_ATH6KL=m +CONFIG_ATH6KL_USB=m +CONFIG_AR5523=m +CONFIG_ATH10K=m +CONFIG_ATH10K_USB=m +CONFIG_AT76C50X_USB=m +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_USB=y +CONFIG_HERMES=m +CONFIG_ORINOCO_USB=m +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBERTAS_THINFIRM=m +CONFIG_LIBERTAS_THINFIRM_USB=m +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_USB=m +CONFIG_MT7601U=m +CONFIG_RT2X00=m +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RTL8187=m +CONFIG_RTL8192CU=m +CONFIG_RTL8XXXU=m +CONFIG_USB_ZD1201=m +CONFIG_ZD1211RW=m +CONFIG_USB_NET_RNDIS_WLAN=m diff --git a/recipes-kernel/linux/files/rt-0001-rt-patch-for-IOT2050-kernel.patch b/recipes-kernel/linux/files/rt-0001-rt-patch-for-IOT2050-kernel.patch new file mode 100644 index 000000000..f5d953ab4 --- /dev/null +++ b/recipes-kernel/linux/files/rt-0001-rt-patch-for-IOT2050-kernel.patch @@ -0,0 +1,25698 @@ +From ed03d4ec010d35c9ae5078f0f9de3be8327858b1 Mon Sep 17 00:00:00 2001 +From: Su Bao Cheng +Date: Wed, 13 Nov 2019 14:08:04 +0800 +Subject: [PATCH] rt patch for IOT2050 kernel + +kernel-4.19.59-rt24 + +Signed-off-by: Su Bao Cheng +--- + arch/Kconfig | 1 + + arch/alpha/include/asm/spinlock_types.h | 4 - + arch/arm/Kconfig | 5 +- + arch/arm/configs/at91_dt_defconfig | 2 +- + arch/arm/configs/sama5_defconfig | 2 +- + arch/arm/include/asm/irq.h | 2 + + arch/arm/include/asm/spinlock_types.h | 4 - + arch/arm/include/asm/switch_to.h | 8 + + arch/arm/include/asm/thread_info.h | 8 +- + arch/arm/kernel/asm-offsets.c | 1 + + arch/arm/kernel/entry-armv.S | 19 +- + arch/arm/kernel/entry-common.S | 9 +- + arch/arm/kernel/process.c | 24 + + arch/arm/kernel/signal.c | 3 +- + arch/arm/mach-at91/Kconfig | 25 + + arch/arm/mach-exynos/platsmp.c | 12 +- + arch/arm/mach-hisi/platmcpm.c | 22 +- + arch/arm/mach-imx/cpuidle-imx6q.c | 10 +- + arch/arm/mach-omap2/omap-smp.c | 10 +- + arch/arm/mach-prima2/platsmp.c | 10 +- + arch/arm/mach-qcom/platsmp.c | 10 +- + arch/arm/mach-spear/platsmp.c | 10 +- + arch/arm/mach-sti/platsmp.c | 10 +- + arch/arm/mm/fault.c | 6 + + arch/arm/mm/highmem.c | 58 +- + arch/arm/plat-versatile/platsmp.c | 10 +- + arch/arm64/Kconfig | 1 + + arch/arm64/crypto/Kconfig | 28 +- + arch/arm64/crypto/crc32-ce-glue.c | 3 +- + arch/arm64/include/asm/alternative.h | 6 + + arch/arm64/include/asm/spinlock_types.h | 4 - + arch/arm64/include/asm/thread_info.h | 6 +- + arch/arm64/kernel/alternative.c | 1 + + arch/arm64/kernel/asm-offsets.c | 1 + + arch/arm64/kernel/entry.S | 12 +- + arch/arm64/kernel/fpsimd.c | 31 +- + arch/arm64/kernel/signal.c | 2 +- + arch/arm64/kvm/va_layout.c | 7 +- + arch/hexagon/include/asm/spinlock_types.h | 4 - + arch/ia64/include/asm/spinlock_types.h | 4 - + arch/ia64/kernel/mca.c | 2 +- + arch/mips/Kconfig | 2 +- + arch/mips/include/asm/switch_to.h | 4 +- + arch/mips/kernel/mips-mt-fpaff.c | 2 +- + arch/mips/kernel/traps.c | 6 +- + arch/powerpc/Kconfig | 6 +- + arch/powerpc/include/asm/spinlock_types.h | 4 - + arch/powerpc/include/asm/thread_info.h | 18 +- + arch/powerpc/kernel/asm-offsets.c | 1 + + arch/powerpc/kernel/entry_32.S | 29 +- + arch/powerpc/kernel/entry_64.S | 28 +- + arch/powerpc/kernel/irq.c | 2 + + arch/powerpc/kernel/misc_32.S | 2 + + arch/powerpc/kernel/misc_64.S | 2 + + arch/powerpc/kvm/Kconfig | 1 + + arch/powerpc/platforms/cell/spufs/sched.c | 2 +- + arch/powerpc/platforms/ps3/device-init.c | 4 +- + arch/powerpc/platforms/pseries/iommu.c | 16 +- + arch/s390/include/asm/spinlock_types.h | 4 - + arch/sh/include/asm/spinlock_types.h | 4 - + arch/sh/kernel/irq.c | 2 + + arch/sparc/kernel/irq_64.c | 2 + + arch/x86/Kconfig | 8 +- + arch/x86/crypto/aesni-intel_glue.c | 22 +- + arch/x86/crypto/cast5_avx_glue.c | 21 +- + arch/x86/crypto/chacha20_glue.c | 9 +- + arch/x86/crypto/glue_helper.c | 31 +- + arch/x86/entry/common.c | 11 +- + arch/x86/entry/entry_32.S | 17 + + arch/x86/entry/entry_64.S | 18 + + arch/x86/include/asm/fpu/api.h | 1 + + arch/x86/include/asm/preempt.h | 31 +- + arch/x86/include/asm/signal.h | 13 + + arch/x86/include/asm/stackprotector.h | 8 +- + arch/x86/include/asm/thread_info.h | 11 + + arch/x86/kernel/apic/io_apic.c | 23 +- + arch/x86/kernel/asm-offsets.c | 2 + + arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 2 +- + arch/x86/kernel/fpu/core.c | 12 + + arch/x86/kernel/fpu/signal.c | 2 + + arch/x86/kernel/irq_32.c | 2 + + arch/x86/kernel/process_32.c | 32 + + arch/x86/kvm/lapic.c | 2 +- + arch/x86/kvm/x86.c | 7 + + arch/x86/mm/highmem_32.c | 13 +- + arch/x86/mm/iomap_32.c | 11 +- + arch/x86/mm/pageattr.c | 8 + + arch/x86/platform/efi/efi_64.c | 10 +- + arch/xtensa/include/asm/spinlock_types.h | 4 - + block/blk-core.c | 17 +- + block/blk-ioc.c | 5 +- + block/blk-mq.c | 36 +- + block/blk-mq.h | 4 +- + block/blk-softirq.c | 3 + + crypto/cryptd.c | 19 +- + crypto/scompress.c | 6 +- + drivers/block/loop.c | 2 +- + drivers/block/zram/zcomp.c | 13 +- + drivers/block/zram/zcomp.h | 1 + + drivers/block/zram/zram_drv.c | 43 +- + drivers/block/zram/zram_drv.h | 3 + + drivers/char/random.c | 11 +- + drivers/char/tpm/tpm_tis.c | 29 +- + drivers/clocksource/Kconfig | 13 +- + drivers/clocksource/Makefile | 3 +- + drivers/clocksource/tcb_clksrc.c | 69 +- + drivers/clocksource/timer-atmel-tcb.c | 617 +++++++++++++ + drivers/connector/cn_proc.c | 6 +- + drivers/cpufreq/Kconfig.x86 | 2 +- + drivers/crypto/caam/qi.c | 43 +- + drivers/crypto/caam/qi.h | 2 +- + drivers/firmware/efi/efi.c | 5 +- + drivers/gpu/drm/i915/i915_irq.c | 2 + + drivers/gpu/drm/i915/i915_request.c | 8 +- + drivers/gpu/drm/i915/i915_trace.h | 6 +- + drivers/gpu/drm/i915/intel_sprite.c | 13 +- + drivers/gpu/drm/radeon/radeon_display.c | 2 + + drivers/hv/hv.c | 4 +- + drivers/hv/hyperv_vmbus.h | 1 + + drivers/hv/vmbus_drv.c | 4 +- + drivers/infiniband/hw/hfi1/affinity.c | 6 +- + drivers/infiniband/hw/hfi1/sdma.c | 3 +- + drivers/infiniband/hw/qib/qib_file_ops.c | 7 +- + drivers/irqchip/irq-gic-v3-its.c | 80 +- + drivers/leds/trigger/Kconfig | 1 + + drivers/md/bcache/Kconfig | 1 + + drivers/md/dm-rq.c | 1 - + drivers/md/raid5.c | 8 +- + drivers/md/raid5.h | 1 + + drivers/misc/Kconfig | 12 +- + .../wireless/intersil/orinoco/orinoco_usb.c | 4 +- + drivers/of/base.c | 19 +- + drivers/pci/switch/switchtec.c | 24 +- + drivers/scsi/fcoe/fcoe.c | 16 +- + drivers/scsi/fcoe/fcoe_ctlr.c | 4 +- + drivers/scsi/libfc/fc_exch.c | 4 +- + drivers/spi/spi-rockchip.c | 1 + + drivers/staging/android/vsoc.c | 6 +- + drivers/thermal/x86_pkg_temp_thermal.c | 52 +- + drivers/tty/serial/8250/8250_core.c | 11 +- + drivers/tty/serial/8250/8250_port.c | 5 +- + drivers/tty/serial/amba-pl011.c | 17 +- + drivers/tty/serial/omap-serial.c | 12 +- + drivers/tty/sysrq.c | 6 +- + drivers/usb/core/hcd.c | 3 - + drivers/usb/gadget/function/f_fs.c | 2 +- + drivers/usb/gadget/legacy/inode.c | 4 +- + drivers/watchdog/watchdog_dev.c | 8 +- + fs/aio.c | 15 +- + fs/autofs/expire.c | 3 +- + fs/buffer.c | 21 +- + fs/cifs/readdir.c | 2 +- + fs/dcache.c | 50 +- + fs/eventpoll.c | 4 +- + fs/exec.c | 2 + + fs/ext4/page-io.c | 6 +- + fs/fscache/cookie.c | 8 + + fs/fscache/main.c | 1 + + fs/fuse/dir.c | 2 +- + fs/inode.c | 2 +- + fs/libfs.c | 6 +- + fs/locks.c | 32 +- + fs/namei.c | 4 +- + fs/namespace.c | 8 +- + fs/nfs/delegation.c | 4 +- + fs/nfs/dir.c | 12 +- + fs/nfs/inode.c | 4 + + fs/nfs/nfs4_fs.h | 2 +- + fs/nfs/nfs4proc.c | 4 +- + fs/nfs/nfs4state.c | 22 +- + fs/nfs/unlink.c | 35 +- + fs/ntfs/aops.c | 10 +- + fs/proc/array.c | 4 +- + fs/proc/base.c | 2 +- + fs/proc/proc_sysctl.c | 2 +- + fs/squashfs/decompressor_multi_percpu.c | 16 +- + fs/timerfd.c | 6 +- + include/asm-generic/percpu.h | 1 + + include/linux/blk-cgroup.h | 2 +- + include/linux/blk-mq.h | 2 +- + include/linux/blkdev.h | 5 + + include/linux/bottom_half.h | 34 + + include/linux/buffer_head.h | 42 + + include/linux/cgroup-defs.h | 2 + + include/linux/completion.h | 8 +- + include/linux/cpu.h | 5 + + include/linux/dcache.h | 4 +- + include/linux/delay.h | 6 + + include/linux/fs.h | 2 +- + include/linux/fscache.h | 1 + + include/linux/highmem.h | 32 +- + include/linux/hrtimer.h | 29 +- + include/linux/idr.h | 5 +- + include/linux/interrupt.h | 65 +- + include/linux/irq.h | 4 +- + include/linux/irq_work.h | 8 + + include/linux/irqchip/arm-gic-v3.h | 1 + + include/linux/irqdesc.h | 1 + + include/linux/irqflags.h | 23 +- + include/linux/jbd2.h | 24 + + include/linux/kdb.h | 2 + + include/linux/kernel.h | 4 + + include/linux/kthread-cgroup.h | 17 + + include/linux/kthread.h | 19 +- + include/linux/list_bl.h | 30 +- + include/linux/locallock.h | 281 ++++++ + include/linux/mm_types.h | 4 + + include/linux/mutex.h | 20 +- + include/linux/mutex_rt.h | 130 +++ + include/linux/netdevice.h | 108 ++- + include/linux/netfilter/x_tables.h | 7 + + include/linux/nfs_fs.h | 4 + + include/linux/nfs_xdr.h | 2 +- + include/linux/percpu-rwsem.h | 24 +- + include/linux/percpu.h | 29 + + include/linux/pid.h | 1 + + include/linux/posix-timers.h | 3 +- + include/linux/preempt.h | 107 ++- + include/linux/printk.h | 2 + + include/linux/radix-tree.h | 7 +- + include/linux/random.h | 2 +- + include/linux/rbtree.h | 2 +- + include/linux/rcu_assign_pointer.h | 54 ++ + include/linux/rcupdate.h | 75 +- + include/linux/rcutree.h | 8 + + include/linux/rtmutex.h | 22 +- + include/linux/rwlock_rt.h | 119 +++ + include/linux/rwlock_types.h | 4 + + include/linux/rwlock_types_rt.h | 55 ++ + include/linux/rwsem.h | 11 + + include/linux/rwsem_rt.h | 68 ++ + include/linux/sched.h | 162 +++- + include/linux/sched/mm.h | 11 + + include/linux/sched/task.h | 11 +- + include/linux/sched/wake_q.h | 27 +- + include/linux/seqlock.h | 66 +- + include/linux/signal.h | 1 + + include/linux/skbuff.h | 7 + + include/linux/smp.h | 3 + + include/linux/spinlock.h | 12 +- + include/linux/spinlock_api_smp.h | 4 +- + include/linux/spinlock_rt.h | 156 ++++ + include/linux/spinlock_types.h | 76 +- + include/linux/spinlock_types_nort.h | 33 + + include/linux/spinlock_types_raw.h | 55 ++ + include/linux/spinlock_types_rt.h | 48 + + include/linux/spinlock_types_up.h | 4 - + include/linux/suspend.h | 6 + + include/linux/swait.h | 2 + + include/linux/swap.h | 2 + + include/linux/swork.h | 24 + + include/linux/thread_info.h | 12 +- + include/linux/timer.h | 2 +- + include/linux/trace_events.h | 3 + + include/linux/uaccess.h | 2 + + include/linux/vmstat.h | 4 + + include/linux/wait.h | 5 +- + include/net/gen_stats.h | 9 +- + include/net/neighbour.h | 6 +- + include/net/net_seq_lock.h | 15 + + include/net/sch_generic.h | 19 +- + include/soc/at91/atmel_tcb.h | 183 ++++ + init/Kconfig | 5 +- + init/Makefile | 2 +- + init/init_task.c | 10 +- + init/main.c | 2 + + kernel/Kconfig.locks | 4 +- + kernel/Kconfig.preempt | 35 +- + kernel/cgroup/cgroup.c | 9 +- + kernel/cgroup/cpuset.c | 68 +- + kernel/cgroup/rstat.c | 5 +- + kernel/cpu.c | 67 ++ + kernel/debug/kdb/kdb_io.c | 2 + + kernel/events/core.c | 4 +- + kernel/exit.c | 2 +- + kernel/fork.c | 45 +- + kernel/futex.c | 173 ++-- + kernel/irq/handle.c | 8 +- + kernel/irq/manage.c | 59 +- + kernel/irq/settings.h | 12 + + kernel/irq/spurious.c | 8 + + kernel/irq_work.c | 75 +- + kernel/ksysfs.c | 12 + + kernel/kthread.c | 56 +- + kernel/locking/Makefile | 9 +- + kernel/locking/lockdep.c | 2 + + kernel/locking/locktorture.c | 1 - + kernel/locking/mutex-rt.c | 223 +++++ + kernel/locking/rtmutex.c | 866 ++++++++++++++++-- + kernel/locking/rtmutex_common.h | 28 +- + kernel/locking/rwlock-rt.c | 378 ++++++++ + kernel/locking/rwsem-rt.c | 302 ++++++ + kernel/locking/spinlock.c | 7 + + kernel/locking/spinlock_debug.c | 5 + + kernel/panic.c | 2 + + kernel/power/hibernate.c | 7 + + kernel/power/suspend.c | 4 + + kernel/printk/printk.c | 157 +++- + kernel/ptrace.c | 9 +- + kernel/rcu/Kconfig | 6 +- + kernel/rcu/rcu.h | 11 +- + kernel/rcu/rcutorture.c | 7 + + kernel/rcu/srcutree.c | 36 +- + kernel/rcu/tree.c | 153 +++- + kernel/rcu/tree.h | 6 +- + kernel/rcu/tree_exp.h | 9 +- + kernel/rcu/tree_plugin.h | 156 +--- + kernel/rcu/update.c | 6 +- + kernel/sched/Makefile | 2 +- + kernel/sched/completion.c | 34 +- + kernel/sched/core.c | 554 ++++++++--- + kernel/sched/cpudeadline.c | 4 +- + kernel/sched/cpupri.c | 4 +- + kernel/sched/deadline.c | 8 +- + kernel/sched/debug.c | 4 + + kernel/sched/fair.c | 78 +- + kernel/sched/features.h | 8 + + kernel/sched/rt.c | 8 +- + kernel/sched/sched.h | 10 + + kernel/sched/swait.c | 22 +- + kernel/sched/swork.c | 173 ++++ + kernel/sched/topology.c | 1 + + kernel/signal.c | 114 ++- + kernel/softirq.c | 734 +++++++++++++-- + kernel/time/alarmtimer.c | 2 +- + kernel/time/hrtimer.c | 140 ++- + kernel/time/itimer.c | 1 + + kernel/time/jiffies.c | 7 +- + kernel/time/posix-cpu-timers.c | 177 +++- + kernel/time/posix-timers.c | 42 +- + kernel/time/posix-timers.h | 2 + + kernel/time/tick-broadcast-hrtimer.c | 2 +- + kernel/time/tick-common.c | 10 +- + kernel/time/tick-sched.c | 31 +- + kernel/time/timekeeping.c | 6 +- + kernel/time/timekeeping.h | 3 +- + kernel/time/timer.c | 86 +- + kernel/trace/trace.c | 37 +- + kernel/trace/trace.h | 2 + + kernel/trace/trace_events.c | 2 + + kernel/trace/trace_hwlat.c | 2 +- + kernel/trace/trace_output.c | 19 +- + kernel/watchdog.c | 2 +- + kernel/watchdog_hld.c | 10 + + kernel/workqueue.c | 243 +++-- + kernel/workqueue_internal.h | 5 +- + lib/Kconfig | 1 + + lib/Kconfig.debug | 2 +- + lib/debugobjects.c | 5 +- + lib/irq_poll.c | 5 + + lib/locking-selftest.c | 50 + + lib/radix-tree.c | 32 +- + lib/scatterlist.c | 2 +- + lib/smp_processor_id.c | 2 +- + localversion-rt | 1 + + mm/Kconfig | 2 +- + mm/compaction.c | 6 +- + mm/highmem.c | 6 +- + mm/kasan/quarantine.c | 18 +- + mm/kmemleak.c | 20 +- + mm/memcontrol.c | 28 +- + mm/mmu_context.c | 2 + + mm/page_alloc.c | 196 ++-- + mm/slab.c | 94 +- + mm/slab.h | 2 +- + mm/slub.c | 139 ++- + mm/swap.c | 74 +- + mm/vmalloc.c | 13 +- + mm/vmstat.c | 12 + + mm/zsmalloc.c | 80 +- + mm/zswap.c | 12 +- + net/Kconfig | 2 +- + net/core/dev.c | 111 ++- + net/core/filter.c | 6 +- + net/core/gen_estimator.c | 6 +- + net/core/gen_stats.c | 8 +- + net/core/pktgen.c | 4 +- + net/core/skbuff.c | 35 +- + net/ipv4/icmp.c | 8 + + net/ipv4/tcp_ipv4.c | 6 + + net/netfilter/core.c | 6 + + net/packet/af_packet.c | 5 +- + net/rds/ib_rdma.c | 3 +- + net/sched/sch_api.c | 2 +- + net/sched/sch_generic.c | 14 +- + net/sunrpc/svc_xprt.c | 4 +- + samples/trace_events/trace-events-sample.c | 2 +- + scripts/mkcompile_h | 4 +- + security/apparmor/include/path.h | 19 +- + security/apparmor/lsm.c | 2 +- + virt/kvm/arm/arm.c | 6 +- + 391 files changed, 9560 insertions(+), 2104 deletions(-) + create mode 100644 drivers/clocksource/timer-atmel-tcb.c + create mode 100644 include/linux/kthread-cgroup.h + create mode 100644 include/linux/locallock.h + create mode 100644 include/linux/mutex_rt.h + create mode 100644 include/linux/rcu_assign_pointer.h + create mode 100644 include/linux/rwlock_rt.h + create mode 100644 include/linux/rwlock_types_rt.h + create mode 100644 include/linux/rwsem_rt.h + create mode 100644 include/linux/spinlock_rt.h + create mode 100644 include/linux/spinlock_types_nort.h + create mode 100644 include/linux/spinlock_types_raw.h + create mode 100644 include/linux/spinlock_types_rt.h + create mode 100644 include/linux/swork.h + create mode 100644 include/net/net_seq_lock.h + create mode 100644 include/soc/at91/atmel_tcb.h + create mode 100644 kernel/locking/mutex-rt.c + create mode 100644 kernel/locking/rwlock-rt.c + create mode 100644 kernel/locking/rwsem-rt.c + create mode 100644 kernel/sched/swork.c + create mode 100644 localversion-rt + +diff --git a/arch/Kconfig b/arch/Kconfig +index a336548487e6..3f537b264852 100644 +--- a/arch/Kconfig ++++ b/arch/Kconfig +@@ -28,6 +28,7 @@ config OPROFILE + tristate "OProfile system profiling" + depends on PROFILING + depends on HAVE_OPROFILE ++ depends on !PREEMPT_RT_FULL + select RING_BUFFER + select RING_BUFFER_ALLOW_SWAP + help +diff --git a/arch/alpha/include/asm/spinlock_types.h b/arch/alpha/include/asm/spinlock_types.h +index 1d5716bc060b..6883bc952d22 100644 +--- a/arch/alpha/include/asm/spinlock_types.h ++++ b/arch/alpha/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef _ALPHA_SPINLOCK_TYPES_H + #define _ALPHA_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int lock; + } arch_spinlock_t; +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 51794c7fa6d5..9413ad933336 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -51,7 +51,7 @@ config ARM + select HARDIRQS_SW_RESEND + select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT) + select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6 +- select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU ++ select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU && !PREEMPT_RT_BASE + select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU + select HAVE_ARCH_MMAP_RND_BITS if MMU + select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) +@@ -90,6 +90,7 @@ config ARM + select HAVE_PERF_EVENTS + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE) + select HAVE_REGS_AND_STACK_ACCESS_API + select HAVE_RSEQ +@@ -2162,7 +2163,7 @@ config NEON + + config KERNEL_MODE_NEON + bool "Support for NEON in kernel mode" +- depends on NEON && AEABI ++ depends on NEON && AEABI && !PREEMPT_RT_BASE + help + Say Y to include support for NEON in kernel mode. + +diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig +index e4b1be66b3f5..f4b253bd05ed 100644 +--- a/arch/arm/configs/at91_dt_defconfig ++++ b/arch/arm/configs/at91_dt_defconfig +@@ -19,6 +19,7 @@ CONFIG_ARCH_MULTI_V5=y + CONFIG_ARCH_AT91=y + CONFIG_SOC_AT91RM9200=y + CONFIG_SOC_AT91SAM9=y ++# CONFIG_ATMEL_CLOCKSOURCE_PIT is not set + CONFIG_AEABI=y + CONFIG_UACCESS_WITH_MEMCPY=y + CONFIG_ZBOOT_ROM_TEXT=0x0 +@@ -64,7 +65,6 @@ CONFIG_BLK_DEV_LOOP=y + CONFIG_BLK_DEV_RAM=y + CONFIG_BLK_DEV_RAM_COUNT=4 + CONFIG_BLK_DEV_RAM_SIZE=8192 +-CONFIG_ATMEL_TCLIB=y + CONFIG_ATMEL_SSC=y + CONFIG_SCSI=y + CONFIG_BLK_DEV_SD=y +diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig +index 2080025556b5..be92871ab155 100644 +--- a/arch/arm/configs/sama5_defconfig ++++ b/arch/arm/configs/sama5_defconfig +@@ -20,6 +20,7 @@ CONFIG_ARCH_AT91=y + CONFIG_SOC_SAMA5D2=y + CONFIG_SOC_SAMA5D3=y + CONFIG_SOC_SAMA5D4=y ++# CONFIG_ATMEL_CLOCKSOURCE_PIT is not set + CONFIG_AEABI=y + CONFIG_UACCESS_WITH_MEMCPY=y + CONFIG_ZBOOT_ROM_TEXT=0x0 +@@ -75,7 +76,6 @@ CONFIG_BLK_DEV_LOOP=y + CONFIG_BLK_DEV_RAM=y + CONFIG_BLK_DEV_RAM_COUNT=4 + CONFIG_BLK_DEV_RAM_SIZE=8192 +-CONFIG_ATMEL_TCLIB=y + CONFIG_ATMEL_SSC=y + CONFIG_EEPROM_AT24=y + CONFIG_SCSI=y +diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h +index 46d41140df27..c421b5b81946 100644 +--- a/arch/arm/include/asm/irq.h ++++ b/arch/arm/include/asm/irq.h +@@ -23,6 +23,8 @@ + #endif + + #ifndef __ASSEMBLY__ ++#include ++ + struct irqaction; + struct pt_regs; + +diff --git a/arch/arm/include/asm/spinlock_types.h b/arch/arm/include/asm/spinlock_types.h +index 5976958647fe..a37c0803954b 100644 +--- a/arch/arm/include/asm/spinlock_types.h ++++ b/arch/arm/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef __ASM_SPINLOCK_TYPES_H + #define __ASM_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + #define TICKET_SHIFT 16 + + typedef struct { +diff --git a/arch/arm/include/asm/switch_to.h b/arch/arm/include/asm/switch_to.h +index d3e937dcee4d..6ab96a2ce1f8 100644 +--- a/arch/arm/include/asm/switch_to.h ++++ b/arch/arm/include/asm/switch_to.h +@@ -4,6 +4,13 @@ + + #include + ++#if defined CONFIG_PREEMPT_RT_FULL && defined CONFIG_HIGHMEM ++void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p); ++#else ++static inline void ++switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) { } ++#endif ++ + /* + * For v7 SMP cores running a preemptible kernel we may be pre-empted + * during a TLB maintenance operation, so execute an inner-shareable dsb +@@ -26,6 +33,7 @@ extern struct task_struct *__switch_to(struct task_struct *, struct thread_info + #define switch_to(prev,next,last) \ + do { \ + __complete_pending_tlbi(); \ ++ switch_kmaps(prev, next); \ + last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \ + } while (0) + +diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h +index 8f55dc520a3e..4f834bfca470 100644 +--- a/arch/arm/include/asm/thread_info.h ++++ b/arch/arm/include/asm/thread_info.h +@@ -49,6 +49,7 @@ struct cpu_context_save { + struct thread_info { + unsigned long flags; /* low level flags */ + int preempt_count; /* 0 => preemptable, <0 => bug */ ++ int preempt_lazy_count; /* 0 => preemptable, <0 => bug */ + mm_segment_t addr_limit; /* address limit */ + struct task_struct *task; /* main task structure */ + __u32 cpu; /* cpu */ +@@ -139,7 +140,8 @@ extern int vfp_restore_user_hwstate(struct user_vfp *, + #define TIF_SYSCALL_TRACE 4 /* syscall trace active */ + #define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ + #define TIF_SYSCALL_TRACEPOINT 6 /* syscall tracepoint instrumentation */ +-#define TIF_SECCOMP 7 /* seccomp syscall filtering active */ ++#define TIF_SECCOMP 8 /* seccomp syscall filtering active */ ++#define TIF_NEED_RESCHED_LAZY 7 + + #define TIF_NOHZ 12 /* in adaptive nohz mode */ + #define TIF_USING_IWMMXT 17 +@@ -149,6 +151,7 @@ extern int vfp_restore_user_hwstate(struct user_vfp *, + #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) + #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) + #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_UPROBE (1 << TIF_UPROBE) + #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) + #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) +@@ -164,7 +167,8 @@ extern int vfp_restore_user_hwstate(struct user_vfp *, + * Change these and you break ASM code in entry-common.S + */ + #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ +- _TIF_NOTIFY_RESUME | _TIF_UPROBE) ++ _TIF_NOTIFY_RESUME | _TIF_UPROBE | \ ++ _TIF_NEED_RESCHED_LAZY) + + #endif /* __KERNEL__ */ + #endif /* __ASM_ARM_THREAD_INFO_H */ +diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c +index 3968d6c22455..b35d373fc982 100644 +--- a/arch/arm/kernel/asm-offsets.c ++++ b/arch/arm/kernel/asm-offsets.c +@@ -56,6 +56,7 @@ int main(void) + BLANK(); + DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); + DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); ++ DEFINE(TI_PREEMPT_LAZY, offsetof(struct thread_info, preempt_lazy_count)); + DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); + DEFINE(TI_TASK, offsetof(struct thread_info, task)); + DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); +diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S +index e85a3af9ddeb..cc67c0a3ae7b 100644 +--- a/arch/arm/kernel/entry-armv.S ++++ b/arch/arm/kernel/entry-armv.S +@@ -216,11 +216,18 @@ __irq_svc: + + #ifdef CONFIG_PREEMPT + ldr r8, [tsk, #TI_PREEMPT] @ get preempt count +- ldr r0, [tsk, #TI_FLAGS] @ get flags + teq r8, #0 @ if preempt count != 0 ++ bne 1f @ return from exeption ++ ldr r0, [tsk, #TI_FLAGS] @ get flags ++ tst r0, #_TIF_NEED_RESCHED @ if NEED_RESCHED is set ++ blne svc_preempt @ preempt! ++ ++ ldr r8, [tsk, #TI_PREEMPT_LAZY] @ get preempt lazy count ++ teq r8, #0 @ if preempt lazy count != 0 + movne r0, #0 @ force flags to 0 +- tst r0, #_TIF_NEED_RESCHED ++ tst r0, #_TIF_NEED_RESCHED_LAZY + blne svc_preempt ++1: + #endif + + svc_exit r5, irq = 1 @ return from exception +@@ -235,8 +242,14 @@ svc_preempt: + 1: bl preempt_schedule_irq @ irq en/disable is done inside + ldr r0, [tsk, #TI_FLAGS] @ get new tasks TI_FLAGS + tst r0, #_TIF_NEED_RESCHED ++ bne 1b ++ tst r0, #_TIF_NEED_RESCHED_LAZY + reteq r8 @ go again +- b 1b ++ ldr r0, [tsk, #TI_PREEMPT_LAZY] @ get preempt lazy count ++ teq r0, #0 @ if preempt lazy count != 0 ++ beq 1b ++ ret r8 @ go again ++ + #endif + + __und_fault: +diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S +index 746565a876dc..156e3ba4b319 100644 +--- a/arch/arm/kernel/entry-common.S ++++ b/arch/arm/kernel/entry-common.S +@@ -56,7 +56,9 @@ __ret_fast_syscall: + cmp r2, #TASK_SIZE + blne addr_limit_check_failed + ldr r1, [tsk, #TI_FLAGS] @ re-check for syscall tracing +- tst r1, #_TIF_SYSCALL_WORK | _TIF_WORK_MASK ++ tst r1, #((_TIF_SYSCALL_WORK | _TIF_WORK_MASK) & ~_TIF_SECCOMP) ++ bne fast_work_pending ++ tst r1, #_TIF_SECCOMP + bne fast_work_pending + + +@@ -93,8 +95,11 @@ __ret_fast_syscall: + cmp r2, #TASK_SIZE + blne addr_limit_check_failed + ldr r1, [tsk, #TI_FLAGS] @ re-check for syscall tracing +- tst r1, #_TIF_SYSCALL_WORK | _TIF_WORK_MASK ++ tst r1, #((_TIF_SYSCALL_WORK | _TIF_WORK_MASK) & ~_TIF_SECCOMP) ++ bne do_slower_path ++ tst r1, #_TIF_SECCOMP + beq no_work_pending ++do_slower_path: + UNWIND(.fnend ) + ENDPROC(ret_fast_syscall) + +diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c +index 82ab015bf42b..8d3c7ce34c24 100644 +--- a/arch/arm/kernel/process.c ++++ b/arch/arm/kernel/process.c +@@ -324,6 +324,30 @@ unsigned long arch_randomize_brk(struct mm_struct *mm) + } + + #ifdef CONFIG_MMU ++/* ++ * CONFIG_SPLIT_PTLOCK_CPUS results in a page->ptl lock. If the lock is not ++ * initialized by pgtable_page_ctor() then a coredump of the vector page will ++ * fail. ++ */ ++static int __init vectors_user_mapping_init_page(void) ++{ ++ struct page *page; ++ unsigned long addr = 0xffff0000; ++ pgd_t *pgd; ++ pud_t *pud; ++ pmd_t *pmd; ++ ++ pgd = pgd_offset_k(addr); ++ pud = pud_offset(pgd, addr); ++ pmd = pmd_offset(pud, addr); ++ page = pmd_page(*(pmd)); ++ ++ pgtable_page_ctor(page); ++ ++ return 0; ++} ++late_initcall(vectors_user_mapping_init_page); ++ + #ifdef CONFIG_KUSER_HELPERS + /* + * The vectors page is always readable from user space for the +diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c +index b908382b69ff..339fbc281cf1 100644 +--- a/arch/arm/kernel/signal.c ++++ b/arch/arm/kernel/signal.c +@@ -652,7 +652,8 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall) + */ + trace_hardirqs_off(); + do { +- if (likely(thread_flags & _TIF_NEED_RESCHED)) { ++ if (likely(thread_flags & (_TIF_NEED_RESCHED | ++ _TIF_NEED_RESCHED_LAZY))) { + schedule(); + } else { + if (unlikely(!user_mode(regs))) +diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig +index 903f23c309df..fa493a86e2bb 100644 +--- a/arch/arm/mach-at91/Kconfig ++++ b/arch/arm/mach-at91/Kconfig +@@ -107,6 +107,31 @@ config SOC_AT91SAM9 + AT91SAM9X35 + AT91SAM9XE + ++comment "Clocksource driver selection" ++ ++config ATMEL_CLOCKSOURCE_PIT ++ bool "Periodic Interval Timer (PIT) support" ++ depends on SOC_AT91SAM9 || SOC_SAMA5 ++ default SOC_AT91SAM9 || SOC_SAMA5 ++ select ATMEL_PIT ++ help ++ Select this to get a clocksource based on the Atmel Periodic Interval ++ Timer. It has a relatively low resolution and the TC Block clocksource ++ should be preferred. ++ ++config ATMEL_CLOCKSOURCE_TCB ++ bool "Timer Counter Blocks (TCB) support" ++ depends on SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAMA5 || COMPILE_TEST ++ default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAMA5 ++ depends on !ATMEL_TCLIB ++ select ATMEL_ARM_TCB_CLKSRC ++ help ++ Select this to get a high precision clocksource based on a ++ TC block with a 5+ MHz base clock rate. ++ On platforms with 16-bit counters, two timer channels are combined ++ to make a single 32-bit timer. ++ It can also be used as a clock event device supporting oneshot mode. ++ + config HAVE_AT91_UTMI + bool + +diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c +index 6a1e682371b3..17dca0ff336e 100644 +--- a/arch/arm/mach-exynos/platsmp.c ++++ b/arch/arm/mach-exynos/platsmp.c +@@ -239,7 +239,7 @@ static void write_pen_release(int val) + sync_cache_w(&pen_release); + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void exynos_secondary_init(unsigned int cpu) + { +@@ -252,8 +252,8 @@ static void exynos_secondary_init(unsigned int cpu) + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr) +@@ -317,7 +317,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) + * Set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -344,7 +344,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) + + if (timeout == 0) { + printk(KERN_ERR "cpu1 power enable failed"); +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + return -ETIMEDOUT; + } + } +@@ -390,7 +390,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) + * calibrations, then wait for it to finish + */ + fail: +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? ret : 0; + } +diff --git a/arch/arm/mach-hisi/platmcpm.c b/arch/arm/mach-hisi/platmcpm.c +index f66815c3dd07..00524abd963f 100644 +--- a/arch/arm/mach-hisi/platmcpm.c ++++ b/arch/arm/mach-hisi/platmcpm.c +@@ -61,7 +61,7 @@ + + static void __iomem *sysctrl, *fabric; + static int hip04_cpu_table[HIP04_MAX_CLUSTERS][HIP04_MAX_CPUS_PER_CLUSTER]; +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + static u32 fabric_phys_addr; + /* + * [0]: bootwrapper physical address +@@ -113,7 +113,7 @@ static int hip04_boot_secondary(unsigned int l_cpu, struct task_struct *idle) + if (cluster >= HIP04_MAX_CLUSTERS || cpu >= HIP04_MAX_CPUS_PER_CLUSTER) + return -EINVAL; + +- spin_lock_irq(&boot_lock); ++ raw_spin_lock_irq(&boot_lock); + + if (hip04_cpu_table[cluster][cpu]) + goto out; +@@ -147,7 +147,7 @@ static int hip04_boot_secondary(unsigned int l_cpu, struct task_struct *idle) + + out: + hip04_cpu_table[cluster][cpu]++; +- spin_unlock_irq(&boot_lock); ++ raw_spin_unlock_irq(&boot_lock); + + return 0; + } +@@ -162,11 +162,11 @@ static void hip04_cpu_die(unsigned int l_cpu) + cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); + cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); + +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + hip04_cpu_table[cluster][cpu]--; + if (hip04_cpu_table[cluster][cpu] == 1) { + /* A power_up request went ahead of us. */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + return; + } else if (hip04_cpu_table[cluster][cpu] > 1) { + pr_err("Cluster %d CPU%d boots multiple times\n", cluster, cpu); +@@ -174,7 +174,7 @@ static void hip04_cpu_die(unsigned int l_cpu) + } + + last_man = hip04_cluster_is_down(cluster); +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + if (last_man) { + /* Since it's Cortex A15, disable L2 prefetching. */ + asm volatile( +@@ -203,7 +203,7 @@ static int hip04_cpu_kill(unsigned int l_cpu) + cpu >= HIP04_MAX_CPUS_PER_CLUSTER); + + count = TIMEOUT_MSEC / POLL_MSEC; +- spin_lock_irq(&boot_lock); ++ raw_spin_lock_irq(&boot_lock); + for (tries = 0; tries < count; tries++) { + if (hip04_cpu_table[cluster][cpu]) + goto err; +@@ -211,10 +211,10 @@ static int hip04_cpu_kill(unsigned int l_cpu) + data = readl_relaxed(sysctrl + SC_CPU_RESET_STATUS(cluster)); + if (data & CORE_WFI_STATUS(cpu)) + break; +- spin_unlock_irq(&boot_lock); ++ raw_spin_unlock_irq(&boot_lock); + /* Wait for clean L2 when the whole cluster is down. */ + msleep(POLL_MSEC); +- spin_lock_irq(&boot_lock); ++ raw_spin_lock_irq(&boot_lock); + } + if (tries >= count) + goto err; +@@ -231,10 +231,10 @@ static int hip04_cpu_kill(unsigned int l_cpu) + goto err; + if (hip04_cluster_is_down(cluster)) + hip04_set_snoop_filter(cluster, 0); +- spin_unlock_irq(&boot_lock); ++ raw_spin_unlock_irq(&boot_lock); + return 1; + err: +- spin_unlock_irq(&boot_lock); ++ raw_spin_unlock_irq(&boot_lock); + return 0; + } + #endif +diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c +index 326e870d7123..d9ac80aa1eb0 100644 +--- a/arch/arm/mach-imx/cpuidle-imx6q.c ++++ b/arch/arm/mach-imx/cpuidle-imx6q.c +@@ -17,22 +17,22 @@ + #include "hardware.h" + + static int num_idle_cpus = 0; +-static DEFINE_SPINLOCK(cpuidle_lock); ++static DEFINE_RAW_SPINLOCK(cpuidle_lock); + + static int imx6q_enter_wait(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int index) + { +- spin_lock(&cpuidle_lock); ++ raw_spin_lock(&cpuidle_lock); + if (++num_idle_cpus == num_online_cpus()) + imx6_set_lpm(WAIT_UNCLOCKED); +- spin_unlock(&cpuidle_lock); ++ raw_spin_unlock(&cpuidle_lock); + + cpu_do_idle(); + +- spin_lock(&cpuidle_lock); ++ raw_spin_lock(&cpuidle_lock); + if (num_idle_cpus-- == num_online_cpus()) + imx6_set_lpm(WAIT_CLOCKED); +- spin_unlock(&cpuidle_lock); ++ raw_spin_unlock(&cpuidle_lock); + + return index; + } +diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c +index 1c73694c871a..ac4d2f030b87 100644 +--- a/arch/arm/mach-omap2/omap-smp.c ++++ b/arch/arm/mach-omap2/omap-smp.c +@@ -69,7 +69,7 @@ static const struct omap_smp_config omap5_cfg __initconst = { + .startup_addr = omap5_secondary_startup, + }; + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + void __iomem *omap4_get_scu_base(void) + { +@@ -177,8 +177,8 @@ static void omap4_secondary_init(unsigned int cpu) + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -191,7 +191,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) + * Set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * Update the AuxCoreBoot0 with boot state for secondary core. +@@ -270,7 +270,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) + * Now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return 0; + } +diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c +index 75ef5d4be554..c17c86e5d860 100644 +--- a/arch/arm/mach-prima2/platsmp.c ++++ b/arch/arm/mach-prima2/platsmp.c +@@ -22,7 +22,7 @@ + + static void __iomem *clk_base; + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void sirfsoc_secondary_init(unsigned int cpu) + { +@@ -36,8 +36,8 @@ static void sirfsoc_secondary_init(unsigned int cpu) + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static const struct of_device_id clk_ids[] = { +@@ -75,7 +75,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle) + /* make sure write buffer is drained */ + mb(); + +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -107,7 +107,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle) + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff --git a/arch/arm/mach-qcom/platsmp.c b/arch/arm/mach-qcom/platsmp.c +index 5494c9e0c909..e8ce157d3548 100644 +--- a/arch/arm/mach-qcom/platsmp.c ++++ b/arch/arm/mach-qcom/platsmp.c +@@ -46,7 +46,7 @@ + + extern void secondary_startup_arm(void); + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + #ifdef CONFIG_HOTPLUG_CPU + static void qcom_cpu_die(unsigned int cpu) +@@ -60,8 +60,8 @@ static void qcom_secondary_init(unsigned int cpu) + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int scss_release_secondary(unsigned int cpu) +@@ -284,7 +284,7 @@ static int qcom_boot_secondary(unsigned int cpu, int (*func)(unsigned int)) + * set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * Send the secondary CPU a soft interrupt, thereby causing +@@ -297,7 +297,7 @@ static int qcom_boot_secondary(unsigned int cpu, int (*func)(unsigned int)) + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return ret; + } +diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c +index 39038a03836a..6da5c93872bf 100644 +--- a/arch/arm/mach-spear/platsmp.c ++++ b/arch/arm/mach-spear/platsmp.c +@@ -32,7 +32,7 @@ static void write_pen_release(int val) + sync_cache_w(&pen_release); + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void __iomem *scu_base = IOMEM(VA_SCU_BASE); + +@@ -47,8 +47,8 @@ static void spear13xx_secondary_init(unsigned int cpu) + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -59,7 +59,7 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) + * set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -84,7 +84,7 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff --git a/arch/arm/mach-sti/platsmp.c b/arch/arm/mach-sti/platsmp.c +index 231f19e17436..a3419b7003e6 100644 +--- a/arch/arm/mach-sti/platsmp.c ++++ b/arch/arm/mach-sti/platsmp.c +@@ -35,7 +35,7 @@ static void write_pen_release(int val) + sync_cache_w(&pen_release); + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void sti_secondary_init(unsigned int cpu) + { +@@ -48,8 +48,8 @@ static void sti_secondary_init(unsigned int cpu) + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -60,7 +60,7 @@ static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle) + * set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -91,7 +91,7 @@ static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle) + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c +index 3232afb6fdc0..3bec1f73a9aa 100644 +--- a/arch/arm/mm/fault.c ++++ b/arch/arm/mm/fault.c +@@ -439,6 +439,9 @@ do_translation_fault(unsigned long addr, unsigned int fsr, + if (addr < TASK_SIZE) + return do_page_fault(addr, fsr, regs); + ++ if (interrupts_enabled(regs)) ++ local_irq_enable(); ++ + if (user_mode(regs)) + goto bad_area; + +@@ -506,6 +509,9 @@ do_translation_fault(unsigned long addr, unsigned int fsr, + static int + do_sect_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) + { ++ if (interrupts_enabled(regs)) ++ local_irq_enable(); ++ + do_bad_area(addr, fsr, regs); + return 0; + } +diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c +index d02f8187b1cc..542692dbd40a 100644 +--- a/arch/arm/mm/highmem.c ++++ b/arch/arm/mm/highmem.c +@@ -34,6 +34,11 @@ static inline pte_t get_fixmap_pte(unsigned long vaddr) + return *ptep; + } + ++static unsigned int fixmap_idx(int type) ++{ ++ return FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); ++} ++ + void *kmap(struct page *page) + { + might_sleep(); +@@ -54,12 +59,13 @@ EXPORT_SYMBOL(kunmap); + + void *kmap_atomic(struct page *page) + { ++ pte_t pte = mk_pte(page, kmap_prot); + unsigned int idx; + unsigned long vaddr; + void *kmap; + int type; + +- preempt_disable(); ++ preempt_disable_nort(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -79,7 +85,7 @@ void *kmap_atomic(struct page *page) + + type = kmap_atomic_idx_push(); + +- idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); ++ idx = fixmap_idx(type); + vaddr = __fix_to_virt(idx); + #ifdef CONFIG_DEBUG_HIGHMEM + /* +@@ -93,7 +99,10 @@ void *kmap_atomic(struct page *page) + * in place, so the contained TLB flush ensures the TLB is updated + * with the new mapping. + */ +- set_fixmap_pte(idx, mk_pte(page, kmap_prot)); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = pte; ++#endif ++ set_fixmap_pte(idx, pte); + + return (void *)vaddr; + } +@@ -106,44 +115,75 @@ void __kunmap_atomic(void *kvaddr) + + if (kvaddr >= (void *)FIXADDR_START) { + type = kmap_atomic_idx(); +- idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); ++ idx = fixmap_idx(type); + + if (cache_is_vivt()) + __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = __pte(0); ++#endif + #ifdef CONFIG_DEBUG_HIGHMEM + BUG_ON(vaddr != __fix_to_virt(idx)); +- set_fixmap_pte(idx, __pte(0)); + #else + (void) idx; /* to kill a warning */ + #endif ++ set_fixmap_pte(idx, __pte(0)); + kmap_atomic_idx_pop(); + } else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { + /* this address was obtained through kmap_high_get() */ + kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); + } + pagefault_enable(); +- preempt_enable(); ++ preempt_enable_nort(); + } + EXPORT_SYMBOL(__kunmap_atomic); + + void *kmap_atomic_pfn(unsigned long pfn) + { ++ pte_t pte = pfn_pte(pfn, kmap_prot); + unsigned long vaddr; + int idx, type; + struct page *page = pfn_to_page(pfn); + +- preempt_disable(); ++ preempt_disable_nort(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); + + type = kmap_atomic_idx_push(); +- idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); ++ idx = fixmap_idx(type); + vaddr = __fix_to_virt(idx); + #ifdef CONFIG_DEBUG_HIGHMEM + BUG_ON(!pte_none(get_fixmap_pte(vaddr))); + #endif +- set_fixmap_pte(idx, pfn_pte(pfn, kmap_prot)); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = pte; ++#endif ++ set_fixmap_pte(idx, pte); + + return (void *)vaddr; + } ++#if defined CONFIG_PREEMPT_RT_FULL ++void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) ++{ ++ int i; ++ ++ /* ++ * Clear @prev's kmap_atomic mappings ++ */ ++ for (i = 0; i < prev_p->kmap_idx; i++) { ++ int idx = fixmap_idx(i); ++ ++ set_fixmap_pte(idx, __pte(0)); ++ } ++ /* ++ * Restore @next_p's kmap_atomic mappings ++ */ ++ for (i = 0; i < next_p->kmap_idx; i++) { ++ int idx = fixmap_idx(i); ++ ++ if (!pte_none(next_p->kmap_pte[i])) ++ set_fixmap_pte(idx, next_p->kmap_pte[i]); ++ } ++} ++#endif +diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c +index c2366510187a..6b60f582b738 100644 +--- a/arch/arm/plat-versatile/platsmp.c ++++ b/arch/arm/plat-versatile/platsmp.c +@@ -32,7 +32,7 @@ static void write_pen_release(int val) + sync_cache_w(&pen_release); + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + void versatile_secondary_init(unsigned int cpu) + { +@@ -45,8 +45,8 @@ void versatile_secondary_init(unsigned int cpu) + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -57,7 +57,7 @@ int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) + * Set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * This is really belt and braces; we hold unintended secondary +@@ -87,7 +87,7 @@ int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 8790a29d0af4..4a4db69c5e9a 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -140,6 +140,7 @@ config ARM64 + select HAVE_PERF_EVENTS + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select HAVE_REGS_AND_STACK_ACCESS_API + select HAVE_RCU_TABLE_FREE + select HAVE_RSEQ +diff --git a/arch/arm64/crypto/Kconfig b/arch/arm64/crypto/Kconfig +index d51944ff9f91..0d4b3f0cfba6 100644 +--- a/arch/arm64/crypto/Kconfig ++++ b/arch/arm64/crypto/Kconfig +@@ -19,43 +19,43 @@ config CRYPTO_SHA512_ARM64 + + config CRYPTO_SHA1_ARM64_CE + tristate "SHA-1 digest algorithm (ARMv8 Crypto Extensions)" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_HASH + select CRYPTO_SHA1 + + config CRYPTO_SHA2_ARM64_CE + tristate "SHA-224/SHA-256 digest algorithm (ARMv8 Crypto Extensions)" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_HASH + select CRYPTO_SHA256_ARM64 + + config CRYPTO_SHA512_ARM64_CE + tristate "SHA-384/SHA-512 digest algorithm (ARMv8 Crypto Extensions)" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_HASH + select CRYPTO_SHA512_ARM64 + + config CRYPTO_SHA3_ARM64 + tristate "SHA3 digest algorithm (ARMv8.2 Crypto Extensions)" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_HASH + select CRYPTO_SHA3 + + config CRYPTO_SM3_ARM64_CE + tristate "SM3 digest algorithm (ARMv8.2 Crypto Extensions)" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_HASH + select CRYPTO_SM3 + + config CRYPTO_SM4_ARM64_CE + tristate "SM4 symmetric cipher (ARMv8.2 Crypto Extensions)" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_ALGAPI + select CRYPTO_SM4 + + config CRYPTO_GHASH_ARM64_CE + tristate "GHASH/AES-GCM using ARMv8 Crypto Extensions" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_HASH + select CRYPTO_GF128MUL + select CRYPTO_AES +@@ -63,7 +63,7 @@ config CRYPTO_GHASH_ARM64_CE + + config CRYPTO_CRCT10DIF_ARM64_CE + tristate "CRCT10DIF digest algorithm using PMULL instructions" +- depends on KERNEL_MODE_NEON && CRC_T10DIF ++ depends on KERNEL_MODE_NEON && CRC_T10DIF && !PREEMPT_RT_BASE + select CRYPTO_HASH + + config CRYPTO_CRC32_ARM64_CE +@@ -77,13 +77,13 @@ config CRYPTO_AES_ARM64 + + config CRYPTO_AES_ARM64_CE + tristate "AES core cipher using ARMv8 Crypto Extensions" +- depends on ARM64 && KERNEL_MODE_NEON ++ depends on ARM64 && KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_ALGAPI + select CRYPTO_AES_ARM64 + + config CRYPTO_AES_ARM64_CE_CCM + tristate "AES in CCM mode using ARMv8 Crypto Extensions" +- depends on ARM64 && KERNEL_MODE_NEON ++ depends on ARM64 && KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_ALGAPI + select CRYPTO_AES_ARM64_CE + select CRYPTO_AES_ARM64 +@@ -91,7 +91,7 @@ config CRYPTO_AES_ARM64_CE_CCM + + config CRYPTO_AES_ARM64_CE_BLK + tristate "AES in ECB/CBC/CTR/XTS modes using ARMv8 Crypto Extensions" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_BLKCIPHER + select CRYPTO_AES_ARM64_CE + select CRYPTO_AES_ARM64 +@@ -99,7 +99,7 @@ config CRYPTO_AES_ARM64_CE_BLK + + config CRYPTO_AES_ARM64_NEON_BLK + tristate "AES in ECB/CBC/CTR/XTS modes using NEON instructions" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_BLKCIPHER + select CRYPTO_AES_ARM64 + select CRYPTO_AES +@@ -107,13 +107,13 @@ config CRYPTO_AES_ARM64_NEON_BLK + + config CRYPTO_CHACHA20_NEON + tristate "NEON accelerated ChaCha20 symmetric cipher" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_BLKCIPHER + select CRYPTO_CHACHA20 + + config CRYPTO_AES_ARM64_BS + tristate "AES in ECB/CBC/CTR/XTS modes using bit-sliced NEON algorithm" +- depends on KERNEL_MODE_NEON ++ depends on KERNEL_MODE_NEON && !PREEMPT_RT_BASE + select CRYPTO_BLKCIPHER + select CRYPTO_AES_ARM64_NEON_BLK + select CRYPTO_AES_ARM64 +diff --git a/arch/arm64/crypto/crc32-ce-glue.c b/arch/arm64/crypto/crc32-ce-glue.c +index 34b4e3d46aab..ae055cdad8cf 100644 +--- a/arch/arm64/crypto/crc32-ce-glue.c ++++ b/arch/arm64/crypto/crc32-ce-glue.c +@@ -208,7 +208,8 @@ static struct shash_alg crc32_pmull_algs[] = { { + + static int __init crc32_pmull_mod_init(void) + { +- if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && (elf_hwcap & HWCAP_PMULL)) { ++ if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && ++ !IS_ENABLED(CONFIG_PREEMPT_RT_BASE) && (elf_hwcap & HWCAP_PMULL)) { + crc32_pmull_algs[0].update = crc32_pmull_update; + crc32_pmull_algs[1].update = crc32c_pmull_update; + +diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h +index 4b650ec1d7dd..f561ea0ac645 100644 +--- a/arch/arm64/include/asm/alternative.h ++++ b/arch/arm64/include/asm/alternative.h +@@ -35,6 +35,12 @@ void apply_alternatives_module(void *start, size_t length); + static inline void apply_alternatives_module(void *start, size_t length) { } + #endif + ++#ifdef CONFIG_KVM_ARM_HOST ++void kvm_compute_layout(void); ++#else ++static inline void kvm_compute_layout(void) { } ++#endif ++ + #define ALTINSTR_ENTRY(feature,cb) \ + " .word 661b - .\n" /* label */ \ + " .if " __stringify(cb) " == 0\n" \ +diff --git a/arch/arm64/include/asm/spinlock_types.h b/arch/arm64/include/asm/spinlock_types.h +index a157ff465e27..f952fdda8346 100644 +--- a/arch/arm64/include/asm/spinlock_types.h ++++ b/arch/arm64/include/asm/spinlock_types.h +@@ -16,10 +16,6 @@ + #ifndef __ASM_SPINLOCK_TYPES_H + #define __ASM_SPINLOCK_TYPES_H + +-#if !defined(__LINUX_SPINLOCK_TYPES_H) && !defined(__ASM_SPINLOCK_H) +-# error "please don't include this file directly" +-#endif +- + #include + #include + +diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h +index cb2c10a8f0a8..f1820f7318b6 100644 +--- a/arch/arm64/include/asm/thread_info.h ++++ b/arch/arm64/include/asm/thread_info.h +@@ -43,6 +43,7 @@ struct thread_info { + u64 ttbr0; /* saved TTBR0_EL1 */ + #endif + int preempt_count; /* 0 => preemptable, <0 => bug */ ++ int preempt_lazy_count; /* 0 => preemptable, <0 => bug */ + }; + + #define thread_saved_pc(tsk) \ +@@ -76,6 +77,7 @@ void arch_release_task_struct(struct task_struct *tsk); + #define TIF_FOREIGN_FPSTATE 3 /* CPU's FP state is not current's */ + #define TIF_UPROBE 4 /* uprobe breakpoint or singlestep */ + #define TIF_FSCHECK 5 /* Check FS is USER_DS on return */ ++#define TIF_NEED_RESCHED_LAZY 6 + #define TIF_NOHZ 7 + #define TIF_SYSCALL_TRACE 8 + #define TIF_SYSCALL_AUDIT 9 +@@ -94,6 +96,7 @@ void arch_release_task_struct(struct task_struct *tsk); + #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) + #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) + #define _TIF_FOREIGN_FPSTATE (1 << TIF_FOREIGN_FPSTATE) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_NOHZ (1 << TIF_NOHZ) + #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) + #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) +@@ -106,8 +109,9 @@ void arch_release_task_struct(struct task_struct *tsk); + + #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ + _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \ +- _TIF_UPROBE | _TIF_FSCHECK) ++ _TIF_UPROBE | _TIF_FSCHECK | _TIF_NEED_RESCHED_LAZY) + ++#define _TIF_NEED_RESCHED_MASK (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY) + #define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ + _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ + _TIF_NOHZ) +diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c +index b5d603992d40..f92815d56d17 100644 +--- a/arch/arm64/kernel/alternative.c ++++ b/arch/arm64/kernel/alternative.c +@@ -224,6 +224,7 @@ static int __apply_alternatives_multi_stop(void *unused) + void __init apply_alternatives_all(void) + { + /* better not try code patching on a live SMP system */ ++ kvm_compute_layout(); + stop_machine(__apply_alternatives_multi_stop, NULL, cpu_online_mask); + } + +diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c +index 92fba851ce53..844c71bc865b 100644 +--- a/arch/arm64/kernel/asm-offsets.c ++++ b/arch/arm64/kernel/asm-offsets.c +@@ -41,6 +41,7 @@ int main(void) + BLANK(); + DEFINE(TSK_TI_FLAGS, offsetof(struct task_struct, thread_info.flags)); + DEFINE(TSK_TI_PREEMPT, offsetof(struct task_struct, thread_info.preempt_count)); ++ DEFINE(TSK_TI_PREEMPT_LAZY, offsetof(struct task_struct, thread_info.preempt_lazy_count)); + DEFINE(TSK_TI_ADDR_LIMIT, offsetof(struct task_struct, thread_info.addr_limit)); + #ifdef CONFIG_ARM64_SW_TTBR0_PAN + DEFINE(TSK_TI_TTBR0, offsetof(struct task_struct, thread_info.ttbr0)); +diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S +index 8556876c9109..d30ca1b304cd 100644 +--- a/arch/arm64/kernel/entry.S ++++ b/arch/arm64/kernel/entry.S +@@ -623,11 +623,16 @@ el1_irq: + + #ifdef CONFIG_PREEMPT + ldr w24, [tsk, #TSK_TI_PREEMPT] // get preempt count +- cbnz w24, 1f // preempt count != 0 ++ cbnz w24, 2f // preempt count != 0 + ldr x0, [tsk, #TSK_TI_FLAGS] // get flags +- tbz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling? +- bl el1_preempt ++ tbnz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling? ++ ++ ldr w24, [tsk, #TSK_TI_PREEMPT_LAZY] // get preempt lazy count ++ cbnz w24, 2f // preempt lazy count != 0 ++ tbz x0, #TIF_NEED_RESCHED_LAZY, 2f // needs rescheduling? + 1: ++ bl el1_preempt ++2: + #endif + #ifdef CONFIG_TRACE_IRQFLAGS + bl trace_hardirqs_on +@@ -641,6 +646,7 @@ el1_preempt: + 1: bl preempt_schedule_irq // irq en/disable is done inside + ldr x0, [tsk, #TSK_TI_FLAGS] // get new tasks TI_FLAGS + tbnz x0, #TIF_NEED_RESCHED, 1b // needs rescheduling? ++ tbnz x0, #TIF_NEED_RESCHED_LAZY, 1b // needs rescheduling? + ret x24 + #endif + +diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c +index 58c53bc96928..71252cd8b594 100644 +--- a/arch/arm64/kernel/fpsimd.c ++++ b/arch/arm64/kernel/fpsimd.c +@@ -159,6 +159,16 @@ static void sve_free(struct task_struct *task) + __sve_free(task); + } + ++static void *sve_free_atomic(struct task_struct *task) ++{ ++ void *sve_state = task->thread.sve_state; ++ ++ WARN_ON(test_tsk_thread_flag(task, TIF_SVE)); ++ ++ task->thread.sve_state = NULL; ++ return sve_state; ++} ++ + /* + * TIF_SVE controls whether a task can use SVE without trapping while + * in userspace, and also the way a task's FPSIMD/SVE state is stored +@@ -547,6 +557,7 @@ int sve_set_vector_length(struct task_struct *task, + * non-SVE thread. + */ + if (task == current) { ++ preempt_disable(); + local_bh_disable(); + + fpsimd_save(); +@@ -557,8 +568,10 @@ int sve_set_vector_length(struct task_struct *task, + if (test_and_clear_tsk_thread_flag(task, TIF_SVE)) + sve_to_fpsimd(task); + +- if (task == current) ++ if (task == current) { + local_bh_enable(); ++ preempt_enable(); ++ } + + /* + * Force reallocation of task SVE state to the correct size +@@ -813,6 +826,7 @@ asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs) + + sve_alloc(current); + ++ preempt_disable(); + local_bh_disable(); + + fpsimd_save(); +@@ -826,6 +840,7 @@ asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs) + WARN_ON(1); /* SVE access shouldn't have trapped */ + + local_bh_enable(); ++ preempt_enable(); + } + + /* +@@ -892,10 +907,12 @@ void fpsimd_thread_switch(struct task_struct *next) + void fpsimd_flush_thread(void) + { + int vl, supported_vl; ++ void *mem = NULL; + + if (!system_supports_fpsimd()) + return; + ++ preempt_disable(); + local_bh_disable(); + + memset(¤t->thread.uw.fpsimd_state, 0, +@@ -904,7 +921,7 @@ void fpsimd_flush_thread(void) + + if (system_supports_sve()) { + clear_thread_flag(TIF_SVE); +- sve_free(current); ++ mem = sve_free_atomic(current); + + /* + * Reset the task vector length as required. +@@ -940,6 +957,8 @@ void fpsimd_flush_thread(void) + set_thread_flag(TIF_FOREIGN_FPSTATE); + + local_bh_enable(); ++ preempt_enable(); ++ kfree(mem); + } + + /* +@@ -951,9 +970,11 @@ void fpsimd_preserve_current_state(void) + if (!system_supports_fpsimd()) + return; + ++ preempt_disable(); + local_bh_disable(); + fpsimd_save(); + local_bh_enable(); ++ preempt_enable(); + } + + /* +@@ -1011,6 +1032,7 @@ void fpsimd_restore_current_state(void) + if (!system_supports_fpsimd()) + return; + ++ preempt_disable(); + local_bh_disable(); + + if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { +@@ -1019,6 +1041,7 @@ void fpsimd_restore_current_state(void) + } + + local_bh_enable(); ++ preempt_enable(); + } + + /* +@@ -1031,6 +1054,7 @@ void fpsimd_update_current_state(struct user_fpsimd_state const *state) + if (!system_supports_fpsimd()) + return; + ++ preempt_disable(); + local_bh_disable(); + + current->thread.uw.fpsimd_state = *state; +@@ -1043,6 +1067,7 @@ void fpsimd_update_current_state(struct user_fpsimd_state const *state) + clear_thread_flag(TIF_FOREIGN_FPSTATE); + + local_bh_enable(); ++ preempt_enable(); + } + + /* +@@ -1088,6 +1113,7 @@ void kernel_neon_begin(void) + + BUG_ON(!may_use_simd()); + ++ preempt_disable(); + local_bh_disable(); + + __this_cpu_write(kernel_neon_busy, true); +@@ -1101,6 +1127,7 @@ void kernel_neon_begin(void) + preempt_disable(); + + local_bh_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(kernel_neon_begin); + +diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c +index 5dcc942906db..4fec251fe147 100644 +--- a/arch/arm64/kernel/signal.c ++++ b/arch/arm64/kernel/signal.c +@@ -926,7 +926,7 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, + /* Check valid user FS if needed */ + addr_limit_user_check(); + +- if (thread_flags & _TIF_NEED_RESCHED) { ++ if (thread_flags & _TIF_NEED_RESCHED_MASK) { + /* Unmask Debug and SError for the next task */ + local_daif_restore(DAIF_PROCCTX_NOIRQ); + +diff --git a/arch/arm64/kvm/va_layout.c b/arch/arm64/kvm/va_layout.c +index c712a7376bc1..792da0e125de 100644 +--- a/arch/arm64/kvm/va_layout.c ++++ b/arch/arm64/kvm/va_layout.c +@@ -33,7 +33,7 @@ static u8 tag_lsb; + static u64 tag_val; + static u64 va_mask; + +-static void compute_layout(void) ++__init void kvm_compute_layout(void) + { + phys_addr_t idmap_addr = __pa_symbol(__hyp_idmap_text_start); + u64 hyp_va_msb; +@@ -121,8 +121,6 @@ void __init kvm_update_va_mask(struct alt_instr *alt, + + BUG_ON(nr_inst != 5); + +- if (!has_vhe() && !va_mask) +- compute_layout(); + + for (i = 0; i < nr_inst; i++) { + u32 rd, rn, insn, oinsn; +@@ -167,9 +165,6 @@ void kvm_patch_vector_branch(struct alt_instr *alt, + return; + } + +- if (!va_mask) +- compute_layout(); +- + /* + * Compute HYP VA by using the same computation as kern_hyp_va() + */ +diff --git a/arch/hexagon/include/asm/spinlock_types.h b/arch/hexagon/include/asm/spinlock_types.h +index 7a906b5214a4..d8f596fec022 100644 +--- a/arch/hexagon/include/asm/spinlock_types.h ++++ b/arch/hexagon/include/asm/spinlock_types.h +@@ -21,10 +21,6 @@ + #ifndef _ASM_SPINLOCK_TYPES_H + #define _ASM_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int lock; + } arch_spinlock_t; +diff --git a/arch/ia64/include/asm/spinlock_types.h b/arch/ia64/include/asm/spinlock_types.h +index 6e345fefcdca..681408d6816f 100644 +--- a/arch/ia64/include/asm/spinlock_types.h ++++ b/arch/ia64/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef _ASM_IA64_SPINLOCK_TYPES_H + #define _ASM_IA64_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int lock; + } arch_spinlock_t; +diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c +index 6115464d5f03..f09e34c8409c 100644 +--- a/arch/ia64/kernel/mca.c ++++ b/arch/ia64/kernel/mca.c +@@ -1824,7 +1824,7 @@ format_mca_init_stack(void *mca_data, unsigned long offset, + ti->cpu = cpu; + p->stack = ti; + p->state = TASK_UNINTERRUPTIBLE; +- cpumask_set_cpu(cpu, &p->cpus_allowed); ++ cpumask_set_cpu(cpu, &p->cpus_mask); + INIT_LIST_HEAD(&p->tasks); + p->parent = p->real_parent = p->group_leader = p; + INIT_LIST_HEAD(&p->children); +diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig +index 201caf226b47..bd268302efa4 100644 +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -2517,7 +2517,7 @@ config MIPS_CRC_SUPPORT + # + config HIGHMEM + bool "High Memory Support" +- depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA ++ depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA && !PREEMPT_RT_FULL + + config CPU_SUPPORTS_HIGHMEM + bool +diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h +index e610473d61b8..1428b4febbc9 100644 +--- a/arch/mips/include/asm/switch_to.h ++++ b/arch/mips/include/asm/switch_to.h +@@ -42,7 +42,7 @@ extern struct task_struct *ll_task; + * inline to try to keep the overhead down. If we have been forced to run on + * a "CPU" with an FPU because of a previous high level of FP computation, + * but did not actually use the FPU during the most recent time-slice (CU1 +- * isn't set), we undo the restriction on cpus_allowed. ++ * isn't set), we undo the restriction on cpus_mask. + * + * We're not calling set_cpus_allowed() here, because we have no need to + * force prompt migration - we're already switching the current CPU to a +@@ -57,7 +57,7 @@ do { \ + test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \ + (!(KSTK_STATUS(prev) & ST0_CU1))) { \ + clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \ +- prev->cpus_allowed = prev->thread.user_cpus_allowed; \ ++ prev->cpus_mask = prev->thread.user_cpus_allowed; \ + } \ + next->thread.emulated_fp = 0; \ + } while(0) +diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c +index a7c0f97e4b0d..1a08428eedcf 100644 +--- a/arch/mips/kernel/mips-mt-fpaff.c ++++ b/arch/mips/kernel/mips-mt-fpaff.c +@@ -177,7 +177,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len, + if (retval) + goto out_unlock; + +- cpumask_or(&allowed, &p->thread.user_cpus_allowed, &p->cpus_allowed); ++ cpumask_or(&allowed, &p->thread.user_cpus_allowed, p->cpus_ptr); + cpumask_and(&mask, &allowed, cpu_active_mask); + + out_unlock: +diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c +index 9dab0ed1b227..3623cf32f5f4 100644 +--- a/arch/mips/kernel/traps.c ++++ b/arch/mips/kernel/traps.c +@@ -1174,12 +1174,12 @@ static void mt_ase_fp_affinity(void) + * restricted the allowed set to exclude any CPUs with FPUs, + * we'll skip the procedure. + */ +- if (cpumask_intersects(¤t->cpus_allowed, &mt_fpu_cpumask)) { ++ if (cpumask_intersects(¤t->cpus_mask, &mt_fpu_cpumask)) { + cpumask_t tmask; + + current->thread.user_cpus_allowed +- = current->cpus_allowed; +- cpumask_and(&tmask, ¤t->cpus_allowed, ++ = current->cpus_mask; ++ cpumask_and(&tmask, ¤t->cpus_mask, + &mt_fpu_cpumask); + set_cpus_allowed_ptr(current, &tmask); + set_thread_flag(TIF_FPUBOUND); +diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig +index a80669209155..d4835f8cfcf2 100644 +--- a/arch/powerpc/Kconfig ++++ b/arch/powerpc/Kconfig +@@ -105,10 +105,11 @@ config LOCKDEP_SUPPORT + + config RWSEM_GENERIC_SPINLOCK + bool ++ default y if PREEMPT_RT_FULL + + config RWSEM_XCHGADD_ALGORITHM + bool +- default y ++ default y if !PREEMPT_RT_FULL + + config GENERIC_LOCKBREAK + bool +@@ -215,6 +216,7 @@ config PPC + select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI && !HAVE_HARDLOCKUP_DETECTOR_ARCH + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select HAVE_RCU_TABLE_FREE if SMP + select HAVE_REGS_AND_STACK_ACCESS_API + select HAVE_RELIABLE_STACKTRACE if PPC64 && CPU_LITTLE_ENDIAN +@@ -397,7 +399,7 @@ menu "Kernel options" + + config HIGHMEM + bool "High memory support" +- depends on PPC32 ++ depends on PPC32 && !PREEMPT_RT_FULL + + source kernel/Kconfig.hz + +diff --git a/arch/powerpc/include/asm/spinlock_types.h b/arch/powerpc/include/asm/spinlock_types.h +index 87adaf13b7e8..7305cb6a53e4 100644 +--- a/arch/powerpc/include/asm/spinlock_types.h ++++ b/arch/powerpc/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef _ASM_POWERPC_SPINLOCK_TYPES_H + #define _ASM_POWERPC_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int slock; + } arch_spinlock_t; +diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h +index 3c0002044bc9..64c3d1a720e2 100644 +--- a/arch/powerpc/include/asm/thread_info.h ++++ b/arch/powerpc/include/asm/thread_info.h +@@ -37,6 +37,8 @@ struct thread_info { + int cpu; /* cpu we're on */ + int preempt_count; /* 0 => preemptable, + <0 => BUG */ ++ int preempt_lazy_count; /* 0 => preemptable, ++ <0 => BUG */ + unsigned long local_flags; /* private flags for thread */ + #ifdef CONFIG_LIVEPATCH + unsigned long *livepatch_sp; +@@ -81,18 +83,18 @@ extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src + #define TIF_SIGPENDING 1 /* signal pending */ + #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ + #define TIF_FSCHECK 3 /* Check FS is USER_DS on return */ +-#define TIF_32BIT 4 /* 32 bit binary */ + #define TIF_RESTORE_TM 5 /* need to restore TM FP/VEC/VSX */ + #define TIF_PATCH_PENDING 6 /* pending live patching update */ + #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ + #define TIF_SINGLESTEP 8 /* singlestepping active */ + #define TIF_NOHZ 9 /* in adaptive nohz mode */ + #define TIF_SECCOMP 10 /* secure computing */ +-#define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */ +-#define TIF_NOERROR 12 /* Force successful syscall return */ ++ ++#define TIF_NEED_RESCHED_LAZY 11 /* lazy rescheduling necessary */ ++#define TIF_SYSCALL_TRACEPOINT 12 /* syscall tracepoint instrumentation */ ++ + #define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ + #define TIF_UPROBE 14 /* breakpointed or single-stepping */ +-#define TIF_SYSCALL_TRACEPOINT 15 /* syscall tracepoint instrumentation */ + #define TIF_EMULATE_STACK_STORE 16 /* Is an instruction emulation + for stack store? */ + #define TIF_MEMDIE 17 /* is terminating due to OOM killer */ +@@ -100,6 +102,10 @@ extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src + #define TIF_ELF2ABI 18 /* function descriptors must die! */ + #endif + #define TIF_POLLING_NRFLAG 19 /* true if poll_idle() is polling TIF_NEED_RESCHED */ ++#define TIF_32BIT 20 /* 32 bit binary */ ++#define TIF_RESTOREALL 21 /* Restore all regs (implies NOERROR) */ ++#define TIF_NOERROR 22 /* Force successful syscall return */ ++ + + /* as above, but as bit values */ + #define _TIF_SYSCALL_TRACE (1<flags) + set_bits(irqtp->flags, &curtp->flags); + } ++#endif + + irq_hw_number_t virq_to_hw(unsigned int virq) + { +diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S +index 695b24a2d954..032ada21b7bd 100644 +--- a/arch/powerpc/kernel/misc_32.S ++++ b/arch/powerpc/kernel/misc_32.S +@@ -42,6 +42,7 @@ + * We store the saved ksp_limit in the unused part + * of the STACK_FRAME_OVERHEAD + */ ++#ifndef CONFIG_PREEMPT_RT_FULL + _GLOBAL(call_do_softirq) + mflr r0 + stw r0,4(r1) +@@ -58,6 +59,7 @@ _GLOBAL(call_do_softirq) + stw r10,THREAD+KSP_LIMIT(r2) + mtlr r0 + blr ++#endif + + /* + * void call_do_irq(struct pt_regs *regs, struct thread_info *irqtp); +diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S +index 262ba9481781..4935ef9a142e 100644 +--- a/arch/powerpc/kernel/misc_64.S ++++ b/arch/powerpc/kernel/misc_64.S +@@ -32,6 +32,7 @@ + + .text + ++#ifndef CONFIG_PREEMPT_RT_FULL + _GLOBAL(call_do_softirq) + mflr r0 + std r0,16(r1) +@@ -42,6 +43,7 @@ _GLOBAL(call_do_softirq) + ld r0,16(r1) + mtlr r0 + blr ++#endif + + _GLOBAL(call_do_irq) + mflr r0 +diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig +index 68a0e9d5b440..6f4d5d7615af 100644 +--- a/arch/powerpc/kvm/Kconfig ++++ b/arch/powerpc/kvm/Kconfig +@@ -178,6 +178,7 @@ config KVM_E500MC + config KVM_MPIC + bool "KVM in-kernel MPIC emulation" + depends on KVM && E500 ++ depends on !PREEMPT_RT_FULL + select HAVE_KVM_IRQCHIP + select HAVE_KVM_IRQFD + select HAVE_KVM_IRQ_ROUTING +diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c +index c9ef3c532169..cb10249b1125 100644 +--- a/arch/powerpc/platforms/cell/spufs/sched.c ++++ b/arch/powerpc/platforms/cell/spufs/sched.c +@@ -141,7 +141,7 @@ void __spu_update_sched_info(struct spu_context *ctx) + * runqueue. The context will be rescheduled on the proper node + * if it is timesliced or preempted. + */ +- cpumask_copy(&ctx->cpus_allowed, ¤t->cpus_allowed); ++ cpumask_copy(&ctx->cpus_allowed, current->cpus_ptr); + + /* Save the current cpu id for spu interrupt routing. */ + ctx->last_ran = raw_smp_processor_id(); +diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c +index e7075aaff1bb..1580464a9d5b 100644 +--- a/arch/powerpc/platforms/ps3/device-init.c ++++ b/arch/powerpc/platforms/ps3/device-init.c +@@ -752,8 +752,8 @@ static int ps3_notification_read_write(struct ps3_notification_device *dev, + } + pr_debug("%s:%u: notification %s issued\n", __func__, __LINE__, op); + +- res = wait_event_interruptible(dev->done.wait, +- dev->done.done || kthread_should_stop()); ++ res = swait_event_interruptible_exclusive(dev->done.wait, ++ dev->done.done || kthread_should_stop()); + if (kthread_should_stop()) + res = -EINTR; + if (res) { +diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c +index 06f02960b439..d80d919c78d3 100644 +--- a/arch/powerpc/platforms/pseries/iommu.c ++++ b/arch/powerpc/platforms/pseries/iommu.c +@@ -38,6 +38,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -212,6 +213,7 @@ static int tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, + } + + static DEFINE_PER_CPU(__be64 *, tce_page); ++static DEFINE_LOCAL_IRQ_LOCK(tcp_page_lock); + + static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, + long npages, unsigned long uaddr, +@@ -232,7 +234,8 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, + direction, attrs); + } + +- local_irq_save(flags); /* to protect tcep and the page behind it */ ++ /* to protect tcep and the page behind it */ ++ local_lock_irqsave(tcp_page_lock, flags); + + tcep = __this_cpu_read(tce_page); + +@@ -243,7 +246,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, + tcep = (__be64 *)__get_free_page(GFP_ATOMIC); + /* If allocation fails, fall back to the loop implementation */ + if (!tcep) { +- local_irq_restore(flags); ++ local_unlock_irqrestore(tcp_page_lock, flags); + return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, + direction, attrs); + } +@@ -277,7 +280,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, + tcenum += limit; + } while (npages > 0 && !rc); + +- local_irq_restore(flags); ++ local_unlock_irqrestore(tcp_page_lock, flags); + + if (unlikely(rc == H_NOT_ENOUGH_RESOURCES)) { + ret = (int)rc; +@@ -435,13 +438,14 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn, + u64 rc = 0; + long l, limit; + +- local_irq_disable(); /* to protect tcep and the page behind it */ ++ /* to protect tcep and the page behind it */ ++ local_lock_irq(tcp_page_lock); + tcep = __this_cpu_read(tce_page); + + if (!tcep) { + tcep = (__be64 *)__get_free_page(GFP_ATOMIC); + if (!tcep) { +- local_irq_enable(); ++ local_unlock_irq(tcp_page_lock); + return -ENOMEM; + } + __this_cpu_write(tce_page, tcep); +@@ -487,7 +491,7 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn, + + /* error cleanup: caller will clear whole range */ + +- local_irq_enable(); ++ local_unlock_irq(tcp_page_lock); + return rc; + } + +diff --git a/arch/s390/include/asm/spinlock_types.h b/arch/s390/include/asm/spinlock_types.h +index cfed272e4fd5..8e28e8176ec8 100644 +--- a/arch/s390/include/asm/spinlock_types.h ++++ b/arch/s390/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef __ASM_SPINLOCK_TYPES_H + #define __ASM_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + int lock; + } __attribute__ ((aligned (4))) arch_spinlock_t; +diff --git a/arch/sh/include/asm/spinlock_types.h b/arch/sh/include/asm/spinlock_types.h +index e82369f286a2..22ca9a98bbb8 100644 +--- a/arch/sh/include/asm/spinlock_types.h ++++ b/arch/sh/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef __ASM_SH_SPINLOCK_TYPES_H + #define __ASM_SH_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int lock; + } arch_spinlock_t; +diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c +index 5717c7cbdd97..66dd399b2007 100644 +--- a/arch/sh/kernel/irq.c ++++ b/arch/sh/kernel/irq.c +@@ -148,6 +148,7 @@ void irq_ctx_exit(int cpu) + hardirq_ctx[cpu] = NULL; + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + void do_softirq_own_stack(void) + { + struct thread_info *curctx; +@@ -175,6 +176,7 @@ void do_softirq_own_stack(void) + "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr" + ); + } ++#endif + #else + static inline void handle_one_irq(unsigned int irq) + { +diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c +index 713670e6d13d..5dfc715343f9 100644 +--- a/arch/sparc/kernel/irq_64.c ++++ b/arch/sparc/kernel/irq_64.c +@@ -854,6 +854,7 @@ void __irq_entry handler_irq(int pil, struct pt_regs *regs) + set_irq_regs(old_regs); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + void do_softirq_own_stack(void) + { + void *orig_sp, *sp = softirq_stack[smp_processor_id()]; +@@ -868,6 +869,7 @@ void do_softirq_own_stack(void) + __asm__ __volatile__("mov %0, %%sp" + : : "r" (orig_sp)); + } ++#endif + + #ifdef CONFIG_HOTPLUG_CPU + void fixup_irqs(void) +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index e76d16ac2776..736e369e141b 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -180,6 +180,7 @@ config X86 + select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select HAVE_RCU_TABLE_FREE if PARAVIRT + select HAVE_RCU_TABLE_INVALIDATE if HAVE_RCU_TABLE_FREE + select HAVE_REGS_AND_STACK_ACCESS_API +@@ -264,8 +265,11 @@ config ARCH_MAY_HAVE_PC_FDC + def_bool y + depends on ISA_DMA_API + ++config RWSEM_GENERIC_SPINLOCK ++ def_bool PREEMPT_RT_FULL ++ + config RWSEM_XCHGADD_ALGORITHM +- def_bool y ++ def_bool !RWSEM_GENERIC_SPINLOCK && !PREEMPT_RT_FULL + + config GENERIC_CALIBRATE_DELAY + def_bool y +@@ -934,7 +938,7 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT + config MAXSMP + bool "Enable Maximum number of SMP Processors and NUMA Nodes" + depends on X86_64 && SMP && DEBUG_KERNEL +- select CPUMASK_OFFSTACK ++ select CPUMASK_OFFSTACK if !PREEMPT_RT_FULL + ---help--- + Enable maximum number of CPUS and NUMA Nodes for this architecture. + If unsure, say N. +diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c +index 917f25e4d0a8..58d8c03fc32d 100644 +--- a/arch/x86/crypto/aesni-intel_glue.c ++++ b/arch/x86/crypto/aesni-intel_glue.c +@@ -434,14 +434,14 @@ static int ecb_encrypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -456,14 +456,14 @@ static int ecb_decrypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -478,14 +478,14 @@ static int cbc_encrypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -500,14 +500,14 @@ static int cbc_decrypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -557,18 +557,20 @@ static int ctr_crypt(struct skcipher_request *req) + + err = skcipher_walk_virt(&walk, req, true); + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) { ++ kernel_fpu_begin(); + aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = skcipher_walk_done(&walk, nbytes); + } + if (walk.nbytes) { ++ kernel_fpu_begin(); + ctr_crypt_final(ctx, &walk); ++ kernel_fpu_end(); + err = skcipher_walk_done(&walk, 0); + } +- kernel_fpu_end(); + + return err; + } +diff --git a/arch/x86/crypto/cast5_avx_glue.c b/arch/x86/crypto/cast5_avx_glue.c +index 41034745d6a2..d4bf7fc02ee7 100644 +--- a/arch/x86/crypto/cast5_avx_glue.c ++++ b/arch/x86/crypto/cast5_avx_glue.c +@@ -61,7 +61,7 @@ static inline void cast5_fpu_end(bool fpu_enabled) + + static int ecb_crypt(struct skcipher_request *req, bool enc) + { +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct cast5_ctx *ctx = crypto_skcipher_ctx(tfm); + struct skcipher_walk walk; +@@ -76,7 +76,7 @@ static int ecb_crypt(struct skcipher_request *req, bool enc) + u8 *wsrc = walk.src.virt.addr; + u8 *wdst = walk.dst.virt.addr; + +- fpu_enabled = cast5_fpu_begin(fpu_enabled, &walk, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, &walk, nbytes); + + /* Process multi-block batch */ + if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) { +@@ -105,10 +105,9 @@ static int ecb_crypt(struct skcipher_request *req, bool enc) + } while (nbytes >= bsize); + + done: ++ cast5_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } +- +- cast5_fpu_end(fpu_enabled); + return err; + } + +@@ -212,7 +211,7 @@ static int cbc_decrypt(struct skcipher_request *req) + { + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct cast5_ctx *ctx = crypto_skcipher_ctx(tfm); +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct skcipher_walk walk; + unsigned int nbytes; + int err; +@@ -220,12 +219,11 @@ static int cbc_decrypt(struct skcipher_request *req) + err = skcipher_walk_virt(&walk, req, false); + + while ((nbytes = walk.nbytes)) { +- fpu_enabled = cast5_fpu_begin(fpu_enabled, &walk, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, &walk, nbytes); + nbytes = __cbc_decrypt(ctx, &walk); ++ cast5_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } +- +- cast5_fpu_end(fpu_enabled); + return err; + } + +@@ -292,7 +290,7 @@ static int ctr_crypt(struct skcipher_request *req) + { + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct cast5_ctx *ctx = crypto_skcipher_ctx(tfm); +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct skcipher_walk walk; + unsigned int nbytes; + int err; +@@ -300,13 +298,12 @@ static int ctr_crypt(struct skcipher_request *req) + err = skcipher_walk_virt(&walk, req, false); + + while ((nbytes = walk.nbytes) >= CAST5_BLOCK_SIZE) { +- fpu_enabled = cast5_fpu_begin(fpu_enabled, &walk, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, &walk, nbytes); + nbytes = __ctr_crypt(&walk, ctx); ++ cast5_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } + +- cast5_fpu_end(fpu_enabled); +- + if (walk.nbytes) { + ctr_crypt_final(&walk, ctx); + err = skcipher_walk_done(&walk, 0); +diff --git a/arch/x86/crypto/chacha20_glue.c b/arch/x86/crypto/chacha20_glue.c +index dce7c5d39c2f..6194160b7fbc 100644 +--- a/arch/x86/crypto/chacha20_glue.c ++++ b/arch/x86/crypto/chacha20_glue.c +@@ -81,23 +81,24 @@ static int chacha20_simd(struct skcipher_request *req) + + crypto_chacha20_init(state, ctx, walk.iv); + +- kernel_fpu_begin(); +- + while (walk.nbytes >= CHACHA20_BLOCK_SIZE) { ++ kernel_fpu_begin(); ++ + chacha20_dosimd(state, walk.dst.virt.addr, walk.src.virt.addr, + rounddown(walk.nbytes, CHACHA20_BLOCK_SIZE)); ++ kernel_fpu_end(); + err = skcipher_walk_done(&walk, + walk.nbytes % CHACHA20_BLOCK_SIZE); + } + + if (walk.nbytes) { ++ kernel_fpu_begin(); + chacha20_dosimd(state, walk.dst.virt.addr, walk.src.virt.addr, + walk.nbytes); ++ kernel_fpu_end(); + err = skcipher_walk_done(&walk, 0); + } + +- kernel_fpu_end(); +- + return err; + } + +diff --git a/arch/x86/crypto/glue_helper.c b/arch/x86/crypto/glue_helper.c +index a78ef99a9981..dac489a1c4da 100644 +--- a/arch/x86/crypto/glue_helper.c ++++ b/arch/x86/crypto/glue_helper.c +@@ -38,7 +38,7 @@ int glue_ecb_req_128bit(const struct common_glue_ctx *gctx, + void *ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)); + const unsigned int bsize = 128 / 8; + struct skcipher_walk walk; +- bool fpu_enabled = false; ++ bool fpu_enabled; + unsigned int nbytes; + int err; + +@@ -51,7 +51,7 @@ int glue_ecb_req_128bit(const struct common_glue_ctx *gctx, + unsigned int i; + + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- &walk, fpu_enabled, nbytes); ++ &walk, false, nbytes); + for (i = 0; i < gctx->num_funcs; i++) { + func_bytes = bsize * gctx->funcs[i].num_blocks; + +@@ -69,10 +69,9 @@ int glue_ecb_req_128bit(const struct common_glue_ctx *gctx, + if (nbytes < bsize) + break; + } ++ glue_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } +- +- glue_fpu_end(fpu_enabled); + return err; + } + EXPORT_SYMBOL_GPL(glue_ecb_req_128bit); +@@ -115,7 +114,7 @@ int glue_cbc_decrypt_req_128bit(const struct common_glue_ctx *gctx, + void *ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)); + const unsigned int bsize = 128 / 8; + struct skcipher_walk walk; +- bool fpu_enabled = false; ++ bool fpu_enabled; + unsigned int nbytes; + int err; + +@@ -129,7 +128,7 @@ int glue_cbc_decrypt_req_128bit(const struct common_glue_ctx *gctx, + u128 last_iv; + + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- &walk, fpu_enabled, nbytes); ++ &walk, false, nbytes); + /* Start of the last block. */ + src += nbytes / bsize - 1; + dst += nbytes / bsize - 1; +@@ -161,10 +160,10 @@ int glue_cbc_decrypt_req_128bit(const struct common_glue_ctx *gctx, + done: + u128_xor(dst, dst, (u128 *)walk.iv); + *(u128 *)walk.iv = last_iv; ++ glue_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } + +- glue_fpu_end(fpu_enabled); + return err; + } + EXPORT_SYMBOL_GPL(glue_cbc_decrypt_req_128bit); +@@ -175,7 +174,7 @@ int glue_ctr_req_128bit(const struct common_glue_ctx *gctx, + void *ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)); + const unsigned int bsize = 128 / 8; + struct skcipher_walk walk; +- bool fpu_enabled = false; ++ bool fpu_enabled; + unsigned int nbytes; + int err; + +@@ -189,7 +188,7 @@ int glue_ctr_req_128bit(const struct common_glue_ctx *gctx, + le128 ctrblk; + + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- &walk, fpu_enabled, nbytes); ++ &walk, false, nbytes); + + be128_to_le128(&ctrblk, (be128 *)walk.iv); + +@@ -213,11 +212,10 @@ int glue_ctr_req_128bit(const struct common_glue_ctx *gctx, + } + + le128_to_be128((be128 *)walk.iv, &ctrblk); ++ glue_fpu_end(fpu_enabled); + err = skcipher_walk_done(&walk, nbytes); + } + +- glue_fpu_end(fpu_enabled); +- + if (nbytes) { + le128 ctrblk; + u128 tmp; +@@ -278,7 +276,7 @@ int glue_xts_req_128bit(const struct common_glue_ctx *gctx, + { + const unsigned int bsize = 128 / 8; + struct skcipher_walk walk; +- bool fpu_enabled = false; ++ bool fpu_enabled; + unsigned int nbytes; + int err; + +@@ -289,21 +287,24 @@ int glue_xts_req_128bit(const struct common_glue_ctx *gctx, + + /* set minimum length to bsize, for tweak_fn */ + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- &walk, fpu_enabled, ++ &walk, false, + nbytes < bsize ? bsize : nbytes); + + /* calculate first value of T */ + tweak_fn(tweak_ctx, walk.iv, walk.iv); + + while (nbytes) { ++ fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, ++ &walk, fpu_enabled, ++ nbytes < bsize ? bsize : nbytes); + nbytes = __glue_xts_req_128bit(gctx, crypt_ctx, &walk); + ++ glue_fpu_end(fpu_enabled); ++ fpu_enabled = false; + err = skcipher_walk_done(&walk, nbytes); + nbytes = walk.nbytes; + } + +- glue_fpu_end(fpu_enabled); +- + return err; + } + EXPORT_SYMBOL_GPL(glue_xts_req_128bit); +diff --git a/arch/x86/entry/common.c b/arch/x86/entry/common.c +index 8353348ddeaf..3b5e41d9b29d 100644 +--- a/arch/x86/entry/common.c ++++ b/arch/x86/entry/common.c +@@ -134,7 +134,7 @@ static long syscall_trace_enter(struct pt_regs *regs) + + #define EXIT_TO_USERMODE_LOOP_FLAGS \ + (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_UPROBE | \ +- _TIF_NEED_RESCHED | _TIF_USER_RETURN_NOTIFY | _TIF_PATCH_PENDING) ++ _TIF_NEED_RESCHED_MASK | _TIF_USER_RETURN_NOTIFY | _TIF_PATCH_PENDING) + + static void exit_to_usermode_loop(struct pt_regs *regs, u32 cached_flags) + { +@@ -149,9 +149,16 @@ static void exit_to_usermode_loop(struct pt_regs *regs, u32 cached_flags) + /* We have work to do. */ + local_irq_enable(); + +- if (cached_flags & _TIF_NEED_RESCHED) ++ if (cached_flags & _TIF_NEED_RESCHED_MASK) + schedule(); + ++#ifdef ARCH_RT_DELAYS_SIGNAL_SEND ++ if (unlikely(current->forced_info.si_signo)) { ++ struct task_struct *t = current; ++ force_sig_info(t->forced_info.si_signo, &t->forced_info, t); ++ t->forced_info.si_signo = 0; ++ } ++#endif + if (cached_flags & _TIF_UPROBE) + uprobe_notify_resume(regs); + +diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S +index b5c2b1091b18..0b25d2efdb87 100644 +--- a/arch/x86/entry/entry_32.S ++++ b/arch/x86/entry/entry_32.S +@@ -766,8 +766,25 @@ END(ret_from_exception) + ENTRY(resume_kernel) + DISABLE_INTERRUPTS(CLBR_ANY) + .Lneed_resched: ++ # preempt count == 0 + NEED_RS set? + cmpl $0, PER_CPU_VAR(__preempt_count) ++#ifndef CONFIG_PREEMPT_LAZY + jnz restore_all_kernel ++#else ++ jz test_int_off ++ ++ # atleast preempt count == 0 ? ++ cmpl $_PREEMPT_ENABLED,PER_CPU_VAR(__preempt_count) ++ jne restore_all_kernel ++ ++ movl PER_CPU_VAR(current_task), %ebp ++ cmpl $0,TASK_TI_preempt_lazy_count(%ebp) # non-zero preempt_lazy_count ? ++ jnz restore_all_kernel ++ ++ testl $_TIF_NEED_RESCHED_LAZY, TASK_TI_flags(%ebp) ++ jz restore_all_kernel ++test_int_off: ++#endif + testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ? + jz restore_all_kernel + call preempt_schedule_irq +diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S +index c90e00db5c13..23dda6f4a69f 100644 +--- a/arch/x86/entry/entry_64.S ++++ b/arch/x86/entry/entry_64.S +@@ -708,7 +708,23 @@ retint_kernel: + btl $9, EFLAGS(%rsp) /* were interrupts off? */ + jnc 1f + 0: cmpl $0, PER_CPU_VAR(__preempt_count) ++#ifndef CONFIG_PREEMPT_LAZY + jnz 1f ++#else ++ jz do_preempt_schedule_irq ++ ++ # atleast preempt count == 0 ? ++ cmpl $_PREEMPT_ENABLED,PER_CPU_VAR(__preempt_count) ++ jnz 1f ++ ++ movq PER_CPU_VAR(current_task), %rcx ++ cmpl $0, TASK_TI_preempt_lazy_count(%rcx) ++ jnz 1f ++ ++ btl $TIF_NEED_RESCHED_LAZY,TASK_TI_flags(%rcx) ++ jnc 1f ++do_preempt_schedule_irq: ++#endif + call preempt_schedule_irq + jmp 0b + 1: +@@ -1059,6 +1075,7 @@ bad_gs: + jmp 2b + .previous + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* Call softirq on interrupt stack. Interrupts are off. */ + ENTRY(do_softirq_own_stack) + pushq %rbp +@@ -1069,6 +1086,7 @@ ENTRY(do_softirq_own_stack) + leaveq + ret + ENDPROC(do_softirq_own_stack) ++#endif + + #ifdef CONFIG_XEN + idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0 +diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h +index b56d504af654..e51c7094075d 100644 +--- a/arch/x86/include/asm/fpu/api.h ++++ b/arch/x86/include/asm/fpu/api.h +@@ -20,6 +20,7 @@ + */ + extern void kernel_fpu_begin(void); + extern void kernel_fpu_end(void); ++extern void kernel_fpu_resched(void); + extern bool irq_fpu_usable(void); + + /* +diff --git a/arch/x86/include/asm/preempt.h b/arch/x86/include/asm/preempt.h +index 7f2dbd91fc74..f66708779274 100644 +--- a/arch/x86/include/asm/preempt.h ++++ b/arch/x86/include/asm/preempt.h +@@ -86,17 +86,46 @@ static __always_inline void __preempt_count_sub(int val) + * a decrement which hits zero means we have no preempt_count and should + * reschedule. + */ +-static __always_inline bool __preempt_count_dec_and_test(void) ++static __always_inline bool ____preempt_count_dec_and_test(void) + { + GEN_UNARY_RMWcc("decl", __preempt_count, __percpu_arg(0), e); + } + ++static __always_inline bool __preempt_count_dec_and_test(void) ++{ ++ if (____preempt_count_dec_and_test()) ++ return true; ++#ifdef CONFIG_PREEMPT_LAZY ++ if (current_thread_info()->preempt_lazy_count) ++ return false; ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++#else ++ return false; ++#endif ++} ++ + /* + * Returns true when we need to resched and can (barring IRQ state). + */ + static __always_inline bool should_resched(int preempt_offset) + { ++#ifdef CONFIG_PREEMPT_LAZY ++ u32 tmp; ++ ++ tmp = raw_cpu_read_4(__preempt_count); ++ if (tmp == preempt_offset) ++ return true; ++ ++ /* preempt count == 0 ? */ ++ tmp &= ~PREEMPT_NEED_RESCHED; ++ if (tmp != preempt_offset) ++ return false; ++ if (current_thread_info()->preempt_lazy_count) ++ return false; ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++#else + return unlikely(raw_cpu_read_4(__preempt_count) == preempt_offset); ++#endif + } + + #ifdef CONFIG_PREEMPT +diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm/signal.h +index 33d3c88a7225..c00e27af2205 100644 +--- a/arch/x86/include/asm/signal.h ++++ b/arch/x86/include/asm/signal.h +@@ -28,6 +28,19 @@ typedef struct { + #define SA_IA32_ABI 0x02000000u + #define SA_X32_ABI 0x01000000u + ++/* ++ * Because some traps use the IST stack, we must keep preemption ++ * disabled while calling do_trap(), but do_trap() may call ++ * force_sig_info() which will grab the signal spin_locks for the ++ * task, which in PREEMPT_RT_FULL are mutexes. By defining ++ * ARCH_RT_DELAYS_SIGNAL_SEND the force_sig_info() will set ++ * TIF_NOTIFY_RESUME and set up the signal to be sent on exit of the ++ * trap. ++ */ ++#if defined(CONFIG_PREEMPT_RT_FULL) ++#define ARCH_RT_DELAYS_SIGNAL_SEND ++#endif ++ + #ifndef CONFIG_COMPAT + typedef sigset_t compat_sigset_t; + #endif +diff --git a/arch/x86/include/asm/stackprotector.h b/arch/x86/include/asm/stackprotector.h +index 8ec97a62c245..7bc85841fc56 100644 +--- a/arch/x86/include/asm/stackprotector.h ++++ b/arch/x86/include/asm/stackprotector.h +@@ -60,7 +60,7 @@ + */ + static __always_inline void boot_init_stack_canary(void) + { +- u64 canary; ++ u64 uninitialized_var(canary); + u64 tsc; + + #ifdef CONFIG_X86_64 +@@ -71,8 +71,14 @@ static __always_inline void boot_init_stack_canary(void) + * of randomness. The TSC only matters for very early init, + * there it already has some randomness on most systems. Later + * on during the bootup the random pool has true entropy too. ++ * For preempt-rt we need to weaken the randomness a bit, as ++ * we can't call into the random generator from atomic context ++ * due to locking constraints. We just leave canary ++ * uninitialized and use the TSC based randomness on top of it. + */ ++#ifndef CONFIG_PREEMPT_RT_FULL + get_random_bytes(&canary, sizeof(canary)); ++#endif + tsc = rdtsc(); + canary += tsc + (tsc << 32UL); + canary &= CANARY_MASK; +diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h +index 82b73b75d67c..dc267291f131 100644 +--- a/arch/x86/include/asm/thread_info.h ++++ b/arch/x86/include/asm/thread_info.h +@@ -56,17 +56,24 @@ struct task_struct; + struct thread_info { + unsigned long flags; /* low level flags */ + u32 status; /* thread synchronous flags */ ++ int preempt_lazy_count; /* 0 => lazy preemptable ++ <0 => BUG */ + }; + + #define INIT_THREAD_INFO(tsk) \ + { \ + .flags = 0, \ ++ .preempt_lazy_count = 0, \ + } + + #else /* !__ASSEMBLY__ */ + + #include + ++#define GET_THREAD_INFO(reg) \ ++ _ASM_MOV PER_CPU_VAR(cpu_current_top_of_stack),reg ; \ ++ _ASM_SUB $(THREAD_SIZE),reg ; ++ + #endif + + /* +@@ -91,6 +98,7 @@ struct thread_info { + #define TIF_NOCPUID 15 /* CPUID is not accessible in userland */ + #define TIF_NOTSC 16 /* TSC is not accessible in userland */ + #define TIF_IA32 17 /* IA32 compatibility process */ ++#define TIF_NEED_RESCHED_LAZY 18 /* lazy rescheduling necessary */ + #define TIF_NOHZ 19 /* in adaptive nohz mode */ + #define TIF_MEMDIE 20 /* is terminating due to OOM killer */ + #define TIF_POLLING_NRFLAG 21 /* idle is polling for TIF_NEED_RESCHED */ +@@ -120,6 +128,7 @@ struct thread_info { + #define _TIF_NOCPUID (1 << TIF_NOCPUID) + #define _TIF_NOTSC (1 << TIF_NOTSC) + #define _TIF_IA32 (1 << TIF_IA32) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_NOHZ (1 << TIF_NOHZ) + #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) + #define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP) +@@ -165,6 +174,8 @@ struct thread_info { + #define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW|_TIF_USER_RETURN_NOTIFY) + #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW) + ++#define _TIF_NEED_RESCHED_MASK (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY) ++ + #define STACK_WARN (THREAD_SIZE/8) + + /* +diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c +index ff0d14cd9e82..c2bd6e0433f8 100644 +--- a/arch/x86/kernel/apic/io_apic.c ++++ b/arch/x86/kernel/apic/io_apic.c +@@ -1722,19 +1722,20 @@ static bool io_apic_level_ack_pending(struct mp_chip_data *data) + return false; + } + +-static inline bool ioapic_irqd_mask(struct irq_data *data) ++static inline bool ioapic_prepare_move(struct irq_data *data) + { + /* If we are moving the irq we need to mask it */ + if (unlikely(irqd_is_setaffinity_pending(data))) { +- mask_ioapic_irq(data); ++ if (!irqd_irq_masked(data)) ++ mask_ioapic_irq(data); + return true; + } + return false; + } + +-static inline void ioapic_irqd_unmask(struct irq_data *data, bool masked) ++static inline void ioapic_finish_move(struct irq_data *data, bool moveit) + { +- if (unlikely(masked)) { ++ if (unlikely(moveit)) { + /* Only migrate the irq if the ack has been received. + * + * On rare occasions the broadcast level triggered ack gets +@@ -1763,15 +1764,17 @@ static inline void ioapic_irqd_unmask(struct irq_data *data, bool masked) + */ + if (!io_apic_level_ack_pending(data->chip_data)) + irq_move_masked_irq(data); +- unmask_ioapic_irq(data); ++ /* If the irq is masked in the core, leave it */ ++ if (!irqd_irq_masked(data)) ++ unmask_ioapic_irq(data); + } + } + #else +-static inline bool ioapic_irqd_mask(struct irq_data *data) ++static inline bool ioapic_prepare_move(struct irq_data *data) + { + return false; + } +-static inline void ioapic_irqd_unmask(struct irq_data *data, bool masked) ++static inline void ioapic_finish_move(struct irq_data *data, bool moveit) + { + } + #endif +@@ -1780,11 +1783,11 @@ static void ioapic_ack_level(struct irq_data *irq_data) + { + struct irq_cfg *cfg = irqd_cfg(irq_data); + unsigned long v; +- bool masked; ++ bool moveit; + int i; + + irq_complete_move(cfg); +- masked = ioapic_irqd_mask(irq_data); ++ moveit = ioapic_prepare_move(irq_data); + + /* + * It appears there is an erratum which affects at least version 0x11 +@@ -1839,7 +1842,7 @@ static void ioapic_ack_level(struct irq_data *irq_data) + eoi_ioapic_pin(cfg->vector, irq_data->chip_data); + } + +- ioapic_irqd_unmask(irq_data, masked); ++ ioapic_finish_move(irq_data, moveit); + } + + static void ioapic_ir_ack_level(struct irq_data *irq_data) +diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c +index 01de31db300d..ce1c5b9fbd8c 100644 +--- a/arch/x86/kernel/asm-offsets.c ++++ b/arch/x86/kernel/asm-offsets.c +@@ -38,6 +38,7 @@ void common(void) { + + BLANK(); + OFFSET(TASK_TI_flags, task_struct, thread_info.flags); ++ OFFSET(TASK_TI_preempt_lazy_count, task_struct, thread_info.preempt_lazy_count); + OFFSET(TASK_addr_limit, task_struct, thread.addr_limit); + + BLANK(); +@@ -94,6 +95,7 @@ void common(void) { + + BLANK(); + DEFINE(PTREGS_SIZE, sizeof(struct pt_regs)); ++ DEFINE(_PREEMPT_ENABLED, PREEMPT_ENABLED); + + /* TLB state for the entry code */ + OFFSET(TLB_STATE_user_pcid_flush_mask, tlb_state, user_pcid_flush_mask); +diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c +index 912d53939f4f..6b8dc68b5ccc 100644 +--- a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c ++++ b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c +@@ -1435,7 +1435,7 @@ static int pseudo_lock_dev_mmap(struct file *filp, struct vm_area_struct *vma) + * may be scheduled elsewhere and invalidate entries in the + * pseudo-locked region. + */ +- if (!cpumask_subset(¤t->cpus_allowed, &plr->d->cpu_mask)) { ++ if (!cpumask_subset(current->cpus_ptr, &plr->d->cpu_mask)) { + mutex_unlock(&rdtgroup_mutex); + return -EINVAL; + } +diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c +index 2e5003fef51a..768c53767bb2 100644 +--- a/arch/x86/kernel/fpu/core.c ++++ b/arch/x86/kernel/fpu/core.c +@@ -136,6 +136,18 @@ void kernel_fpu_end(void) + } + EXPORT_SYMBOL_GPL(kernel_fpu_end); + ++void kernel_fpu_resched(void) ++{ ++ WARN_ON_FPU(!this_cpu_read(in_kernel_fpu)); ++ ++ if (should_resched(PREEMPT_OFFSET)) { ++ kernel_fpu_end(); ++ cond_resched(); ++ kernel_fpu_begin(); ++ } ++} ++EXPORT_SYMBOL_GPL(kernel_fpu_resched); ++ + /* + * Save the FPU state (mark it for reload if necessary): + * +diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c +index d99a8ee9e185..5e0274a94133 100644 +--- a/arch/x86/kernel/fpu/signal.c ++++ b/arch/x86/kernel/fpu/signal.c +@@ -344,10 +344,12 @@ static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size) + sanitize_restored_xstate(tsk, &env, xfeatures, fx_only); + } + ++ preempt_disable(); + local_bh_disable(); + fpu->initialized = 1; + fpu__restore(fpu); + local_bh_enable(); ++ preempt_enable(); + + return err; + } else { +diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c +index 95600a99ae93..9192d76085ba 100644 +--- a/arch/x86/kernel/irq_32.c ++++ b/arch/x86/kernel/irq_32.c +@@ -130,6 +130,7 @@ void irq_ctx_init(int cpu) + cpu, per_cpu(hardirq_stack, cpu), per_cpu(softirq_stack, cpu)); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + void do_softirq_own_stack(void) + { + struct irq_stack *irqstk; +@@ -146,6 +147,7 @@ void do_softirq_own_stack(void) + + call_on_stack(__do_softirq, isp); + } ++#endif + + bool handle_irq(struct irq_desc *desc, struct pt_regs *regs) + { +diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c +index 020efe0f9614..5d0c975559ad 100644 +--- a/arch/x86/kernel/process_32.c ++++ b/arch/x86/kernel/process_32.c +@@ -38,6 +38,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -205,6 +206,35 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) + } + EXPORT_SYMBOL_GPL(start_thread); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) ++{ ++ int i; ++ ++ /* ++ * Clear @prev's kmap_atomic mappings ++ */ ++ for (i = 0; i < prev_p->kmap_idx; i++) { ++ int idx = i + KM_TYPE_NR * smp_processor_id(); ++ pte_t *ptep = kmap_pte - idx; ++ ++ kpte_clear_flush(ptep, __fix_to_virt(FIX_KMAP_BEGIN + idx)); ++ } ++ /* ++ * Restore @next_p's kmap_atomic mappings ++ */ ++ for (i = 0; i < next_p->kmap_idx; i++) { ++ int idx = i + KM_TYPE_NR * smp_processor_id(); ++ ++ if (!pte_none(next_p->kmap_pte[i])) ++ set_pte(kmap_pte - idx, next_p->kmap_pte[i]); ++ } ++} ++#else ++static inline void ++switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) { } ++#endif ++ + + /* + * switch_to(x,y) should switch tasks from x to y. +@@ -274,6 +304,8 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) + + switch_to_extra(prev_p, next_p); + ++ switch_kmaps(prev_p, next_p); ++ + /* + * Leave lazy mode, flushing any hypercalls made here. + * This must be done before restoring TLS segments so +diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c +index 031bd7f91f98..4b2a399f1df5 100644 +--- a/arch/x86/kvm/lapic.c ++++ b/arch/x86/kvm/lapic.c +@@ -2252,7 +2252,7 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu) + apic->vcpu = vcpu; + + hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC, +- HRTIMER_MODE_ABS_PINNED); ++ HRTIMER_MODE_ABS_PINNED_HARD); + apic->lapic_timer.timer.function = apic_timer_fn; + + /* +diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c +index cea6568667c4..c90545667fd6 100644 +--- a/arch/x86/kvm/x86.c ++++ b/arch/x86/kvm/x86.c +@@ -6756,6 +6756,13 @@ int kvm_arch_init(void *opaque) + goto out; + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { ++ printk(KERN_ERR "RT requires X86_FEATURE_CONSTANT_TSC\n"); ++ return -EOPNOTSUPP; ++ } ++#endif ++ + r = kvm_mmu_module_init(); + if (r) + goto out_free_percpu; +diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c +index 6d18b70ed5a9..f752724c22e8 100644 +--- a/arch/x86/mm/highmem_32.c ++++ b/arch/x86/mm/highmem_32.c +@@ -32,10 +32,11 @@ EXPORT_SYMBOL(kunmap); + */ + void *kmap_atomic_prot(struct page *page, pgprot_t prot) + { ++ pte_t pte = mk_pte(page, prot); + unsigned long vaddr; + int idx, type; + +- preempt_disable(); ++ preempt_disable_nort(); + pagefault_disable(); + + if (!PageHighMem(page)) +@@ -45,7 +46,10 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot) + idx = type + KM_TYPE_NR*smp_processor_id(); + vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); + BUG_ON(!pte_none(*(kmap_pte-idx))); +- set_pte(kmap_pte-idx, mk_pte(page, prot)); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = pte; ++#endif ++ set_pte(kmap_pte-idx, pte); + arch_flush_lazy_mmu_mode(); + + return (void *)vaddr; +@@ -88,6 +92,9 @@ void __kunmap_atomic(void *kvaddr) + * is a bad idea also, in case the page changes cacheability + * attributes or becomes a protected page in a hypervisor. + */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = __pte(0); ++#endif + kpte_clear_flush(kmap_pte-idx, vaddr); + kmap_atomic_idx_pop(); + arch_flush_lazy_mmu_mode(); +@@ -100,7 +107,7 @@ void __kunmap_atomic(void *kvaddr) + #endif + + pagefault_enable(); +- preempt_enable(); ++ preempt_enable_nort(); + } + EXPORT_SYMBOL(__kunmap_atomic); + +diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c +index b3294d36769d..c0ec8d430c02 100644 +--- a/arch/x86/mm/iomap_32.c ++++ b/arch/x86/mm/iomap_32.c +@@ -59,6 +59,7 @@ EXPORT_SYMBOL_GPL(iomap_free); + + void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) + { ++ pte_t pte = pfn_pte(pfn, prot); + unsigned long vaddr; + int idx, type; + +@@ -68,7 +69,12 @@ void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) + type = kmap_atomic_idx_push(); + idx = type + KM_TYPE_NR * smp_processor_id(); + vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- set_pte(kmap_pte - idx, pfn_pte(pfn, prot)); ++ WARN_ON(!pte_none(*(kmap_pte - idx))); ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = pte; ++#endif ++ set_pte(kmap_pte - idx, pte); + arch_flush_lazy_mmu_mode(); + + return (void *)vaddr; +@@ -119,6 +125,9 @@ iounmap_atomic(void __iomem *kvaddr) + * is a bad idea also, in case the page changes cacheability + * attributes or becomes a protected page in a hypervisor. + */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = __pte(0); ++#endif + kpte_clear_flush(kmap_pte-idx, vaddr); + kmap_atomic_idx_pop(); + } +diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c +index e2d4b25c7aa4..9626ebb9e3c8 100644 +--- a/arch/x86/mm/pageattr.c ++++ b/arch/x86/mm/pageattr.c +@@ -687,12 +687,18 @@ __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address, + pgprot_t ref_prot; + + spin_lock(&pgd_lock); ++ /* ++ * Keep preemption disabled after __flush_tlb_all() which expects not be ++ * preempted during the flush of the local TLB. ++ */ ++ preempt_disable(); + /* + * Check for races, another CPU might have split this page + * up for us already: + */ + tmp = _lookup_address_cpa(cpa, address, &level); + if (tmp != kpte) { ++ preempt_enable(); + spin_unlock(&pgd_lock); + return 1; + } +@@ -726,6 +732,7 @@ __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address, + break; + + default: ++ preempt_enable(); + spin_unlock(&pgd_lock); + return 1; + } +@@ -764,6 +771,7 @@ __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address, + * going on. + */ + __flush_tlb_all(); ++ preempt_enable(); + spin_unlock(&pgd_lock); + + return 0; +diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c +index ee5d08f25ce4..e8da7f492970 100644 +--- a/arch/x86/platform/efi/efi_64.c ++++ b/arch/x86/platform/efi/efi_64.c +@@ -619,18 +619,16 @@ void __init efi_dump_pagetable(void) + + /* + * Makes the calling thread switch to/from efi_mm context. Can be used +- * for SetVirtualAddressMap() i.e. current->active_mm == init_mm as well +- * as during efi runtime calls i.e current->active_mm == current_mm. +- * We are not mm_dropping()/mm_grabbing() any mm, because we are not +- * losing/creating any references. ++ * in a kernel thread and user context. Preemption needs to remain disabled ++ * while the EFI-mm is borrowed. mmgrab()/mmdrop() is not used because the mm ++ * can not change under us. ++ * It should be ensured that there are no concurent calls to this function. + */ + void efi_switch_mm(struct mm_struct *mm) + { +- task_lock(current); + efi_scratch.prev_mm = current->active_mm; + current->active_mm = mm; + switch_mm(efi_scratch.prev_mm, mm, NULL); +- task_unlock(current); + } + + #ifdef CONFIG_EFI_MIXED +diff --git a/arch/xtensa/include/asm/spinlock_types.h b/arch/xtensa/include/asm/spinlock_types.h +index bb1fe6c1816e..8a22f1e7b6c9 100644 +--- a/arch/xtensa/include/asm/spinlock_types.h ++++ b/arch/xtensa/include/asm/spinlock_types.h +@@ -2,10 +2,6 @@ + #ifndef __ASM_SPINLOCK_TYPES_H + #define __ASM_SPINLOCK_TYPES_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + typedef struct { + volatile unsigned int slock; + } arch_spinlock_t; +diff --git a/block/blk-core.c b/block/blk-core.c +index 682bc561b77b..38b1bd493165 100644 +--- a/block/blk-core.c ++++ b/block/blk-core.c +@@ -189,6 +189,9 @@ void blk_rq_init(struct request_queue *q, struct request *rq) + + INIT_LIST_HEAD(&rq->queuelist); + INIT_LIST_HEAD(&rq->timeout_list); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ INIT_WORK(&rq->work, __blk_mq_complete_request_remote_work); ++#endif + rq->cpu = -1; + rq->q = q; + rq->__sector = (sector_t) -1; +@@ -964,12 +967,21 @@ void blk_queue_exit(struct request_queue *q) + percpu_ref_put(&q->q_usage_counter); + } + ++static void blk_queue_usage_counter_release_swork(struct swork_event *sev) ++{ ++ struct request_queue *q = ++ container_of(sev, struct request_queue, mq_pcpu_wake); ++ ++ wake_up_all(&q->mq_freeze_wq); ++} ++ + static void blk_queue_usage_counter_release(struct percpu_ref *ref) + { + struct request_queue *q = + container_of(ref, struct request_queue, q_usage_counter); + +- wake_up_all(&q->mq_freeze_wq); ++ if (wq_has_sleeper(&q->mq_freeze_wq)) ++ swork_queue(&q->mq_pcpu_wake); + } + + static void blk_rq_timed_out_timer(struct timer_list *t) +@@ -1066,6 +1078,7 @@ struct request_queue *blk_alloc_queue_node(gfp_t gfp_mask, int node_id, + queue_flag_set_unlocked(QUEUE_FLAG_BYPASS, q); + + init_waitqueue_head(&q->mq_freeze_wq); ++ INIT_SWORK(&q->mq_pcpu_wake, blk_queue_usage_counter_release_swork); + + /* + * Init percpu_ref in atomic mode so that it's faster to shutdown. +@@ -3955,6 +3968,8 @@ int __init blk_dev_init(void) + if (!kblockd_workqueue) + panic("Failed to create kblockd\n"); + ++ BUG_ON(swork_get()); ++ + request_cachep = kmem_cache_create("blkdev_requests", + sizeof(struct request), 0, SLAB_PANIC, NULL); + +diff --git a/block/blk-ioc.c b/block/blk-ioc.c +index 01580f88fcb3..98d87e52ccdc 100644 +--- a/block/blk-ioc.c ++++ b/block/blk-ioc.c +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + + #include "blk.h" + +@@ -118,7 +119,7 @@ static void ioc_release_fn(struct work_struct *work) + spin_unlock(q->queue_lock); + } else { + spin_unlock_irqrestore(&ioc->lock, flags); +- cpu_relax(); ++ cpu_chill(); + spin_lock_irqsave_nested(&ioc->lock, flags, 1); + } + } +@@ -202,7 +203,7 @@ void put_io_context_active(struct io_context *ioc) + spin_unlock(icq->q->queue_lock); + } else { + spin_unlock_irqrestore(&ioc->lock, flags); +- cpu_relax(); ++ cpu_chill(); + goto retry; + } + } +diff --git a/block/blk-mq.c b/block/blk-mq.c +index 70d839b9c3b0..a01b6aba61fa 100644 +--- a/block/blk-mq.c ++++ b/block/blk-mq.c +@@ -320,6 +320,9 @@ static struct request *blk_mq_rq_ctx_init(struct blk_mq_alloc_data *data, + rq->extra_len = 0; + rq->__deadline = 0; + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ INIT_WORK(&rq->work, __blk_mq_complete_request_remote_work); ++#endif + INIT_LIST_HEAD(&rq->timeout_list); + rq->timeout = 0; + +@@ -547,12 +550,24 @@ void blk_mq_end_request(struct request *rq, blk_status_t error) + } + EXPORT_SYMBOL(blk_mq_end_request); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++void __blk_mq_complete_request_remote_work(struct work_struct *work) ++{ ++ struct request *rq = container_of(work, struct request, work); ++ ++ rq->q->softirq_done_fn(rq); ++} ++ ++#else ++ + static void __blk_mq_complete_request_remote(void *data) + { + struct request *rq = data; + + rq->q->softirq_done_fn(rq); + } ++#endif + + static void __blk_mq_complete_request(struct request *rq) + { +@@ -570,19 +585,27 @@ static void __blk_mq_complete_request(struct request *rq) + return; + } + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + if (!test_bit(QUEUE_FLAG_SAME_FORCE, &rq->q->queue_flags)) + shared = cpus_share_cache(cpu, ctx->cpu); + + if (cpu != ctx->cpu && !shared && cpu_online(ctx->cpu)) { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* ++ * We could force QUEUE_FLAG_SAME_FORCE then we would not get in ++ * here. But we could try to invoke it one the CPU like this. ++ */ ++ schedule_work_on(ctx->cpu, &rq->work); ++#else + rq->csd.func = __blk_mq_complete_request_remote; + rq->csd.info = rq; + rq->csd.flags = 0; + smp_call_function_single_async(ctx->cpu, &rq->csd); ++#endif + } else { + rq->q->softirq_done_fn(rq); + } +- put_cpu(); ++ put_cpu_light(); + } + + static void hctx_unlock(struct blk_mq_hw_ctx *hctx, int srcu_idx) +@@ -1368,14 +1391,14 @@ static void __blk_mq_delay_run_hw_queue(struct blk_mq_hw_ctx *hctx, bool async, + return; + + if (!async && !(hctx->flags & BLK_MQ_F_BLOCKING)) { +- int cpu = get_cpu(); ++ int cpu = get_cpu_light(); + if (cpumask_test_cpu(cpu, hctx->cpumask)) { + __blk_mq_run_hw_queue(hctx); +- put_cpu(); ++ put_cpu_light(); + return; + } + +- put_cpu(); ++ put_cpu_light(); + } + + kblockd_mod_delayed_work_on(blk_mq_hctx_next_cpu(hctx), &hctx->run_work, +@@ -3128,10 +3151,9 @@ static bool blk_mq_poll_hybrid_sleep(struct request_queue *q, + kt = nsecs; + + mode = HRTIMER_MODE_REL; +- hrtimer_init_on_stack(&hs.timer, CLOCK_MONOTONIC, mode); ++ hrtimer_init_sleeper_on_stack(&hs, CLOCK_MONOTONIC, mode, current); + hrtimer_set_expires(&hs.timer, kt); + +- hrtimer_init_sleeper(&hs, current); + do { + if (blk_mq_rq_state(rq) == MQ_RQ_COMPLETE) + break; +diff --git a/block/blk-mq.h b/block/blk-mq.h +index 9497b47e2526..e55c8599b90b 100644 +--- a/block/blk-mq.h ++++ b/block/blk-mq.h +@@ -113,12 +113,12 @@ static inline struct blk_mq_ctx *__blk_mq_get_ctx(struct request_queue *q, + */ + static inline struct blk_mq_ctx *blk_mq_get_ctx(struct request_queue *q) + { +- return __blk_mq_get_ctx(q, get_cpu()); ++ return __blk_mq_get_ctx(q, get_cpu_light()); + } + + static inline void blk_mq_put_ctx(struct blk_mq_ctx *ctx) + { +- put_cpu(); ++ put_cpu_light(); + } + + struct blk_mq_alloc_data { +diff --git a/block/blk-softirq.c b/block/blk-softirq.c +index 15c1f5e12eb8..1628277885a1 100644 +--- a/block/blk-softirq.c ++++ b/block/blk-softirq.c +@@ -53,6 +53,7 @@ static void trigger_softirq(void *data) + raise_softirq_irqoff(BLOCK_SOFTIRQ); + + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + + /* +@@ -91,6 +92,7 @@ static int blk_softirq_cpu_dead(unsigned int cpu) + this_cpu_ptr(&blk_cpu_done)); + raise_softirq_irqoff(BLOCK_SOFTIRQ); + local_irq_enable(); ++ preempt_check_resched_rt(); + + return 0; + } +@@ -143,6 +145,7 @@ void __blk_complete_request(struct request *req) + goto do_local; + + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(__blk_complete_request); + +diff --git a/crypto/cryptd.c b/crypto/cryptd.c +index e0c8e907b086..e079f9a70201 100644 +--- a/crypto/cryptd.c ++++ b/crypto/cryptd.c +@@ -39,6 +39,7 @@ MODULE_PARM_DESC(cryptd_max_cpu_qlen, "Set cryptd Max queue depth"); + struct cryptd_cpu_queue { + struct crypto_queue queue; + struct work_struct work; ++ spinlock_t qlock; + }; + + struct cryptd_queue { +@@ -117,6 +118,7 @@ static int cryptd_init_queue(struct cryptd_queue *queue, + cpu_queue = per_cpu_ptr(queue->cpu_queue, cpu); + crypto_init_queue(&cpu_queue->queue, max_cpu_qlen); + INIT_WORK(&cpu_queue->work, cryptd_queue_worker); ++ spin_lock_init(&cpu_queue->qlock); + } + pr_info("cryptd: max_cpu_qlen set to %d\n", max_cpu_qlen); + return 0; +@@ -141,8 +143,10 @@ static int cryptd_enqueue_request(struct cryptd_queue *queue, + struct cryptd_cpu_queue *cpu_queue; + atomic_t *refcnt; + +- cpu = get_cpu(); +- cpu_queue = this_cpu_ptr(queue->cpu_queue); ++ cpu_queue = raw_cpu_ptr(queue->cpu_queue); ++ spin_lock_bh(&cpu_queue->qlock); ++ cpu = smp_processor_id(); ++ + err = crypto_enqueue_request(&cpu_queue->queue, request); + + refcnt = crypto_tfm_ctx(request->tfm); +@@ -158,7 +162,7 @@ static int cryptd_enqueue_request(struct cryptd_queue *queue, + atomic_inc(refcnt); + + out_put_cpu: +- put_cpu(); ++ spin_unlock_bh(&cpu_queue->qlock); + + return err; + } +@@ -174,16 +178,11 @@ static void cryptd_queue_worker(struct work_struct *work) + cpu_queue = container_of(work, struct cryptd_cpu_queue, work); + /* + * Only handle one request at a time to avoid hogging crypto workqueue. +- * preempt_disable/enable is used to prevent being preempted by +- * cryptd_enqueue_request(). local_bh_disable/enable is used to prevent +- * cryptd_enqueue_request() being accessed from software interrupts. + */ +- local_bh_disable(); +- preempt_disable(); ++ spin_lock_bh(&cpu_queue->qlock); + backlog = crypto_get_backlog(&cpu_queue->queue); + req = crypto_dequeue_request(&cpu_queue->queue); +- preempt_enable(); +- local_bh_enable(); ++ spin_unlock_bh(&cpu_queue->qlock); + + if (!req) + return; +diff --git a/crypto/scompress.c b/crypto/scompress.c +index 968bbcf65c94..c2f0077e0801 100644 +--- a/crypto/scompress.c ++++ b/crypto/scompress.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -34,6 +35,7 @@ static void * __percpu *scomp_src_scratches; + static void * __percpu *scomp_dst_scratches; + static int scomp_scratch_users; + static DEFINE_MUTEX(scomp_lock); ++static DEFINE_LOCAL_IRQ_LOCK(scomp_scratches_lock); + + #ifdef CONFIG_NET + static int crypto_scomp_report(struct sk_buff *skb, struct crypto_alg *alg) +@@ -146,7 +148,7 @@ static int scomp_acomp_comp_decomp(struct acomp_req *req, int dir) + void **tfm_ctx = acomp_tfm_ctx(tfm); + struct crypto_scomp *scomp = *tfm_ctx; + void **ctx = acomp_request_ctx(req); +- const int cpu = get_cpu(); ++ const int cpu = local_lock_cpu(scomp_scratches_lock); + u8 *scratch_src = *per_cpu_ptr(scomp_src_scratches, cpu); + u8 *scratch_dst = *per_cpu_ptr(scomp_dst_scratches, cpu); + int ret; +@@ -181,7 +183,7 @@ static int scomp_acomp_comp_decomp(struct acomp_req *req, int dir) + 1); + } + out: +- put_cpu(); ++ local_unlock_cpu(scomp_scratches_lock); + return ret; + } + +diff --git a/drivers/block/loop.c b/drivers/block/loop.c +index f1e63eb7cbca..aa76c816dbb4 100644 +--- a/drivers/block/loop.c ++++ b/drivers/block/loop.c +@@ -70,7 +70,7 @@ + #include + #include + #include +-#include ++#include + #include + #include + #include +diff --git a/drivers/block/zram/zcomp.c b/drivers/block/zram/zcomp.c +index 4ed0a78fdc09..eece02262000 100644 +--- a/drivers/block/zram/zcomp.c ++++ b/drivers/block/zram/zcomp.c +@@ -116,12 +116,20 @@ ssize_t zcomp_available_show(const char *comp, char *buf) + + struct zcomp_strm *zcomp_stream_get(struct zcomp *comp) + { +- return *get_cpu_ptr(comp->stream); ++ struct zcomp_strm *zstrm; ++ ++ zstrm = *get_local_ptr(comp->stream); ++ spin_lock(&zstrm->zcomp_lock); ++ return zstrm; + } + + void zcomp_stream_put(struct zcomp *comp) + { +- put_cpu_ptr(comp->stream); ++ struct zcomp_strm *zstrm; ++ ++ zstrm = *this_cpu_ptr(comp->stream); ++ spin_unlock(&zstrm->zcomp_lock); ++ put_local_ptr(zstrm); + } + + int zcomp_compress(struct zcomp_strm *zstrm, +@@ -171,6 +179,7 @@ int zcomp_cpu_up_prepare(unsigned int cpu, struct hlist_node *node) + pr_err("Can't allocate a compression stream\n"); + return -ENOMEM; + } ++ spin_lock_init(&zstrm->zcomp_lock); + *per_cpu_ptr(comp->stream, cpu) = zstrm; + return 0; + } +diff --git a/drivers/block/zram/zcomp.h b/drivers/block/zram/zcomp.h +index 41c1002a7d7d..d424eafcbf8e 100644 +--- a/drivers/block/zram/zcomp.h ++++ b/drivers/block/zram/zcomp.h +@@ -14,6 +14,7 @@ struct zcomp_strm { + /* compression/decompression buffer */ + void *buffer; + struct crypto_comp *tfm; ++ spinlock_t zcomp_lock; + }; + + /* dynamic per-device compression frontend */ +diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c +index 70cbd0ee1b07..ffa3e9d67571 100644 +--- a/drivers/block/zram/zram_drv.c ++++ b/drivers/block/zram/zram_drv.c +@@ -53,6 +53,40 @@ static size_t huge_class_size; + + static void zram_free_page(struct zram *zram, size_t index); + ++#ifdef CONFIG_PREEMPT_RT_BASE ++static void zram_meta_init_table_locks(struct zram *zram, size_t num_pages) ++{ ++ size_t index; ++ ++ for (index = 0; index < num_pages; index++) ++ spin_lock_init(&zram->table[index].lock); ++} ++ ++static int zram_slot_trylock(struct zram *zram, u32 index) ++{ ++ int ret; ++ ++ ret = spin_trylock(&zram->table[index].lock); ++ if (ret) ++ __set_bit(ZRAM_LOCK, &zram->table[index].value); ++ return ret; ++} ++ ++static void zram_slot_lock(struct zram *zram, u32 index) ++{ ++ spin_lock(&zram->table[index].lock); ++ __set_bit(ZRAM_LOCK, &zram->table[index].value); ++} ++ ++static void zram_slot_unlock(struct zram *zram, u32 index) ++{ ++ __clear_bit(ZRAM_LOCK, &zram->table[index].value); ++ spin_unlock(&zram->table[index].lock); ++} ++ ++#else ++static void zram_meta_init_table_locks(struct zram *zram, size_t num_pages) { } ++ + static int zram_slot_trylock(struct zram *zram, u32 index) + { + return bit_spin_trylock(ZRAM_LOCK, &zram->table[index].value); +@@ -67,6 +101,7 @@ static void zram_slot_unlock(struct zram *zram, u32 index) + { + bit_spin_unlock(ZRAM_LOCK, &zram->table[index].value); + } ++#endif + + static inline bool init_done(struct zram *zram) + { +@@ -901,6 +936,8 @@ static DEVICE_ATTR_RO(io_stat); + static DEVICE_ATTR_RO(mm_stat); + static DEVICE_ATTR_RO(debug_stat); + ++ ++ + static void zram_meta_free(struct zram *zram, u64 disksize) + { + size_t num_pages = disksize >> PAGE_SHIFT; +@@ -931,6 +968,7 @@ static bool zram_meta_alloc(struct zram *zram, u64 disksize) + + if (!huge_class_size) + huge_class_size = zs_huge_class_size(zram->mem_pool); ++ zram_meta_init_table_locks(zram, num_pages); + return true; + } + +@@ -989,6 +1027,7 @@ static int __zram_bvec_read(struct zram *zram, struct page *page, u32 index, + unsigned long handle; + unsigned int size; + void *src, *dst; ++ struct zcomp_strm *zstrm; + + if (zram_wb_enabled(zram)) { + zram_slot_lock(zram, index); +@@ -1023,6 +1062,7 @@ static int __zram_bvec_read(struct zram *zram, struct page *page, u32 index, + + size = zram_get_obj_size(zram, index); + ++ zstrm = zcomp_stream_get(zram->comp); + src = zs_map_object(zram->mem_pool, handle, ZS_MM_RO); + if (size == PAGE_SIZE) { + dst = kmap_atomic(page); +@@ -1030,14 +1070,13 @@ static int __zram_bvec_read(struct zram *zram, struct page *page, u32 index, + kunmap_atomic(dst); + ret = 0; + } else { +- struct zcomp_strm *zstrm = zcomp_stream_get(zram->comp); + + dst = kmap_atomic(page); + ret = zcomp_decompress(zstrm, src, size, dst); + kunmap_atomic(dst); +- zcomp_stream_put(zram->comp); + } + zs_unmap_object(zram->mem_pool, handle); ++ zcomp_stream_put(zram->comp); + zram_slot_unlock(zram, index); + + /* Should NEVER happen. Return bio error if it does. */ +diff --git a/drivers/block/zram/zram_drv.h b/drivers/block/zram/zram_drv.h +index d1095dfdffa8..144e91061df8 100644 +--- a/drivers/block/zram/zram_drv.h ++++ b/drivers/block/zram/zram_drv.h +@@ -61,6 +61,9 @@ struct zram_table_entry { + unsigned long element; + }; + unsigned long value; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ spinlock_t lock; ++#endif + #ifdef CONFIG_ZRAM_MEMORY_TRACKING + ktime_t ac_time; + #endif +diff --git a/drivers/char/random.c b/drivers/char/random.c +index 0a84b7f468ad..75ae2d9e8720 100644 +--- a/drivers/char/random.c ++++ b/drivers/char/random.c +@@ -1232,28 +1232,27 @@ static __u32 get_reg(struct fast_pool *f, struct pt_regs *regs) + return *ptr; + } + +-void add_interrupt_randomness(int irq, int irq_flags) ++void add_interrupt_randomness(int irq, int irq_flags, __u64 ip) + { + struct entropy_store *r; + struct fast_pool *fast_pool = this_cpu_ptr(&irq_randomness); +- struct pt_regs *regs = get_irq_regs(); + unsigned long now = jiffies; + cycles_t cycles = random_get_entropy(); + __u32 c_high, j_high; +- __u64 ip; + unsigned long seed; + int credit = 0; + + if (cycles == 0) +- cycles = get_reg(fast_pool, regs); ++ cycles = get_reg(fast_pool, NULL); + c_high = (sizeof(cycles) > 4) ? cycles >> 32 : 0; + j_high = (sizeof(now) > 4) ? now >> 32 : 0; + fast_pool->pool[0] ^= cycles ^ j_high ^ irq; + fast_pool->pool[1] ^= now ^ c_high; +- ip = regs ? instruction_pointer(regs) : _RET_IP_; ++ if (!ip) ++ ip = _RET_IP_; + fast_pool->pool[2] ^= ip; + fast_pool->pool[3] ^= (sizeof(ip) > 4) ? ip >> 32 : +- get_reg(fast_pool, regs); ++ get_reg(fast_pool, NULL); + + fast_mix(fast_pool); + add_interrupt_bench(cycles); +diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c +index f08949a5f678..9fefcfcae593 100644 +--- a/drivers/char/tpm/tpm_tis.c ++++ b/drivers/char/tpm/tpm_tis.c +@@ -53,6 +53,31 @@ static inline struct tpm_tis_tcg_phy *to_tpm_tis_tcg_phy(struct tpm_tis_data *da + return container_of(data, struct tpm_tis_tcg_phy, priv); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * Flushes previous write operations to chip so that a subsequent ++ * ioread*()s won't stall a cpu. ++ */ ++static inline void tpm_tis_flush(void __iomem *iobase) ++{ ++ ioread8(iobase + TPM_ACCESS(0)); ++} ++#else ++#define tpm_tis_flush(iobase) do { } while (0) ++#endif ++ ++static inline void tpm_tis_iowrite8(u8 b, void __iomem *iobase, u32 addr) ++{ ++ iowrite8(b, iobase + addr); ++ tpm_tis_flush(iobase); ++} ++ ++static inline void tpm_tis_iowrite32(u32 b, void __iomem *iobase, u32 addr) ++{ ++ iowrite32(b, iobase + addr); ++ tpm_tis_flush(iobase); ++} ++ + static bool interrupts = true; + module_param(interrupts, bool, 0444); + MODULE_PARM_DESC(interrupts, "Enable interrupts"); +@@ -150,7 +175,7 @@ static int tpm_tcg_write_bytes(struct tpm_tis_data *data, u32 addr, u16 len, + struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data); + + while (len--) +- iowrite8(*value++, phy->iobase + addr); ++ tpm_tis_iowrite8(*value++, phy->iobase, addr); + + return 0; + } +@@ -177,7 +202,7 @@ static int tpm_tcg_write32(struct tpm_tis_data *data, u32 addr, u32 value) + { + struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data); + +- iowrite32(value, phy->iobase + addr); ++ tpm_tis_iowrite32(value, phy->iobase, addr); + + return 0; + } +diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig +index fb9e57f6422f..18c856219654 100644 +--- a/drivers/clocksource/Kconfig ++++ b/drivers/clocksource/Kconfig +@@ -404,8 +404,11 @@ config ARMV7M_SYSTICK + This options enables support for the ARMv7M system timer unit + + config ATMEL_PIT ++ bool "Microchip ARM Periodic Interval Timer (PIT)" if COMPILE_TEST + select TIMER_OF if OF +- def_bool SOC_AT91SAM9 || SOC_SAMA5 ++ help ++ This enables build of clocksource and clockevent driver for ++ the integrated PIT in Microchip ARM SoCs. + + config ATMEL_ST + bool "Atmel ST timer support" if COMPILE_TEST +@@ -415,6 +418,14 @@ config ATMEL_ST + help + Support for the Atmel ST timer. + ++config ATMEL_ARM_TCB_CLKSRC ++ bool "Microchip ARM TC Block" if COMPILE_TEST ++ select REGMAP_MMIO ++ depends on GENERIC_CLOCKEVENTS ++ help ++ This enables build of clocksource and clockevent driver for ++ the integrated Timer Counter Blocks in Microchip ARM SoCs. ++ + config CLKSRC_EXYNOS_MCT + bool "Exynos multi core timer driver" if COMPILE_TEST + depends on ARM || ARM64 +diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile +index db51b2427e8a..0df9384a1230 100644 +--- a/drivers/clocksource/Makefile ++++ b/drivers/clocksource/Makefile +@@ -3,7 +3,8 @@ obj-$(CONFIG_TIMER_OF) += timer-of.o + obj-$(CONFIG_TIMER_PROBE) += timer-probe.o + obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o + obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o +-obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o ++obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o ++obj-$(CONFIG_ATMEL_ARM_TCB_CLKSRC) += timer-atmel-tcb.o + obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o + obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o + obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += cs5535-clockevt.o +diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c +index 43f4d5c4d6fa..ba15242a6066 100644 +--- a/drivers/clocksource/tcb_clksrc.c ++++ b/drivers/clocksource/tcb_clksrc.c +@@ -25,8 +25,7 @@ + * this 32 bit free-running counter. the second channel is not used. + * + * - The third channel may be used to provide a 16-bit clockevent +- * source, used in either periodic or oneshot mode. This runs +- * at 32 KiHZ, and can handle delays of up to two seconds. ++ * source, used in either periodic or oneshot mode. + * + * A boot clocksource and clockevent source are also currently needed, + * unless the relevant platforms (ARM/AT91, AVR32/AT32) are changed so +@@ -126,6 +125,8 @@ static struct clocksource clksrc = { + struct tc_clkevt_device { + struct clock_event_device clkevt; + struct clk *clk; ++ bool clk_enabled; ++ u32 freq; + void __iomem *regs; + }; + +@@ -134,15 +135,26 @@ static struct tc_clkevt_device *to_tc_clkevt(struct clock_event_device *clkevt) + return container_of(clkevt, struct tc_clkevt_device, clkevt); + } + +-/* For now, we always use the 32K clock ... this optimizes for NO_HZ, +- * because using one of the divided clocks would usually mean the +- * tick rate can never be less than several dozen Hz (vs 0.5 Hz). +- * +- * A divided clock could be good for high resolution timers, since +- * 30.5 usec resolution can seem "low". +- */ + static u32 timer_clock; + ++static void tc_clk_disable(struct clock_event_device *d) ++{ ++ struct tc_clkevt_device *tcd = to_tc_clkevt(d); ++ ++ clk_disable(tcd->clk); ++ tcd->clk_enabled = false; ++} ++ ++static void tc_clk_enable(struct clock_event_device *d) ++{ ++ struct tc_clkevt_device *tcd = to_tc_clkevt(d); ++ ++ if (tcd->clk_enabled) ++ return; ++ clk_enable(tcd->clk); ++ tcd->clk_enabled = true; ++} ++ + static int tc_shutdown(struct clock_event_device *d) + { + struct tc_clkevt_device *tcd = to_tc_clkevt(d); +@@ -150,8 +162,14 @@ static int tc_shutdown(struct clock_event_device *d) + + writel(0xff, regs + ATMEL_TC_REG(2, IDR)); + writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR)); ++ return 0; ++} ++ ++static int tc_shutdown_clk_off(struct clock_event_device *d) ++{ ++ tc_shutdown(d); + if (!clockevent_state_detached(d)) +- clk_disable(tcd->clk); ++ tc_clk_disable(d); + + return 0; + } +@@ -164,9 +182,9 @@ static int tc_set_oneshot(struct clock_event_device *d) + if (clockevent_state_oneshot(d) || clockevent_state_periodic(d)) + tc_shutdown(d); + +- clk_enable(tcd->clk); ++ tc_clk_enable(d); + +- /* slow clock, count up to RC, then irq and stop */ ++ /* count up to RC, then irq and stop */ + writel(timer_clock | ATMEL_TC_CPCSTOP | ATMEL_TC_WAVE | + ATMEL_TC_WAVESEL_UP_AUTO, regs + ATMEL_TC_REG(2, CMR)); + writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); +@@ -186,12 +204,12 @@ static int tc_set_periodic(struct clock_event_device *d) + /* By not making the gentime core emulate periodic mode on top + * of oneshot, we get lower overhead and improved accuracy. + */ +- clk_enable(tcd->clk); ++ tc_clk_enable(d); + +- /* slow clock, count up to RC, then irq and restart */ ++ /* count up to RC, then irq and restart */ + writel(timer_clock | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO, + regs + ATMEL_TC_REG(2, CMR)); +- writel((32768 + HZ / 2) / HZ, tcaddr + ATMEL_TC_REG(2, RC)); ++ writel((tcd->freq + HZ / 2) / HZ, tcaddr + ATMEL_TC_REG(2, RC)); + + /* Enable clock and interrupts on RC compare */ + writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); +@@ -218,9 +236,13 @@ static struct tc_clkevt_device clkevt = { + .features = CLOCK_EVT_FEAT_PERIODIC | + CLOCK_EVT_FEAT_ONESHOT, + /* Should be lower than at91rm9200's system timer */ ++#ifdef CONFIG_ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK + .rating = 125, ++#else ++ .rating = 200, ++#endif + .set_next_event = tc_next_event, +- .set_state_shutdown = tc_shutdown, ++ .set_state_shutdown = tc_shutdown_clk_off, + .set_state_periodic = tc_set_periodic, + .set_state_oneshot = tc_set_oneshot, + }, +@@ -240,8 +262,9 @@ static irqreturn_t ch2_irq(int irq, void *handle) + return IRQ_NONE; + } + +-static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) ++static int __init setup_clkevents(struct atmel_tc *tc, int divisor_idx) + { ++ unsigned divisor = atmel_tc_divisors[divisor_idx]; + int ret; + struct clk *t2_clk = tc->clk[2]; + int irq = tc->irq[2]; +@@ -262,7 +285,11 @@ static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) + clkevt.regs = tc->regs; + clkevt.clk = t2_clk; + +- timer_clock = clk32k_divisor_idx; ++ timer_clock = divisor_idx; ++ if (!divisor) ++ clkevt.freq = 32768; ++ else ++ clkevt.freq = clk_get_rate(t2_clk) / divisor; + + clkevt.clkevt.cpumask = cpumask_of(0); + +@@ -273,7 +300,7 @@ static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) + return ret; + } + +- clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff); ++ clockevents_config_and_register(&clkevt.clkevt, clkevt.freq, 1, 0xffff); + + return ret; + } +@@ -410,7 +437,11 @@ static int __init tcb_clksrc_init(void) + goto err_disable_t1; + + /* channel 2: periodic and oneshot timer support */ ++#ifdef CONFIG_ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK + ret = setup_clkevents(tc, clk32k_divisor_idx); ++#else ++ ret = setup_clkevents(tc, best_divisor_idx); ++#endif + if (ret) + goto err_unregister_clksrc; + +diff --git a/drivers/clocksource/timer-atmel-tcb.c b/drivers/clocksource/timer-atmel-tcb.c +new file mode 100644 +index 000000000000..63ce3b69338a +--- /dev/null ++++ b/drivers/clocksource/timer-atmel-tcb.c +@@ -0,0 +1,617 @@ ++// SPDX-License-Identifier: GPL-2.0 ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct atmel_tcb_clksrc { ++ struct clocksource clksrc; ++ struct clock_event_device clkevt; ++ struct regmap *regmap; ++ void __iomem *base; ++ struct clk *clk[2]; ++ char name[20]; ++ int channels[2]; ++ int bits; ++ int irq; ++ struct { ++ u32 cmr; ++ u32 imr; ++ u32 rc; ++ bool clken; ++ } cache[2]; ++ u32 bmr_cache; ++ bool registered; ++ bool clk_enabled; ++}; ++ ++static struct atmel_tcb_clksrc tc, tce; ++ ++static struct clk *tcb_clk_get(struct device_node *node, int channel) ++{ ++ struct clk *clk; ++ char clk_name[] = "t0_clk"; ++ ++ clk_name[1] += channel; ++ clk = of_clk_get_by_name(node->parent, clk_name); ++ if (!IS_ERR(clk)) ++ return clk; ++ ++ return of_clk_get_by_name(node->parent, "t0_clk"); ++} ++ ++/* ++ * Clockevent device using its own channel ++ */ ++ ++static void tc_clkevt2_clk_disable(struct clock_event_device *d) ++{ ++ clk_disable(tce.clk[0]); ++ tce.clk_enabled = false; ++} ++ ++static void tc_clkevt2_clk_enable(struct clock_event_device *d) ++{ ++ if (tce.clk_enabled) ++ return; ++ clk_enable(tce.clk[0]); ++ tce.clk_enabled = true; ++} ++ ++static int tc_clkevt2_stop(struct clock_event_device *d) ++{ ++ writel(0xff, tce.base + ATMEL_TC_IDR(tce.channels[0])); ++ writel(ATMEL_TC_CCR_CLKDIS, tce.base + ATMEL_TC_CCR(tce.channels[0])); ++ ++ return 0; ++} ++ ++static int tc_clkevt2_shutdown(struct clock_event_device *d) ++{ ++ tc_clkevt2_stop(d); ++ if (!clockevent_state_detached(d)) ++ tc_clkevt2_clk_disable(d); ++ ++ return 0; ++} ++ ++/* For now, we always use the 32K clock ... this optimizes for NO_HZ, ++ * because using one of the divided clocks would usually mean the ++ * tick rate can never be less than several dozen Hz (vs 0.5 Hz). ++ * ++ * A divided clock could be good for high resolution timers, since ++ * 30.5 usec resolution can seem "low". ++ */ ++static int tc_clkevt2_set_oneshot(struct clock_event_device *d) ++{ ++ if (clockevent_state_oneshot(d) || clockevent_state_periodic(d)) ++ tc_clkevt2_stop(d); ++ ++ tc_clkevt2_clk_enable(d); ++ ++ /* slow clock, count up to RC, then irq and stop */ ++ writel(ATMEL_TC_CMR_TCLK(4) | ATMEL_TC_CMR_CPCSTOP | ++ ATMEL_TC_CMR_WAVE | ATMEL_TC_CMR_WAVESEL_UPRC, ++ tce.base + ATMEL_TC_CMR(tce.channels[0])); ++ writel(ATMEL_TC_CPCS, tce.base + ATMEL_TC_IER(tce.channels[0])); ++ ++ return 0; ++} ++ ++static int tc_clkevt2_set_periodic(struct clock_event_device *d) ++{ ++ if (clockevent_state_oneshot(d) || clockevent_state_periodic(d)) ++ tc_clkevt2_stop(d); ++ ++ /* By not making the gentime core emulate periodic mode on top ++ * of oneshot, we get lower overhead and improved accuracy. ++ */ ++ tc_clkevt2_clk_enable(d); ++ ++ /* slow clock, count up to RC, then irq and restart */ ++ writel(ATMEL_TC_CMR_TCLK(4) | ATMEL_TC_CMR_WAVE | ++ ATMEL_TC_CMR_WAVESEL_UPRC, ++ tce.base + ATMEL_TC_CMR(tce.channels[0])); ++ writel((32768 + HZ / 2) / HZ, tce.base + ATMEL_TC_RC(tce.channels[0])); ++ ++ /* Enable clock and interrupts on RC compare */ ++ writel(ATMEL_TC_CPCS, tce.base + ATMEL_TC_IER(tce.channels[0])); ++ writel(ATMEL_TC_CCR_CLKEN | ATMEL_TC_CCR_SWTRG, ++ tce.base + ATMEL_TC_CCR(tce.channels[0])); ++ ++ return 0; ++} ++ ++static int tc_clkevt2_next_event(unsigned long delta, ++ struct clock_event_device *d) ++{ ++ writel(delta, tce.base + ATMEL_TC_RC(tce.channels[0])); ++ writel(ATMEL_TC_CCR_CLKEN | ATMEL_TC_CCR_SWTRG, ++ tce.base + ATMEL_TC_CCR(tce.channels[0])); ++ ++ return 0; ++} ++ ++static irqreturn_t tc_clkevt2_irq(int irq, void *handle) ++{ ++ unsigned int sr; ++ ++ sr = readl(tce.base + ATMEL_TC_SR(tce.channels[0])); ++ if (sr & ATMEL_TC_CPCS) { ++ tce.clkevt.event_handler(&tce.clkevt); ++ return IRQ_HANDLED; ++ } ++ ++ return IRQ_NONE; ++} ++ ++static void tc_clkevt2_suspend(struct clock_event_device *d) ++{ ++ tce.cache[0].cmr = readl(tce.base + ATMEL_TC_CMR(tce.channels[0])); ++ tce.cache[0].imr = readl(tce.base + ATMEL_TC_IMR(tce.channels[0])); ++ tce.cache[0].rc = readl(tce.base + ATMEL_TC_RC(tce.channels[0])); ++ tce.cache[0].clken = !!(readl(tce.base + ATMEL_TC_SR(tce.channels[0])) & ++ ATMEL_TC_CLKSTA); ++} ++ ++static void tc_clkevt2_resume(struct clock_event_device *d) ++{ ++ /* Restore registers for the channel, RA and RB are not used */ ++ writel(tce.cache[0].cmr, tc.base + ATMEL_TC_CMR(tce.channels[0])); ++ writel(tce.cache[0].rc, tc.base + ATMEL_TC_RC(tce.channels[0])); ++ writel(0, tc.base + ATMEL_TC_RA(tce.channels[0])); ++ writel(0, tc.base + ATMEL_TC_RB(tce.channels[0])); ++ /* Disable all the interrupts */ ++ writel(0xff, tc.base + ATMEL_TC_IDR(tce.channels[0])); ++ /* Reenable interrupts that were enabled before suspending */ ++ writel(tce.cache[0].imr, tc.base + ATMEL_TC_IER(tce.channels[0])); ++ ++ /* Start the clock if it was used */ ++ if (tce.cache[0].clken) ++ writel(ATMEL_TC_CCR_CLKEN | ATMEL_TC_CCR_SWTRG, ++ tc.base + ATMEL_TC_CCR(tce.channels[0])); ++} ++ ++static int __init tc_clkevt_register(struct device_node *node, ++ struct regmap *regmap, void __iomem *base, ++ int channel, int irq, int bits) ++{ ++ int ret; ++ struct clk *slow_clk; ++ ++ tce.regmap = regmap; ++ tce.base = base; ++ tce.channels[0] = channel; ++ tce.irq = irq; ++ ++ slow_clk = of_clk_get_by_name(node->parent, "slow_clk"); ++ if (IS_ERR(slow_clk)) ++ return PTR_ERR(slow_clk); ++ ++ ret = clk_prepare_enable(slow_clk); ++ if (ret) ++ return ret; ++ ++ tce.clk[0] = tcb_clk_get(node, tce.channels[0]); ++ if (IS_ERR(tce.clk[0])) { ++ ret = PTR_ERR(tce.clk[0]); ++ goto err_slow; ++ } ++ ++ snprintf(tce.name, sizeof(tce.name), "%s:%d", ++ kbasename(node->parent->full_name), channel); ++ tce.clkevt.cpumask = cpumask_of(0); ++ tce.clkevt.name = tce.name; ++ tce.clkevt.set_next_event = tc_clkevt2_next_event, ++ tce.clkevt.set_state_shutdown = tc_clkevt2_shutdown, ++ tce.clkevt.set_state_periodic = tc_clkevt2_set_periodic, ++ tce.clkevt.set_state_oneshot = tc_clkevt2_set_oneshot, ++ tce.clkevt.suspend = tc_clkevt2_suspend, ++ tce.clkevt.resume = tc_clkevt2_resume, ++ tce.clkevt.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; ++ tce.clkevt.rating = 140; ++ ++ /* try to enable clk to avoid future errors in mode change */ ++ ret = clk_prepare_enable(tce.clk[0]); ++ if (ret) ++ goto err_slow; ++ clk_disable(tce.clk[0]); ++ ++ clockevents_config_and_register(&tce.clkevt, 32768, 1, ++ CLOCKSOURCE_MASK(bits)); ++ ++ ret = request_irq(tce.irq, tc_clkevt2_irq, IRQF_TIMER | IRQF_SHARED, ++ tce.clkevt.name, &tce); ++ if (ret) ++ goto err_clk; ++ ++ tce.registered = true; ++ ++ return 0; ++ ++err_clk: ++ clk_unprepare(tce.clk[0]); ++err_slow: ++ clk_disable_unprepare(slow_clk); ++ ++ return ret; ++} ++ ++/* ++ * Clocksource and clockevent using the same channel(s) ++ */ ++static u64 tc_get_cycles(struct clocksource *cs) ++{ ++ u32 lower, upper; ++ ++ do { ++ upper = readl_relaxed(tc.base + ATMEL_TC_CV(tc.channels[1])); ++ lower = readl_relaxed(tc.base + ATMEL_TC_CV(tc.channels[0])); ++ } while (upper != readl_relaxed(tc.base + ATMEL_TC_CV(tc.channels[1]))); ++ ++ return (upper << 16) | lower; ++} ++ ++static u64 tc_get_cycles32(struct clocksource *cs) ++{ ++ return readl_relaxed(tc.base + ATMEL_TC_CV(tc.channels[0])); ++} ++ ++static u64 notrace tc_sched_clock_read(void) ++{ ++ return tc_get_cycles(&tc.clksrc); ++} ++ ++static u64 notrace tc_sched_clock_read32(void) ++{ ++ return tc_get_cycles32(&tc.clksrc); ++} ++ ++static int tcb_clkevt_next_event(unsigned long delta, ++ struct clock_event_device *d) ++{ ++ u32 old, next, cur; ++ ++ old = readl(tc.base + ATMEL_TC_CV(tc.channels[0])); ++ next = old + delta; ++ writel(next, tc.base + ATMEL_TC_RC(tc.channels[0])); ++ cur = readl(tc.base + ATMEL_TC_CV(tc.channels[0])); ++ ++ /* check whether the delta elapsed while setting the register */ ++ if ((next < old && cur < old && cur > next) || ++ (next > old && (cur < old || cur > next))) { ++ /* ++ * Clear the CPCS bit in the status register to avoid ++ * generating a spurious interrupt next time a valid ++ * timer event is configured. ++ */ ++ old = readl(tc.base + ATMEL_TC_SR(tc.channels[0])); ++ return -ETIME; ++ } ++ ++ writel(ATMEL_TC_CPCS, tc.base + ATMEL_TC_IER(tc.channels[0])); ++ ++ return 0; ++} ++ ++static irqreturn_t tc_clkevt_irq(int irq, void *handle) ++{ ++ unsigned int sr; ++ ++ sr = readl(tc.base + ATMEL_TC_SR(tc.channels[0])); ++ if (sr & ATMEL_TC_CPCS) { ++ tc.clkevt.event_handler(&tc.clkevt); ++ return IRQ_HANDLED; ++ } ++ ++ return IRQ_NONE; ++} ++ ++static int tcb_clkevt_oneshot(struct clock_event_device *dev) ++{ ++ if (clockevent_state_oneshot(dev)) ++ return 0; ++ ++ /* ++ * Because both clockevent devices may share the same IRQ, we don't want ++ * the less likely one to stay requested ++ */ ++ return request_irq(tc.irq, tc_clkevt_irq, IRQF_TIMER | IRQF_SHARED, ++ tc.name, &tc); ++} ++ ++static int tcb_clkevt_shutdown(struct clock_event_device *dev) ++{ ++ writel(0xff, tc.base + ATMEL_TC_IDR(tc.channels[0])); ++ if (tc.bits == 16) ++ writel(0xff, tc.base + ATMEL_TC_IDR(tc.channels[1])); ++ ++ if (!clockevent_state_detached(dev)) ++ free_irq(tc.irq, &tc); ++ ++ return 0; ++} ++ ++static void __init tcb_setup_dual_chan(struct atmel_tcb_clksrc *tc, ++ int mck_divisor_idx) ++{ ++ /* first channel: waveform mode, input mclk/8, clock TIOA on overflow */ ++ writel(mck_divisor_idx /* likely divide-by-8 */ ++ | ATMEL_TC_CMR_WAVE ++ | ATMEL_TC_CMR_WAVESEL_UP /* free-run */ ++ | ATMEL_TC_CMR_ACPA(SET) /* TIOA rises at 0 */ ++ | ATMEL_TC_CMR_ACPC(CLEAR), /* (duty cycle 50%) */ ++ tc->base + ATMEL_TC_CMR(tc->channels[0])); ++ writel(0x0000, tc->base + ATMEL_TC_RA(tc->channels[0])); ++ writel(0x8000, tc->base + ATMEL_TC_RC(tc->channels[0])); ++ writel(0xff, tc->base + ATMEL_TC_IDR(tc->channels[0])); /* no irqs */ ++ writel(ATMEL_TC_CCR_CLKEN, tc->base + ATMEL_TC_CCR(tc->channels[0])); ++ ++ /* second channel: waveform mode, input TIOA */ ++ writel(ATMEL_TC_CMR_XC(tc->channels[1]) /* input: TIOA */ ++ | ATMEL_TC_CMR_WAVE ++ | ATMEL_TC_CMR_WAVESEL_UP, /* free-run */ ++ tc->base + ATMEL_TC_CMR(tc->channels[1])); ++ writel(0xff, tc->base + ATMEL_TC_IDR(tc->channels[1])); /* no irqs */ ++ writel(ATMEL_TC_CCR_CLKEN, tc->base + ATMEL_TC_CCR(tc->channels[1])); ++ ++ /* chain both channel, we assume the previous channel */ ++ regmap_write(tc->regmap, ATMEL_TC_BMR, ++ ATMEL_TC_BMR_TCXC(1 + tc->channels[1], tc->channels[1])); ++ /* then reset all the timers */ ++ regmap_write(tc->regmap, ATMEL_TC_BCR, ATMEL_TC_BCR_SYNC); ++} ++ ++static void __init tcb_setup_single_chan(struct atmel_tcb_clksrc *tc, ++ int mck_divisor_idx) ++{ ++ /* channel 0: waveform mode, input mclk/8 */ ++ writel(mck_divisor_idx /* likely divide-by-8 */ ++ | ATMEL_TC_CMR_WAVE ++ | ATMEL_TC_CMR_WAVESEL_UP, /* free-run */ ++ tc->base + ATMEL_TC_CMR(tc->channels[0])); ++ writel(0xff, tc->base + ATMEL_TC_IDR(tc->channels[0])); /* no irqs */ ++ writel(ATMEL_TC_CCR_CLKEN, tc->base + ATMEL_TC_CCR(tc->channels[0])); ++ ++ /* then reset all the timers */ ++ regmap_write(tc->regmap, ATMEL_TC_BCR, ATMEL_TC_BCR_SYNC); ++} ++ ++static void tc_clksrc_suspend(struct clocksource *cs) ++{ ++ int i; ++ ++ for (i = 0; i < 1 + (tc.bits == 16); i++) { ++ tc.cache[i].cmr = readl(tc.base + ATMEL_TC_CMR(tc.channels[i])); ++ tc.cache[i].imr = readl(tc.base + ATMEL_TC_IMR(tc.channels[i])); ++ tc.cache[i].rc = readl(tc.base + ATMEL_TC_RC(tc.channels[i])); ++ tc.cache[i].clken = !!(readl(tc.base + ++ ATMEL_TC_SR(tc.channels[i])) & ++ ATMEL_TC_CLKSTA); ++ } ++ ++ if (tc.bits == 16) ++ regmap_read(tc.regmap, ATMEL_TC_BMR, &tc.bmr_cache); ++} ++ ++static void tc_clksrc_resume(struct clocksource *cs) ++{ ++ int i; ++ ++ for (i = 0; i < 1 + (tc.bits == 16); i++) { ++ /* Restore registers for the channel, RA and RB are not used */ ++ writel(tc.cache[i].cmr, tc.base + ATMEL_TC_CMR(tc.channels[i])); ++ writel(tc.cache[i].rc, tc.base + ATMEL_TC_RC(tc.channels[i])); ++ writel(0, tc.base + ATMEL_TC_RA(tc.channels[i])); ++ writel(0, tc.base + ATMEL_TC_RB(tc.channels[i])); ++ /* Disable all the interrupts */ ++ writel(0xff, tc.base + ATMEL_TC_IDR(tc.channels[i])); ++ /* Reenable interrupts that were enabled before suspending */ ++ writel(tc.cache[i].imr, tc.base + ATMEL_TC_IER(tc.channels[i])); ++ ++ /* Start the clock if it was used */ ++ if (tc.cache[i].clken) ++ writel(ATMEL_TC_CCR_CLKEN, tc.base + ++ ATMEL_TC_CCR(tc.channels[i])); ++ } ++ ++ /* in case of dual channel, chain channels */ ++ if (tc.bits == 16) ++ regmap_write(tc.regmap, ATMEL_TC_BMR, tc.bmr_cache); ++ /* Finally, trigger all the channels*/ ++ regmap_write(tc.regmap, ATMEL_TC_BCR, ATMEL_TC_BCR_SYNC); ++} ++ ++static int __init tcb_clksrc_register(struct device_node *node, ++ struct regmap *regmap, void __iomem *base, ++ int channel, int channel1, int irq, ++ int bits) ++{ ++ u32 rate, divided_rate = 0; ++ int best_divisor_idx = -1; ++ int i, err = -1; ++ u64 (*tc_sched_clock)(void); ++ ++ tc.regmap = regmap; ++ tc.base = base; ++ tc.channels[0] = channel; ++ tc.channels[1] = channel1; ++ tc.irq = irq; ++ tc.bits = bits; ++ ++ tc.clk[0] = tcb_clk_get(node, tc.channels[0]); ++ if (IS_ERR(tc.clk[0])) ++ return PTR_ERR(tc.clk[0]); ++ err = clk_prepare_enable(tc.clk[0]); ++ if (err) { ++ pr_debug("can't enable T0 clk\n"); ++ goto err_clk; ++ } ++ ++ /* How fast will we be counting? Pick something over 5 MHz. */ ++ rate = (u32)clk_get_rate(tc.clk[0]); ++ for (i = 0; i < 5; i++) { ++ unsigned int divisor = atmel_tc_divisors[i]; ++ unsigned int tmp; ++ ++ if (!divisor) ++ continue; ++ ++ tmp = rate / divisor; ++ pr_debug("TC: %u / %-3u [%d] --> %u\n", rate, divisor, i, tmp); ++ if (best_divisor_idx > 0) { ++ if (tmp < 5 * 1000 * 1000) ++ continue; ++ } ++ divided_rate = tmp; ++ best_divisor_idx = i; ++ } ++ ++ if (tc.bits == 32) { ++ tc.clksrc.read = tc_get_cycles32; ++ tcb_setup_single_chan(&tc, best_divisor_idx); ++ tc_sched_clock = tc_sched_clock_read32; ++ snprintf(tc.name, sizeof(tc.name), "%s:%d", ++ kbasename(node->parent->full_name), tc.channels[0]); ++ } else { ++ tc.clk[1] = tcb_clk_get(node, tc.channels[1]); ++ if (IS_ERR(tc.clk[1])) ++ goto err_disable_t0; ++ ++ err = clk_prepare_enable(tc.clk[1]); ++ if (err) { ++ pr_debug("can't enable T1 clk\n"); ++ goto err_clk1; ++ } ++ tc.clksrc.read = tc_get_cycles, ++ tcb_setup_dual_chan(&tc, best_divisor_idx); ++ tc_sched_clock = tc_sched_clock_read; ++ snprintf(tc.name, sizeof(tc.name), "%s:%d,%d", ++ kbasename(node->parent->full_name), tc.channels[0], ++ tc.channels[1]); ++ } ++ ++ pr_debug("%s at %d.%03d MHz\n", tc.name, ++ divided_rate / 1000000, ++ ((divided_rate + 500000) % 1000000) / 1000); ++ ++ tc.clksrc.name = tc.name; ++ tc.clksrc.suspend = tc_clksrc_suspend; ++ tc.clksrc.resume = tc_clksrc_resume; ++ tc.clksrc.rating = 200; ++ tc.clksrc.mask = CLOCKSOURCE_MASK(32); ++ tc.clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; ++ ++ err = clocksource_register_hz(&tc.clksrc, divided_rate); ++ if (err) ++ goto err_disable_t1; ++ ++ sched_clock_register(tc_sched_clock, 32, divided_rate); ++ ++ tc.registered = true; ++ ++ /* Set up and register clockevents */ ++ tc.clkevt.name = tc.name; ++ tc.clkevt.cpumask = cpumask_of(0); ++ tc.clkevt.set_next_event = tcb_clkevt_next_event; ++ tc.clkevt.set_state_oneshot = tcb_clkevt_oneshot; ++ tc.clkevt.set_state_shutdown = tcb_clkevt_shutdown; ++ tc.clkevt.features = CLOCK_EVT_FEAT_ONESHOT; ++ tc.clkevt.rating = 125; ++ ++ clockevents_config_and_register(&tc.clkevt, divided_rate, 1, ++ BIT(tc.bits) - 1); ++ ++ return 0; ++ ++err_disable_t1: ++ if (tc.bits == 16) ++ clk_disable_unprepare(tc.clk[1]); ++ ++err_clk1: ++ if (tc.bits == 16) ++ clk_put(tc.clk[1]); ++ ++err_disable_t0: ++ clk_disable_unprepare(tc.clk[0]); ++ ++err_clk: ++ clk_put(tc.clk[0]); ++ ++ pr_err("%s: unable to register clocksource/clockevent\n", ++ tc.clksrc.name); ++ ++ return err; ++} ++ ++static int __init tcb_clksrc_init(struct device_node *node) ++{ ++ const struct of_device_id *match; ++ struct regmap *regmap; ++ void __iomem *tcb_base; ++ u32 channel; ++ int irq, err, chan1 = -1; ++ unsigned bits; ++ ++ if (tc.registered && tce.registered) ++ return -ENODEV; ++ ++ /* ++ * The regmap has to be used to access registers that are shared ++ * between channels on the same TCB but we keep direct IO access for ++ * the counters to avoid the impact on performance ++ */ ++ regmap = syscon_node_to_regmap(node->parent); ++ if (IS_ERR(regmap)) ++ return PTR_ERR(regmap); ++ ++ tcb_base = of_iomap(node->parent, 0); ++ if (!tcb_base) { ++ pr_err("%s +%d %s\n", __FILE__, __LINE__, __func__); ++ return -ENXIO; ++ } ++ ++ match = of_match_node(atmel_tcb_dt_ids, node->parent); ++ bits = (uintptr_t)match->data; ++ ++ err = of_property_read_u32_index(node, "reg", 0, &channel); ++ if (err) ++ return err; ++ ++ irq = of_irq_get(node->parent, channel); ++ if (irq < 0) { ++ irq = of_irq_get(node->parent, 0); ++ if (irq < 0) ++ return irq; ++ } ++ ++ if (tc.registered) ++ return tc_clkevt_register(node, regmap, tcb_base, channel, irq, ++ bits); ++ ++ if (bits == 16) { ++ of_property_read_u32_index(node, "reg", 1, &chan1); ++ if (chan1 == -1) { ++ if (tce.registered) { ++ pr_err("%s: clocksource needs two channels\n", ++ node->parent->full_name); ++ return -EINVAL; ++ } else { ++ return tc_clkevt_register(node, regmap, ++ tcb_base, channel, ++ irq, bits); ++ } ++ } ++ } ++ ++ return tcb_clksrc_register(node, regmap, tcb_base, channel, chan1, irq, ++ bits); ++} ++TIMER_OF_DECLARE(atmel_tcb_clksrc, "atmel,tcb-timer", tcb_clksrc_init); +diff --git a/drivers/connector/cn_proc.c b/drivers/connector/cn_proc.c +index ad48fd52cb53..c5264b3ee0b0 100644 +--- a/drivers/connector/cn_proc.c ++++ b/drivers/connector/cn_proc.c +@@ -32,6 +32,7 @@ + #include + + #include ++#include + + /* + * Size of a cn_msg followed by a proc_event structure. Since the +@@ -54,10 +55,11 @@ static struct cb_id cn_proc_event_id = { CN_IDX_PROC, CN_VAL_PROC }; + + /* proc_event_counts is used as the sequence number of the netlink message */ + static DEFINE_PER_CPU(__u32, proc_event_counts) = { 0 }; ++static DEFINE_LOCAL_IRQ_LOCK(send_msg_lock); + + static inline void send_msg(struct cn_msg *msg) + { +- preempt_disable(); ++ local_lock(send_msg_lock); + + msg->seq = __this_cpu_inc_return(proc_event_counts) - 1; + ((struct proc_event *)msg->data)->cpu = smp_processor_id(); +@@ -70,7 +72,7 @@ static inline void send_msg(struct cn_msg *msg) + */ + cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_NOWAIT); + +- preempt_enable(); ++ local_unlock(send_msg_lock); + } + + void proc_fork_connector(struct task_struct *task) +diff --git a/drivers/cpufreq/Kconfig.x86 b/drivers/cpufreq/Kconfig.x86 +index 35f71825b7f3..bb4a6160d0f7 100644 +--- a/drivers/cpufreq/Kconfig.x86 ++++ b/drivers/cpufreq/Kconfig.x86 +@@ -125,7 +125,7 @@ config X86_POWERNOW_K7_ACPI + + config X86_POWERNOW_K8 + tristate "AMD Opteron/Athlon64 PowerNow!" +- depends on ACPI && ACPI_PROCESSOR && X86_ACPI_CPUFREQ ++ depends on ACPI && ACPI_PROCESSOR && X86_ACPI_CPUFREQ && !PREEMPT_RT_BASE + help + This adds the CPUFreq driver for K8/early Opteron/Athlon64 processors. + Support for K10 and newer processors is now in acpi-cpufreq. +diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c +index 67f7f8c42c93..b84e6c8b1e13 100644 +--- a/drivers/crypto/caam/qi.c ++++ b/drivers/crypto/caam/qi.c +@@ -83,13 +83,6 @@ EXPORT_SYMBOL(caam_congested); + static u64 times_congested; + #endif + +-/* +- * CPU from where the module initialised. This is required because QMan driver +- * requires CGRs to be removed from same CPU from where they were originally +- * allocated. +- */ +-static int mod_init_cpu; +- + /* + * This is a a cache of buffers, from which the users of CAAM QI driver + * can allocate short (CAAM_QI_MEMCACHE_SIZE) buffers. It's faster than +@@ -492,12 +485,11 @@ void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx) + } + EXPORT_SYMBOL(caam_drv_ctx_rel); + +-int caam_qi_shutdown(struct device *qidev) ++void caam_qi_shutdown(struct device *qidev) + { +- int i, ret; ++ int i; + struct caam_qi_priv *priv = dev_get_drvdata(qidev); + const cpumask_t *cpus = qman_affine_cpus(); +- struct cpumask old_cpumask = current->cpus_allowed; + + for_each_cpu(i, cpus) { + struct napi_struct *irqtask; +@@ -510,26 +502,12 @@ int caam_qi_shutdown(struct device *qidev) + dev_err(qidev, "Rsp FQ kill failed, cpu: %d\n", i); + } + +- /* +- * QMan driver requires CGRs to be deleted from same CPU from where they +- * were instantiated. Hence we get the module removal execute from the +- * same CPU from where it was originally inserted. +- */ +- set_cpus_allowed_ptr(current, get_cpu_mask(mod_init_cpu)); +- +- ret = qman_delete_cgr(&priv->cgr); +- if (ret) +- dev_err(qidev, "Deletion of CGR failed: %d\n", ret); +- else +- qman_release_cgrid(priv->cgr.cgrid); ++ qman_delete_cgr_safe(&priv->cgr); ++ qman_release_cgrid(priv->cgr.cgrid); + + kmem_cache_destroy(qi_cache); + +- /* Now that we're done with the CGRs, restore the cpus allowed mask */ +- set_cpus_allowed_ptr(current, &old_cpumask); +- + platform_device_unregister(priv->qi_pdev); +- return ret; + } + + static void cgr_cb(struct qman_portal *qm, struct qman_cgr *cgr, int congested) +@@ -718,22 +696,11 @@ int caam_qi_init(struct platform_device *caam_pdev) + struct device *ctrldev = &caam_pdev->dev, *qidev; + struct caam_drv_private *ctrlpriv; + const cpumask_t *cpus = qman_affine_cpus(); +- struct cpumask old_cpumask = current->cpus_allowed; + static struct platform_device_info qi_pdev_info = { + .name = "caam_qi", + .id = PLATFORM_DEVID_NONE + }; + +- /* +- * QMAN requires CGRs to be removed from same CPU+portal from where it +- * was originally allocated. Hence we need to note down the +- * initialisation CPU and use the same CPU for module exit. +- * We select the first CPU to from the list of portal owning CPUs. +- * Then we pin module init to this CPU. +- */ +- mod_init_cpu = cpumask_first(cpus); +- set_cpus_allowed_ptr(current, get_cpu_mask(mod_init_cpu)); +- + qi_pdev_info.parent = ctrldev; + qi_pdev_info.dma_mask = dma_get_mask(ctrldev); + qi_pdev = platform_device_register_full(&qi_pdev_info); +@@ -795,8 +762,6 @@ int caam_qi_init(struct platform_device *caam_pdev) + return -ENOMEM; + } + +- /* Done with the CGRs; restore the cpus allowed mask */ +- set_cpus_allowed_ptr(current, &old_cpumask); + #ifdef CONFIG_DEBUG_FS + debugfs_create_file("qi_congested", 0444, ctrlpriv->ctl, + ×_congested, &caam_fops_u64_ro); +diff --git a/drivers/crypto/caam/qi.h b/drivers/crypto/caam/qi.h +index 357b69f57072..b6c8acc30853 100644 +--- a/drivers/crypto/caam/qi.h ++++ b/drivers/crypto/caam/qi.h +@@ -174,7 +174,7 @@ int caam_drv_ctx_update(struct caam_drv_ctx *drv_ctx, u32 *sh_desc); + void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx); + + int caam_qi_init(struct platform_device *pdev); +-int caam_qi_shutdown(struct device *dev); ++void caam_qi_shutdown(struct device *dev); + + /** + * qi_cache_alloc - Allocate buffers from CAAM-QI cache +diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c +index 2a29dd9c986d..f58ab9ed4ade 100644 +--- a/drivers/firmware/efi/efi.c ++++ b/drivers/firmware/efi/efi.c +@@ -87,7 +87,7 @@ struct mm_struct efi_mm = { + + struct workqueue_struct *efi_rts_wq; + +-static bool disable_runtime; ++static bool disable_runtime = IS_ENABLED(CONFIG_PREEMPT_RT_BASE); + static int __init setup_noefi(char *arg) + { + disable_runtime = true; +@@ -113,6 +113,9 @@ static int __init parse_efi_cmdline(char *str) + if (parse_option_str(str, "noruntime")) + disable_runtime = true; + ++ if (parse_option_str(str, "runtime")) ++ disable_runtime = false; ++ + return 0; + } + early_param("efi", parse_efi_cmdline); +diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c +index 29877969310d..f65817c51c2a 100644 +--- a/drivers/gpu/drm/i915/i915_irq.c ++++ b/drivers/gpu/drm/i915/i915_irq.c +@@ -1025,6 +1025,7 @@ static bool i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); + + /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_disable_rt(); + + /* Get optional system timestamp before query. */ + if (stime) +@@ -1076,6 +1077,7 @@ static bool i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, + *etime = ktime_get(); + + /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_enable_rt(); + + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); + +diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c +index 5c2c93cbab12..7124510b9131 100644 +--- a/drivers/gpu/drm/i915/i915_request.c ++++ b/drivers/gpu/drm/i915/i915_request.c +@@ -356,9 +356,7 @@ static void __retire_engine_request(struct intel_engine_cs *engine, + + GEM_BUG_ON(!i915_request_completed(rq)); + +- local_irq_disable(); +- +- spin_lock(&engine->timeline.lock); ++ spin_lock_irq(&engine->timeline.lock); + GEM_BUG_ON(!list_is_first(&rq->link, &engine->timeline.requests)); + list_del_init(&rq->link); + spin_unlock(&engine->timeline.lock); +@@ -372,9 +370,7 @@ static void __retire_engine_request(struct intel_engine_cs *engine, + GEM_BUG_ON(!atomic_read(&rq->i915->gt_pm.rps.num_waiters)); + atomic_dec(&rq->i915->gt_pm.rps.num_waiters); + } +- spin_unlock(&rq->lock); +- +- local_irq_enable(); ++ spin_unlock_irq(&rq->lock); + + /* + * The backing object for the context is done after switching to the +diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h +index b50c6b829715..33028d8f470e 100644 +--- a/drivers/gpu/drm/i915/i915_trace.h ++++ b/drivers/gpu/drm/i915/i915_trace.h +@@ -2,6 +2,10 @@ + #if !defined(_I915_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) + #define _I915_TRACE_H_ + ++#ifdef CONFIG_PREEMPT_RT_BASE ++#define NOTRACE ++#endif ++ + #include + #include + #include +@@ -679,7 +683,7 @@ DEFINE_EVENT(i915_request, i915_request_add, + TP_ARGS(rq) + ); + +-#if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) ++#if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) && !defined(NOTRACE) + DEFINE_EVENT(i915_request, i915_request_submit, + TP_PROTO(struct i915_request *rq), + TP_ARGS(rq) +diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c +index f7026e887fa9..07e4ddebdd80 100644 +--- a/drivers/gpu/drm/i915/intel_sprite.c ++++ b/drivers/gpu/drm/i915/intel_sprite.c +@@ -36,6 +36,7 @@ + #include + #include + #include ++#include + #include "intel_drv.h" + #include "intel_frontbuffer.h" + #include +@@ -60,6 +61,8 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, + #define VBLANK_EVASION_TIME_US 100 + #endif + ++static DEFINE_LOCAL_IRQ_LOCK(pipe_update_lock); ++ + /** + * intel_pipe_update_start() - start update of a set of display registers + * @new_crtc_state: the new crtc state +@@ -107,7 +110,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) + if (intel_psr_wait_for_idle(new_crtc_state)) + DRM_ERROR("PSR idle timed out, atomic update may fail\n"); + +- local_irq_disable(); ++ local_lock_irq(pipe_update_lock); + + crtc->debug.min_vbl = min; + crtc->debug.max_vbl = max; +@@ -131,11 +134,11 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) + break; + } + +- local_irq_enable(); ++ local_unlock_irq(pipe_update_lock); + + timeout = schedule_timeout(timeout); + +- local_irq_disable(); ++ local_lock_irq(pipe_update_lock); + } + + finish_wait(wq, &wait); +@@ -168,7 +171,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) + return; + + irq_disable: +- local_irq_disable(); ++ local_lock_irq(pipe_update_lock); + } + + /** +@@ -204,7 +207,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) + new_crtc_state->base.event = NULL; + } + +- local_irq_enable(); ++ local_unlock_irq(pipe_update_lock); + + if (intel_vgpu_active(dev_priv)) + return; +diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c +index d8e2d7b3b836..072b831aaf4f 100644 +--- a/drivers/gpu/drm/radeon/radeon_display.c ++++ b/drivers/gpu/drm/radeon/radeon_display.c +@@ -1813,6 +1813,7 @@ int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, + struct radeon_device *rdev = dev->dev_private; + + /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_disable_rt(); + + /* Get optional system timestamp before query. */ + if (stime) +@@ -1905,6 +1906,7 @@ int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, + *etime = ktime_get(); + + /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_enable_rt(); + + /* Decode into vertical and horizontal scanout position. */ + *vpos = position & 0x1fff; +diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c +index 8e923e70e594..e77716a62351 100644 +--- a/drivers/hv/hv.c ++++ b/drivers/hv/hv.c +@@ -112,10 +112,12 @@ int hv_post_message(union hv_connection_id connection_id, + static void hv_stimer0_isr(void) + { + struct hv_per_cpu_context *hv_cpu; ++ struct pt_regs *regs = get_irq_regs(); ++ u64 ip = regs ? instruction_pointer(regs) : 0; + + hv_cpu = this_cpu_ptr(hv_context.cpu_context); + hv_cpu->clk_evt->event_handler(hv_cpu->clk_evt); +- add_interrupt_randomness(stimer0_vector, 0); ++ add_interrupt_randomness(stimer0_vector, 0, ip); + } + + static int hv_ce_set_next_event(unsigned long delta, +diff --git a/drivers/hv/hyperv_vmbus.h b/drivers/hv/hyperv_vmbus.h +index 87d3d7da78f8..1d2d8a4b837d 100644 +--- a/drivers/hv/hyperv_vmbus.h ++++ b/drivers/hv/hyperv_vmbus.h +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + + #include "hv_trace.h" + +diff --git a/drivers/hv/vmbus_drv.c b/drivers/hv/vmbus_drv.c +index 9aa18f387a34..39aaa14993cc 100644 +--- a/drivers/hv/vmbus_drv.c ++++ b/drivers/hv/vmbus_drv.c +@@ -1042,6 +1042,8 @@ static void vmbus_isr(void) + void *page_addr = hv_cpu->synic_event_page; + struct hv_message *msg; + union hv_synic_event_flags *event; ++ struct pt_regs *regs = get_irq_regs(); ++ u64 ip = regs ? instruction_pointer(regs) : 0; + bool handled = false; + + if (unlikely(page_addr == NULL)) +@@ -1085,7 +1087,7 @@ static void vmbus_isr(void) + tasklet_schedule(&hv_cpu->msg_dpc); + } + +- add_interrupt_randomness(HYPERVISOR_CALLBACK_VECTOR, 0); ++ add_interrupt_randomness(HYPERVISOR_CALLBACK_VECTOR, 0, ip); + } + + /* +diff --git a/drivers/infiniband/hw/hfi1/affinity.c b/drivers/infiniband/hw/hfi1/affinity.c +index bedd5fba33b0..3f4259f11a35 100644 +--- a/drivers/infiniband/hw/hfi1/affinity.c ++++ b/drivers/infiniband/hw/hfi1/affinity.c +@@ -1037,7 +1037,7 @@ int hfi1_get_proc_affinity(int node) + struct hfi1_affinity_node *entry; + cpumask_var_t diff, hw_thread_mask, available_mask, intrs_mask; + const struct cpumask *node_mask, +- *proc_mask = ¤t->cpus_allowed; ++ *proc_mask = current->cpus_ptr; + struct hfi1_affinity_node_list *affinity = &node_affinity; + struct cpu_mask_set *set = &affinity->proc; + +@@ -1045,7 +1045,7 @@ int hfi1_get_proc_affinity(int node) + * check whether process/context affinity has already + * been set + */ +- if (cpumask_weight(proc_mask) == 1) { ++ if (current->nr_cpus_allowed == 1) { + hfi1_cdbg(PROC, "PID %u %s affinity set to CPU %*pbl", + current->pid, current->comm, + cpumask_pr_args(proc_mask)); +@@ -1056,7 +1056,7 @@ int hfi1_get_proc_affinity(int node) + cpu = cpumask_first(proc_mask); + cpumask_set_cpu(cpu, &set->used); + goto done; +- } else if (cpumask_weight(proc_mask) < cpumask_weight(&set->mask)) { ++ } else if (current->nr_cpus_allowed < cpumask_weight(&set->mask)) { + hfi1_cdbg(PROC, "PID %u %s affinity set to CPU set(s) %*pbl", + current->pid, current->comm, + cpumask_pr_args(proc_mask)); +diff --git a/drivers/infiniband/hw/hfi1/sdma.c b/drivers/infiniband/hw/hfi1/sdma.c +index 88e326d6cc49..b0d01ace6611 100644 +--- a/drivers/infiniband/hw/hfi1/sdma.c ++++ b/drivers/infiniband/hw/hfi1/sdma.c +@@ -855,14 +855,13 @@ struct sdma_engine *sdma_select_user_engine(struct hfi1_devdata *dd, + { + struct sdma_rht_node *rht_node; + struct sdma_engine *sde = NULL; +- const struct cpumask *current_mask = ¤t->cpus_allowed; + unsigned long cpu_id; + + /* + * To ensure that always the same sdma engine(s) will be + * selected make sure the process is pinned to this CPU only. + */ +- if (cpumask_weight(current_mask) != 1) ++ if (current->nr_cpus_allowed != 1) + goto out; + + cpu_id = smp_processor_id(); +diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c b/drivers/infiniband/hw/qib/qib_file_ops.c +index 98e1ce14fa2a..5d3828625017 100644 +--- a/drivers/infiniband/hw/qib/qib_file_ops.c ++++ b/drivers/infiniband/hw/qib/qib_file_ops.c +@@ -1142,7 +1142,7 @@ static __poll_t qib_poll(struct file *fp, struct poll_table_struct *pt) + static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd) + { + struct qib_filedata *fd = fp->private_data; +- const unsigned int weight = cpumask_weight(¤t->cpus_allowed); ++ const unsigned int weight = current->nr_cpus_allowed; + const struct cpumask *local_mask = cpumask_of_pcibus(dd->pcidev->bus); + int local_cpu; + +@@ -1623,9 +1623,8 @@ static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo) + ret = find_free_ctxt(i_minor - 1, fp, uinfo); + else { + int unit; +- const unsigned int cpu = cpumask_first(¤t->cpus_allowed); +- const unsigned int weight = +- cpumask_weight(¤t->cpus_allowed); ++ const unsigned int cpu = cpumask_first(current->cpus_ptr); ++ const unsigned int weight = current->nr_cpus_allowed; + + if (weight == 1 && !test_bit(cpu, qib_cpulist)) + if (!find_hca(cpu, &unit) && unit >= 0) +diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c +index 65ab2c80529c..21681f0f85f4 100644 +--- a/drivers/irqchip/irq-gic-v3-its.c ++++ b/drivers/irqchip/irq-gic-v3-its.c +@@ -179,6 +179,7 @@ static DEFINE_RAW_SPINLOCK(vmovp_lock); + static DEFINE_IDA(its_vpeid_ida); + + #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) ++#define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) + #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) + #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) + +@@ -1631,7 +1632,7 @@ static void its_free_prop_table(struct page *prop_page) + get_order(LPI_PROPBASE_SZ)); + } + +-static int __init its_alloc_lpi_tables(void) ++static int __init its_alloc_lpi_prop_table(void) + { + phys_addr_t paddr; + +@@ -1979,30 +1980,47 @@ static u64 its_clear_vpend_valid(void __iomem *vlpi_base) + return val; + } + +-static void its_cpu_init_lpis(void) ++static int __init allocate_lpi_tables(void) + { +- void __iomem *rbase = gic_data_rdist_rd_base(); +- struct page *pend_page; +- u64 val, tmp; ++ int err, cpu; + +- /* If we didn't allocate the pending table yet, do it now */ +- pend_page = gic_data_rdist()->pend_page; +- if (!pend_page) { +- phys_addr_t paddr; ++ err = its_alloc_lpi_prop_table(); ++ if (err) ++ return err; ++ ++ /* ++ * We allocate all the pending tables anyway, as we may have a ++ * mix of RDs that have had LPIs enabled, and some that ++ * don't. We'll free the unused ones as each CPU comes online. ++ */ ++ for_each_possible_cpu(cpu) { ++ struct page *pend_page; + + pend_page = its_allocate_pending_table(GFP_NOWAIT); + if (!pend_page) { +- pr_err("Failed to allocate PENDBASE for CPU%d\n", +- smp_processor_id()); +- return; ++ pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); ++ return -ENOMEM; + } + +- paddr = page_to_phys(pend_page); +- pr_info("CPU%d: using LPI pending table @%pa\n", +- smp_processor_id(), &paddr); +- gic_data_rdist()->pend_page = pend_page; ++ gic_data_rdist_cpu(cpu)->pend_page = pend_page; + } + ++ return 0; ++} ++ ++static void its_cpu_init_lpis(void) ++{ ++ void __iomem *rbase = gic_data_rdist_rd_base(); ++ struct page *pend_page; ++ phys_addr_t paddr; ++ u64 val, tmp; ++ ++ if (gic_data_rdist()->lpi_enabled) ++ return; ++ ++ pend_page = gic_data_rdist()->pend_page; ++ paddr = page_to_phys(pend_page); ++ + /* set PROPBASE */ + val = (page_to_phys(gic_rdists->prop_page) | + GICR_PROPBASER_InnerShareable | +@@ -2078,6 +2096,10 @@ static void its_cpu_init_lpis(void) + + /* Make sure the GIC has seen the above */ + dsb(sy); ++ gic_data_rdist()->lpi_enabled = true; ++ pr_info("GICv3: CPU%d: using LPI pending table @%pa\n", ++ smp_processor_id(), ++ &paddr); + } + + static void its_cpu_init_collection(struct its_node *its) +@@ -3558,16 +3580,6 @@ static int redist_disable_lpis(void) + u64 timeout = USEC_PER_SEC; + u64 val; + +- /* +- * If coming via a CPU hotplug event, we don't need to disable +- * LPIs before trying to re-enable them. They are already +- * configured and all is well in the world. Detect this case +- * by checking the allocation of the pending table for the +- * current CPU. +- */ +- if (gic_data_rdist()->pend_page) +- return 0; +- + if (!gic_rdists_supports_plpis()) { + pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); + return -ENXIO; +@@ -3577,7 +3589,18 @@ static int redist_disable_lpis(void) + if (!(val & GICR_CTLR_ENABLE_LPIS)) + return 0; + +- pr_warn("CPU%d: Booted with LPIs enabled, memory probably corrupted\n", ++ /* ++ * If coming via a CPU hotplug event, we don't need to disable ++ * LPIs before trying to re-enable them. They are already ++ * configured and all is well in the world. ++ */ ++ if (gic_data_rdist()->lpi_enabled) ++ return 0; ++ ++ /* ++ * From that point on, we only try to do some damage control. ++ */ ++ pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", + smp_processor_id()); + add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); + +@@ -3833,7 +3856,8 @@ int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, + } + + gic_rdists = rdists; +- err = its_alloc_lpi_tables(); ++ ++ err = allocate_lpi_tables(); + if (err) + return err; + +diff --git a/drivers/leds/trigger/Kconfig b/drivers/leds/trigger/Kconfig +index 4018af769969..b4ce8c115949 100644 +--- a/drivers/leds/trigger/Kconfig ++++ b/drivers/leds/trigger/Kconfig +@@ -63,6 +63,7 @@ config LEDS_TRIGGER_BACKLIGHT + + config LEDS_TRIGGER_CPU + bool "LED CPU Trigger" ++ depends on !PREEMPT_RT_BASE + help + This allows LEDs to be controlled by active CPUs. This shows + the active CPUs across an array of LEDs so you can see which +diff --git a/drivers/md/bcache/Kconfig b/drivers/md/bcache/Kconfig +index f6e0a8b3a61e..18c03d79a442 100644 +--- a/drivers/md/bcache/Kconfig ++++ b/drivers/md/bcache/Kconfig +@@ -1,6 +1,7 @@ + + config BCACHE + tristate "Block device as cache" ++ depends on !PREEMPT_RT_FULL + select CRC64 + help + Allows a block device to be used as cache for other devices; uses +diff --git a/drivers/md/dm-rq.c b/drivers/md/dm-rq.c +index 6e547b8dd298..29736c7e5f1f 100644 +--- a/drivers/md/dm-rq.c ++++ b/drivers/md/dm-rq.c +@@ -688,7 +688,6 @@ static void dm_old_request_fn(struct request_queue *q) + /* Establish tio->ti before queuing work (map_tio_request) */ + tio->ti = ti; + kthread_queue_work(&md->kworker, &tio->work); +- BUG_ON(!irqs_disabled()); + } + } + +diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c +index f237d6f30752..adec2947c3e1 100644 +--- a/drivers/md/raid5.c ++++ b/drivers/md/raid5.c +@@ -2069,8 +2069,9 @@ static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request) + struct raid5_percpu *percpu; + unsigned long cpu; + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + percpu = per_cpu_ptr(conf->percpu, cpu); ++ spin_lock(&percpu->lock); + if (test_bit(STRIPE_OP_BIOFILL, &ops_request)) { + ops_run_biofill(sh); + overlap_clear++; +@@ -2129,7 +2130,8 @@ static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request) + if (test_and_clear_bit(R5_Overlap, &dev->flags)) + wake_up(&sh->raid_conf->wait_for_overlap); + } +- put_cpu(); ++ spin_unlock(&percpu->lock); ++ put_cpu_light(); + } + + static void free_stripe(struct kmem_cache *sc, struct stripe_head *sh) +@@ -6811,6 +6813,7 @@ static int raid456_cpu_up_prepare(unsigned int cpu, struct hlist_node *node) + __func__, cpu); + return -ENOMEM; + } ++ spin_lock_init(&per_cpu_ptr(conf->percpu, cpu)->lock); + return 0; + } + +@@ -6821,7 +6824,6 @@ static int raid5_alloc_percpu(struct r5conf *conf) + conf->percpu = alloc_percpu(struct raid5_percpu); + if (!conf->percpu) + return -ENOMEM; +- + err = cpuhp_state_add_instance(CPUHP_MD_RAID5_PREPARE, &conf->node); + if (!err) { + conf->scribble_disks = max(conf->raid_disks, +diff --git a/drivers/md/raid5.h b/drivers/md/raid5.h +index 8474c224127b..a3bf907ab2af 100644 +--- a/drivers/md/raid5.h ++++ b/drivers/md/raid5.h +@@ -637,6 +637,7 @@ struct r5conf { + int recovery_disabled; + /* per cpu variables */ + struct raid5_percpu { ++ spinlock_t lock; /* Protection for -RT */ + struct page *spare_page; /* Used when checking P/Q in raid6 */ + struct flex_array *scribble; /* space for constructing buffer + * lists and performing address +diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig +index 3726eacdf65d..0900dec7ec04 100644 +--- a/drivers/misc/Kconfig ++++ b/drivers/misc/Kconfig +@@ -69,8 +69,7 @@ config ATMEL_TCB_CLKSRC + are combined to make a single 32-bit timer. + + When GENERIC_CLOCKEVENTS is defined, the third timer channel +- may be used as a clock event device supporting oneshot mode +- (delays of up to two seconds) based on the 32 KiHz clock. ++ may be used as a clock event device supporting oneshot mode. + + config ATMEL_TCB_CLKSRC_BLOCK + int +@@ -83,6 +82,15 @@ config ATMEL_TCB_CLKSRC_BLOCK + TC can be used for other purposes, such as PWM generation and + interval timing. + ++config ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK ++ bool "TC Block use 32 KiHz clock" ++ depends on ATMEL_TCB_CLKSRC ++ default y ++ help ++ Select this to use 32 KiHz base clock rate as TC block clock ++ source for clock events. ++ ++ + config DUMMY_IRQ + tristate "Dummy IRQ handler" + default n +diff --git a/drivers/net/wireless/intersil/orinoco/orinoco_usb.c b/drivers/net/wireless/intersil/orinoco/orinoco_usb.c +index 94ad6fe29e69..52a49f0bbc19 100644 +--- a/drivers/net/wireless/intersil/orinoco/orinoco_usb.c ++++ b/drivers/net/wireless/intersil/orinoco/orinoco_usb.c +@@ -697,8 +697,8 @@ static void ezusb_req_ctx_wait(struct ezusb_priv *upriv, + while (!ctx->done.done && msecs--) + udelay(1000); + } else { +- wait_event_interruptible(ctx->done.wait, +- ctx->done.done); ++ swait_event_interruptible_exclusive(ctx->done.wait, ++ ctx->done.done); + } + break; + default: +diff --git a/drivers/of/base.c b/drivers/of/base.c +index 3f21ea6a90dc..2c7cf83b200c 100644 +--- a/drivers/of/base.c ++++ b/drivers/of/base.c +@@ -130,31 +130,34 @@ static u32 phandle_cache_mask; + /* + * Caller must hold devtree_lock. + */ +-static void __of_free_phandle_cache(void) ++static struct device_node** __of_free_phandle_cache(void) + { + u32 cache_entries = phandle_cache_mask + 1; + u32 k; ++ struct device_node **shadow; + + if (!phandle_cache) +- return; ++ return NULL; + + for (k = 0; k < cache_entries; k++) + of_node_put(phandle_cache[k]); + +- kfree(phandle_cache); ++ shadow = phandle_cache; + phandle_cache = NULL; ++ return shadow; + } + + int of_free_phandle_cache(void) + { + unsigned long flags; ++ struct device_node **shadow; + + raw_spin_lock_irqsave(&devtree_lock, flags); + +- __of_free_phandle_cache(); ++ shadow = __of_free_phandle_cache(); + + raw_spin_unlock_irqrestore(&devtree_lock, flags); +- ++ kfree(shadow); + return 0; + } + #if !defined(CONFIG_MODULES) +@@ -189,10 +192,11 @@ void of_populate_phandle_cache(void) + u32 cache_entries; + struct device_node *np; + u32 phandles = 0; ++ struct device_node **shadow; + + raw_spin_lock_irqsave(&devtree_lock, flags); + +- __of_free_phandle_cache(); ++ shadow = __of_free_phandle_cache(); + + for_each_of_allnodes(np) + if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL) +@@ -200,12 +204,14 @@ void of_populate_phandle_cache(void) + + if (!phandles) + goto out; ++ raw_spin_unlock_irqrestore(&devtree_lock, flags); + + cache_entries = roundup_pow_of_two(phandles); + phandle_cache_mask = cache_entries - 1; + + phandle_cache = kcalloc(cache_entries, sizeof(*phandle_cache), + GFP_ATOMIC); ++ raw_spin_lock_irqsave(&devtree_lock, flags); + if (!phandle_cache) + goto out; + +@@ -217,6 +223,7 @@ void of_populate_phandle_cache(void) + + out: + raw_spin_unlock_irqrestore(&devtree_lock, flags); ++ kfree(shadow); + } + + void __init of_core_init(void) +diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c +index 72db2e0ebced..ea70bc0b06e9 100644 +--- a/drivers/pci/switch/switchtec.c ++++ b/drivers/pci/switch/switchtec.c +@@ -43,10 +43,11 @@ struct switchtec_user { + + enum mrpc_state state; + +- struct completion comp; ++ wait_queue_head_t cmd_comp; + struct kref kref; + struct list_head list; + ++ bool cmd_done; + u32 cmd; + u32 status; + u32 return_code; +@@ -68,7 +69,7 @@ static struct switchtec_user *stuser_create(struct switchtec_dev *stdev) + stuser->stdev = stdev; + kref_init(&stuser->kref); + INIT_LIST_HEAD(&stuser->list); +- init_completion(&stuser->comp); ++ init_waitqueue_head(&stuser->cmd_comp); + stuser->event_cnt = atomic_read(&stdev->event_cnt); + + dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser); +@@ -151,7 +152,7 @@ static int mrpc_queue_cmd(struct switchtec_user *stuser) + kref_get(&stuser->kref); + stuser->read_len = sizeof(stuser->data); + stuser_set_state(stuser, MRPC_QUEUED); +- init_completion(&stuser->comp); ++ stuser->cmd_done = false; + list_add_tail(&stuser->list, &stdev->mrpc_queue); + + mrpc_cmd_submit(stdev); +@@ -188,7 +189,8 @@ static void mrpc_complete_cmd(struct switchtec_dev *stdev) + stuser->read_len); + + out: +- complete_all(&stuser->comp); ++ stuser->cmd_done = true; ++ wake_up_interruptible(&stuser->cmd_comp); + list_del_init(&stuser->list); + stuser_put(stuser); + stdev->mrpc_busy = 0; +@@ -358,7 +360,7 @@ static int switchtec_dev_open(struct inode *inode, struct file *filp) + return PTR_ERR(stuser); + + filp->private_data = stuser; +- nonseekable_open(inode, filp); ++ stream_open(inode, filp); + + dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser); + +@@ -458,10 +460,11 @@ static ssize_t switchtec_dev_read(struct file *filp, char __user *data, + mutex_unlock(&stdev->mrpc_mutex); + + if (filp->f_flags & O_NONBLOCK) { +- if (!try_wait_for_completion(&stuser->comp)) ++ if (!READ_ONCE(stuser->cmd_done)) + return -EAGAIN; + } else { +- rc = wait_for_completion_interruptible(&stuser->comp); ++ rc = wait_event_interruptible(stuser->cmd_comp, ++ stuser->cmd_done); + if (rc < 0) + return rc; + } +@@ -509,7 +512,7 @@ static __poll_t switchtec_dev_poll(struct file *filp, poll_table *wait) + struct switchtec_dev *stdev = stuser->stdev; + __poll_t ret = 0; + +- poll_wait(filp, &stuser->comp.wait, wait); ++ poll_wait(filp, &stuser->cmd_comp, wait); + poll_wait(filp, &stdev->event_wq, wait); + + if (lock_mutex_and_test_alive(stdev)) +@@ -517,7 +520,7 @@ static __poll_t switchtec_dev_poll(struct file *filp, poll_table *wait) + + mutex_unlock(&stdev->mrpc_mutex); + +- if (try_wait_for_completion(&stuser->comp)) ++ if (READ_ONCE(stuser->cmd_done)) + ret |= EPOLLIN | EPOLLRDNORM; + + if (stuser->event_cnt != atomic_read(&stdev->event_cnt)) +@@ -1041,7 +1044,8 @@ static void stdev_kill(struct switchtec_dev *stdev) + + /* Wake up and kill any users waiting on an MRPC request */ + list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) { +- complete_all(&stuser->comp); ++ stuser->cmd_done = true; ++ wake_up_interruptible(&stuser->cmd_comp); + list_del_init(&stuser->list); + stuser_put(stuser); + } +diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c +index 6768b2e8148a..c20f51af6bdf 100644 +--- a/drivers/scsi/fcoe/fcoe.c ++++ b/drivers/scsi/fcoe/fcoe.c +@@ -1459,11 +1459,11 @@ static int fcoe_rcv(struct sk_buff *skb, struct net_device *netdev, + static int fcoe_alloc_paged_crc_eof(struct sk_buff *skb, int tlen) + { + struct fcoe_percpu_s *fps; +- int rc; ++ int rc, cpu = get_cpu_light(); + +- fps = &get_cpu_var(fcoe_percpu); ++ fps = &per_cpu(fcoe_percpu, cpu); + rc = fcoe_get_paged_crc_eof(skb, tlen, fps); +- put_cpu_var(fcoe_percpu); ++ put_cpu_light(); + + return rc; + } +@@ -1650,11 +1650,11 @@ static inline int fcoe_filter_frames(struct fc_lport *lport, + return 0; + } + +- stats = per_cpu_ptr(lport->stats, get_cpu()); ++ stats = per_cpu_ptr(lport->stats, get_cpu_light()); + stats->InvalidCRCCount++; + if (stats->InvalidCRCCount < 5) + printk(KERN_WARNING "fcoe: dropping frame with CRC error\n"); +- put_cpu(); ++ put_cpu_light(); + return -EINVAL; + } + +@@ -1697,7 +1697,7 @@ static void fcoe_recv_frame(struct sk_buff *skb) + */ + hp = (struct fcoe_hdr *) skb_network_header(skb); + +- stats = per_cpu_ptr(lport->stats, get_cpu()); ++ stats = per_cpu_ptr(lport->stats, get_cpu_light()); + if (unlikely(FC_FCOE_DECAPS_VER(hp) != FC_FCOE_VER)) { + if (stats->ErrorFrames < 5) + printk(KERN_WARNING "fcoe: FCoE version " +@@ -1729,13 +1729,13 @@ static void fcoe_recv_frame(struct sk_buff *skb) + goto drop; + + if (!fcoe_filter_frames(lport, fp)) { +- put_cpu(); ++ put_cpu_light(); + fc_exch_recv(lport, fp); + return; + } + drop: + stats->ErrorFrames++; +- put_cpu(); ++ put_cpu_light(); + kfree_skb(skb); + } + +diff --git a/drivers/scsi/fcoe/fcoe_ctlr.c b/drivers/scsi/fcoe/fcoe_ctlr.c +index 7dc4ffa24430..4946df66a5ab 100644 +--- a/drivers/scsi/fcoe/fcoe_ctlr.c ++++ b/drivers/scsi/fcoe/fcoe_ctlr.c +@@ -838,7 +838,7 @@ static unsigned long fcoe_ctlr_age_fcfs(struct fcoe_ctlr *fip) + + INIT_LIST_HEAD(&del_list); + +- stats = per_cpu_ptr(fip->lp->stats, get_cpu()); ++ stats = per_cpu_ptr(fip->lp->stats, get_cpu_light()); + + list_for_each_entry_safe(fcf, next, &fip->fcfs, list) { + deadline = fcf->time + fcf->fka_period + fcf->fka_period / 2; +@@ -874,7 +874,7 @@ static unsigned long fcoe_ctlr_age_fcfs(struct fcoe_ctlr *fip) + sel_time = fcf->time; + } + } +- put_cpu(); ++ put_cpu_light(); + + list_for_each_entry_safe(fcf, next, &del_list, list) { + /* Removes fcf from current list */ +diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c +index 42bcf7f3a0f9..2ce045d6860c 100644 +--- a/drivers/scsi/libfc/fc_exch.c ++++ b/drivers/scsi/libfc/fc_exch.c +@@ -833,10 +833,10 @@ static struct fc_exch *fc_exch_em_alloc(struct fc_lport *lport, + } + memset(ep, 0, sizeof(*ep)); + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + pool = per_cpu_ptr(mp->pool, cpu); + spin_lock_bh(&pool->lock); +- put_cpu(); ++ put_cpu_light(); + + /* peek cache of free slot */ + if (pool->left != FC_XID_UNKNOWN) { +diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c +index fdcf3076681b..b56619418cea 100644 +--- a/drivers/spi/spi-rockchip.c ++++ b/drivers/spi/spi-rockchip.c +@@ -22,6 +22,7 @@ + #include + #include + #include ++#include + + #define DRIVER_NAME "rockchip-spi" + +diff --git a/drivers/staging/android/vsoc.c b/drivers/staging/android/vsoc.c +index 22571abcaa4e..78a529d363f3 100644 +--- a/drivers/staging/android/vsoc.c ++++ b/drivers/staging/android/vsoc.c +@@ -437,12 +437,10 @@ static int handle_vsoc_cond_wait(struct file *filp, struct vsoc_cond_wait *arg) + return -EINVAL; + wake_time = ktime_set(arg->wake_time_sec, arg->wake_time_nsec); + +- hrtimer_init_on_stack(&to->timer, CLOCK_MONOTONIC, +- HRTIMER_MODE_ABS); ++ hrtimer_init_sleeper_on_stack(to, CLOCK_MONOTONIC, ++ HRTIMER_MODE_ABS, current); + hrtimer_set_expires_range_ns(&to->timer, wake_time, + current->timer_slack_ns); +- +- hrtimer_init_sleeper(to, current); + } + + while (1) { +diff --git a/drivers/thermal/x86_pkg_temp_thermal.c b/drivers/thermal/x86_pkg_temp_thermal.c +index 1ef937d799e4..a5991cbb408f 100644 +--- a/drivers/thermal/x86_pkg_temp_thermal.c ++++ b/drivers/thermal/x86_pkg_temp_thermal.c +@@ -29,6 +29,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -329,7 +330,7 @@ static void pkg_thermal_schedule_work(int cpu, struct delayed_work *work) + schedule_delayed_work_on(cpu, work, ms); + } + +-static int pkg_thermal_notify(u64 msr_val) ++static void pkg_thermal_notify_work(struct swork_event *event) + { + int cpu = smp_processor_id(); + struct pkg_device *pkgdev; +@@ -348,9 +349,47 @@ static int pkg_thermal_notify(u64 msr_val) + } + + spin_unlock_irqrestore(&pkg_temp_lock, flags); ++} ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++static struct swork_event notify_work; ++ ++static int pkg_thermal_notify_work_init(void) ++{ ++ int err; ++ ++ err = swork_get(); ++ if (err) ++ return err; ++ ++ INIT_SWORK(¬ify_work, pkg_thermal_notify_work); + return 0; + } + ++static void pkg_thermal_notify_work_cleanup(void) ++{ ++ swork_put(); ++} ++ ++static int pkg_thermal_notify(u64 msr_val) ++{ ++ swork_queue(¬ify_work); ++ return 0; ++} ++ ++#else /* !CONFIG_PREEMPT_RT_FULL */ ++ ++static int pkg_thermal_notify_work_init(void) { return 0; } ++ ++static void pkg_thermal_notify_work_cleanup(void) { } ++ ++static int pkg_thermal_notify(u64 msr_val) ++{ ++ pkg_thermal_notify_work(NULL); ++ return 0; ++} ++#endif /* CONFIG_PREEMPT_RT_FULL */ ++ + static int pkg_temp_thermal_device_add(unsigned int cpu) + { + int pkgid = topology_logical_package_id(cpu); +@@ -515,11 +554,16 @@ static int __init pkg_temp_thermal_init(void) + if (!x86_match_cpu(pkg_temp_thermal_ids)) + return -ENODEV; + ++ if (!pkg_thermal_notify_work_init()) ++ return -ENODEV; ++ + max_packages = topology_max_packages(); + packages = kcalloc(max_packages, sizeof(struct pkg_device *), + GFP_KERNEL); +- if (!packages) +- return -ENOMEM; ++ if (!packages) { ++ ret = -ENOMEM; ++ goto err; ++ } + + ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "thermal/x86_pkg:online", + pkg_thermal_cpu_online, pkg_thermal_cpu_offline); +@@ -537,6 +581,7 @@ static int __init pkg_temp_thermal_init(void) + return 0; + + err: ++ pkg_thermal_notify_work_cleanup(); + kfree(packages); + return ret; + } +@@ -550,6 +595,7 @@ static void __exit pkg_temp_thermal_exit(void) + cpuhp_remove_state(pkg_thermal_hp_state); + debugfs_remove_recursive(debugfs); + kfree(packages); ++ pkg_thermal_notify_work_cleanup(); + } + module_exit(pkg_temp_thermal_exit) + +diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c +index 8fe3d0ed229e..a2baac4c8b63 100644 +--- a/drivers/tty/serial/8250/8250_core.c ++++ b/drivers/tty/serial/8250/8250_core.c +@@ -54,7 +54,16 @@ static struct uart_driver serial8250_reg; + + static unsigned int skip_txen_test; /* force skip of txen test at init time */ + +-#define PASS_LIMIT 512 ++/* ++ * On -rt we can have a more delays, and legitimately ++ * so - so don't drop work spuriously and spam the ++ * syslog: ++ */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define PASS_LIMIT 1000000 ++#else ++# define PASS_LIMIT 512 ++#endif + + #include + /* +diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c +index e26d87b6ffc5..ebc98ce465b8 100644 +--- a/drivers/tty/serial/8250/8250_port.c ++++ b/drivers/tty/serial/8250/8250_port.c +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -3238,9 +3239,9 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s, + + serial8250_rpm_get(up); + +- if (port->sysrq) ++ if (port->sysrq || oops_in_progress) + locked = 0; +- else if (oops_in_progress) ++ else if (in_kdb_printk()) + locked = spin_trylock_irqsave(&port->lock, flags); + else + spin_lock_irqsave(&port->lock, flags); +diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c +index 89ade213a1a9..59b4ab7b50bf 100644 +--- a/drivers/tty/serial/amba-pl011.c ++++ b/drivers/tty/serial/amba-pl011.c +@@ -2211,18 +2211,24 @@ pl011_console_write(struct console *co, const char *s, unsigned int count) + { + struct uart_amba_port *uap = amba_ports[co->index]; + unsigned int old_cr = 0, new_cr; +- unsigned long flags; ++ unsigned long flags = 0; + int locked = 1; + + clk_enable(uap->clk); + +- local_irq_save(flags); ++ /* ++ * local_irq_save(flags); ++ * ++ * This local_irq_save() is nonsense. If we come in via sysrq ++ * handling then interrupts are already disabled. Aside of ++ * that the port.sysrq check is racy on SMP regardless. ++ */ + if (uap->port.sysrq) + locked = 0; + else if (oops_in_progress) +- locked = spin_trylock(&uap->port.lock); ++ locked = spin_trylock_irqsave(&uap->port.lock, flags); + else +- spin_lock(&uap->port.lock); ++ spin_lock_irqsave(&uap->port.lock, flags); + + /* + * First save the CR then disable the interrupts +@@ -2248,8 +2254,7 @@ pl011_console_write(struct console *co, const char *s, unsigned int count) + pl011_write(old_cr, uap, REG_CR); + + if (locked) +- spin_unlock(&uap->port.lock); +- local_irq_restore(flags); ++ spin_unlock_irqrestore(&uap->port.lock, flags); + + clk_disable(uap->clk); + } +diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c +index 6420ae581a80..0f4f41ed9ffa 100644 +--- a/drivers/tty/serial/omap-serial.c ++++ b/drivers/tty/serial/omap-serial.c +@@ -1307,13 +1307,10 @@ serial_omap_console_write(struct console *co, const char *s, + + pm_runtime_get_sync(up->dev); + +- local_irq_save(flags); +- if (up->port.sysrq) +- locked = 0; +- else if (oops_in_progress) +- locked = spin_trylock(&up->port.lock); ++ if (up->port.sysrq || oops_in_progress) ++ locked = spin_trylock_irqsave(&up->port.lock, flags); + else +- spin_lock(&up->port.lock); ++ spin_lock_irqsave(&up->port.lock, flags); + + /* + * First save the IER then disable the interrupts +@@ -1342,8 +1339,7 @@ serial_omap_console_write(struct console *co, const char *s, + pm_runtime_mark_last_busy(up->dev); + pm_runtime_put_autosuspend(up->dev); + if (locked) +- spin_unlock(&up->port.lock); +- local_irq_restore(flags); ++ spin_unlock_irqrestore(&up->port.lock, flags); + } + + static int __init +diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c +index 06ed20dd01ba..627517ad55bf 100644 +--- a/drivers/tty/sysrq.c ++++ b/drivers/tty/sysrq.c +@@ -215,7 +215,7 @@ static struct sysrq_key_op sysrq_showlocks_op = { + #endif + + #ifdef CONFIG_SMP +-static DEFINE_SPINLOCK(show_lock); ++static DEFINE_RAW_SPINLOCK(show_lock); + + static void showacpu(void *dummy) + { +@@ -225,10 +225,10 @@ static void showacpu(void *dummy) + if (idle_cpu(smp_processor_id())) + return; + +- spin_lock_irqsave(&show_lock, flags); ++ raw_spin_lock_irqsave(&show_lock, flags); + pr_info("CPU%d:\n", smp_processor_id()); + show_stack(NULL, NULL); +- spin_unlock_irqrestore(&show_lock, flags); ++ raw_spin_unlock_irqrestore(&show_lock, flags); + } + + static void sysrq_showregs_othercpus(struct work_struct *dummy) +diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c +index b82a7d787add..2f3015356124 100644 +--- a/drivers/usb/core/hcd.c ++++ b/drivers/usb/core/hcd.c +@@ -1738,7 +1738,6 @@ static void __usb_hcd_giveback_urb(struct urb *urb) + struct usb_hcd *hcd = bus_to_hcd(urb->dev->bus); + struct usb_anchor *anchor = urb->anchor; + int status = urb->unlinked; +- unsigned long flags; + + urb->hcpriv = NULL; + if (unlikely((urb->transfer_flags & URB_SHORT_NOT_OK) && +@@ -1766,9 +1765,7 @@ static void __usb_hcd_giveback_urb(struct urb *urb) + * and no one may trigger the above deadlock situation when + * running complete() in tasklet. + */ +- local_irq_save(flags); + urb->complete(urb); +- local_irq_restore(flags); + + usb_anchor_resume_wakeups(anchor); + atomic_dec(&urb->use_count); +diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c +index aa15593a3ac4..5e9269cd14fa 100644 +--- a/drivers/usb/gadget/function/f_fs.c ++++ b/drivers/usb/gadget/function/f_fs.c +@@ -1624,7 +1624,7 @@ static void ffs_data_put(struct ffs_data *ffs) + pr_info("%s(): freeing\n", __func__); + ffs_data_clear(ffs); + BUG_ON(waitqueue_active(&ffs->ev.waitq) || +- waitqueue_active(&ffs->ep0req_completion.wait) || ++ swait_active(&ffs->ep0req_completion.wait) || + waitqueue_active(&ffs->wait)); + destroy_workqueue(ffs->io_completion_wq); + kfree(ffs->dev_name); +diff --git a/drivers/usb/gadget/legacy/inode.c b/drivers/usb/gadget/legacy/inode.c +index 37ca0e669bd8..56a16587b221 100644 +--- a/drivers/usb/gadget/legacy/inode.c ++++ b/drivers/usb/gadget/legacy/inode.c +@@ -343,7 +343,7 @@ ep_io (struct ep_data *epdata, void *buf, unsigned len) + spin_unlock_irq (&epdata->dev->lock); + + if (likely (value == 0)) { +- value = wait_event_interruptible (done.wait, done.done); ++ value = swait_event_interruptible_exclusive(done.wait, done.done); + if (value != 0) { + spin_lock_irq (&epdata->dev->lock); + if (likely (epdata->ep != NULL)) { +@@ -352,7 +352,7 @@ ep_io (struct ep_data *epdata, void *buf, unsigned len) + usb_ep_dequeue (epdata->ep, epdata->req); + spin_unlock_irq (&epdata->dev->lock); + +- wait_event (done.wait, done.done); ++ swait_event_exclusive(done.wait, done.done); + if (epdata->status == -ECONNRESET) + epdata->status = -EINTR; + } else { +diff --git a/drivers/watchdog/watchdog_dev.c b/drivers/watchdog/watchdog_dev.c +index 42e25a0792b8..09203ab91c83 100644 +--- a/drivers/watchdog/watchdog_dev.c ++++ b/drivers/watchdog/watchdog_dev.c +@@ -147,7 +147,7 @@ static inline void watchdog_update_worker(struct watchdog_device *wdd) + ktime_t t = watchdog_next_keepalive(wdd); + + if (t > 0) +- hrtimer_start(&wd_data->timer, t, HRTIMER_MODE_REL); ++ hrtimer_start(&wd_data->timer, t, HRTIMER_MODE_REL_HARD); + } else { + hrtimer_cancel(&wd_data->timer); + } +@@ -166,7 +166,7 @@ static int __watchdog_ping(struct watchdog_device *wdd) + if (ktime_after(earliest_keepalive, now)) { + hrtimer_start(&wd_data->timer, + ktime_sub(earliest_keepalive, now), +- HRTIMER_MODE_REL); ++ HRTIMER_MODE_REL_HARD); + return 0; + } + +@@ -947,7 +947,7 @@ static int watchdog_cdev_register(struct watchdog_device *wdd, dev_t devno) + return -ENODEV; + + kthread_init_work(&wd_data->work, watchdog_ping_work); +- hrtimer_init(&wd_data->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ hrtimer_init(&wd_data->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD); + wd_data->timer.function = watchdog_timer_expired; + + if (wdd->id == 0) { +@@ -994,7 +994,7 @@ static int watchdog_cdev_register(struct watchdog_device *wdd, dev_t devno) + __module_get(wdd->ops->owner); + kref_get(&wd_data->kref); + if (handle_boot_enabled) +- hrtimer_start(&wd_data->timer, 0, HRTIMER_MODE_REL); ++ hrtimer_start(&wd_data->timer, 0, HRTIMER_MODE_REL_HARD); + else + pr_info("watchdog%d running and kernel based pre-userspace handler disabled\n", + wdd->id); +diff --git a/fs/aio.c b/fs/aio.c +index 911e23087dfb..16dcf8521c2c 100644 +--- a/fs/aio.c ++++ b/fs/aio.c +@@ -42,6 +42,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -121,6 +122,7 @@ struct kioctx { + long nr_pages; + + struct rcu_work free_rwork; /* see free_ioctx() */ ++ struct swork_event free_swork; /* see free_ioctx() */ + + /* + * signals when all in-flight requests are done +@@ -265,6 +267,7 @@ static int __init aio_setup(void) + .mount = aio_mount, + .kill_sb = kill_anon_super, + }; ++ BUG_ON(swork_get()); + aio_mnt = kern_mount(&aio_fs); + if (IS_ERR(aio_mnt)) + panic("Failed to create aio fs mount."); +@@ -606,9 +609,9 @@ static void free_ioctx_reqs(struct percpu_ref *ref) + * and ctx->users has dropped to 0, so we know no more kiocbs can be submitted - + * now it's safe to cancel any that need to be. + */ +-static void free_ioctx_users(struct percpu_ref *ref) ++static void free_ioctx_users_work(struct swork_event *sev) + { +- struct kioctx *ctx = container_of(ref, struct kioctx, users); ++ struct kioctx *ctx = container_of(sev, struct kioctx, free_swork); + struct aio_kiocb *req; + + spin_lock_irq(&ctx->ctx_lock); +@@ -626,6 +629,14 @@ static void free_ioctx_users(struct percpu_ref *ref) + percpu_ref_put(&ctx->reqs); + } + ++static void free_ioctx_users(struct percpu_ref *ref) ++{ ++ struct kioctx *ctx = container_of(ref, struct kioctx, users); ++ ++ INIT_SWORK(&ctx->free_swork, free_ioctx_users_work); ++ swork_queue(&ctx->free_swork); ++} ++ + static int ioctx_add_table(struct kioctx *ctx, struct mm_struct *mm) + { + unsigned i, new_nr; +diff --git a/fs/autofs/expire.c b/fs/autofs/expire.c +index 28d9c2b1b3bb..354b7147cead 100644 +--- a/fs/autofs/expire.c ++++ b/fs/autofs/expire.c +@@ -8,6 +8,7 @@ + * option, any later version, incorporated herein by reference. + */ + ++#include + #include "autofs_i.h" + + /* Check if a dentry can be expired */ +@@ -153,7 +154,7 @@ static struct dentry *get_next_positive_dentry(struct dentry *prev, + parent = p->d_parent; + if (!spin_trylock(&parent->d_lock)) { + spin_unlock(&p->d_lock); +- cpu_relax(); ++ cpu_chill(); + goto relock; + } + spin_unlock(&p->d_lock); +diff --git a/fs/buffer.c b/fs/buffer.c +index a550e0d8e965..a5b3a456dbff 100644 +--- a/fs/buffer.c ++++ b/fs/buffer.c +@@ -274,8 +274,7 @@ static void end_buffer_async_read(struct buffer_head *bh, int uptodate) + * decide that the page is now completely done. + */ + first = page_buffers(page); +- local_irq_save(flags); +- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); ++ flags = bh_uptodate_lock_irqsave(first); + clear_buffer_async_read(bh); + unlock_buffer(bh); + tmp = bh; +@@ -288,8 +287,7 @@ static void end_buffer_async_read(struct buffer_head *bh, int uptodate) + } + tmp = tmp->b_this_page; + } while (tmp != bh); +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); ++ bh_uptodate_unlock_irqrestore(first, flags); + + /* + * If none of the buffers had errors and they are all +@@ -301,9 +299,7 @@ static void end_buffer_async_read(struct buffer_head *bh, int uptodate) + return; + + still_busy: +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); +- return; ++ bh_uptodate_unlock_irqrestore(first, flags); + } + + /* +@@ -330,8 +326,7 @@ void end_buffer_async_write(struct buffer_head *bh, int uptodate) + } + + first = page_buffers(page); +- local_irq_save(flags); +- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); ++ flags = bh_uptodate_lock_irqsave(first); + + clear_buffer_async_write(bh); + unlock_buffer(bh); +@@ -343,15 +338,12 @@ void end_buffer_async_write(struct buffer_head *bh, int uptodate) + } + tmp = tmp->b_this_page; + } +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); ++ bh_uptodate_unlock_irqrestore(first, flags); + end_page_writeback(page); + return; + + still_busy: +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); +- return; ++ bh_uptodate_unlock_irqrestore(first, flags); + } + EXPORT_SYMBOL(end_buffer_async_write); + +@@ -3368,6 +3360,7 @@ struct buffer_head *alloc_buffer_head(gfp_t gfp_flags) + struct buffer_head *ret = kmem_cache_zalloc(bh_cachep, gfp_flags); + if (ret) { + INIT_LIST_HEAD(&ret->b_assoc_buffers); ++ buffer_head_init_locks(ret); + preempt_disable(); + __this_cpu_inc(bh_accounting.nr); + recalc_bh_state(); +diff --git a/fs/cifs/readdir.c b/fs/cifs/readdir.c +index 3925a7bfc74d..33f7723fb83e 100644 +--- a/fs/cifs/readdir.c ++++ b/fs/cifs/readdir.c +@@ -80,7 +80,7 @@ cifs_prime_dcache(struct dentry *parent, struct qstr *name, + struct inode *inode; + struct super_block *sb = parent->d_sb; + struct cifs_sb_info *cifs_sb = CIFS_SB(sb); +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + cifs_dbg(FYI, "%s: for %s\n", __func__, name->name); + +diff --git a/fs/dcache.c b/fs/dcache.c +index 6e0022326afe..b2a00f3ff7df 100644 +--- a/fs/dcache.c ++++ b/fs/dcache.c +@@ -2404,9 +2404,10 @@ EXPORT_SYMBOL(d_rehash); + static inline unsigned start_dir_add(struct inode *dir) + { + ++ preempt_disable_rt(); + for (;;) { +- unsigned n = dir->i_dir_seq; +- if (!(n & 1) && cmpxchg(&dir->i_dir_seq, n, n + 1) == n) ++ unsigned n = dir->__i_dir_seq; ++ if (!(n & 1) && cmpxchg(&dir->__i_dir_seq, n, n + 1) == n) + return n; + cpu_relax(); + } +@@ -2414,26 +2415,30 @@ static inline unsigned start_dir_add(struct inode *dir) + + static inline void end_dir_add(struct inode *dir, unsigned n) + { +- smp_store_release(&dir->i_dir_seq, n + 2); ++ smp_store_release(&dir->__i_dir_seq, n + 2); ++ preempt_enable_rt(); + } + + static void d_wait_lookup(struct dentry *dentry) + { +- if (d_in_lookup(dentry)) { +- DECLARE_WAITQUEUE(wait, current); +- add_wait_queue(dentry->d_wait, &wait); +- do { +- set_current_state(TASK_UNINTERRUPTIBLE); +- spin_unlock(&dentry->d_lock); +- schedule(); +- spin_lock(&dentry->d_lock); +- } while (d_in_lookup(dentry)); +- } ++ struct swait_queue __wait; ++ ++ if (!d_in_lookup(dentry)) ++ return; ++ ++ INIT_LIST_HEAD(&__wait.task_list); ++ do { ++ prepare_to_swait_exclusive(dentry->d_wait, &__wait, TASK_UNINTERRUPTIBLE); ++ spin_unlock(&dentry->d_lock); ++ schedule(); ++ spin_lock(&dentry->d_lock); ++ } while (d_in_lookup(dentry)); ++ finish_swait(dentry->d_wait, &__wait); + } + + struct dentry *d_alloc_parallel(struct dentry *parent, + const struct qstr *name, +- wait_queue_head_t *wq) ++ struct swait_queue_head *wq) + { + unsigned int hash = name->hash; + struct hlist_bl_head *b = in_lookup_hash(parent, hash); +@@ -2447,7 +2452,7 @@ struct dentry *d_alloc_parallel(struct dentry *parent, + + retry: + rcu_read_lock(); +- seq = smp_load_acquire(&parent->d_inode->i_dir_seq); ++ seq = smp_load_acquire(&parent->d_inode->__i_dir_seq); + r_seq = read_seqbegin(&rename_lock); + dentry = __d_lookup_rcu(parent, name, &d_seq); + if (unlikely(dentry)) { +@@ -2475,7 +2480,7 @@ struct dentry *d_alloc_parallel(struct dentry *parent, + } + + hlist_bl_lock(b); +- if (unlikely(READ_ONCE(parent->d_inode->i_dir_seq) != seq)) { ++ if (unlikely(READ_ONCE(parent->d_inode->__i_dir_seq) != seq)) { + hlist_bl_unlock(b); + rcu_read_unlock(); + goto retry; +@@ -2548,7 +2553,7 @@ void __d_lookup_done(struct dentry *dentry) + hlist_bl_lock(b); + dentry->d_flags &= ~DCACHE_PAR_LOOKUP; + __hlist_bl_del(&dentry->d_u.d_in_lookup_hash); +- wake_up_all(dentry->d_wait); ++ swake_up_all(dentry->d_wait); + dentry->d_wait = NULL; + hlist_bl_unlock(b); + INIT_HLIST_NODE(&dentry->d_u.d_alias); +@@ -3060,6 +3065,8 @@ __setup("dhash_entries=", set_dhash_entries); + + static void __init dcache_init_early(void) + { ++ unsigned int loop; ++ + /* If hashes are distributed across NUMA nodes, defer + * hash allocation until vmalloc space is available. + */ +@@ -3076,11 +3083,16 @@ static void __init dcache_init_early(void) + NULL, + 0, + 0); ++ ++ for (loop = 0; loop < (1U << d_hash_shift); loop++) ++ INIT_HLIST_BL_HEAD(dentry_hashtable + loop); ++ + d_hash_shift = 32 - d_hash_shift; + } + + static void __init dcache_init(void) + { ++ unsigned int loop; + /* + * A constructor could be added for stable state like the lists, + * but it is probably not worth it because of the cache nature +@@ -3104,6 +3116,10 @@ static void __init dcache_init(void) + NULL, + 0, + 0); ++ ++ for (loop = 0; loop < (1U << d_hash_shift); loop++) ++ INIT_HLIST_BL_HEAD(dentry_hashtable + loop); ++ + d_hash_shift = 32 - d_hash_shift; + } + +diff --git a/fs/eventpoll.c b/fs/eventpoll.c +index 58f48ea0db23..a41120a34e6d 100644 +--- a/fs/eventpoll.c ++++ b/fs/eventpoll.c +@@ -571,12 +571,12 @@ static int ep_poll_wakeup_proc(void *priv, void *cookie, int call_nests) + + static void ep_poll_safewake(wait_queue_head_t *wq) + { +- int this_cpu = get_cpu(); ++ int this_cpu = get_cpu_light(); + + ep_call_nested(&poll_safewake_ncalls, EP_MAX_NESTS, + ep_poll_wakeup_proc, NULL, wq, (void *) (long) this_cpu); + +- put_cpu(); ++ put_cpu_light(); + } + + #else +diff --git a/fs/exec.c b/fs/exec.c +index 433b1257694a..352c1a6fa6a9 100644 +--- a/fs/exec.c ++++ b/fs/exec.c +@@ -1028,12 +1028,14 @@ static int exec_mmap(struct mm_struct *mm) + } + } + task_lock(tsk); ++ preempt_disable_rt(); + active_mm = tsk->active_mm; + tsk->mm = mm; + tsk->active_mm = mm; + activate_mm(active_mm, mm); + tsk->mm->vmacache_seqnum = 0; + vmacache_flush(tsk); ++ preempt_enable_rt(); + task_unlock(tsk); + if (old_mm) { + up_read(&old_mm->mmap_sem); +diff --git a/fs/ext4/page-io.c b/fs/ext4/page-io.c +index db7590178dfc..d76364124443 100644 +--- a/fs/ext4/page-io.c ++++ b/fs/ext4/page-io.c +@@ -95,8 +95,7 @@ static void ext4_finish_bio(struct bio *bio) + * We check all buffers in the page under BH_Uptodate_Lock + * to avoid races with other end io clearing async_write flags + */ +- local_irq_save(flags); +- bit_spin_lock(BH_Uptodate_Lock, &head->b_state); ++ flags = bh_uptodate_lock_irqsave(head); + do { + if (bh_offset(bh) < bio_start || + bh_offset(bh) + bh->b_size > bio_end) { +@@ -108,8 +107,7 @@ static void ext4_finish_bio(struct bio *bio) + if (bio->bi_status) + buffer_io_error(bh); + } while ((bh = bh->b_this_page) != head); +- bit_spin_unlock(BH_Uptodate_Lock, &head->b_state); +- local_irq_restore(flags); ++ bh_uptodate_unlock_irqrestore(head, flags); + if (!under_io) { + #ifdef CONFIG_EXT4_FS_ENCRYPTION + if (data_page) +diff --git a/fs/fscache/cookie.c b/fs/fscache/cookie.c +index c550512ce335..d5d57da32ffa 100644 +--- a/fs/fscache/cookie.c ++++ b/fs/fscache/cookie.c +@@ -962,3 +962,11 @@ int __fscache_check_consistency(struct fscache_cookie *cookie, + return -ESTALE; + } + EXPORT_SYMBOL(__fscache_check_consistency); ++ ++void __init fscache_cookie_init(void) ++{ ++ int i; ++ ++ for (i = 0; i < (1 << fscache_cookie_hash_shift) - 1; i++) ++ INIT_HLIST_BL_HEAD(&fscache_cookie_hash[i]); ++} +diff --git a/fs/fscache/main.c b/fs/fscache/main.c +index 30ad89db1efc..1d5f1d679ffa 100644 +--- a/fs/fscache/main.c ++++ b/fs/fscache/main.c +@@ -149,6 +149,7 @@ static int __init fscache_init(void) + ret = -ENOMEM; + goto error_cookie_jar; + } ++ fscache_cookie_init(); + + fscache_root = kobject_create_and_add("fscache", kernel_kobj); + if (!fscache_root) +diff --git a/fs/fuse/dir.c b/fs/fuse/dir.c +index 82a13221775e..58324a93e3c0 100644 +--- a/fs/fuse/dir.c ++++ b/fs/fuse/dir.c +@@ -1203,7 +1203,7 @@ static int fuse_direntplus_link(struct file *file, + struct inode *dir = d_inode(parent); + struct fuse_conn *fc; + struct inode *inode; +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + if (!o->nodeid) { + /* +diff --git a/fs/inode.c b/fs/inode.c +index 5c63693326bb..c3e17dcbb558 100644 +--- a/fs/inode.c ++++ b/fs/inode.c +@@ -155,7 +155,7 @@ int inode_init_always(struct super_block *sb, struct inode *inode) + inode->i_bdev = NULL; + inode->i_cdev = NULL; + inode->i_link = NULL; +- inode->i_dir_seq = 0; ++ inode->__i_dir_seq = 0; + inode->i_rdev = 0; + inode->dirtied_when = 0; + +diff --git a/fs/libfs.c b/fs/libfs.c +index 0fb590d79f30..cd95874a1952 100644 +--- a/fs/libfs.c ++++ b/fs/libfs.c +@@ -90,7 +90,7 @@ static struct dentry *next_positive(struct dentry *parent, + struct list_head *from, + int count) + { +- unsigned *seq = &parent->d_inode->i_dir_seq, n; ++ unsigned *seq = &parent->d_inode->__i_dir_seq, n; + struct dentry *res; + struct list_head *p; + bool skipped; +@@ -123,8 +123,9 @@ static struct dentry *next_positive(struct dentry *parent, + static void move_cursor(struct dentry *cursor, struct list_head *after) + { + struct dentry *parent = cursor->d_parent; +- unsigned n, *seq = &parent->d_inode->i_dir_seq; ++ unsigned n, *seq = &parent->d_inode->__i_dir_seq; + spin_lock(&parent->d_lock); ++ preempt_disable_rt(); + for (;;) { + n = *seq; + if (!(n & 1) && cmpxchg(seq, n, n + 1) == n) +@@ -137,6 +138,7 @@ static void move_cursor(struct dentry *cursor, struct list_head *after) + else + list_add_tail(&cursor->d_child, &parent->d_subdirs); + smp_store_release(seq, n + 2); ++ preempt_enable_rt(); + spin_unlock(&parent->d_lock); + } + +diff --git a/fs/locks.c b/fs/locks.c +index 2ecb4db8c840..8259b7c7b5d2 100644 +--- a/fs/locks.c ++++ b/fs/locks.c +@@ -936,7 +936,7 @@ static int flock_lock_inode(struct inode *inode, struct file_lock *request) + return -ENOMEM; + } + +- percpu_down_read_preempt_disable(&file_rwsem); ++ percpu_down_read(&file_rwsem); + spin_lock(&ctx->flc_lock); + if (request->fl_flags & FL_ACCESS) + goto find_conflict; +@@ -977,7 +977,7 @@ static int flock_lock_inode(struct inode *inode, struct file_lock *request) + + out: + spin_unlock(&ctx->flc_lock); +- percpu_up_read_preempt_enable(&file_rwsem); ++ percpu_up_read(&file_rwsem); + if (new_fl) + locks_free_lock(new_fl); + locks_dispose_list(&dispose); +@@ -1015,7 +1015,7 @@ static int posix_lock_inode(struct inode *inode, struct file_lock *request, + new_fl2 = locks_alloc_lock(); + } + +- percpu_down_read_preempt_disable(&file_rwsem); ++ percpu_down_read(&file_rwsem); + spin_lock(&ctx->flc_lock); + /* + * New lock request. Walk all POSIX locks and look for conflicts. If +@@ -1187,7 +1187,7 @@ static int posix_lock_inode(struct inode *inode, struct file_lock *request, + } + out: + spin_unlock(&ctx->flc_lock); +- percpu_up_read_preempt_enable(&file_rwsem); ++ percpu_up_read(&file_rwsem); + /* + * Free any unused locks. + */ +@@ -1462,7 +1462,7 @@ int __break_lease(struct inode *inode, unsigned int mode, unsigned int type) + return error; + } + +- percpu_down_read_preempt_disable(&file_rwsem); ++ percpu_down_read(&file_rwsem); + spin_lock(&ctx->flc_lock); + + time_out_leases(inode, &dispose); +@@ -1514,13 +1514,13 @@ int __break_lease(struct inode *inode, unsigned int mode, unsigned int type) + locks_insert_block(fl, new_fl); + trace_break_lease_block(inode, new_fl); + spin_unlock(&ctx->flc_lock); +- percpu_up_read_preempt_enable(&file_rwsem); ++ percpu_up_read(&file_rwsem); + + locks_dispose_list(&dispose); + error = wait_event_interruptible_timeout(new_fl->fl_wait, + !new_fl->fl_next, break_time); + +- percpu_down_read_preempt_disable(&file_rwsem); ++ percpu_down_read(&file_rwsem); + spin_lock(&ctx->flc_lock); + trace_break_lease_unblock(inode, new_fl); + locks_delete_block(new_fl); +@@ -1537,7 +1537,7 @@ int __break_lease(struct inode *inode, unsigned int mode, unsigned int type) + } + out: + spin_unlock(&ctx->flc_lock); +- percpu_up_read_preempt_enable(&file_rwsem); ++ percpu_up_read(&file_rwsem); + locks_dispose_list(&dispose); + locks_free_lock(new_fl); + return error; +@@ -1609,7 +1609,7 @@ int fcntl_getlease(struct file *filp) + + ctx = smp_load_acquire(&inode->i_flctx); + if (ctx && !list_empty_careful(&ctx->flc_lease)) { +- percpu_down_read_preempt_disable(&file_rwsem); ++ percpu_down_read(&file_rwsem); + spin_lock(&ctx->flc_lock); + time_out_leases(inode, &dispose); + list_for_each_entry(fl, &ctx->flc_lease, fl_list) { +@@ -1619,7 +1619,7 @@ int fcntl_getlease(struct file *filp) + break; + } + spin_unlock(&ctx->flc_lock); +- percpu_up_read_preempt_enable(&file_rwsem); ++ percpu_up_read(&file_rwsem); + + locks_dispose_list(&dispose); + } +@@ -1693,7 +1693,7 @@ generic_add_lease(struct file *filp, long arg, struct file_lock **flp, void **pr + return -EINVAL; + } + +- percpu_down_read_preempt_disable(&file_rwsem); ++ percpu_down_read(&file_rwsem); + spin_lock(&ctx->flc_lock); + time_out_leases(inode, &dispose); + error = check_conflicting_open(dentry, arg, lease->fl_flags); +@@ -1764,7 +1764,7 @@ generic_add_lease(struct file *filp, long arg, struct file_lock **flp, void **pr + lease->fl_lmops->lm_setup(lease, priv); + out: + spin_unlock(&ctx->flc_lock); +- percpu_up_read_preempt_enable(&file_rwsem); ++ percpu_up_read(&file_rwsem); + locks_dispose_list(&dispose); + if (is_deleg) + inode_unlock(inode); +@@ -1787,7 +1787,7 @@ static int generic_delete_lease(struct file *filp, void *owner) + return error; + } + +- percpu_down_read_preempt_disable(&file_rwsem); ++ percpu_down_read(&file_rwsem); + spin_lock(&ctx->flc_lock); + list_for_each_entry(fl, &ctx->flc_lease, fl_list) { + if (fl->fl_file == filp && +@@ -1800,7 +1800,7 @@ static int generic_delete_lease(struct file *filp, void *owner) + if (victim) + error = fl->fl_lmops->lm_change(victim, F_UNLCK, &dispose); + spin_unlock(&ctx->flc_lock); +- percpu_up_read_preempt_enable(&file_rwsem); ++ percpu_up_read(&file_rwsem); + locks_dispose_list(&dispose); + return error; + } +@@ -2531,13 +2531,13 @@ locks_remove_lease(struct file *filp, struct file_lock_context *ctx) + if (list_empty(&ctx->flc_lease)) + return; + +- percpu_down_read_preempt_disable(&file_rwsem); ++ percpu_down_read(&file_rwsem); + spin_lock(&ctx->flc_lock); + list_for_each_entry_safe(fl, tmp, &ctx->flc_lease, fl_list) + if (filp == fl->fl_file) + lease_modify(fl, F_UNLCK, &dispose); + spin_unlock(&ctx->flc_lock); +- percpu_up_read_preempt_enable(&file_rwsem); ++ percpu_up_read(&file_rwsem); + + locks_dispose_list(&dispose); + } +diff --git a/fs/namei.c b/fs/namei.c +index 914178cdbe94..2a8c41bc227f 100644 +--- a/fs/namei.c ++++ b/fs/namei.c +@@ -1645,7 +1645,7 @@ static struct dentry *__lookup_slow(const struct qstr *name, + { + struct dentry *dentry, *old; + struct inode *inode = dir->d_inode; +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + /* Don't go there if it's already dead */ + if (unlikely(IS_DEADDIR(inode))) +@@ -3135,7 +3135,7 @@ static int lookup_open(struct nameidata *nd, struct path *path, + struct dentry *dentry; + int error, create_error = 0; + umode_t mode = op->mode; +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + + if (unlikely(IS_DEADDIR(dir_inode))) + return -ENOENT; +diff --git a/fs/namespace.c b/fs/namespace.c +index 1fce41ba3535..5dc970027e30 100644 +--- a/fs/namespace.c ++++ b/fs/namespace.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -327,8 +328,11 @@ int __mnt_want_write(struct vfsmount *m) + * incremented count after it has set MNT_WRITE_HOLD. + */ + smp_mb(); +- while (READ_ONCE(mnt->mnt.mnt_flags) & MNT_WRITE_HOLD) +- cpu_relax(); ++ while (READ_ONCE(mnt->mnt.mnt_flags) & MNT_WRITE_HOLD) { ++ preempt_enable(); ++ cpu_chill(); ++ preempt_disable(); ++ } + /* + * After the slowpath clears MNT_WRITE_HOLD, mnt_is_readonly will + * be set to match its requirements. So we must not load that until +diff --git a/fs/nfs/delegation.c b/fs/nfs/delegation.c +index 75fe92eaa681..e8d05393443f 100644 +--- a/fs/nfs/delegation.c ++++ b/fs/nfs/delegation.c +@@ -152,11 +152,11 @@ static int nfs_delegation_claim_opens(struct inode *inode, + sp = state->owner; + /* Block nfs4_proc_unlck */ + mutex_lock(&sp->so_delegreturn_mutex); +- seq = raw_seqcount_begin(&sp->so_reclaim_seqcount); ++ seq = read_seqbegin(&sp->so_reclaim_seqlock); + err = nfs4_open_delegation_recall(ctx, state, stateid, type); + if (!err) + err = nfs_delegation_claim_locks(ctx, state, stateid); +- if (!err && read_seqcount_retry(&sp->so_reclaim_seqcount, seq)) ++ if (!err && read_seqretry(&sp->so_reclaim_seqlock, seq)) + err = -EAGAIN; + mutex_unlock(&sp->so_delegreturn_mutex); + put_nfs_open_context(ctx); +diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c +index 8bfaa658b2c1..9818a5dfb472 100644 +--- a/fs/nfs/dir.c ++++ b/fs/nfs/dir.c +@@ -445,7 +445,7 @@ static + void nfs_prime_dcache(struct dentry *parent, struct nfs_entry *entry) + { + struct qstr filename = QSTR_INIT(entry->name, entry->len); +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + struct dentry *dentry; + struct dentry *alias; + struct inode *dir = d_inode(parent); +@@ -1459,7 +1459,7 @@ int nfs_atomic_open(struct inode *dir, struct dentry *dentry, + struct file *file, unsigned open_flags, + umode_t mode) + { +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + struct nfs_open_context *ctx; + struct dentry *res; + struct iattr attr = { .ia_valid = ATTR_OPEN }; +@@ -1786,7 +1786,11 @@ int nfs_rmdir(struct inode *dir, struct dentry *dentry) + + trace_nfs_rmdir_enter(dir, dentry); + if (d_really_is_positive(dentry)) { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ down(&NFS_I(d_inode(dentry))->rmdir_sem); ++#else + down_write(&NFS_I(d_inode(dentry))->rmdir_sem); ++#endif + error = NFS_PROTO(dir)->rmdir(dir, &dentry->d_name); + /* Ensure the VFS deletes this inode */ + switch (error) { +@@ -1796,7 +1800,11 @@ int nfs_rmdir(struct inode *dir, struct dentry *dentry) + case -ENOENT: + nfs_dentry_handle_enoent(dentry); + } ++#ifdef CONFIG_PREEMPT_RT_BASE ++ up(&NFS_I(d_inode(dentry))->rmdir_sem); ++#else + up_write(&NFS_I(d_inode(dentry))->rmdir_sem); ++#endif + } else + error = NFS_PROTO(dir)->rmdir(dir, &dentry->d_name); + trace_nfs_rmdir_exit(dir, dentry, error); +diff --git a/fs/nfs/inode.c b/fs/nfs/inode.c +index b65aee481d13..110ee6f78c31 100644 +--- a/fs/nfs/inode.c ++++ b/fs/nfs/inode.c +@@ -2103,7 +2103,11 @@ static void init_once(void *foo) + atomic_long_set(&nfsi->nrequests, 0); + atomic_long_set(&nfsi->commit_info.ncommit, 0); + atomic_set(&nfsi->commit_info.rpcs_out, 0); ++#ifdef CONFIG_PREEMPT_RT_BASE ++ sema_init(&nfsi->rmdir_sem, 1); ++#else + init_rwsem(&nfsi->rmdir_sem); ++#endif + mutex_init(&nfsi->commit_mutex); + nfs4_init_once(nfsi); + } +diff --git a/fs/nfs/nfs4_fs.h b/fs/nfs/nfs4_fs.h +index 63287d911c08..2ae55eaa4a1e 100644 +--- a/fs/nfs/nfs4_fs.h ++++ b/fs/nfs/nfs4_fs.h +@@ -114,7 +114,7 @@ struct nfs4_state_owner { + unsigned long so_flags; + struct list_head so_states; + struct nfs_seqid_counter so_seqid; +- seqcount_t so_reclaim_seqcount; ++ seqlock_t so_reclaim_seqlock; + struct mutex so_delegreturn_mutex; + }; + +diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c +index 1de855e0ae61..78c3f4359e76 100644 +--- a/fs/nfs/nfs4proc.c ++++ b/fs/nfs/nfs4proc.c +@@ -2865,7 +2865,7 @@ static int _nfs4_open_and_get_state(struct nfs4_opendata *opendata, + unsigned int seq; + int ret; + +- seq = raw_seqcount_begin(&sp->so_reclaim_seqcount); ++ seq = raw_seqcount_begin(&sp->so_reclaim_seqlock.seqcount); + + ret = _nfs4_proc_open(opendata, ctx); + if (ret != 0) +@@ -2906,7 +2906,7 @@ static int _nfs4_open_and_get_state(struct nfs4_opendata *opendata, + + if (d_inode(dentry) == state->inode) { + nfs_inode_attach_open_context(ctx); +- if (read_seqcount_retry(&sp->so_reclaim_seqcount, seq)) ++ if (read_seqretry(&sp->so_reclaim_seqlock, seq)) + nfs4_schedule_stateid_recovery(server, state); + } + +diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c +index 3ba2087469ac..f10952680bd9 100644 +--- a/fs/nfs/nfs4state.c ++++ b/fs/nfs/nfs4state.c +@@ -515,7 +515,7 @@ nfs4_alloc_state_owner(struct nfs_server *server, + nfs4_init_seqid_counter(&sp->so_seqid); + atomic_set(&sp->so_count, 1); + INIT_LIST_HEAD(&sp->so_lru); +- seqcount_init(&sp->so_reclaim_seqcount); ++ seqlock_init(&sp->so_reclaim_seqlock); + mutex_init(&sp->so_delegreturn_mutex); + return sp; + } +@@ -1568,8 +1568,12 @@ static int nfs4_reclaim_open_state(struct nfs4_state_owner *sp, const struct nfs + * recovering after a network partition or a reboot from a + * server that doesn't support a grace period. + */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ write_seqlock(&sp->so_reclaim_seqlock); ++#else ++ write_seqcount_begin(&sp->so_reclaim_seqlock.seqcount); ++#endif + spin_lock(&sp->so_lock); +- raw_write_seqcount_begin(&sp->so_reclaim_seqcount); + restart: + list_for_each_entry(state, &sp->so_states, open_states) { + if (!test_and_clear_bit(ops->state_flag_bit, &state->flags)) +@@ -1656,14 +1660,20 @@ static int nfs4_reclaim_open_state(struct nfs4_state_owner *sp, const struct nfs + spin_lock(&sp->so_lock); + goto restart; + } +- raw_write_seqcount_end(&sp->so_reclaim_seqcount); + spin_unlock(&sp->so_lock); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ write_sequnlock(&sp->so_reclaim_seqlock); ++#else ++ write_seqcount_end(&sp->so_reclaim_seqlock.seqcount); ++#endif + return 0; + out_err: + nfs4_put_open_state(state); +- spin_lock(&sp->so_lock); +- raw_write_seqcount_end(&sp->so_reclaim_seqcount); +- spin_unlock(&sp->so_lock); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ write_sequnlock(&sp->so_reclaim_seqlock); ++#else ++ write_seqcount_end(&sp->so_reclaim_seqlock.seqcount); ++#endif + return status; + } + +diff --git a/fs/nfs/unlink.c b/fs/nfs/unlink.c +index fd61bf0fce63..839bfa76f41e 100644 +--- a/fs/nfs/unlink.c ++++ b/fs/nfs/unlink.c +@@ -13,7 +13,7 @@ + #include + #include + #include +-#include ++#include + #include + #include + +@@ -52,6 +52,29 @@ static void nfs_async_unlink_done(struct rpc_task *task, void *calldata) + rpc_restart_call_prepare(task); + } + ++#ifdef CONFIG_PREEMPT_RT_BASE ++static void nfs_down_anon(struct semaphore *sema) ++{ ++ down(sema); ++} ++ ++static void nfs_up_anon(struct semaphore *sema) ++{ ++ up(sema); ++} ++ ++#else ++static void nfs_down_anon(struct rw_semaphore *rwsem) ++{ ++ down_read_non_owner(rwsem); ++} ++ ++static void nfs_up_anon(struct rw_semaphore *rwsem) ++{ ++ up_read_non_owner(rwsem); ++} ++#endif ++ + /** + * nfs_async_unlink_release - Release the sillydelete data. + * @task: rpc_task of the sillydelete +@@ -65,7 +88,7 @@ static void nfs_async_unlink_release(void *calldata) + struct dentry *dentry = data->dentry; + struct super_block *sb = dentry->d_sb; + +- up_read_non_owner(&NFS_I(d_inode(dentry->d_parent))->rmdir_sem); ++ nfs_up_anon(&NFS_I(d_inode(dentry->d_parent))->rmdir_sem); + d_lookup_done(dentry); + nfs_free_unlinkdata(data); + dput(dentry); +@@ -118,10 +141,10 @@ static int nfs_call_unlink(struct dentry *dentry, struct inode *inode, struct nf + struct inode *dir = d_inode(dentry->d_parent); + struct dentry *alias; + +- down_read_non_owner(&NFS_I(dir)->rmdir_sem); ++ nfs_down_anon(&NFS_I(dir)->rmdir_sem); + alias = d_alloc_parallel(dentry->d_parent, &data->args.name, &data->wq); + if (IS_ERR(alias)) { +- up_read_non_owner(&NFS_I(dir)->rmdir_sem); ++ nfs_up_anon(&NFS_I(dir)->rmdir_sem); + return 0; + } + if (!d_in_lookup(alias)) { +@@ -143,7 +166,7 @@ static int nfs_call_unlink(struct dentry *dentry, struct inode *inode, struct nf + ret = 0; + spin_unlock(&alias->d_lock); + dput(alias); +- up_read_non_owner(&NFS_I(dir)->rmdir_sem); ++ nfs_up_anon(&NFS_I(dir)->rmdir_sem); + /* + * If we'd displaced old cached devname, free it. At that + * point dentry is definitely not a root, so we won't need +@@ -183,7 +206,7 @@ nfs_async_unlink(struct dentry *dentry, const struct qstr *name) + goto out_free_name; + } + data->res.dir_attr = &data->dir_attr; +- init_waitqueue_head(&data->wq); ++ init_swait_queue_head(&data->wq); + + status = -EBUSY; + spin_lock(&dentry->d_lock); +diff --git a/fs/ntfs/aops.c b/fs/ntfs/aops.c +index 8946130c87ad..71d0b3ba70f8 100644 +--- a/fs/ntfs/aops.c ++++ b/fs/ntfs/aops.c +@@ -106,8 +106,7 @@ static void ntfs_end_buffer_async_read(struct buffer_head *bh, int uptodate) + "0x%llx.", (unsigned long long)bh->b_blocknr); + } + first = page_buffers(page); +- local_irq_save(flags); +- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); ++ flags = bh_uptodate_lock_irqsave(first); + clear_buffer_async_read(bh); + unlock_buffer(bh); + tmp = bh; +@@ -122,8 +121,7 @@ static void ntfs_end_buffer_async_read(struct buffer_head *bh, int uptodate) + } + tmp = tmp->b_this_page; + } while (tmp != bh); +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); ++ bh_uptodate_unlock_irqrestore(first, flags); + /* + * If none of the buffers had errors then we can set the page uptodate, + * but we first have to perform the post read mst fixups, if the +@@ -156,9 +154,7 @@ static void ntfs_end_buffer_async_read(struct buffer_head *bh, int uptodate) + unlock_page(page); + return; + still_busy: +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); +- return; ++ bh_uptodate_unlock_irqrestore(first, flags); + } + + /** +diff --git a/fs/proc/array.c b/fs/proc/array.c +index 9eb99a43f849..e4d0cfebaac5 100644 +--- a/fs/proc/array.c ++++ b/fs/proc/array.c +@@ -381,9 +381,9 @@ static inline void task_context_switch_counts(struct seq_file *m, + static void task_cpus_allowed(struct seq_file *m, struct task_struct *task) + { + seq_printf(m, "Cpus_allowed:\t%*pb\n", +- cpumask_pr_args(&task->cpus_allowed)); ++ cpumask_pr_args(task->cpus_ptr)); + seq_printf(m, "Cpus_allowed_list:\t%*pbl\n", +- cpumask_pr_args(&task->cpus_allowed)); ++ cpumask_pr_args(task->cpus_ptr)); + } + + static inline void task_core_dumping(struct seq_file *m, struct mm_struct *mm) +diff --git a/fs/proc/base.c b/fs/proc/base.c +index f999e8bd3771..bf9476600c73 100644 +--- a/fs/proc/base.c ++++ b/fs/proc/base.c +@@ -1872,7 +1872,7 @@ bool proc_fill_cache(struct file *file, struct dir_context *ctx, + + child = d_hash_and_lookup(dir, &qname); + if (!child) { +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + child = d_alloc_parallel(dir, &qname, &wq); + if (IS_ERR(child)) + goto end_instantiate; +diff --git a/fs/proc/proc_sysctl.c b/fs/proc/proc_sysctl.c +index 7325baa8f9d4..31f25ff3999f 100644 +--- a/fs/proc/proc_sysctl.c ++++ b/fs/proc/proc_sysctl.c +@@ -677,7 +677,7 @@ static bool proc_sys_fill_cache(struct file *file, + + child = d_lookup(dir, &qname); + if (!child) { +- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq); ++ DECLARE_SWAIT_QUEUE_HEAD_ONSTACK(wq); + child = d_alloc_parallel(dir, &qname, &wq); + if (IS_ERR(child)) + return false; +diff --git a/fs/squashfs/decompressor_multi_percpu.c b/fs/squashfs/decompressor_multi_percpu.c +index 23a9c28ad8ea..6a73c4fa88e7 100644 +--- a/fs/squashfs/decompressor_multi_percpu.c ++++ b/fs/squashfs/decompressor_multi_percpu.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +@@ -25,6 +26,8 @@ struct squashfs_stream { + void *stream; + }; + ++static DEFINE_LOCAL_IRQ_LOCK(stream_lock); ++ + void *squashfs_decompressor_create(struct squashfs_sb_info *msblk, + void *comp_opts) + { +@@ -79,10 +82,15 @@ int squashfs_decompress(struct squashfs_sb_info *msblk, struct buffer_head **bh, + { + struct squashfs_stream __percpu *percpu = + (struct squashfs_stream __percpu *) msblk->stream; +- struct squashfs_stream *stream = get_cpu_ptr(percpu); +- int res = msblk->decompressor->decompress(msblk, stream->stream, bh, b, +- offset, length, output); +- put_cpu_ptr(stream); ++ struct squashfs_stream *stream; ++ int res; ++ ++ stream = get_locked_ptr(stream_lock, percpu); ++ ++ res = msblk->decompressor->decompress(msblk, stream->stream, bh, b, ++ offset, length, output); ++ ++ put_locked_ptr(stream_lock, stream); + + if (res < 0) + ERROR("%s decompression failed, data probably corrupt\n", +diff --git a/fs/timerfd.c b/fs/timerfd.c +index d69ad801eb80..f845093466be 100644 +--- a/fs/timerfd.c ++++ b/fs/timerfd.c +@@ -471,7 +471,11 @@ static int do_timerfd_settime(int ufd, int flags, + break; + } + spin_unlock_irq(&ctx->wqh.lock); +- cpu_relax(); ++ ++ if (isalarm(ctx)) ++ hrtimer_grab_expiry_lock(&ctx->t.alarm.timer); ++ else ++ hrtimer_grab_expiry_lock(&ctx->t.tmr); + } + + /* +diff --git a/include/asm-generic/percpu.h b/include/asm-generic/percpu.h +index 1817a8415a5e..942d64c0476e 100644 +--- a/include/asm-generic/percpu.h ++++ b/include/asm-generic/percpu.h +@@ -5,6 +5,7 @@ + #include + #include + #include ++#include + + #ifdef CONFIG_SMP + +diff --git a/include/linux/blk-cgroup.h b/include/linux/blk-cgroup.h +index 6d766a19f2bb..0473efda4c65 100644 +--- a/include/linux/blk-cgroup.h ++++ b/include/linux/blk-cgroup.h +@@ -14,7 +14,7 @@ + * Nauman Rafique + */ + +-#include ++#include + #include + #include + #include +diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h +index 1da59c16f637..04c15b5ca76c 100644 +--- a/include/linux/blk-mq.h ++++ b/include/linux/blk-mq.h +@@ -249,7 +249,7 @@ static inline u16 blk_mq_unique_tag_to_tag(u32 unique_tag) + return unique_tag & BLK_MQ_UNIQUE_TAG_MASK; + } + +- ++void __blk_mq_complete_request_remote_work(struct work_struct *work); + int blk_mq_request_started(struct request *rq); + void blk_mq_start_request(struct request *rq); + void blk_mq_end_request(struct request *rq, blk_status_t error); +diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h +index 6980014357d4..940c794042ae 100644 +--- a/include/linux/blkdev.h ++++ b/include/linux/blkdev.h +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + + struct module; + struct scsi_ioctl_command; +@@ -149,6 +150,9 @@ enum mq_rq_state { + */ + struct request { + struct request_queue *q; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct work_struct work; ++#endif + struct blk_mq_ctx *mq_ctx; + + int cpu; +@@ -646,6 +650,7 @@ struct request_queue { + #endif + struct rcu_head rcu_head; + wait_queue_head_t mq_freeze_wq; ++ struct swork_event mq_pcpu_wake; + struct percpu_ref q_usage_counter; + struct list_head all_q_node; + +diff --git a/include/linux/bottom_half.h b/include/linux/bottom_half.h +index a19519f4241d..40dd5ef9c154 100644 +--- a/include/linux/bottom_half.h ++++ b/include/linux/bottom_half.h +@@ -4,6 +4,39 @@ + + #include + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++extern void __local_bh_disable(void); ++extern void _local_bh_enable(void); ++extern void __local_bh_enable(void); ++ ++static inline void local_bh_disable(void) ++{ ++ __local_bh_disable(); ++} ++ ++static inline void __local_bh_disable_ip(unsigned long ip, unsigned int cnt) ++{ ++ __local_bh_disable(); ++} ++ ++static inline void local_bh_enable(void) ++{ ++ __local_bh_enable(); ++} ++ ++static inline void __local_bh_enable_ip(unsigned long ip, unsigned int cnt) ++{ ++ __local_bh_enable(); ++} ++ ++static inline void local_bh_enable_ip(unsigned long ip) ++{ ++ __local_bh_enable(); ++} ++ ++#else ++ + #ifdef CONFIG_TRACE_IRQFLAGS + extern void __local_bh_disable_ip(unsigned long ip, unsigned int cnt); + #else +@@ -31,5 +64,6 @@ static inline void local_bh_enable(void) + { + __local_bh_enable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); + } ++#endif + + #endif /* _LINUX_BH_H */ +diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h +index 96225a77c112..5869330d1f38 100644 +--- a/include/linux/buffer_head.h ++++ b/include/linux/buffer_head.h +@@ -76,8 +76,50 @@ struct buffer_head { + struct address_space *b_assoc_map; /* mapping this buffer is + associated with */ + atomic_t b_count; /* users using this buffer_head */ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ spinlock_t b_uptodate_lock; ++#if IS_ENABLED(CONFIG_JBD2) ++ spinlock_t b_state_lock; ++ spinlock_t b_journal_head_lock; ++#endif ++#endif + }; + ++static inline unsigned long bh_uptodate_lock_irqsave(struct buffer_head *bh) ++{ ++ unsigned long flags; ++ ++#ifndef CONFIG_PREEMPT_RT_BASE ++ local_irq_save(flags); ++ bit_spin_lock(BH_Uptodate_Lock, &bh->b_state); ++#else ++ spin_lock_irqsave(&bh->b_uptodate_lock, flags); ++#endif ++ return flags; ++} ++ ++static inline void ++bh_uptodate_unlock_irqrestore(struct buffer_head *bh, unsigned long flags) ++{ ++#ifndef CONFIG_PREEMPT_RT_BASE ++ bit_spin_unlock(BH_Uptodate_Lock, &bh->b_state); ++ local_irq_restore(flags); ++#else ++ spin_unlock_irqrestore(&bh->b_uptodate_lock, flags); ++#endif ++} ++ ++static inline void buffer_head_init_locks(struct buffer_head *bh) ++{ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ spin_lock_init(&bh->b_uptodate_lock); ++#if IS_ENABLED(CONFIG_JBD2) ++ spin_lock_init(&bh->b_state_lock); ++ spin_lock_init(&bh->b_journal_head_lock); ++#endif ++#endif ++} ++ + /* + * macro tricks to expand the set_buffer_foo(), clear_buffer_foo() + * and buffer_foo() functions. +diff --git a/include/linux/cgroup-defs.h b/include/linux/cgroup-defs.h +index a6090154b2ab..46a706e2ba35 100644 +--- a/include/linux/cgroup-defs.h ++++ b/include/linux/cgroup-defs.h +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + + #ifdef CONFIG_CGROUPS + +@@ -157,6 +158,7 @@ struct cgroup_subsys_state { + + /* percpu_ref killing and RCU release */ + struct work_struct destroy_work; ++ struct swork_event destroy_swork; + struct rcu_work destroy_rwork; + + /* +diff --git a/include/linux/completion.h b/include/linux/completion.h +index 519e94915d18..bf8e77001f18 100644 +--- a/include/linux/completion.h ++++ b/include/linux/completion.h +@@ -9,7 +9,7 @@ + * See kernel/sched/completion.c for details. + */ + +-#include ++#include + + /* + * struct completion - structure used to maintain state for a "completion" +@@ -25,7 +25,7 @@ + */ + struct completion { + unsigned int done; +- wait_queue_head_t wait; ++ struct swait_queue_head wait; + }; + + #define init_completion_map(x, m) __init_completion(x) +@@ -34,7 +34,7 @@ static inline void complete_acquire(struct completion *x) {} + static inline void complete_release(struct completion *x) {} + + #define COMPLETION_INITIALIZER(work) \ +- { 0, __WAIT_QUEUE_HEAD_INITIALIZER((work).wait) } ++ { 0, __SWAIT_QUEUE_HEAD_INITIALIZER((work).wait) } + + #define COMPLETION_INITIALIZER_ONSTACK_MAP(work, map) \ + (*({ init_completion_map(&(work), &(map)); &(work); })) +@@ -85,7 +85,7 @@ static inline void complete_release(struct completion *x) {} + static inline void __init_completion(struct completion *x) + { + x->done = 0; +- init_waitqueue_head(&x->wait); ++ init_swait_queue_head(&x->wait); + } + + /** +diff --git a/include/linux/cpu.h b/include/linux/cpu.h +index 006f69f9277b..d45ea5c98cdd 100644 +--- a/include/linux/cpu.h ++++ b/include/linux/cpu.h +@@ -113,6 +113,8 @@ extern void cpu_hotplug_disable(void); + extern void cpu_hotplug_enable(void); + void clear_tasks_mm_cpumask(int cpu); + int cpu_down(unsigned int cpu); ++extern void pin_current_cpu(void); ++extern void unpin_current_cpu(void); + + #else /* CONFIG_HOTPLUG_CPU */ + +@@ -124,6 +126,9 @@ static inline int cpus_read_trylock(void) { return true; } + static inline void lockdep_assert_cpus_held(void) { } + static inline void cpu_hotplug_disable(void) { } + static inline void cpu_hotplug_enable(void) { } ++static inline void pin_current_cpu(void) { } ++static inline void unpin_current_cpu(void) { } ++ + #endif /* !CONFIG_HOTPLUG_CPU */ + + /* Wrappers which go away once all code is converted */ +diff --git a/include/linux/dcache.h b/include/linux/dcache.h +index 0880baefd85f..8b4d6c8c1f7f 100644 +--- a/include/linux/dcache.h ++++ b/include/linux/dcache.h +@@ -105,7 +105,7 @@ struct dentry { + + union { + struct list_head d_lru; /* LRU list */ +- wait_queue_head_t *d_wait; /* in-lookup ones only */ ++ struct swait_queue_head *d_wait; /* in-lookup ones only */ + }; + struct list_head d_child; /* child of parent list */ + struct list_head d_subdirs; /* our children */ +@@ -236,7 +236,7 @@ extern struct dentry * d_alloc(struct dentry *, const struct qstr *); + extern struct dentry * d_alloc_anon(struct super_block *); + extern struct dentry * d_alloc_pseudo(struct super_block *, const struct qstr *); + extern struct dentry * d_alloc_parallel(struct dentry *, const struct qstr *, +- wait_queue_head_t *); ++ struct swait_queue_head *); + extern struct dentry * d_splice_alias(struct inode *, struct dentry *); + extern struct dentry * d_add_ci(struct dentry *, struct inode *, struct qstr *); + extern struct dentry * d_exact_alias(struct dentry *, struct inode *); +diff --git a/include/linux/delay.h b/include/linux/delay.h +index b78bab4395d8..7c4bc414a504 100644 +--- a/include/linux/delay.h ++++ b/include/linux/delay.h +@@ -64,4 +64,10 @@ static inline void ssleep(unsigned int seconds) + msleep(seconds * 1000); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++extern void cpu_chill(void); ++#else ++# define cpu_chill() cpu_relax() ++#endif ++ + #endif /* defined(_LINUX_DELAY_H) */ +diff --git a/include/linux/fs.h b/include/linux/fs.h +index d4e1b43a53c3..72749feed0e3 100644 +--- a/include/linux/fs.h ++++ b/include/linux/fs.h +@@ -678,7 +678,7 @@ struct inode { + struct block_device *i_bdev; + struct cdev *i_cdev; + char *i_link; +- unsigned i_dir_seq; ++ unsigned __i_dir_seq; + }; + + __u32 i_generation; +diff --git a/include/linux/fscache.h b/include/linux/fscache.h +index 84b90a79d75a..87a9330eafa2 100644 +--- a/include/linux/fscache.h ++++ b/include/linux/fscache.h +@@ -230,6 +230,7 @@ extern void __fscache_readpages_cancel(struct fscache_cookie *cookie, + extern void __fscache_disable_cookie(struct fscache_cookie *, const void *, bool); + extern void __fscache_enable_cookie(struct fscache_cookie *, const void *, loff_t, + bool (*)(void *), void *); ++extern void fscache_cookie_init(void); + + /** + * fscache_register_netfs - Register a filesystem as desiring caching services +diff --git a/include/linux/highmem.h b/include/linux/highmem.h +index 0690679832d4..eaa2ef9bc10e 100644 +--- a/include/linux/highmem.h ++++ b/include/linux/highmem.h +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + + #include + +@@ -66,7 +67,7 @@ static inline void kunmap(struct page *page) + + static inline void *kmap_atomic(struct page *page) + { +- preempt_disable(); ++ preempt_disable_nort(); + pagefault_disable(); + return page_address(page); + } +@@ -75,7 +76,7 @@ static inline void *kmap_atomic(struct page *page) + static inline void __kunmap_atomic(void *addr) + { + pagefault_enable(); +- preempt_enable(); ++ preempt_enable_nort(); + } + + #define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn)) +@@ -87,32 +88,51 @@ static inline void __kunmap_atomic(void *addr) + + #if defined(CONFIG_HIGHMEM) || defined(CONFIG_X86_32) + ++#ifndef CONFIG_PREEMPT_RT_FULL + DECLARE_PER_CPU(int, __kmap_atomic_idx); ++#endif + + static inline int kmap_atomic_idx_push(void) + { ++#ifndef CONFIG_PREEMPT_RT_FULL + int idx = __this_cpu_inc_return(__kmap_atomic_idx) - 1; + +-#ifdef CONFIG_DEBUG_HIGHMEM ++# ifdef CONFIG_DEBUG_HIGHMEM + WARN_ON_ONCE(in_irq() && !irqs_disabled()); + BUG_ON(idx >= KM_TYPE_NR); +-#endif ++# endif + return idx; ++#else ++ current->kmap_idx++; ++ BUG_ON(current->kmap_idx > KM_TYPE_NR); ++ return current->kmap_idx - 1; ++#endif + } + + static inline int kmap_atomic_idx(void) + { ++#ifndef CONFIG_PREEMPT_RT_FULL + return __this_cpu_read(__kmap_atomic_idx) - 1; ++#else ++ return current->kmap_idx - 1; ++#endif + } + + static inline void kmap_atomic_idx_pop(void) + { +-#ifdef CONFIG_DEBUG_HIGHMEM ++#ifndef CONFIG_PREEMPT_RT_FULL ++# ifdef CONFIG_DEBUG_HIGHMEM + int idx = __this_cpu_dec_return(__kmap_atomic_idx); + + BUG_ON(idx < 0); +-#else ++# else + __this_cpu_dec(__kmap_atomic_idx); ++# endif ++#else ++ current->kmap_idx--; ++# ifdef CONFIG_DEBUG_HIGHMEM ++ BUG_ON(current->kmap_idx < 0); ++# endif + #endif + } + +diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h +index 3892e9c8b2de..6c4c38186c99 100644 +--- a/include/linux/hrtimer.h ++++ b/include/linux/hrtimer.h +@@ -41,6 +41,7 @@ enum hrtimer_mode { + HRTIMER_MODE_REL = 0x01, + HRTIMER_MODE_PINNED = 0x02, + HRTIMER_MODE_SOFT = 0x04, ++ HRTIMER_MODE_HARD = 0x08, + + HRTIMER_MODE_ABS_PINNED = HRTIMER_MODE_ABS | HRTIMER_MODE_PINNED, + HRTIMER_MODE_REL_PINNED = HRTIMER_MODE_REL | HRTIMER_MODE_PINNED, +@@ -51,6 +52,11 @@ enum hrtimer_mode { + HRTIMER_MODE_ABS_PINNED_SOFT = HRTIMER_MODE_ABS_PINNED | HRTIMER_MODE_SOFT, + HRTIMER_MODE_REL_PINNED_SOFT = HRTIMER_MODE_REL_PINNED | HRTIMER_MODE_SOFT, + ++ HRTIMER_MODE_ABS_HARD = HRTIMER_MODE_ABS | HRTIMER_MODE_HARD, ++ HRTIMER_MODE_REL_HARD = HRTIMER_MODE_REL | HRTIMER_MODE_HARD, ++ ++ HRTIMER_MODE_ABS_PINNED_HARD = HRTIMER_MODE_ABS_PINNED | HRTIMER_MODE_HARD, ++ HRTIMER_MODE_REL_PINNED_HARD = HRTIMER_MODE_REL_PINNED | HRTIMER_MODE_HARD, + }; + + /* +@@ -186,6 +192,8 @@ enum hrtimer_base_type { + * @nr_retries: Total number of hrtimer interrupt retries + * @nr_hangs: Total number of hrtimer interrupt hangs + * @max_hang_time: Maximum time spent in hrtimer_interrupt ++ * @softirq_expiry_lock: Lock which is taken while softirq based hrtimer are ++ * expired + * @expires_next: absolute time of the next event, is required for remote + * hrtimer enqueue; it is the total first expiry time (hard + * and soft hrtimer are taken into account) +@@ -213,6 +221,7 @@ struct hrtimer_cpu_base { + unsigned short nr_hangs; + unsigned int max_hang_time; + #endif ++ spinlock_t softirq_expiry_lock; + ktime_t expires_next; + struct hrtimer *next_timer; + ktime_t softirq_expires_next; +@@ -364,10 +373,17 @@ DECLARE_PER_CPU(struct tick_device, tick_cpu_device); + /* Initialize timers: */ + extern void hrtimer_init(struct hrtimer *timer, clockid_t which_clock, + enum hrtimer_mode mode); ++extern void hrtimer_init_sleeper(struct hrtimer_sleeper *sl, clockid_t clock_id, ++ enum hrtimer_mode mode, ++ struct task_struct *task); + + #ifdef CONFIG_DEBUG_OBJECTS_TIMERS + extern void hrtimer_init_on_stack(struct hrtimer *timer, clockid_t which_clock, + enum hrtimer_mode mode); ++extern void hrtimer_init_sleeper_on_stack(struct hrtimer_sleeper *sl, ++ clockid_t clock_id, ++ enum hrtimer_mode mode, ++ struct task_struct *task); + + extern void destroy_hrtimer_on_stack(struct hrtimer *timer); + #else +@@ -377,6 +393,15 @@ static inline void hrtimer_init_on_stack(struct hrtimer *timer, + { + hrtimer_init(timer, which_clock, mode); + } ++ ++static inline void hrtimer_init_sleeper_on_stack(struct hrtimer_sleeper *sl, ++ clockid_t clock_id, ++ enum hrtimer_mode mode, ++ struct task_struct *task) ++{ ++ hrtimer_init_sleeper(sl, clock_id, mode, task); ++} ++ + static inline void destroy_hrtimer_on_stack(struct hrtimer *timer) { } + #endif + +@@ -400,6 +425,7 @@ static inline void hrtimer_start(struct hrtimer *timer, ktime_t tim, + + extern int hrtimer_cancel(struct hrtimer *timer); + extern int hrtimer_try_to_cancel(struct hrtimer *timer); ++extern void hrtimer_grab_expiry_lock(const struct hrtimer *timer); + + static inline void hrtimer_start_expires(struct hrtimer *timer, + enum hrtimer_mode mode) +@@ -480,9 +506,6 @@ extern long hrtimer_nanosleep(const struct timespec64 *rqtp, + const enum hrtimer_mode mode, + const clockid_t clockid); + +-extern void hrtimer_init_sleeper(struct hrtimer_sleeper *sl, +- struct task_struct *tsk); +- + extern int schedule_hrtimeout_range(ktime_t *expires, u64 delta, + const enum hrtimer_mode mode); + extern int schedule_hrtimeout_range_clock(ktime_t *expires, +diff --git a/include/linux/idr.h b/include/linux/idr.h +index 3ec8628ce17f..54af68158f7d 100644 +--- a/include/linux/idr.h ++++ b/include/linux/idr.h +@@ -169,10 +169,7 @@ static inline bool idr_is_empty(const struct idr *idr) + * Each idr_preload() should be matched with an invocation of this + * function. See idr_preload() for details. + */ +-static inline void idr_preload_end(void) +-{ +- preempt_enable(); +-} ++void idr_preload_end(void); + + /** + * idr_for_each_entry() - Iterate over an IDR's elements of a given type. +diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h +index eeceac3376fc..a9321f6429f2 100644 +--- a/include/linux/interrupt.h ++++ b/include/linux/interrupt.h +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -61,6 +62,7 @@ + * interrupt handler after suspending interrupts. For system + * wakeup devices users need to implement wakeup detection in + * their interrupt handlers. ++ * IRQF_NO_SOFTIRQ_CALL - Do not process softirqs in the irq thread context (RT) + */ + #define IRQF_SHARED 0x00000080 + #define IRQF_PROBE_SHARED 0x00000100 +@@ -74,6 +76,7 @@ + #define IRQF_NO_THREAD 0x00010000 + #define IRQF_EARLY_RESUME 0x00020000 + #define IRQF_COND_SUSPEND 0x00040000 ++#define IRQF_NO_SOFTIRQ_CALL 0x00080000 + + #define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD) + +@@ -236,7 +239,11 @@ extern void resume_device_irqs(void); + struct irq_affinity_notify { + unsigned int irq; + struct kref kref; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct kthread_work work; ++#else + struct work_struct work; ++#endif + void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask); + void (*release)(struct kref *ref); + }; +@@ -427,7 +434,11 @@ extern int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, + bool state); + + #ifdef CONFIG_IRQ_FORCED_THREADING ++# ifdef CONFIG_PREEMPT_RT_BASE ++# define force_irqthreads (true) ++# else + extern bool force_irqthreads; ++# endif + #else + #define force_irqthreads (0) + #endif +@@ -493,9 +504,10 @@ struct softirq_action + void (*action)(struct softirq_action *); + }; + ++#ifndef CONFIG_PREEMPT_RT_FULL + asmlinkage void do_softirq(void); + asmlinkage void __do_softirq(void); +- ++static inline void thread_do_softirq(void) { do_softirq(); } + #ifdef __ARCH_HAS_DO_SOFTIRQ + void do_softirq_own_stack(void); + #else +@@ -504,13 +516,25 @@ static inline void do_softirq_own_stack(void) + __do_softirq(); + } + #endif ++#else ++extern void thread_do_softirq(void); ++#endif + + extern void open_softirq(int nr, void (*action)(struct softirq_action *)); + extern void softirq_init(void); + extern void __raise_softirq_irqoff(unsigned int nr); ++#ifdef CONFIG_PREEMPT_RT_FULL ++extern void __raise_softirq_irqoff_ksoft(unsigned int nr); ++#else ++static inline void __raise_softirq_irqoff_ksoft(unsigned int nr) ++{ ++ __raise_softirq_irqoff(nr); ++} ++#endif + + extern void raise_softirq_irqoff(unsigned int nr); + extern void raise_softirq(unsigned int nr); ++extern void softirq_check_pending_idle(void); + + DECLARE_PER_CPU(struct task_struct *, ksoftirqd); + +@@ -532,8 +556,9 @@ static inline struct task_struct *this_cpu_ksoftirqd(void) + to be executed on some cpu at least once after this. + * If the tasklet is already scheduled, but its execution is still not + started, it will be executed only once. +- * If this tasklet is already running on another CPU (or schedule is called +- from tasklet itself), it is rescheduled for later. ++ * If this tasklet is already running on another CPU, it is rescheduled ++ for later. ++ * Schedule must not be called from the tasklet itself (a lockup occurs) + * Tasklet is strictly serialized wrt itself, but not + wrt another tasklets. If client needs some intertask synchronization, + he makes it with spinlocks. +@@ -558,27 +583,36 @@ struct tasklet_struct name = { NULL, 0, ATOMIC_INIT(1), func, data } + enum + { + TASKLET_STATE_SCHED, /* Tasklet is scheduled for execution */ +- TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ ++ TASKLET_STATE_RUN, /* Tasklet is running (SMP only) */ ++ TASKLET_STATE_PENDING /* Tasklet is pending */ + }; + +-#ifdef CONFIG_SMP ++#define TASKLET_STATEF_SCHED (1 << TASKLET_STATE_SCHED) ++#define TASKLET_STATEF_RUN (1 << TASKLET_STATE_RUN) ++#define TASKLET_STATEF_PENDING (1 << TASKLET_STATE_PENDING) ++ ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) + static inline int tasklet_trylock(struct tasklet_struct *t) + { + return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); + } + ++static inline int tasklet_tryunlock(struct tasklet_struct *t) ++{ ++ return cmpxchg(&t->state, TASKLET_STATEF_RUN, 0) == TASKLET_STATEF_RUN; ++} ++ + static inline void tasklet_unlock(struct tasklet_struct *t) + { + smp_mb__before_atomic(); + clear_bit(TASKLET_STATE_RUN, &(t)->state); + } + +-static inline void tasklet_unlock_wait(struct tasklet_struct *t) +-{ +- while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { barrier(); } +-} ++extern void tasklet_unlock_wait(struct tasklet_struct *t); ++ + #else + #define tasklet_trylock(t) 1 ++#define tasklet_tryunlock(t) 1 + #define tasklet_unlock_wait(t) do { } while (0) + #define tasklet_unlock(t) do { } while (0) + #endif +@@ -612,17 +646,18 @@ static inline void tasklet_disable(struct tasklet_struct *t) + smp_mb(); + } + +-static inline void tasklet_enable(struct tasklet_struct *t) +-{ +- smp_mb__before_atomic(); +- atomic_dec(&t->count); +-} +- ++extern void tasklet_enable(struct tasklet_struct *t); + extern void tasklet_kill(struct tasklet_struct *t); + extern void tasklet_kill_immediate(struct tasklet_struct *t, unsigned int cpu); + extern void tasklet_init(struct tasklet_struct *t, + void (*func)(unsigned long), unsigned long data); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++extern void softirq_early_init(void); ++#else ++static inline void softirq_early_init(void) { } ++#endif ++ + struct tasklet_hrtimer { + struct hrtimer timer; + struct tasklet_struct tasklet; +diff --git a/include/linux/irq.h b/include/linux/irq.h +index c9bffda04a45..73d3146db74d 100644 +--- a/include/linux/irq.h ++++ b/include/linux/irq.h +@@ -69,6 +69,7 @@ enum irqchip_irq_state; + * IRQ_IS_POLLED - Always polled by another interrupt. Exclude + * it from the spurious interrupt detection + * mechanism and from core side polling. ++ * IRQ_NO_SOFTIRQ_CALL - No softirq processing in the irq thread context (RT) + * IRQ_DISABLE_UNLAZY - Disable lazy irq disable + */ + enum { +@@ -96,13 +97,14 @@ enum { + IRQ_PER_CPU_DEVID = (1 << 17), + IRQ_IS_POLLED = (1 << 18), + IRQ_DISABLE_UNLAZY = (1 << 19), ++ IRQ_NO_SOFTIRQ_CALL = (1 << 20), + }; + + #define IRQF_MODIFY_MASK \ + (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \ + IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \ + IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID | \ +- IRQ_IS_POLLED | IRQ_DISABLE_UNLAZY) ++ IRQ_IS_POLLED | IRQ_DISABLE_UNLAZY | IRQ_NO_SOFTIRQ_CALL) + + #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) + +diff --git a/include/linux/irq_work.h b/include/linux/irq_work.h +index b11fcdfd0770..0c50559987c5 100644 +--- a/include/linux/irq_work.h ++++ b/include/linux/irq_work.h +@@ -18,6 +18,8 @@ + + /* Doesn't want IPI, wait for tick: */ + #define IRQ_WORK_LAZY BIT(2) ++/* Run hard IRQ context, even on RT */ ++#define IRQ_WORK_HARD_IRQ BIT(3) + + #define IRQ_WORK_CLAIMED (IRQ_WORK_PENDING | IRQ_WORK_BUSY) + +@@ -52,4 +54,10 @@ static inline bool irq_work_needs_cpu(void) { return false; } + static inline void irq_work_run(void) { } + #endif + ++#if defined(CONFIG_IRQ_WORK) && defined(CONFIG_PREEMPT_RT_FULL) ++void irq_work_tick_soft(void); ++#else ++static inline void irq_work_tick_soft(void) { } ++#endif ++ + #endif /* _LINUX_IRQ_WORK_H */ +diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h +index 3188c0bef3e7..5b57501fd2e7 100644 +--- a/include/linux/irqchip/arm-gic-v3.h ++++ b/include/linux/irqchip/arm-gic-v3.h +@@ -585,6 +585,7 @@ struct rdists { + void __iomem *rd_base; + struct page *pend_page; + phys_addr_t phys_base; ++ bool lpi_enabled; + } __percpu *rdist; + struct page *prop_page; + u64 flags; +diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h +index 875c41b23f20..ff5eb8d1ede4 100644 +--- a/include/linux/irqdesc.h ++++ b/include/linux/irqdesc.h +@@ -71,6 +71,7 @@ struct irq_desc { + unsigned int irqs_unhandled; + atomic_t threads_handled; + int threads_handled_last; ++ u64 random_ip; + raw_spinlock_t lock; + struct cpumask *percpu_enabled; + const struct cpumask *percpu_affinity; +diff --git a/include/linux/irqflags.h b/include/linux/irqflags.h +index 21619c92c377..b20eeb25e9fa 100644 +--- a/include/linux/irqflags.h ++++ b/include/linux/irqflags.h +@@ -43,14 +43,6 @@ do { \ + do { \ + current->hardirq_context--; \ + } while (0) +-# define lockdep_softirq_enter() \ +-do { \ +- current->softirq_context++; \ +-} while (0) +-# define lockdep_softirq_exit() \ +-do { \ +- current->softirq_context--; \ +-} while (0) + #else + # define trace_hardirqs_on() do { } while (0) + # define trace_hardirqs_off() do { } while (0) +@@ -64,6 +56,21 @@ do { \ + # define lockdep_softirq_exit() do { } while (0) + #endif + ++#if defined(CONFIG_TRACE_IRQFLAGS) && !defined(CONFIG_PREEMPT_RT_FULL) ++# define lockdep_softirq_enter() \ ++do { \ ++ current->softirq_context++; \ ++} while (0) ++# define lockdep_softirq_exit() \ ++do { \ ++ current->softirq_context--; \ ++} while (0) ++ ++#else ++# define lockdep_softirq_enter() do { } while (0) ++# define lockdep_softirq_exit() do { } while (0) ++#endif ++ + #if defined(CONFIG_IRQSOFF_TRACER) || \ + defined(CONFIG_PREEMPT_TRACER) + extern void stop_critical_timings(void); +diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h +index 583b82b5a1e9..57f4ad8d45a5 100644 +--- a/include/linux/jbd2.h ++++ b/include/linux/jbd2.h +@@ -347,32 +347,56 @@ static inline struct journal_head *bh2jh(struct buffer_head *bh) + + static inline void jbd_lock_bh_state(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_lock(BH_State, &bh->b_state); ++#else ++ spin_lock(&bh->b_state_lock); ++#endif + } + + static inline int jbd_trylock_bh_state(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + return bit_spin_trylock(BH_State, &bh->b_state); ++#else ++ return spin_trylock(&bh->b_state_lock); ++#endif + } + + static inline int jbd_is_locked_bh_state(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + return bit_spin_is_locked(BH_State, &bh->b_state); ++#else ++ return spin_is_locked(&bh->b_state_lock); ++#endif + } + + static inline void jbd_unlock_bh_state(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_unlock(BH_State, &bh->b_state); ++#else ++ spin_unlock(&bh->b_state_lock); ++#endif + } + + static inline void jbd_lock_bh_journal_head(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_lock(BH_JournalHead, &bh->b_state); ++#else ++ spin_lock(&bh->b_journal_head_lock); ++#endif + } + + static inline void jbd_unlock_bh_journal_head(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_unlock(BH_JournalHead, &bh->b_state); ++#else ++ spin_unlock(&bh->b_journal_head_lock); ++#endif + } + + #define J_ASSERT(assert) BUG_ON(!(assert)) +diff --git a/include/linux/kdb.h b/include/linux/kdb.h +index 68bd88223417..e033b25b0b72 100644 +--- a/include/linux/kdb.h ++++ b/include/linux/kdb.h +@@ -167,6 +167,7 @@ extern __printf(2, 0) int vkdb_printf(enum kdb_msgsrc src, const char *fmt, + extern __printf(1, 2) int kdb_printf(const char *, ...); + typedef __printf(1, 2) int (*kdb_printf_t)(const char *, ...); + ++#define in_kdb_printk() (kdb_trap_printk) + extern void kdb_init(int level); + + /* Access to kdb specific polling devices */ +@@ -201,6 +202,7 @@ extern int kdb_register_flags(char *, kdb_func_t, char *, char *, + extern int kdb_unregister(char *); + #else /* ! CONFIG_KGDB_KDB */ + static inline __printf(1, 2) int kdb_printf(const char *fmt, ...) { return 0; } ++#define in_kdb_printk() (0) + static inline void kdb_init(int level) {} + static inline int kdb_register(char *cmd, kdb_func_t func, char *usage, + char *help, short minlen) { return 0; } +diff --git a/include/linux/kernel.h b/include/linux/kernel.h +index 4631008a022f..1ac1c997a077 100644 +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -260,6 +260,9 @@ extern int _cond_resched(void); + */ + # define might_sleep() \ + do { __might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0) ++ ++# define might_sleep_no_state_check() \ ++ do { ___might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0) + # define sched_annotate_sleep() (current->task_state_change = 0) + #else + static inline void ___might_sleep(const char *file, int line, +@@ -267,6 +270,7 @@ extern int _cond_resched(void); + static inline void __might_sleep(const char *file, int line, + int preempt_offset) { } + # define might_sleep() do { might_resched(); } while (0) ++# define might_sleep_no_state_check() do { might_resched(); } while (0) + # define sched_annotate_sleep() do { } while (0) + #endif + +diff --git a/include/linux/kthread-cgroup.h b/include/linux/kthread-cgroup.h +new file mode 100644 +index 000000000000..53d34bca9d72 +--- /dev/null ++++ b/include/linux/kthread-cgroup.h +@@ -0,0 +1,17 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++#ifndef _LINUX_KTHREAD_CGROUP_H ++#define _LINUX_KTHREAD_CGROUP_H ++#include ++#include ++ ++#ifdef CONFIG_BLK_CGROUP ++void kthread_associate_blkcg(struct cgroup_subsys_state *css); ++struct cgroup_subsys_state *kthread_blkcg(void); ++#else ++static inline void kthread_associate_blkcg(struct cgroup_subsys_state *css) { } ++static inline struct cgroup_subsys_state *kthread_blkcg(void) ++{ ++ return NULL; ++} ++#endif ++#endif +diff --git a/include/linux/kthread.h b/include/linux/kthread.h +index c1961761311d..7cf56eb54103 100644 +--- a/include/linux/kthread.h ++++ b/include/linux/kthread.h +@@ -4,7 +4,6 @@ + /* Simple interface for creating and stopping kernel threads without mess. */ + #include + #include +-#include + + __printf(4, 5) + struct task_struct *kthread_create_on_node(int (*threadfn)(void *data), +@@ -85,7 +84,7 @@ enum { + + struct kthread_worker { + unsigned int flags; +- spinlock_t lock; ++ raw_spinlock_t lock; + struct list_head work_list; + struct list_head delayed_work_list; + struct task_struct *task; +@@ -106,7 +105,7 @@ struct kthread_delayed_work { + }; + + #define KTHREAD_WORKER_INIT(worker) { \ +- .lock = __SPIN_LOCK_UNLOCKED((worker).lock), \ ++ .lock = __RAW_SPIN_LOCK_UNLOCKED((worker).lock), \ + .work_list = LIST_HEAD_INIT((worker).work_list), \ + .delayed_work_list = LIST_HEAD_INIT((worker).delayed_work_list),\ + } +@@ -198,14 +197,12 @@ bool kthread_cancel_delayed_work_sync(struct kthread_delayed_work *work); + + void kthread_destroy_worker(struct kthread_worker *worker); + +-#ifdef CONFIG_BLK_CGROUP +-void kthread_associate_blkcg(struct cgroup_subsys_state *css); +-struct cgroup_subsys_state *kthread_blkcg(void); +-#else +-static inline void kthread_associate_blkcg(struct cgroup_subsys_state *css) { } +-static inline struct cgroup_subsys_state *kthread_blkcg(void) ++extern struct kthread_worker kthread_global_worker; ++void kthread_init_global_worker(void); ++ ++static inline bool kthread_schedule_work(struct kthread_work *work) + { +- return NULL; ++ return kthread_queue_work(&kthread_global_worker, work); + } +-#endif ++ + #endif /* _LINUX_KTHREAD_H */ +diff --git a/include/linux/list_bl.h b/include/linux/list_bl.h +index 3fc2cc57ba1b..0b5de7d9ffcf 100644 +--- a/include/linux/list_bl.h ++++ b/include/linux/list_bl.h +@@ -3,6 +3,7 @@ + #define _LINUX_LIST_BL_H + + #include ++#include + #include + + /* +@@ -33,13 +34,24 @@ + + struct hlist_bl_head { + struct hlist_bl_node *first; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ raw_spinlock_t lock; ++#endif + }; + + struct hlist_bl_node { + struct hlist_bl_node *next, **pprev; + }; +-#define INIT_HLIST_BL_HEAD(ptr) \ +- ((ptr)->first = NULL) ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++#define INIT_HLIST_BL_HEAD(h) \ ++do { \ ++ (h)->first = NULL; \ ++ raw_spin_lock_init(&(h)->lock); \ ++} while (0) ++#else ++#define INIT_HLIST_BL_HEAD(h) (h)->first = NULL ++#endif + + static inline void INIT_HLIST_BL_NODE(struct hlist_bl_node *h) + { +@@ -119,12 +131,26 @@ static inline void hlist_bl_del_init(struct hlist_bl_node *n) + + static inline void hlist_bl_lock(struct hlist_bl_head *b) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_lock(0, (unsigned long *)b); ++#else ++ raw_spin_lock(&b->lock); ++#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) ++ __set_bit(0, (unsigned long *)b); ++#endif ++#endif + } + + static inline void hlist_bl_unlock(struct hlist_bl_head *b) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + __bit_spin_unlock(0, (unsigned long *)b); ++#else ++#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) ++ __clear_bit(0, (unsigned long *)b); ++#endif ++ raw_spin_unlock(&b->lock); ++#endif + } + + static inline bool hlist_bl_is_locked(struct hlist_bl_head *b) +diff --git a/include/linux/locallock.h b/include/linux/locallock.h +new file mode 100644 +index 000000000000..921eab83cd34 +--- /dev/null ++++ b/include/linux/locallock.h +@@ -0,0 +1,281 @@ ++#ifndef _LINUX_LOCALLOCK_H ++#define _LINUX_LOCALLOCK_H ++ ++#include ++#include ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ ++#ifdef CONFIG_DEBUG_SPINLOCK ++# define LL_WARN(cond) WARN_ON(cond) ++#else ++# define LL_WARN(cond) do { } while (0) ++#endif ++ ++/* ++ * per cpu lock based substitute for local_irq_*() ++ */ ++struct local_irq_lock { ++ spinlock_t lock; ++ struct task_struct *owner; ++ int nestcnt; ++ unsigned long flags; ++}; ++ ++#define DEFINE_LOCAL_IRQ_LOCK(lvar) \ ++ DEFINE_PER_CPU(struct local_irq_lock, lvar) = { \ ++ .lock = __SPIN_LOCK_UNLOCKED((lvar).lock) } ++ ++#define DECLARE_LOCAL_IRQ_LOCK(lvar) \ ++ DECLARE_PER_CPU(struct local_irq_lock, lvar) ++ ++#define local_irq_lock_init(lvar) \ ++ do { \ ++ int __cpu; \ ++ for_each_possible_cpu(__cpu) \ ++ spin_lock_init(&per_cpu(lvar, __cpu).lock); \ ++ } while (0) ++ ++static inline void __local_lock(struct local_irq_lock *lv) ++{ ++ if (lv->owner != current) { ++ spin_lock(&lv->lock); ++ LL_WARN(lv->owner); ++ LL_WARN(lv->nestcnt); ++ lv->owner = current; ++ } ++ lv->nestcnt++; ++} ++ ++#define local_lock(lvar) \ ++ do { __local_lock(&get_local_var(lvar)); } while (0) ++ ++#define local_lock_on(lvar, cpu) \ ++ do { __local_lock(&per_cpu(lvar, cpu)); } while (0) ++ ++static inline int __local_trylock(struct local_irq_lock *lv) ++{ ++ if (lv->owner != current && spin_trylock(&lv->lock)) { ++ LL_WARN(lv->owner); ++ LL_WARN(lv->nestcnt); ++ lv->owner = current; ++ lv->nestcnt = 1; ++ return 1; ++ } else if (lv->owner == current) { ++ lv->nestcnt++; ++ return 1; ++ } ++ return 0; ++} ++ ++#define local_trylock(lvar) \ ++ ({ \ ++ int __locked; \ ++ __locked = __local_trylock(&get_local_var(lvar)); \ ++ if (!__locked) \ ++ put_local_var(lvar); \ ++ __locked; \ ++ }) ++ ++static inline void __local_unlock(struct local_irq_lock *lv) ++{ ++ LL_WARN(lv->nestcnt == 0); ++ LL_WARN(lv->owner != current); ++ if (--lv->nestcnt) ++ return; ++ ++ lv->owner = NULL; ++ spin_unlock(&lv->lock); ++} ++ ++#define local_unlock(lvar) \ ++ do { \ ++ __local_unlock(this_cpu_ptr(&lvar)); \ ++ put_local_var(lvar); \ ++ } while (0) ++ ++#define local_unlock_on(lvar, cpu) \ ++ do { __local_unlock(&per_cpu(lvar, cpu)); } while (0) ++ ++static inline void __local_lock_irq(struct local_irq_lock *lv) ++{ ++ spin_lock_irqsave(&lv->lock, lv->flags); ++ LL_WARN(lv->owner); ++ LL_WARN(lv->nestcnt); ++ lv->owner = current; ++ lv->nestcnt = 1; ++} ++ ++#define local_lock_irq(lvar) \ ++ do { __local_lock_irq(&get_local_var(lvar)); } while (0) ++ ++#define local_lock_irq_on(lvar, cpu) \ ++ do { __local_lock_irq(&per_cpu(lvar, cpu)); } while (0) ++ ++static inline void __local_unlock_irq(struct local_irq_lock *lv) ++{ ++ LL_WARN(!lv->nestcnt); ++ LL_WARN(lv->owner != current); ++ lv->owner = NULL; ++ lv->nestcnt = 0; ++ spin_unlock_irq(&lv->lock); ++} ++ ++#define local_unlock_irq(lvar) \ ++ do { \ ++ __local_unlock_irq(this_cpu_ptr(&lvar)); \ ++ put_local_var(lvar); \ ++ } while (0) ++ ++#define local_unlock_irq_on(lvar, cpu) \ ++ do { \ ++ __local_unlock_irq(&per_cpu(lvar, cpu)); \ ++ } while (0) ++ ++static inline int __local_lock_irqsave(struct local_irq_lock *lv) ++{ ++ if (lv->owner != current) { ++ __local_lock_irq(lv); ++ return 0; ++ } else { ++ lv->nestcnt++; ++ return 1; ++ } ++} ++ ++#define local_lock_irqsave(lvar, _flags) \ ++ do { \ ++ if (__local_lock_irqsave(&get_local_var(lvar))) \ ++ put_local_var(lvar); \ ++ _flags = __this_cpu_read(lvar.flags); \ ++ } while (0) ++ ++#define local_lock_irqsave_on(lvar, _flags, cpu) \ ++ do { \ ++ __local_lock_irqsave(&per_cpu(lvar, cpu)); \ ++ _flags = per_cpu(lvar, cpu).flags; \ ++ } while (0) ++ ++static inline int __local_unlock_irqrestore(struct local_irq_lock *lv, ++ unsigned long flags) ++{ ++ LL_WARN(!lv->nestcnt); ++ LL_WARN(lv->owner != current); ++ if (--lv->nestcnt) ++ return 0; ++ ++ lv->owner = NULL; ++ spin_unlock_irqrestore(&lv->lock, lv->flags); ++ return 1; ++} ++ ++#define local_unlock_irqrestore(lvar, flags) \ ++ do { \ ++ if (__local_unlock_irqrestore(this_cpu_ptr(&lvar), flags)) \ ++ put_local_var(lvar); \ ++ } while (0) ++ ++#define local_unlock_irqrestore_on(lvar, flags, cpu) \ ++ do { \ ++ __local_unlock_irqrestore(&per_cpu(lvar, cpu), flags); \ ++ } while (0) ++ ++#define local_spin_trylock_irq(lvar, lock) \ ++ ({ \ ++ int __locked; \ ++ local_lock_irq(lvar); \ ++ __locked = spin_trylock(lock); \ ++ if (!__locked) \ ++ local_unlock_irq(lvar); \ ++ __locked; \ ++ }) ++ ++#define local_spin_lock_irq(lvar, lock) \ ++ do { \ ++ local_lock_irq(lvar); \ ++ spin_lock(lock); \ ++ } while (0) ++ ++#define local_spin_unlock_irq(lvar, lock) \ ++ do { \ ++ spin_unlock(lock); \ ++ local_unlock_irq(lvar); \ ++ } while (0) ++ ++#define local_spin_lock_irqsave(lvar, lock, flags) \ ++ do { \ ++ local_lock_irqsave(lvar, flags); \ ++ spin_lock(lock); \ ++ } while (0) ++ ++#define local_spin_unlock_irqrestore(lvar, lock, flags) \ ++ do { \ ++ spin_unlock(lock); \ ++ local_unlock_irqrestore(lvar, flags); \ ++ } while (0) ++ ++#define get_locked_var(lvar, var) \ ++ (*({ \ ++ local_lock(lvar); \ ++ this_cpu_ptr(&var); \ ++ })) ++ ++#define put_locked_var(lvar, var) local_unlock(lvar); ++ ++#define get_locked_ptr(lvar, var) \ ++ ({ \ ++ local_lock(lvar); \ ++ this_cpu_ptr(var); \ ++ }) ++ ++#define put_locked_ptr(lvar, var) local_unlock(lvar); ++ ++#define local_lock_cpu(lvar) \ ++ ({ \ ++ local_lock(lvar); \ ++ smp_processor_id(); \ ++ }) ++ ++#define local_unlock_cpu(lvar) local_unlock(lvar) ++ ++#else /* PREEMPT_RT_BASE */ ++ ++#define DEFINE_LOCAL_IRQ_LOCK(lvar) __typeof__(const int) lvar ++#define DECLARE_LOCAL_IRQ_LOCK(lvar) extern __typeof__(const int) lvar ++ ++static inline void local_irq_lock_init(int lvar) { } ++ ++#define local_trylock(lvar) \ ++ ({ \ ++ preempt_disable(); \ ++ 1; \ ++ }) ++ ++#define local_lock(lvar) preempt_disable() ++#define local_unlock(lvar) preempt_enable() ++#define local_lock_irq(lvar) local_irq_disable() ++#define local_lock_irq_on(lvar, cpu) local_irq_disable() ++#define local_unlock_irq(lvar) local_irq_enable() ++#define local_unlock_irq_on(lvar, cpu) local_irq_enable() ++#define local_lock_irqsave(lvar, flags) local_irq_save(flags) ++#define local_unlock_irqrestore(lvar, flags) local_irq_restore(flags) ++ ++#define local_spin_trylock_irq(lvar, lock) spin_trylock_irq(lock) ++#define local_spin_lock_irq(lvar, lock) spin_lock_irq(lock) ++#define local_spin_unlock_irq(lvar, lock) spin_unlock_irq(lock) ++#define local_spin_lock_irqsave(lvar, lock, flags) \ ++ spin_lock_irqsave(lock, flags) ++#define local_spin_unlock_irqrestore(lvar, lock, flags) \ ++ spin_unlock_irqrestore(lock, flags) ++ ++#define get_locked_var(lvar, var) get_cpu_var(var) ++#define put_locked_var(lvar, var) put_cpu_var(var) ++#define get_locked_ptr(lvar, var) get_cpu_ptr(var) ++#define put_locked_ptr(lvar, var) put_cpu_ptr(var) ++ ++#define local_lock_cpu(lvar) get_cpu() ++#define local_unlock_cpu(lvar) put_cpu() ++ ++#endif ++ ++#endif +diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h +index 5ed8f6292a53..f430cf0a377e 100644 +--- a/include/linux/mm_types.h ++++ b/include/linux/mm_types.h +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -482,6 +483,9 @@ struct mm_struct { + bool tlb_flush_batched; + #endif + struct uprobes_state uprobes_state; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct rcu_head delayed_drop; ++#endif + #ifdef CONFIG_HUGETLB_PAGE + atomic_long_t hugetlb_usage; + #endif +diff --git a/include/linux/mutex.h b/include/linux/mutex.h +index 3093dd162424..cad906f54d0a 100644 +--- a/include/linux/mutex.h ++++ b/include/linux/mutex.h +@@ -22,6 +22,17 @@ + + struct ww_acquire_ctx; + ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ ++ , .dep_map = { .name = #lockname } ++#else ++# define __DEP_MAP_MUTEX_INITIALIZER(lockname) ++#endif ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++# include ++#else ++ + /* + * Simple, straightforward mutexes with strict semantics: + * +@@ -118,13 +129,6 @@ do { \ + __mutex_init((mutex), #mutex, &__key); \ + } while (0) + +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ +- , .dep_map = { .name = #lockname } +-#else +-# define __DEP_MAP_MUTEX_INITIALIZER(lockname) +-#endif +- + #define __MUTEX_INITIALIZER(lockname) \ + { .owner = ATOMIC_LONG_INIT(0) \ + , .wait_lock = __SPIN_LOCK_UNLOCKED(lockname.wait_lock) \ +@@ -229,4 +233,6 @@ mutex_trylock_recursive(struct mutex *lock) + return mutex_trylock(lock); + } + ++#endif /* !PREEMPT_RT_FULL */ ++ + #endif /* __LINUX_MUTEX_H */ +diff --git a/include/linux/mutex_rt.h b/include/linux/mutex_rt.h +new file mode 100644 +index 000000000000..3fcb5edb1d2b +--- /dev/null ++++ b/include/linux/mutex_rt.h +@@ -0,0 +1,130 @@ ++#ifndef __LINUX_MUTEX_RT_H ++#define __LINUX_MUTEX_RT_H ++ ++#ifndef __LINUX_MUTEX_H ++#error "Please include mutex.h" ++#endif ++ ++#include ++ ++/* FIXME: Just for __lockfunc */ ++#include ++ ++struct mutex { ++ struct rt_mutex lock; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++}; ++ ++#define __MUTEX_INITIALIZER(mutexname) \ ++ { \ ++ .lock = __RT_MUTEX_INITIALIZER(mutexname.lock) \ ++ __DEP_MAP_MUTEX_INITIALIZER(mutexname) \ ++ } ++ ++#define DEFINE_MUTEX(mutexname) \ ++ struct mutex mutexname = __MUTEX_INITIALIZER(mutexname) ++ ++extern void __mutex_do_init(struct mutex *lock, const char *name, struct lock_class_key *key); ++extern void __lockfunc _mutex_lock(struct mutex *lock); ++extern void __lockfunc _mutex_lock_io(struct mutex *lock); ++extern void __lockfunc _mutex_lock_io_nested(struct mutex *lock, int subclass); ++extern int __lockfunc _mutex_lock_interruptible(struct mutex *lock); ++extern int __lockfunc _mutex_lock_killable(struct mutex *lock); ++extern void __lockfunc _mutex_lock_nested(struct mutex *lock, int subclass); ++extern void __lockfunc _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest_lock); ++extern int __lockfunc _mutex_lock_interruptible_nested(struct mutex *lock, int subclass); ++extern int __lockfunc _mutex_lock_killable_nested(struct mutex *lock, int subclass); ++extern int __lockfunc _mutex_trylock(struct mutex *lock); ++extern void __lockfunc _mutex_unlock(struct mutex *lock); ++ ++#define mutex_is_locked(l) rt_mutex_is_locked(&(l)->lock) ++#define mutex_lock(l) _mutex_lock(l) ++#define mutex_lock_interruptible(l) _mutex_lock_interruptible(l) ++#define mutex_lock_killable(l) _mutex_lock_killable(l) ++#define mutex_trylock(l) _mutex_trylock(l) ++#define mutex_unlock(l) _mutex_unlock(l) ++#define mutex_lock_io(l) _mutex_lock_io(l); ++ ++#define __mutex_owner(l) ((l)->lock.owner) ++ ++#ifdef CONFIG_DEBUG_MUTEXES ++#define mutex_destroy(l) rt_mutex_destroy(&(l)->lock) ++#else ++static inline void mutex_destroy(struct mutex *lock) {} ++#endif ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define mutex_lock_nested(l, s) _mutex_lock_nested(l, s) ++# define mutex_lock_interruptible_nested(l, s) \ ++ _mutex_lock_interruptible_nested(l, s) ++# define mutex_lock_killable_nested(l, s) \ ++ _mutex_lock_killable_nested(l, s) ++# define mutex_lock_io_nested(l, s) _mutex_lock_io_nested(l, s) ++ ++# define mutex_lock_nest_lock(lock, nest_lock) \ ++do { \ ++ typecheck(struct lockdep_map *, &(nest_lock)->dep_map); \ ++ _mutex_lock_nest_lock(lock, &(nest_lock)->dep_map); \ ++} while (0) ++ ++#else ++# define mutex_lock_nested(l, s) _mutex_lock(l) ++# define mutex_lock_interruptible_nested(l, s) \ ++ _mutex_lock_interruptible(l) ++# define mutex_lock_killable_nested(l, s) \ ++ _mutex_lock_killable(l) ++# define mutex_lock_nest_lock(lock, nest_lock) mutex_lock(lock) ++# define mutex_lock_io_nested(l, s) _mutex_lock_io(l) ++#endif ++ ++# define mutex_init(mutex) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ rt_mutex_init(&(mutex)->lock); \ ++ __mutex_do_init((mutex), #mutex, &__key); \ ++} while (0) ++ ++# define __mutex_init(mutex, name, key) \ ++do { \ ++ rt_mutex_init(&(mutex)->lock); \ ++ __mutex_do_init((mutex), name, key); \ ++} while (0) ++ ++/** ++ * These values are chosen such that FAIL and SUCCESS match the ++ * values of the regular mutex_trylock(). ++ */ ++enum mutex_trylock_recursive_enum { ++ MUTEX_TRYLOCK_FAILED = 0, ++ MUTEX_TRYLOCK_SUCCESS = 1, ++ MUTEX_TRYLOCK_RECURSIVE, ++}; ++/** ++ * mutex_trylock_recursive - trylock variant that allows recursive locking ++ * @lock: mutex to be locked ++ * ++ * This function should not be used, _ever_. It is purely for hysterical GEM ++ * raisins, and once those are gone this will be removed. ++ * ++ * Returns: ++ * MUTEX_TRYLOCK_FAILED - trylock failed, ++ * MUTEX_TRYLOCK_SUCCESS - lock acquired, ++ * MUTEX_TRYLOCK_RECURSIVE - we already owned the lock. ++ */ ++int __rt_mutex_owner_current(struct rt_mutex *lock); ++ ++static inline /* __deprecated */ __must_check enum mutex_trylock_recursive_enum ++mutex_trylock_recursive(struct mutex *lock) ++{ ++ if (unlikely(__rt_mutex_owner_current(&lock->lock))) ++ return MUTEX_TRYLOCK_RECURSIVE; ++ ++ return mutex_trylock(lock); ++} ++ ++extern int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock); ++ ++#endif +diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h +index 120b5dc89334..c92e89437175 100644 +--- a/include/linux/netdevice.h ++++ b/include/linux/netdevice.h +@@ -422,7 +422,19 @@ typedef enum rx_handler_result rx_handler_result_t; + typedef rx_handler_result_t rx_handler_func_t(struct sk_buff **pskb); + + void __napi_schedule(struct napi_struct *n); ++ ++/* ++ * When PREEMPT_RT_FULL is defined, all device interrupt handlers ++ * run as threads, and they can also be preempted (without PREEMPT_RT ++ * interrupt threads can not be preempted). Which means that calling ++ * __napi_schedule_irqoff() from an interrupt handler can be preempted ++ * and can corrupt the napi->poll_list. ++ */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++#define __napi_schedule_irqoff(n) __napi_schedule(n) ++#else + void __napi_schedule_irqoff(struct napi_struct *n); ++#endif + + static inline bool napi_disable_pending(struct napi_struct *n) + { +@@ -587,7 +599,11 @@ struct netdev_queue { + * write-mostly part + */ + spinlock_t _xmit_lock ____cacheline_aligned_in_smp; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct task_struct *xmit_lock_owner; ++#else + int xmit_lock_owner; ++#endif + /* + * Time (in jiffies) of last Tx + */ +@@ -2614,14 +2630,53 @@ void netdev_freemem(struct net_device *dev); + void synchronize_net(void); + int init_dummy_netdev(struct net_device *dev); + +-DECLARE_PER_CPU(int, xmit_recursion); + #define XMIT_RECURSION_LIMIT 10 ++#ifdef CONFIG_PREEMPT_RT_FULL ++static inline int dev_recursion_level(void) ++{ ++ return current->xmit_recursion; ++} ++ ++static inline int xmit_rec_read(void) ++{ ++ return current->xmit_recursion; ++} ++ ++static inline void xmit_rec_inc(void) ++{ ++ current->xmit_recursion++; ++} ++ ++static inline void xmit_rec_dec(void) ++{ ++ current->xmit_recursion--; ++} ++ ++#else ++ ++DECLARE_PER_CPU(int, xmit_recursion); + + static inline int dev_recursion_level(void) + { + return this_cpu_read(xmit_recursion); + } + ++static inline int xmit_rec_read(void) ++{ ++ return __this_cpu_read(xmit_recursion); ++} ++ ++static inline void xmit_rec_inc(void) ++{ ++ __this_cpu_inc(xmit_recursion); ++} ++ ++static inline void xmit_rec_dec(void) ++{ ++ __this_cpu_dec(xmit_recursion); ++} ++#endif ++ + struct net_device *dev_get_by_index(struct net *net, int ifindex); + struct net_device *__dev_get_by_index(struct net *net, int ifindex); + struct net_device *dev_get_by_index_rcu(struct net *net, int ifindex); +@@ -2976,6 +3031,7 @@ struct softnet_data { + unsigned int dropped; + struct sk_buff_head input_pkt_queue; + struct napi_struct backlog; ++ struct sk_buff_head tofree_queue; + + }; + +@@ -3796,10 +3852,48 @@ static inline u32 netif_msg_init(int debug_value, int default_msg_enable_bits) + return (1 << debug_value) - 1; + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static inline void netdev_queue_set_owner(struct netdev_queue *txq, int cpu) ++{ ++ txq->xmit_lock_owner = current; ++} ++ ++static inline void netdev_queue_clear_owner(struct netdev_queue *txq) ++{ ++ txq->xmit_lock_owner = NULL; ++} ++ ++static inline bool netdev_queue_has_owner(struct netdev_queue *txq) ++{ ++ if (txq->xmit_lock_owner != NULL) ++ return true; ++ return false; ++} ++ ++#else ++ ++static inline void netdev_queue_set_owner(struct netdev_queue *txq, int cpu) ++{ ++ txq->xmit_lock_owner = cpu; ++} ++ ++static inline void netdev_queue_clear_owner(struct netdev_queue *txq) ++{ ++ txq->xmit_lock_owner = -1; ++} ++ ++static inline bool netdev_queue_has_owner(struct netdev_queue *txq) ++{ ++ if (txq->xmit_lock_owner != -1) ++ return true; ++ return false; ++} ++#endif ++ + static inline void __netif_tx_lock(struct netdev_queue *txq, int cpu) + { + spin_lock(&txq->_xmit_lock); +- txq->xmit_lock_owner = cpu; ++ netdev_queue_set_owner(txq, cpu); + } + + static inline bool __netif_tx_acquire(struct netdev_queue *txq) +@@ -3816,32 +3910,32 @@ static inline void __netif_tx_release(struct netdev_queue *txq) + static inline void __netif_tx_lock_bh(struct netdev_queue *txq) + { + spin_lock_bh(&txq->_xmit_lock); +- txq->xmit_lock_owner = smp_processor_id(); ++ netdev_queue_set_owner(txq, smp_processor_id()); + } + + static inline bool __netif_tx_trylock(struct netdev_queue *txq) + { + bool ok = spin_trylock(&txq->_xmit_lock); + if (likely(ok)) +- txq->xmit_lock_owner = smp_processor_id(); ++ netdev_queue_set_owner(txq, smp_processor_id()); + return ok; + } + + static inline void __netif_tx_unlock(struct netdev_queue *txq) + { +- txq->xmit_lock_owner = -1; ++ netdev_queue_clear_owner(txq); + spin_unlock(&txq->_xmit_lock); + } + + static inline void __netif_tx_unlock_bh(struct netdev_queue *txq) + { +- txq->xmit_lock_owner = -1; ++ netdev_queue_clear_owner(txq); + spin_unlock_bh(&txq->_xmit_lock); + } + + static inline void txq_trans_update(struct netdev_queue *txq) + { +- if (txq->xmit_lock_owner != -1) ++ if (netdev_queue_has_owner(txq)) + txq->trans_start = jiffies; + } + +diff --git a/include/linux/netfilter/x_tables.h b/include/linux/netfilter/x_tables.h +index 9077b3ebea08..1710f2aff350 100644 +--- a/include/linux/netfilter/x_tables.h ++++ b/include/linux/netfilter/x_tables.h +@@ -6,6 +6,7 @@ + #include + #include + #include ++#include + #include + + /* Test a struct->invflags and a boolean for inequality */ +@@ -345,6 +346,8 @@ void xt_free_table_info(struct xt_table_info *info); + */ + DECLARE_PER_CPU(seqcount_t, xt_recseq); + ++DECLARE_LOCAL_IRQ_LOCK(xt_write_lock); ++ + /* xt_tee_enabled - true if x_tables needs to handle reentrancy + * + * Enabled if current ip(6)tables ruleset has at least one -j TEE rule. +@@ -365,6 +368,9 @@ static inline unsigned int xt_write_recseq_begin(void) + { + unsigned int addend; + ++ /* RT protection */ ++ local_lock(xt_write_lock); ++ + /* + * Low order bit of sequence is set if we already + * called xt_write_recseq_begin(). +@@ -395,6 +401,7 @@ static inline void xt_write_recseq_end(unsigned int addend) + /* this is kind of a write_seqcount_end(), but addend is 0 or 1 */ + smp_wmb(); + __this_cpu_add(xt_recseq.sequence, addend); ++ local_unlock(xt_write_lock); + } + + /* +diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h +index a0831e9d19c9..94b6fefd90b0 100644 +--- a/include/linux/nfs_fs.h ++++ b/include/linux/nfs_fs.h +@@ -163,7 +163,11 @@ struct nfs_inode { + + /* Readers: in-flight sillydelete RPC calls */ + /* Writers: rmdir */ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct semaphore rmdir_sem; ++#else + struct rw_semaphore rmdir_sem; ++#endif + struct mutex commit_mutex; + + #if IS_ENABLED(CONFIG_NFS_V4) +diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h +index bd1c889a9ed9..1fc27eb1f021 100644 +--- a/include/linux/nfs_xdr.h ++++ b/include/linux/nfs_xdr.h +@@ -1549,7 +1549,7 @@ struct nfs_unlinkdata { + struct nfs_removeargs args; + struct nfs_removeres res; + struct dentry *dentry; +- wait_queue_head_t wq; ++ struct swait_queue_head wq; + struct rpc_cred *cred; + struct nfs_fattr dir_attr; + long timeout; +diff --git a/include/linux/percpu-rwsem.h b/include/linux/percpu-rwsem.h +index 79b99d653e03..fb44e237316d 100644 +--- a/include/linux/percpu-rwsem.h ++++ b/include/linux/percpu-rwsem.h +@@ -29,7 +29,7 @@ static struct percpu_rw_semaphore name = { \ + extern int __percpu_down_read(struct percpu_rw_semaphore *, int); + extern void __percpu_up_read(struct percpu_rw_semaphore *); + +-static inline void percpu_down_read_preempt_disable(struct percpu_rw_semaphore *sem) ++static inline void percpu_down_read(struct percpu_rw_semaphore *sem) + { + might_sleep(); + +@@ -47,16 +47,10 @@ static inline void percpu_down_read_preempt_disable(struct percpu_rw_semaphore * + __this_cpu_inc(*sem->read_count); + if (unlikely(!rcu_sync_is_idle(&sem->rss))) + __percpu_down_read(sem, false); /* Unconditional memory barrier */ +- barrier(); + /* +- * The barrier() prevents the compiler from ++ * The preempt_enable() prevents the compiler from + * bleeding the critical section out. + */ +-} +- +-static inline void percpu_down_read(struct percpu_rw_semaphore *sem) +-{ +- percpu_down_read_preempt_disable(sem); + preempt_enable(); + } + +@@ -83,13 +77,9 @@ static inline int percpu_down_read_trylock(struct percpu_rw_semaphore *sem) + return ret; + } + +-static inline void percpu_up_read_preempt_enable(struct percpu_rw_semaphore *sem) ++static inline void percpu_up_read(struct percpu_rw_semaphore *sem) + { +- /* +- * The barrier() prevents the compiler from +- * bleeding the critical section out. +- */ +- barrier(); ++ preempt_disable(); + /* + * Same as in percpu_down_read(). + */ +@@ -102,12 +92,6 @@ static inline void percpu_up_read_preempt_enable(struct percpu_rw_semaphore *sem + rwsem_release(&sem->rw_sem.dep_map, 1, _RET_IP_); + } + +-static inline void percpu_up_read(struct percpu_rw_semaphore *sem) +-{ +- preempt_disable(); +- percpu_up_read_preempt_enable(sem); +-} +- + extern void percpu_down_write(struct percpu_rw_semaphore *); + extern void percpu_up_write(struct percpu_rw_semaphore *); + +diff --git a/include/linux/percpu.h b/include/linux/percpu.h +index 70b7123f38c7..24421bf8c4b3 100644 +--- a/include/linux/percpu.h ++++ b/include/linux/percpu.h +@@ -19,6 +19,35 @@ + #define PERCPU_MODULE_RESERVE 0 + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++#define get_local_var(var) (*({ \ ++ migrate_disable(); \ ++ this_cpu_ptr(&var); })) ++ ++#define put_local_var(var) do { \ ++ (void)&(var); \ ++ migrate_enable(); \ ++} while (0) ++ ++# define get_local_ptr(var) ({ \ ++ migrate_disable(); \ ++ this_cpu_ptr(var); }) ++ ++# define put_local_ptr(var) do { \ ++ (void)(var); \ ++ migrate_enable(); \ ++} while (0) ++ ++#else ++ ++#define get_local_var(var) get_cpu_var(var) ++#define put_local_var(var) put_cpu_var(var) ++#define get_local_ptr(var) get_cpu_ptr(var) ++#define put_local_ptr(var) put_cpu_ptr(var) ++ ++#endif ++ + /* minimum unit size, also is the maximum supported allocation size */ + #define PCPU_MIN_UNIT_SIZE PFN_ALIGN(32 << 10) + +diff --git a/include/linux/pid.h b/include/linux/pid.h +index 14a9a39da9c7..a9026a5da196 100644 +--- a/include/linux/pid.h ++++ b/include/linux/pid.h +@@ -3,6 +3,7 @@ + #define _LINUX_PID_H + + #include ++#include + + enum pid_type + { +diff --git a/include/linux/posix-timers.h b/include/linux/posix-timers.h +index ee7e987ea1b4..3e6c91bdf2ef 100644 +--- a/include/linux/posix-timers.h ++++ b/include/linux/posix-timers.h +@@ -15,6 +15,7 @@ struct cpu_timer_list { + u64 expires, incr; + struct task_struct *task; + int firing; ++ int firing_cpu; + }; + + /* +@@ -114,8 +115,8 @@ struct k_itimer { + struct { + struct alarm alarmtimer; + } alarm; +- struct rcu_head rcu; + } it; ++ struct rcu_head rcu; + }; + + void run_posix_cpu_timers(struct task_struct *task); +diff --git a/include/linux/preempt.h b/include/linux/preempt.h +index c01813c3fbe9..9c74a019bf57 100644 +--- a/include/linux/preempt.h ++++ b/include/linux/preempt.h +@@ -51,7 +51,11 @@ + #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT) + #define NMI_OFFSET (1UL << NMI_SHIFT) + +-#define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) ++#ifndef CONFIG_PREEMPT_RT_FULL ++# define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) ++#else ++# define SOFTIRQ_DISABLE_OFFSET (0) ++#endif + + /* We use the MSB mostly because its available */ + #define PREEMPT_NEED_RESCHED 0x80000000 +@@ -81,9 +85,15 @@ + #include + + #define hardirq_count() (preempt_count() & HARDIRQ_MASK) +-#define softirq_count() (preempt_count() & SOFTIRQ_MASK) + #define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \ + | NMI_MASK)) ++#ifndef CONFIG_PREEMPT_RT_FULL ++# define softirq_count() (preempt_count() & SOFTIRQ_MASK) ++# define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) ++#else ++# define softirq_count() ((unsigned long)current->softirq_nestcnt) ++extern int in_serving_softirq(void); ++#endif + + /* + * Are we doing bottom half or hardware interrupt processing? +@@ -101,7 +111,6 @@ + #define in_irq() (hardirq_count()) + #define in_softirq() (softirq_count()) + #define in_interrupt() (irq_count()) +-#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) + #define in_nmi() (preempt_count() & NMI_MASK) + #define in_task() (!(preempt_count() & \ + (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_OFFSET))) +@@ -118,7 +127,11 @@ + /* + * The preempt_count offset after spin_lock() + */ ++#if !defined(CONFIG_PREEMPT_RT_FULL) + #define PREEMPT_LOCK_OFFSET PREEMPT_DISABLE_OFFSET ++#else ++#define PREEMPT_LOCK_OFFSET 0 ++#endif + + /* + * The preempt_count offset needed for things like: +@@ -167,6 +180,20 @@ extern void preempt_count_sub(int val); + #define preempt_count_inc() preempt_count_add(1) + #define preempt_count_dec() preempt_count_sub(1) + ++#ifdef CONFIG_PREEMPT_LAZY ++#define add_preempt_lazy_count(val) do { preempt_lazy_count() += (val); } while (0) ++#define sub_preempt_lazy_count(val) do { preempt_lazy_count() -= (val); } while (0) ++#define inc_preempt_lazy_count() add_preempt_lazy_count(1) ++#define dec_preempt_lazy_count() sub_preempt_lazy_count(1) ++#define preempt_lazy_count() (current_thread_info()->preempt_lazy_count) ++#else ++#define add_preempt_lazy_count(val) do { } while (0) ++#define sub_preempt_lazy_count(val) do { } while (0) ++#define inc_preempt_lazy_count() do { } while (0) ++#define dec_preempt_lazy_count() do { } while (0) ++#define preempt_lazy_count() (0) ++#endif ++ + #ifdef CONFIG_PREEMPT_COUNT + + #define preempt_disable() \ +@@ -175,16 +202,53 @@ do { \ + barrier(); \ + } while (0) + ++#define preempt_lazy_disable() \ ++do { \ ++ inc_preempt_lazy_count(); \ ++ barrier(); \ ++} while (0) ++ + #define sched_preempt_enable_no_resched() \ + do { \ + barrier(); \ + preempt_count_dec(); \ + } while (0) + +-#define preempt_enable_no_resched() sched_preempt_enable_no_resched() ++#ifdef CONFIG_PREEMPT_RT_BASE ++# define preempt_enable_no_resched() sched_preempt_enable_no_resched() ++# define preempt_check_resched_rt() preempt_check_resched() ++#else ++# define preempt_enable_no_resched() preempt_enable() ++# define preempt_check_resched_rt() barrier(); ++#endif + + #define preemptible() (preempt_count() == 0 && !irqs_disabled()) + ++#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++ ++extern void migrate_disable(void); ++extern void migrate_enable(void); ++ ++int __migrate_disabled(struct task_struct *p); ++ ++#elif !defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++ ++extern void migrate_disable(void); ++extern void migrate_enable(void); ++static inline int __migrate_disabled(struct task_struct *p) ++{ ++ return 0; ++} ++ ++#else ++#define migrate_disable() preempt_disable() ++#define migrate_enable() preempt_enable() ++static inline int __migrate_disabled(struct task_struct *p) ++{ ++ return 0; ++} ++#endif ++ + #ifdef CONFIG_PREEMPT + #define preempt_enable() \ + do { \ +@@ -206,6 +270,13 @@ do { \ + __preempt_schedule(); \ + } while (0) + ++#define preempt_lazy_enable() \ ++do { \ ++ dec_preempt_lazy_count(); \ ++ barrier(); \ ++ preempt_check_resched(); \ ++} while (0) ++ + #else /* !CONFIG_PREEMPT */ + #define preempt_enable() \ + do { \ +@@ -213,6 +284,12 @@ do { \ + preempt_count_dec(); \ + } while (0) + ++#define preempt_lazy_enable() \ ++do { \ ++ dec_preempt_lazy_count(); \ ++ barrier(); \ ++} while (0) ++ + #define preempt_enable_notrace() \ + do { \ + barrier(); \ +@@ -251,8 +328,16 @@ do { \ + #define preempt_disable_notrace() barrier() + #define preempt_enable_no_resched_notrace() barrier() + #define preempt_enable_notrace() barrier() ++#define preempt_check_resched_rt() barrier() + #define preemptible() 0 + ++#define migrate_disable() barrier() ++#define migrate_enable() barrier() ++ ++static inline int __migrate_disabled(struct task_struct *p) ++{ ++ return 0; ++} + #endif /* CONFIG_PREEMPT_COUNT */ + + #ifdef MODULE +@@ -271,10 +356,22 @@ do { \ + } while (0) + #define preempt_fold_need_resched() \ + do { \ +- if (tif_need_resched()) \ ++ if (tif_need_resched_now()) \ + set_preempt_need_resched(); \ + } while (0) + ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define preempt_disable_rt() preempt_disable() ++# define preempt_enable_rt() preempt_enable() ++# define preempt_disable_nort() barrier() ++# define preempt_enable_nort() barrier() ++#else ++# define preempt_disable_rt() barrier() ++# define preempt_enable_rt() barrier() ++# define preempt_disable_nort() preempt_disable() ++# define preempt_enable_nort() preempt_enable() ++#endif ++ + #ifdef CONFIG_PREEMPT_NOTIFIERS + + struct preempt_notifier; +diff --git a/include/linux/printk.h b/include/linux/printk.h +index cf3eccfe1543..30ebf5f82a7c 100644 +--- a/include/linux/printk.h ++++ b/include/linux/printk.h +@@ -140,9 +140,11 @@ struct va_format { + #ifdef CONFIG_EARLY_PRINTK + extern asmlinkage __printf(1, 2) + void early_printk(const char *fmt, ...); ++extern void printk_kill(void); + #else + static inline __printf(1, 2) __cold + void early_printk(const char *s, ...) { } ++static inline void printk_kill(void) { } + #endif + + #ifdef CONFIG_PRINTK_NMI +diff --git a/include/linux/radix-tree.h b/include/linux/radix-tree.h +index 34149e8b5f73..affb0fc4c5b6 100644 +--- a/include/linux/radix-tree.h ++++ b/include/linux/radix-tree.h +@@ -330,6 +330,8 @@ unsigned int radix_tree_gang_lookup_slot(const struct radix_tree_root *, + int radix_tree_preload(gfp_t gfp_mask); + int radix_tree_maybe_preload(gfp_t gfp_mask); + int radix_tree_maybe_preload_order(gfp_t gfp_mask, int order); ++void radix_tree_preload_end(void); ++ + void radix_tree_init(void); + void *radix_tree_tag_set(struct radix_tree_root *, + unsigned long index, unsigned int tag); +@@ -349,11 +351,6 @@ unsigned int radix_tree_gang_lookup_tag_slot(const struct radix_tree_root *, + unsigned int max_items, unsigned int tag); + int radix_tree_tagged(const struct radix_tree_root *, unsigned int tag); + +-static inline void radix_tree_preload_end(void) +-{ +- preempt_enable(); +-} +- + int radix_tree_split_preload(unsigned old_order, unsigned new_order, gfp_t); + int radix_tree_split(struct radix_tree_root *, unsigned long index, + unsigned new_order); +diff --git a/include/linux/random.h b/include/linux/random.h +index 445a0ea4ff49..a7b7d9f97580 100644 +--- a/include/linux/random.h ++++ b/include/linux/random.h +@@ -32,7 +32,7 @@ static inline void add_latent_entropy(void) {} + + extern void add_input_randomness(unsigned int type, unsigned int code, + unsigned int value) __latent_entropy; +-extern void add_interrupt_randomness(int irq, int irq_flags) __latent_entropy; ++extern void add_interrupt_randomness(int irq, int irq_flags, __u64 ip) __latent_entropy; + + extern void get_random_bytes(void *buf, int nbytes); + extern int wait_for_random_bytes(void); +diff --git a/include/linux/rbtree.h b/include/linux/rbtree.h +index fcbeed4053ef..2aa2aec354c2 100644 +--- a/include/linux/rbtree.h ++++ b/include/linux/rbtree.h +@@ -31,7 +31,7 @@ + + #include + #include +-#include ++#include + + struct rb_node { + unsigned long __rb_parent_color; +diff --git a/include/linux/rcu_assign_pointer.h b/include/linux/rcu_assign_pointer.h +new file mode 100644 +index 000000000000..7066962a4379 +--- /dev/null ++++ b/include/linux/rcu_assign_pointer.h +@@ -0,0 +1,54 @@ ++#ifndef __LINUX_RCU_ASSIGN_POINTER_H__ ++#define __LINUX_RCU_ASSIGN_POINTER_H__ ++#include ++#include ++ ++/** ++ * RCU_INITIALIZER() - statically initialize an RCU-protected global variable ++ * @v: The value to statically initialize with. ++ */ ++#define RCU_INITIALIZER(v) (typeof(*(v)) __force __rcu *)(v) ++ ++/** ++ * rcu_assign_pointer() - assign to RCU-protected pointer ++ * @p: pointer to assign to ++ * @v: value to assign (publish) ++ * ++ * Assigns the specified value to the specified RCU-protected ++ * pointer, ensuring that any concurrent RCU readers will see ++ * any prior initialization. ++ * ++ * Inserts memory barriers on architectures that require them ++ * (which is most of them), and also prevents the compiler from ++ * reordering the code that initializes the structure after the pointer ++ * assignment. More importantly, this call documents which pointers ++ * will be dereferenced by RCU read-side code. ++ * ++ * In some special cases, you may use RCU_INIT_POINTER() instead ++ * of rcu_assign_pointer(). RCU_INIT_POINTER() is a bit faster due ++ * to the fact that it does not constrain either the CPU or the compiler. ++ * That said, using RCU_INIT_POINTER() when you should have used ++ * rcu_assign_pointer() is a very bad thing that results in ++ * impossible-to-diagnose memory corruption. So please be careful. ++ * See the RCU_INIT_POINTER() comment header for details. ++ * ++ * Note that rcu_assign_pointer() evaluates each of its arguments only ++ * once, appearances notwithstanding. One of the "extra" evaluations ++ * is in typeof() and the other visible only to sparse (__CHECKER__), ++ * neither of which actually execute the argument. As with most cpp ++ * macros, this execute-arguments-only-once property is important, so ++ * please be careful when making changes to rcu_assign_pointer() and the ++ * other macros that it invokes. ++ */ ++#define rcu_assign_pointer(p, v) \ ++({ \ ++ uintptr_t _r_a_p__v = (uintptr_t)(v); \ ++ \ ++ if (__builtin_constant_p(v) && (_r_a_p__v) == (uintptr_t)NULL) \ ++ WRITE_ONCE((p), (typeof(p))(_r_a_p__v)); \ ++ else \ ++ smp_store_release(&p, RCU_INITIALIZER((typeof(p))_r_a_p__v)); \ ++ _r_a_p__v; \ ++}) ++ ++#endif +diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h +index e102c5bccbb9..241a4a9577a0 100644 +--- a/include/linux/rcupdate.h ++++ b/include/linux/rcupdate.h +@@ -42,6 +42,7 @@ + #include + #include + #include ++#include + + #define ULONG_CMP_GE(a, b) (ULONG_MAX / 2 >= (a) - (b)) + #define ULONG_CMP_LT(a, b) (ULONG_MAX / 2 < (a) - (b)) +@@ -55,7 +56,11 @@ void call_rcu(struct rcu_head *head, rcu_callback_t func); + #define call_rcu call_rcu_sched + #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ + ++#ifdef CONFIG_PREEMPT_RT_FULL ++#define call_rcu_bh call_rcu ++#else + void call_rcu_bh(struct rcu_head *head, rcu_callback_t func); ++#endif + void call_rcu_sched(struct rcu_head *head, rcu_callback_t func); + void synchronize_sched(void); + void rcu_barrier_tasks(void); +@@ -73,6 +78,11 @@ void synchronize_rcu(void); + * types of kernel builds, the rcu_read_lock() nesting depth is unknowable. + */ + #define rcu_preempt_depth() (current->rcu_read_lock_nesting) ++#ifndef CONFIG_PREEMPT_RT_FULL ++#define sched_rcu_preempt_depth() rcu_preempt_depth() ++#else ++static inline int sched_rcu_preempt_depth(void) { return 0; } ++#endif + + #else /* #ifdef CONFIG_PREEMPT_RCU */ + +@@ -96,6 +106,8 @@ static inline int rcu_preempt_depth(void) + return 0; + } + ++#define sched_rcu_preempt_depth() rcu_preempt_depth() ++ + #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ + + /* Internal to kernel */ +@@ -253,7 +265,14 @@ extern struct lockdep_map rcu_sched_lock_map; + extern struct lockdep_map rcu_callback_map; + int debug_lockdep_rcu_enabled(void); + int rcu_read_lock_held(void); ++#ifdef CONFIG_PREEMPT_RT_FULL ++static inline int rcu_read_lock_bh_held(void) ++{ ++ return rcu_read_lock_held(); ++} ++#else + int rcu_read_lock_bh_held(void); ++#endif + int rcu_read_lock_sched_held(void); + + #else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ +@@ -362,54 +381,6 @@ static inline void rcu_preempt_sleep_check(void) { } + ((typeof(*p) __force __kernel *)(________p1)); \ + }) + +-/** +- * RCU_INITIALIZER() - statically initialize an RCU-protected global variable +- * @v: The value to statically initialize with. +- */ +-#define RCU_INITIALIZER(v) (typeof(*(v)) __force __rcu *)(v) +- +-/** +- * rcu_assign_pointer() - assign to RCU-protected pointer +- * @p: pointer to assign to +- * @v: value to assign (publish) +- * +- * Assigns the specified value to the specified RCU-protected +- * pointer, ensuring that any concurrent RCU readers will see +- * any prior initialization. +- * +- * Inserts memory barriers on architectures that require them +- * (which is most of them), and also prevents the compiler from +- * reordering the code that initializes the structure after the pointer +- * assignment. More importantly, this call documents which pointers +- * will be dereferenced by RCU read-side code. +- * +- * In some special cases, you may use RCU_INIT_POINTER() instead +- * of rcu_assign_pointer(). RCU_INIT_POINTER() is a bit faster due +- * to the fact that it does not constrain either the CPU or the compiler. +- * That said, using RCU_INIT_POINTER() when you should have used +- * rcu_assign_pointer() is a very bad thing that results in +- * impossible-to-diagnose memory corruption. So please be careful. +- * See the RCU_INIT_POINTER() comment header for details. +- * +- * Note that rcu_assign_pointer() evaluates each of its arguments only +- * once, appearances notwithstanding. One of the "extra" evaluations +- * is in typeof() and the other visible only to sparse (__CHECKER__), +- * neither of which actually execute the argument. As with most cpp +- * macros, this execute-arguments-only-once property is important, so +- * please be careful when making changes to rcu_assign_pointer() and the +- * other macros that it invokes. +- */ +-#define rcu_assign_pointer(p, v) \ +-({ \ +- uintptr_t _r_a_p__v = (uintptr_t)(v); \ +- \ +- if (__builtin_constant_p(v) && (_r_a_p__v) == (uintptr_t)NULL) \ +- WRITE_ONCE((p), (typeof(p))(_r_a_p__v)); \ +- else \ +- smp_store_release(&p, RCU_INITIALIZER((typeof(p))_r_a_p__v)); \ +- _r_a_p__v; \ +-}) +- + /** + * rcu_swap_protected() - swap an RCU and a regular pointer + * @rcu_ptr: RCU pointer +@@ -701,10 +672,14 @@ static inline void rcu_read_unlock(void) + static inline void rcu_read_lock_bh(void) + { + local_bh_disable(); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ rcu_read_lock(); ++#else + __acquire(RCU_BH); + rcu_lock_acquire(&rcu_bh_lock_map); + RCU_LOCKDEP_WARN(!rcu_is_watching(), + "rcu_read_lock_bh() used illegally while idle"); ++#endif + } + + /* +@@ -714,10 +689,14 @@ static inline void rcu_read_lock_bh(void) + */ + static inline void rcu_read_unlock_bh(void) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ rcu_read_unlock(); ++#else + RCU_LOCKDEP_WARN(!rcu_is_watching(), + "rcu_read_unlock_bh() used illegally while idle"); + rcu_lock_release(&rcu_bh_lock_map); + __release(RCU_BH); ++#endif + local_bh_enable(); + } + +diff --git a/include/linux/rcutree.h b/include/linux/rcutree.h +index 914655848ef6..462ce061bac7 100644 +--- a/include/linux/rcutree.h ++++ b/include/linux/rcutree.h +@@ -44,7 +44,11 @@ static inline void rcu_virt_note_context_switch(int cpu) + rcu_note_context_switch(false); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define synchronize_rcu_bh synchronize_rcu ++#else + void synchronize_rcu_bh(void); ++#endif + void synchronize_sched_expedited(void); + void synchronize_rcu_expedited(void); + +@@ -72,7 +76,11 @@ static inline void synchronize_rcu_bh_expedited(void) + } + + void rcu_barrier(void); ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define rcu_barrier_bh rcu_barrier ++#else + void rcu_barrier_bh(void); ++#endif + void rcu_barrier_sched(void); + bool rcu_eqs_special_set(int cpu); + unsigned long get_state_synchronize_rcu(void); +diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h +index 6fd615a0eea9..138bd1e183e0 100644 +--- a/include/linux/rtmutex.h ++++ b/include/linux/rtmutex.h +@@ -14,11 +14,15 @@ + #define __LINUX_RT_MUTEX_H + + #include ++#include + #include +-#include + + extern int max_lock_depth; /* for sysctl */ + ++#ifdef CONFIG_DEBUG_MUTEXES ++#include ++#endif ++ + /** + * The rt_mutex structure + * +@@ -31,8 +35,8 @@ struct rt_mutex { + raw_spinlock_t wait_lock; + struct rb_root_cached waiters; + struct task_struct *owner; +-#ifdef CONFIG_DEBUG_RT_MUTEXES + int save_state; ++#ifdef CONFIG_DEBUG_RT_MUTEXES + const char *name, *file; + int line; + void *magic; +@@ -82,16 +86,23 @@ do { \ + #define __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname) + #endif + +-#define __RT_MUTEX_INITIALIZER(mutexname) \ +- { .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ ++#define __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ ++ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ + , .waiters = RB_ROOT_CACHED \ + , .owner = NULL \ + __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \ +- __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname)} ++ __DEP_MAP_RT_MUTEX_INITIALIZER(mutexname) ++ ++#define __RT_MUTEX_INITIALIZER(mutexname) \ ++ { __RT_MUTEX_INITIALIZER_PLAIN(mutexname) } + + #define DEFINE_RT_MUTEX(mutexname) \ + struct rt_mutex mutexname = __RT_MUTEX_INITIALIZER(mutexname) + ++#define __RT_MUTEX_INITIALIZER_SAVE_STATE(mutexname) \ ++ { __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ ++ , .save_state = 1 } ++ + /** + * rt_mutex_is_locked - is the mutex locked + * @lock: the mutex to be queried +@@ -115,6 +126,7 @@ extern void rt_mutex_lock(struct rt_mutex *lock); + #endif + + extern int rt_mutex_lock_interruptible(struct rt_mutex *lock); ++extern int rt_mutex_lock_killable(struct rt_mutex *lock); + extern int rt_mutex_timed_lock(struct rt_mutex *lock, + struct hrtimer_sleeper *timeout); + +diff --git a/include/linux/rwlock_rt.h b/include/linux/rwlock_rt.h +new file mode 100644 +index 000000000000..a9c4c2ac4d1f +--- /dev/null ++++ b/include/linux/rwlock_rt.h +@@ -0,0 +1,119 @@ ++#ifndef __LINUX_RWLOCK_RT_H ++#define __LINUX_RWLOCK_RT_H ++ ++#ifndef __LINUX_SPINLOCK_H ++#error Do not include directly. Use spinlock.h ++#endif ++ ++extern void __lockfunc rt_write_lock(rwlock_t *rwlock); ++extern void __lockfunc rt_read_lock(rwlock_t *rwlock); ++extern int __lockfunc rt_write_trylock(rwlock_t *rwlock); ++extern int __lockfunc rt_read_trylock(rwlock_t *rwlock); ++extern void __lockfunc rt_write_unlock(rwlock_t *rwlock); ++extern void __lockfunc rt_read_unlock(rwlock_t *rwlock); ++extern int __lockfunc rt_read_can_lock(rwlock_t *rwlock); ++extern int __lockfunc rt_write_can_lock(rwlock_t *rwlock); ++extern void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key); ++ ++#define read_can_lock(rwlock) rt_read_can_lock(rwlock) ++#define write_can_lock(rwlock) rt_write_can_lock(rwlock) ++ ++#define read_trylock(lock) __cond_lock(lock, rt_read_trylock(lock)) ++#define write_trylock(lock) __cond_lock(lock, rt_write_trylock(lock)) ++ ++static inline int __write_trylock_rt_irqsave(rwlock_t *lock, unsigned long *flags) ++{ ++ /* XXX ARCH_IRQ_ENABLED */ ++ *flags = 0; ++ return rt_write_trylock(lock); ++} ++ ++#define write_trylock_irqsave(lock, flags) \ ++ __cond_lock(lock, __write_trylock_rt_irqsave(lock, &(flags))) ++ ++#define read_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ rt_read_lock(lock); \ ++ flags = 0; \ ++ } while (0) ++ ++#define write_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ rt_write_lock(lock); \ ++ flags = 0; \ ++ } while (0) ++ ++#define read_lock(lock) rt_read_lock(lock) ++ ++#define read_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_read_lock(lock); \ ++ } while (0) ++ ++#define read_lock_irq(lock) read_lock(lock) ++ ++#define write_lock(lock) rt_write_lock(lock) ++ ++#define write_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_write_lock(lock); \ ++ } while (0) ++ ++#define write_lock_irq(lock) write_lock(lock) ++ ++#define read_unlock(lock) rt_read_unlock(lock) ++ ++#define read_unlock_bh(lock) \ ++ do { \ ++ rt_read_unlock(lock); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define read_unlock_irq(lock) read_unlock(lock) ++ ++#define write_unlock(lock) rt_write_unlock(lock) ++ ++#define write_unlock_bh(lock) \ ++ do { \ ++ rt_write_unlock(lock); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define write_unlock_irq(lock) write_unlock(lock) ++ ++#define read_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ rt_read_unlock(lock); \ ++ } while (0) ++ ++#define write_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ rt_write_unlock(lock); \ ++ } while (0) ++ ++#define rwlock_init(rwl) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ __rt_rwlock_init(rwl, #rwl, &__key); \ ++} while (0) ++ ++/* ++ * Internal functions made global for CPU pinning ++ */ ++void __read_rt_lock(struct rt_rw_lock *lock); ++int __read_rt_trylock(struct rt_rw_lock *lock); ++void __write_rt_lock(struct rt_rw_lock *lock); ++int __write_rt_trylock(struct rt_rw_lock *lock); ++void __read_rt_unlock(struct rt_rw_lock *lock); ++void __write_rt_unlock(struct rt_rw_lock *lock); ++ ++#endif +diff --git a/include/linux/rwlock_types.h b/include/linux/rwlock_types.h +index 857a72ceb794..c21683f3e14a 100644 +--- a/include/linux/rwlock_types.h ++++ b/include/linux/rwlock_types.h +@@ -1,6 +1,10 @@ + #ifndef __LINUX_RWLOCK_TYPES_H + #define __LINUX_RWLOCK_TYPES_H + ++#if !defined(__LINUX_SPINLOCK_TYPES_H) ++# error "Do not include directly, include spinlock_types.h" ++#endif ++ + /* + * include/linux/rwlock_types.h - generic rwlock type definitions + * and initializers +diff --git a/include/linux/rwlock_types_rt.h b/include/linux/rwlock_types_rt.h +new file mode 100644 +index 000000000000..546a1f8f1274 +--- /dev/null ++++ b/include/linux/rwlock_types_rt.h +@@ -0,0 +1,55 @@ ++#ifndef __LINUX_RWLOCK_TYPES_RT_H ++#define __LINUX_RWLOCK_TYPES_RT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define RW_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } ++#else ++# define RW_DEP_MAP_INIT(lockname) ++#endif ++ ++typedef struct rt_rw_lock rwlock_t; ++ ++#define __RW_LOCK_UNLOCKED(name) __RWLOCK_RT_INITIALIZER(name) ++ ++#define DEFINE_RWLOCK(name) \ ++ rwlock_t name = __RW_LOCK_UNLOCKED(name) ++ ++/* ++ * A reader biased implementation primarily for CPU pinning. ++ * ++ * Can be selected as general replacement for the single reader RT rwlock ++ * variant ++ */ ++struct rt_rw_lock { ++ struct rt_mutex rtmutex; ++ atomic_t readers; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++}; ++ ++#define READER_BIAS (1U << 31) ++#define WRITER_BIAS (1U << 30) ++ ++#define __RWLOCK_RT_INITIALIZER(name) \ ++{ \ ++ .readers = ATOMIC_INIT(READER_BIAS), \ ++ .rtmutex = __RT_MUTEX_INITIALIZER_SAVE_STATE(name.rtmutex), \ ++ RW_DEP_MAP_INIT(name) \ ++} ++ ++void __rwlock_biased_rt_init(struct rt_rw_lock *lock, const char *name, ++ struct lock_class_key *key); ++ ++#define rwlock_biased_rt_init(rwlock) \ ++ do { \ ++ static struct lock_class_key __key; \ ++ \ ++ __rwlock_biased_rt_init((rwlock), #rwlock, &__key); \ ++ } while (0) ++ ++#endif +diff --git a/include/linux/rwsem.h b/include/linux/rwsem.h +index ab93b6eae696..b1e32373f44f 100644 +--- a/include/linux/rwsem.h ++++ b/include/linux/rwsem.h +@@ -20,6 +20,10 @@ + #include + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++#include ++#else /* PREEMPT_RT_FULL */ ++ + struct rw_semaphore; + + #ifdef CONFIG_RWSEM_GENERIC_SPINLOCK +@@ -114,6 +118,13 @@ static inline int rwsem_is_contended(struct rw_semaphore *sem) + return !list_empty(&sem->wait_list); + } + ++#endif /* !PREEMPT_RT_FULL */ ++ ++/* ++ * The functions below are the same for all rwsem implementations including ++ * the RT specific variant. ++ */ ++ + /* + * lock for reading + */ +diff --git a/include/linux/rwsem_rt.h b/include/linux/rwsem_rt.h +new file mode 100644 +index 000000000000..2018ff77904a +--- /dev/null ++++ b/include/linux/rwsem_rt.h +@@ -0,0 +1,68 @@ ++#ifndef _LINUX_RWSEM_RT_H ++#define _LINUX_RWSEM_RT_H ++ ++#ifndef _LINUX_RWSEM_H ++#error "Include rwsem.h" ++#endif ++ ++#include ++#include ++ ++#define READER_BIAS (1U << 31) ++#define WRITER_BIAS (1U << 30) ++ ++struct rw_semaphore { ++ atomic_t readers; ++ struct rt_mutex rtmutex; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++}; ++ ++#define __RWSEM_INITIALIZER(name) \ ++{ \ ++ .readers = ATOMIC_INIT(READER_BIAS), \ ++ .rtmutex = __RT_MUTEX_INITIALIZER(name.rtmutex), \ ++ RW_DEP_MAP_INIT(name) \ ++} ++ ++#define DECLARE_RWSEM(lockname) \ ++ struct rw_semaphore lockname = __RWSEM_INITIALIZER(lockname) ++ ++extern void __rwsem_init(struct rw_semaphore *rwsem, const char *name, ++ struct lock_class_key *key); ++ ++#define __init_rwsem(sem, name, key) \ ++do { \ ++ rt_mutex_init(&(sem)->rtmutex); \ ++ __rwsem_init((sem), (name), (key)); \ ++} while (0) ++ ++#define init_rwsem(sem) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ __init_rwsem((sem), #sem, &__key); \ ++} while (0) ++ ++static inline int rwsem_is_locked(struct rw_semaphore *sem) ++{ ++ return atomic_read(&sem->readers) != READER_BIAS; ++} ++ ++static inline int rwsem_is_contended(struct rw_semaphore *sem) ++{ ++ return atomic_read(&sem->readers) > 0; ++} ++ ++extern void __down_read(struct rw_semaphore *sem); ++extern int __down_read_killable(struct rw_semaphore *sem); ++extern int __down_read_trylock(struct rw_semaphore *sem); ++extern void __down_write(struct rw_semaphore *sem); ++extern int __must_check __down_write_killable(struct rw_semaphore *sem); ++extern int __down_write_trylock(struct rw_semaphore *sem); ++extern void __up_read(struct rw_semaphore *sem); ++extern void __up_write(struct rw_semaphore *sem); ++extern void __downgrade_write(struct rw_semaphore *sem); ++ ++#endif +diff --git a/include/linux/sched.h b/include/linux/sched.h +index 5dc024e28397..c342fa06ab99 100644 +--- a/include/linux/sched.h ++++ b/include/linux/sched.h +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + + /* task_struct member predeclarations (sorted alphabetically): */ + struct audit_context; +@@ -101,12 +102,8 @@ struct task_group; + __TASK_TRACED | EXIT_DEAD | EXIT_ZOMBIE | \ + TASK_PARKED) + +-#define task_is_traced(task) ((task->state & __TASK_TRACED) != 0) +- + #define task_is_stopped(task) ((task->state & __TASK_STOPPED) != 0) + +-#define task_is_stopped_or_traced(task) ((task->state & (__TASK_STOPPED | __TASK_TRACED)) != 0) +- + #define task_contributes_to_load(task) ((task->state & TASK_UNINTERRUPTIBLE) != 0 && \ + (task->flags & PF_FROZEN) == 0 && \ + (task->state & TASK_NOLOAD) == 0) +@@ -134,6 +131,9 @@ struct task_group; + smp_store_mb(current->state, (state_value)); \ + } while (0) + ++#define __set_current_state_no_track(state_value) \ ++ current->state = (state_value); ++ + #define set_special_state(state_value) \ + do { \ + unsigned long flags; /* may shadow */ \ +@@ -143,6 +143,7 @@ struct task_group; + current->state = (state_value); \ + raw_spin_unlock_irqrestore(¤t->pi_lock, flags); \ + } while (0) ++ + #else + /* + * set_current_state() includes a barrier so that the write of current->state +@@ -187,6 +188,9 @@ struct task_group; + #define set_current_state(state_value) \ + smp_store_mb(current->state, (state_value)) + ++#define __set_current_state_no_track(state_value) \ ++ __set_current_state(state_value) ++ + /* + * set_special_state() should be used for those states when the blocking task + * can not use the regular condition based wait-loop. In that case we must +@@ -600,6 +604,8 @@ struct task_struct { + #endif + /* -1 unrunnable, 0 runnable, >0 stopped: */ + volatile long state; ++ /* saved state for "spinlock sleepers" */ ++ volatile long saved_state; + + /* + * This begins the randomizable portion of task_struct. Only +@@ -660,7 +666,25 @@ struct task_struct { + + unsigned int policy; + int nr_cpus_allowed; +- cpumask_t cpus_allowed; ++ const cpumask_t *cpus_ptr; ++ cpumask_t cpus_mask; ++#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++ int migrate_disable; ++ int migrate_disable_update; ++ int pinned_on_cpu; ++# ifdef CONFIG_SCHED_DEBUG ++ int migrate_disable_atomic; ++# endif ++ ++#elif !defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++# ifdef CONFIG_SCHED_DEBUG ++ int migrate_disable; ++ int migrate_disable_atomic; ++# endif ++#endif ++#ifdef CONFIG_PREEMPT_RT_FULL ++ int sleeping_lock; ++#endif + + #ifdef CONFIG_PREEMPT_RCU + int rcu_read_lock_nesting; +@@ -824,6 +848,9 @@ struct task_struct { + #ifdef CONFIG_POSIX_TIMERS + struct task_cputime cputime_expires; + struct list_head cpu_timers[3]; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct task_struct *posix_timer_list; ++#endif + #endif + + /* Process credentials: */ +@@ -868,11 +895,17 @@ struct task_struct { + /* Signal handlers: */ + struct signal_struct *signal; + struct sighand_struct *sighand; ++ struct sigqueue *sigqueue_cache; ++ + sigset_t blocked; + sigset_t real_blocked; + /* Restored if set_restore_sigmask() was used: */ + sigset_t saved_sigmask; + struct sigpending pending; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* TODO: move me into ->restart_block ? */ ++ struct siginfo forced_info; ++#endif + unsigned long sas_ss_sp; + size_t sas_ss_size; + unsigned int sas_ss_flags; +@@ -897,6 +930,7 @@ struct task_struct { + raw_spinlock_t pi_lock; + + struct wake_q_node wake_q; ++ struct wake_q_node wake_q_sleeper; + + #ifdef CONFIG_RT_MUTEXES + /* PI waiters blocked on a rt_mutex held by this task: */ +@@ -1171,8 +1205,22 @@ struct task_struct { + unsigned int sequential_io; + unsigned int sequential_io_avg; + #endif ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct rcu_head put_rcu; ++ int softirq_nestcnt; ++ unsigned int softirqs_raised; ++#endif ++#ifdef CONFIG_PREEMPT_RT_FULL ++# if defined CONFIG_HIGHMEM || defined CONFIG_X86_32 ++ int kmap_idx; ++ pte_t kmap_pte[KM_TYPE_NR]; ++# endif ++#endif + #ifdef CONFIG_DEBUG_ATOMIC_SLEEP + unsigned long task_state_change; ++#endif ++#ifdef CONFIG_PREEMPT_RT_FULL ++ int xmit_recursion; + #endif + int pagefault_disabled; + #ifdef CONFIG_MMU +@@ -1367,6 +1415,7 @@ extern struct pid *cad_pid; + /* + * Per process flags + */ ++#define PF_IN_SOFTIRQ 0x00000001 /* Task is serving softirq */ + #define PF_IDLE 0x00000002 /* I am an IDLE thread */ + #define PF_EXITING 0x00000004 /* Getting shut down */ + #define PF_EXITPIDONE 0x00000008 /* PI exit done on shut down */ +@@ -1390,7 +1439,7 @@ extern struct pid *cad_pid; + #define PF_KTHREAD 0x00200000 /* I am a kernel thread */ + #define PF_RANDOMIZE 0x00400000 /* Randomize virtual address space */ + #define PF_SWAPWRITE 0x00800000 /* Allowed to write to swap */ +-#define PF_NO_SETAFFINITY 0x04000000 /* Userland is not allowed to meddle with cpus_allowed */ ++#define PF_NO_SETAFFINITY 0x04000000 /* Userland is not allowed to meddle with cpus_mask */ + #define PF_MCE_EARLY 0x08000000 /* Early kill for mce process policy */ + #define PF_MUTEX_TESTER 0x20000000 /* Thread belongs to the rt mutex tester */ + #define PF_FREEZER_SKIP 0x40000000 /* Freezer should not count it as freezable */ +@@ -1595,6 +1644,7 @@ extern struct task_struct *find_get_task_by_vpid(pid_t nr); + + extern int wake_up_state(struct task_struct *tsk, unsigned int state); + extern int wake_up_process(struct task_struct *tsk); ++extern int wake_up_lock_sleeper(struct task_struct *tsk); + extern void wake_up_new_task(struct task_struct *tsk); + + #ifdef CONFIG_SMP +@@ -1677,6 +1727,89 @@ static inline int test_tsk_need_resched(struct task_struct *tsk) + return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED)); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++static inline void set_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ set_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline void clear_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ clear_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline int test_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY)); ++} ++ ++static inline int need_resched_lazy(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline int need_resched_now(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED); ++} ++ ++#else ++static inline void clear_tsk_need_resched_lazy(struct task_struct *tsk) { } ++static inline int need_resched_lazy(void) { return 0; } ++ ++static inline int need_resched_now(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED); ++} ++ ++#endif ++ ++ ++static inline bool __task_is_stopped_or_traced(struct task_struct *task) ++{ ++ if (task->state & (__TASK_STOPPED | __TASK_TRACED)) ++ return true; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (task->saved_state & (__TASK_STOPPED | __TASK_TRACED)) ++ return true; ++#endif ++ return false; ++} ++ ++static inline bool task_is_stopped_or_traced(struct task_struct *task) ++{ ++ bool traced_stopped; ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&task->pi_lock, flags); ++ traced_stopped = __task_is_stopped_or_traced(task); ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); ++#else ++ traced_stopped = __task_is_stopped_or_traced(task); ++#endif ++ return traced_stopped; ++} ++ ++static inline bool task_is_traced(struct task_struct *task) ++{ ++ bool traced = false; ++ ++ if (task->state & __TASK_TRACED) ++ return true; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* in case the task is sleeping on tasklist_lock */ ++ raw_spin_lock_irq(&task->pi_lock); ++ if (task->state & __TASK_TRACED) ++ traced = true; ++ else if (task->saved_state & __TASK_TRACED) ++ traced = true; ++ raw_spin_unlock_irq(&task->pi_lock); ++#endif ++ return traced; ++} ++ + /* + * cond_resched() and cond_resched_lock(): latency reduction via + * explicit rescheduling in places that are safe. The return +@@ -1729,6 +1862,23 @@ static __always_inline bool need_resched(void) + return unlikely(tif_need_resched()); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static inline void sleeping_lock_inc(void) ++{ ++ current->sleeping_lock++; ++} ++ ++static inline void sleeping_lock_dec(void) ++{ ++ current->sleeping_lock--; ++} ++ ++#else ++ ++static inline void sleeping_lock_inc(void) { } ++static inline void sleeping_lock_dec(void) { } ++#endif ++ + /* + * Wrappers for p->thread_info->cpu access. No-op on UP. + */ +diff --git a/include/linux/sched/mm.h b/include/linux/sched/mm.h +index 0d10b7ce0da7..b6758c6fffbf 100644 +--- a/include/linux/sched/mm.h ++++ b/include/linux/sched/mm.h +@@ -49,6 +49,17 @@ static inline void mmdrop(struct mm_struct *mm) + __mmdrop(mm); + } + ++#ifdef CONFIG_PREEMPT_RT_BASE ++extern void __mmdrop_delayed(struct rcu_head *rhp); ++static inline void mmdrop_delayed(struct mm_struct *mm) ++{ ++ if (atomic_dec_and_test(&mm->mm_count)) ++ call_rcu(&mm->delayed_drop, __mmdrop_delayed); ++} ++#else ++# define mmdrop_delayed(mm) mmdrop(mm) ++#endif ++ + /* + * This has to be called after a get_task_mm()/mmget_not_zero() + * followed by taking the mmap_sem for writing before modifying the +diff --git a/include/linux/sched/task.h b/include/linux/sched/task.h +index 108ede99e533..bb98c5b43f81 100644 +--- a/include/linux/sched/task.h ++++ b/include/linux/sched/task.h +@@ -88,6 +88,15 @@ extern void sched_exec(void); + + #define get_task_struct(tsk) do { atomic_inc(&(tsk)->usage); } while(0) + ++#ifdef CONFIG_PREEMPT_RT_BASE ++extern void __put_task_struct_cb(struct rcu_head *rhp); ++ ++static inline void put_task_struct(struct task_struct *t) ++{ ++ if (atomic_dec_and_test(&t->usage)) ++ call_rcu(&t->put_rcu, __put_task_struct_cb); ++} ++#else + extern void __put_task_struct(struct task_struct *t); + + static inline void put_task_struct(struct task_struct *t) +@@ -95,7 +104,7 @@ static inline void put_task_struct(struct task_struct *t) + if (atomic_dec_and_test(&t->usage)) + __put_task_struct(t); + } +- ++#endif + struct task_struct *task_rcu_dereference(struct task_struct **ptask); + + #ifdef CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT +diff --git a/include/linux/sched/wake_q.h b/include/linux/sched/wake_q.h +index 10b19a192b2d..ce3ccff3d9d8 100644 +--- a/include/linux/sched/wake_q.h ++++ b/include/linux/sched/wake_q.h +@@ -47,8 +47,29 @@ static inline void wake_q_init(struct wake_q_head *head) + head->lastp = &head->first; + } + +-extern void wake_q_add(struct wake_q_head *head, +- struct task_struct *task); +-extern void wake_up_q(struct wake_q_head *head); ++extern void __wake_q_add(struct wake_q_head *head, ++ struct task_struct *task, bool sleeper); ++static inline void wake_q_add(struct wake_q_head *head, ++ struct task_struct *task) ++{ ++ __wake_q_add(head, task, false); ++} ++ ++static inline void wake_q_add_sleeper(struct wake_q_head *head, ++ struct task_struct *task) ++{ ++ __wake_q_add(head, task, true); ++} ++ ++extern void __wake_up_q(struct wake_q_head *head, bool sleeper); ++static inline void wake_up_q(struct wake_q_head *head) ++{ ++ __wake_up_q(head, false); ++} ++ ++static inline void wake_up_q_sleeper(struct wake_q_head *head) ++{ ++ __wake_up_q(head, true); ++} + + #endif /* _LINUX_SCHED_WAKE_Q_H */ +diff --git a/include/linux/seqlock.h b/include/linux/seqlock.h +index bcf4cf26b8c8..58f9909d6659 100644 +--- a/include/linux/seqlock.h ++++ b/include/linux/seqlock.h +@@ -221,20 +221,30 @@ static inline int read_seqcount_retry(const seqcount_t *s, unsigned start) + return __read_seqcount_retry(s, start); + } + +- +- +-static inline void raw_write_seqcount_begin(seqcount_t *s) ++static inline void __raw_write_seqcount_begin(seqcount_t *s) + { + s->sequence++; + smp_wmb(); + } + +-static inline void raw_write_seqcount_end(seqcount_t *s) ++static inline void raw_write_seqcount_begin(seqcount_t *s) ++{ ++ preempt_disable_rt(); ++ __raw_write_seqcount_begin(s); ++} ++ ++static inline void __raw_write_seqcount_end(seqcount_t *s) + { + smp_wmb(); + s->sequence++; + } + ++static inline void raw_write_seqcount_end(seqcount_t *s) ++{ ++ __raw_write_seqcount_end(s); ++ preempt_enable_rt(); ++} ++ + /** + * raw_write_seqcount_barrier - do a seq write barrier + * @s: pointer to seqcount_t +@@ -428,10 +438,33 @@ typedef struct { + /* + * Read side functions for starting and finalizing a read side section. + */ ++#ifndef CONFIG_PREEMPT_RT_FULL + static inline unsigned read_seqbegin(const seqlock_t *sl) + { + return read_seqcount_begin(&sl->seqcount); + } ++#else ++/* ++ * Starvation safe read side for RT ++ */ ++static inline unsigned read_seqbegin(seqlock_t *sl) ++{ ++ unsigned ret; ++ ++repeat: ++ ret = READ_ONCE(sl->seqcount.sequence); ++ if (unlikely(ret & 1)) { ++ /* ++ * Take the lock and let the writer proceed (i.e. evtl ++ * boost it), otherwise we could loop here forever. ++ */ ++ spin_unlock_wait(&sl->lock); ++ goto repeat; ++ } ++ smp_rmb(); ++ return ret; ++} ++#endif + + static inline unsigned read_seqretry(const seqlock_t *sl, unsigned start) + { +@@ -446,36 +479,45 @@ static inline unsigned read_seqretry(const seqlock_t *sl, unsigned start) + static inline void write_seqlock(seqlock_t *sl) + { + spin_lock(&sl->lock); +- write_seqcount_begin(&sl->seqcount); ++ __raw_write_seqcount_begin(&sl->seqcount); ++} ++ ++static inline int try_write_seqlock(seqlock_t *sl) ++{ ++ if (spin_trylock(&sl->lock)) { ++ __raw_write_seqcount_begin(&sl->seqcount); ++ return 1; ++ } ++ return 0; + } + + static inline void write_sequnlock(seqlock_t *sl) + { +- write_seqcount_end(&sl->seqcount); ++ __raw_write_seqcount_end(&sl->seqcount); + spin_unlock(&sl->lock); + } + + static inline void write_seqlock_bh(seqlock_t *sl) + { + spin_lock_bh(&sl->lock); +- write_seqcount_begin(&sl->seqcount); ++ __raw_write_seqcount_begin(&sl->seqcount); + } + + static inline void write_sequnlock_bh(seqlock_t *sl) + { +- write_seqcount_end(&sl->seqcount); ++ __raw_write_seqcount_end(&sl->seqcount); + spin_unlock_bh(&sl->lock); + } + + static inline void write_seqlock_irq(seqlock_t *sl) + { + spin_lock_irq(&sl->lock); +- write_seqcount_begin(&sl->seqcount); ++ __raw_write_seqcount_begin(&sl->seqcount); + } + + static inline void write_sequnlock_irq(seqlock_t *sl) + { +- write_seqcount_end(&sl->seqcount); ++ __raw_write_seqcount_end(&sl->seqcount); + spin_unlock_irq(&sl->lock); + } + +@@ -484,7 +526,7 @@ static inline unsigned long __write_seqlock_irqsave(seqlock_t *sl) + unsigned long flags; + + spin_lock_irqsave(&sl->lock, flags); +- write_seqcount_begin(&sl->seqcount); ++ __raw_write_seqcount_begin(&sl->seqcount); + return flags; + } + +@@ -494,7 +536,7 @@ static inline unsigned long __write_seqlock_irqsave(seqlock_t *sl) + static inline void + write_sequnlock_irqrestore(seqlock_t *sl, unsigned long flags) + { +- write_seqcount_end(&sl->seqcount); ++ __raw_write_seqcount_end(&sl->seqcount); + spin_unlock_irqrestore(&sl->lock, flags); + } + +diff --git a/include/linux/signal.h b/include/linux/signal.h +index e4d01469ed60..746dd5d28c54 100644 +--- a/include/linux/signal.h ++++ b/include/linux/signal.h +@@ -245,6 +245,7 @@ static inline void init_sigpending(struct sigpending *sig) + } + + extern void flush_sigqueue(struct sigpending *queue); ++extern void flush_task_sigqueue(struct task_struct *tsk); + + /* Test if 'sig' is valid signal. Use this instead of testing _NSIG directly */ + static inline int valid_signal(unsigned long sig) +diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h +index 6ec522ab71e5..d3a73c8f0723 100644 +--- a/include/linux/skbuff.h ++++ b/include/linux/skbuff.h +@@ -287,6 +287,7 @@ struct sk_buff_head { + + __u32 qlen; + spinlock_t lock; ++ raw_spinlock_t raw_lock; + }; + + struct sk_buff; +@@ -1737,6 +1738,12 @@ static inline void skb_queue_head_init(struct sk_buff_head *list) + __skb_queue_head_init(list); + } + ++static inline void skb_queue_head_init_raw(struct sk_buff_head *list) ++{ ++ raw_spin_lock_init(&list->raw_lock); ++ __skb_queue_head_init(list); ++} ++ + static inline void skb_queue_head_init_class(struct sk_buff_head *list, + struct lock_class_key *class) + { +diff --git a/include/linux/smp.h b/include/linux/smp.h +index 9fb239e12b82..5801e516ba63 100644 +--- a/include/linux/smp.h ++++ b/include/linux/smp.h +@@ -202,6 +202,9 @@ static inline int get_boot_cpu_id(void) + #define get_cpu() ({ preempt_disable(); smp_processor_id(); }) + #define put_cpu() preempt_enable() + ++#define get_cpu_light() ({ migrate_disable(); smp_processor_id(); }) ++#define put_cpu_light() migrate_enable() ++ + /* + * Callback to arch code if there's nosmp or maxcpus=0 on the + * boot command line: +diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h +index e089157dcf97..5f5ad0630a26 100644 +--- a/include/linux/spinlock.h ++++ b/include/linux/spinlock.h +@@ -298,7 +298,11 @@ static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock) + }) + + /* Include rwlock functions */ +-#include ++#ifdef CONFIG_PREEMPT_RT_FULL ++# include ++#else ++# include ++#endif + + /* + * Pull the _spin_*()/_read_*()/_write_*() functions/declarations: +@@ -309,6 +313,10 @@ static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock) + # include + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++# include ++#else /* PREEMPT_RT_FULL */ ++ + /* + * Map the spin_lock functions to the raw variants for PREEMPT_RT=n + */ +@@ -429,6 +437,8 @@ static __always_inline int spin_is_contended(spinlock_t *lock) + + #define assert_spin_locked(lock) assert_raw_spin_locked(&(lock)->rlock) + ++#endif /* !PREEMPT_RT_FULL */ ++ + /* + * Pull the atomic_t declaration: + * (asm-mips/atomic.h needs above definitions) +diff --git a/include/linux/spinlock_api_smp.h b/include/linux/spinlock_api_smp.h +index 42dfab89e740..29d99ae5a8ab 100644 +--- a/include/linux/spinlock_api_smp.h ++++ b/include/linux/spinlock_api_smp.h +@@ -187,6 +187,8 @@ static inline int __raw_spin_trylock_bh(raw_spinlock_t *lock) + return 0; + } + +-#include ++#ifndef CONFIG_PREEMPT_RT_FULL ++# include ++#endif + + #endif /* __LINUX_SPINLOCK_API_SMP_H */ +diff --git a/include/linux/spinlock_rt.h b/include/linux/spinlock_rt.h +new file mode 100644 +index 000000000000..3696a77fa77d +--- /dev/null ++++ b/include/linux/spinlock_rt.h +@@ -0,0 +1,156 @@ ++#ifndef __LINUX_SPINLOCK_RT_H ++#define __LINUX_SPINLOCK_RT_H ++ ++#ifndef __LINUX_SPINLOCK_H ++#error Do not include directly. Use spinlock.h ++#endif ++ ++#include ++ ++extern void ++__rt_spin_lock_init(spinlock_t *lock, const char *name, struct lock_class_key *key); ++ ++#define spin_lock_init(slock) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ rt_mutex_init(&(slock)->lock); \ ++ __rt_spin_lock_init(slock, #slock, &__key); \ ++} while (0) ++ ++extern void __lockfunc rt_spin_lock(spinlock_t *lock); ++extern unsigned long __lockfunc rt_spin_lock_trace_flags(spinlock_t *lock); ++extern void __lockfunc rt_spin_lock_nested(spinlock_t *lock, int subclass); ++extern void __lockfunc rt_spin_unlock(spinlock_t *lock); ++extern void __lockfunc rt_spin_unlock_wait(spinlock_t *lock); ++extern int __lockfunc rt_spin_trylock_irqsave(spinlock_t *lock, unsigned long *flags); ++extern int __lockfunc rt_spin_trylock_bh(spinlock_t *lock); ++extern int __lockfunc rt_spin_trylock(spinlock_t *lock); ++extern int atomic_dec_and_spin_lock(atomic_t *atomic, spinlock_t *lock); ++ ++/* ++ * lockdep-less calls, for derived types like rwlock: ++ * (for trylock they can use rt_mutex_trylock() directly. ++ * Migrate disable handling must be done at the call site. ++ */ ++extern void __lockfunc __rt_spin_lock(struct rt_mutex *lock); ++extern void __lockfunc __rt_spin_trylock(struct rt_mutex *lock); ++extern void __lockfunc __rt_spin_unlock(struct rt_mutex *lock); ++ ++#define spin_lock(lock) rt_spin_lock(lock) ++ ++#define spin_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_spin_lock(lock); \ ++ } while (0) ++ ++#define spin_lock_irq(lock) spin_lock(lock) ++ ++#define spin_do_trylock(lock) __cond_lock(lock, rt_spin_trylock(lock)) ++ ++#define spin_trylock(lock) \ ++({ \ ++ int __locked; \ ++ __locked = spin_do_trylock(lock); \ ++ __locked; \ ++}) ++ ++#ifdef CONFIG_LOCKDEP ++# define spin_lock_nested(lock, subclass) \ ++ do { \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++ ++#define spin_lock_bh_nested(lock, subclass) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++ ++# define spin_lock_irqsave_nested(lock, flags, subclass) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++#else ++# define spin_lock_nested(lock, subclass) spin_lock(lock) ++# define spin_lock_bh_nested(lock, subclass) spin_lock_bh(lock) ++ ++# define spin_lock_irqsave_nested(lock, flags, subclass) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ spin_lock(lock); \ ++ } while (0) ++#endif ++ ++#define spin_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ spin_lock(lock); \ ++ } while (0) ++ ++static inline unsigned long spin_lock_trace_flags(spinlock_t *lock) ++{ ++ unsigned long flags = 0; ++#ifdef CONFIG_TRACE_IRQFLAGS ++ flags = rt_spin_lock_trace_flags(lock); ++#else ++ spin_lock(lock); /* lock_local */ ++#endif ++ return flags; ++} ++ ++/* FIXME: we need rt_spin_lock_nest_lock */ ++#define spin_lock_nest_lock(lock, nest_lock) spin_lock_nested(lock, 0) ++ ++#define spin_unlock(lock) rt_spin_unlock(lock) ++ ++#define spin_unlock_bh(lock) \ ++ do { \ ++ rt_spin_unlock(lock); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define spin_unlock_irq(lock) spin_unlock(lock) ++ ++#define spin_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ spin_unlock(lock); \ ++ } while (0) ++ ++#define spin_trylock_bh(lock) __cond_lock(lock, rt_spin_trylock_bh(lock)) ++#define spin_trylock_irq(lock) spin_trylock(lock) ++ ++#define spin_trylock_irqsave(lock, flags) \ ++ rt_spin_trylock_irqsave(lock, &(flags)) ++ ++#define spin_unlock_wait(lock) rt_spin_unlock_wait(lock) ++ ++#ifdef CONFIG_GENERIC_LOCKBREAK ++# define spin_is_contended(lock) ((lock)->break_lock) ++#else ++# define spin_is_contended(lock) (((void)(lock), 0)) ++#endif ++ ++static inline int spin_can_lock(spinlock_t *lock) ++{ ++ return !rt_mutex_is_locked(&lock->lock); ++} ++ ++static inline int spin_is_locked(spinlock_t *lock) ++{ ++ return rt_mutex_is_locked(&lock->lock); ++} ++ ++static inline void assert_spin_locked(spinlock_t *lock) ++{ ++ BUG_ON(!spin_is_locked(lock)); ++} ++ ++#endif +diff --git a/include/linux/spinlock_types.h b/include/linux/spinlock_types.h +index 24b4e6f2c1a2..10bac715ea96 100644 +--- a/include/linux/spinlock_types.h ++++ b/include/linux/spinlock_types.h +@@ -9,77 +9,15 @@ + * Released under the General Public License (GPL). + */ + +-#if defined(CONFIG_SMP) +-# include +-#else +-# include +-#endif +- +-#include +- +-typedef struct raw_spinlock { +- arch_spinlock_t raw_lock; +-#ifdef CONFIG_DEBUG_SPINLOCK +- unsigned int magic, owner_cpu; +- void *owner; +-#endif +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +- struct lockdep_map dep_map; +-#endif +-} raw_spinlock_t; +- +-#define SPINLOCK_MAGIC 0xdead4ead +- +-#define SPINLOCK_OWNER_INIT ((void *)-1L) +- +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define SPIN_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } +-#else +-# define SPIN_DEP_MAP_INIT(lockname) +-#endif ++#include + +-#ifdef CONFIG_DEBUG_SPINLOCK +-# define SPIN_DEBUG_INIT(lockname) \ +- .magic = SPINLOCK_MAGIC, \ +- .owner_cpu = -1, \ +- .owner = SPINLOCK_OWNER_INIT, ++#ifndef CONFIG_PREEMPT_RT_FULL ++# include ++# include + #else +-# define SPIN_DEBUG_INIT(lockname) ++# include ++# include ++# include + #endif + +-#define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ +- { \ +- .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ +- SPIN_DEBUG_INIT(lockname) \ +- SPIN_DEP_MAP_INIT(lockname) } +- +-#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ +- (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) +- +-#define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) +- +-typedef struct spinlock { +- union { +- struct raw_spinlock rlock; +- +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map)) +- struct { +- u8 __padding[LOCK_PADSIZE]; +- struct lockdep_map dep_map; +- }; +-#endif +- }; +-} spinlock_t; +- +-#define __SPIN_LOCK_INITIALIZER(lockname) \ +- { { .rlock = __RAW_SPIN_LOCK_INITIALIZER(lockname) } } +- +-#define __SPIN_LOCK_UNLOCKED(lockname) \ +- (spinlock_t ) __SPIN_LOCK_INITIALIZER(lockname) +- +-#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) +- +-#include +- + #endif /* __LINUX_SPINLOCK_TYPES_H */ +diff --git a/include/linux/spinlock_types_nort.h b/include/linux/spinlock_types_nort.h +new file mode 100644 +index 000000000000..f1dac1fb1d6a +--- /dev/null ++++ b/include/linux/spinlock_types_nort.h +@@ -0,0 +1,33 @@ ++#ifndef __LINUX_SPINLOCK_TYPES_NORT_H ++#define __LINUX_SPINLOCK_TYPES_NORT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++/* ++ * The non RT version maps spinlocks to raw_spinlocks ++ */ ++typedef struct spinlock { ++ union { ++ struct raw_spinlock rlock; ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map)) ++ struct { ++ u8 __padding[LOCK_PADSIZE]; ++ struct lockdep_map dep_map; ++ }; ++#endif ++ }; ++} spinlock_t; ++ ++#define __SPIN_LOCK_INITIALIZER(lockname) \ ++ { { .rlock = __RAW_SPIN_LOCK_INITIALIZER(lockname) } } ++ ++#define __SPIN_LOCK_UNLOCKED(lockname) \ ++ (spinlock_t ) __SPIN_LOCK_INITIALIZER(lockname) ++ ++#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) ++ ++#endif +diff --git a/include/linux/spinlock_types_raw.h b/include/linux/spinlock_types_raw.h +new file mode 100644 +index 000000000000..822bf64a61d3 +--- /dev/null ++++ b/include/linux/spinlock_types_raw.h +@@ -0,0 +1,55 @@ ++#ifndef __LINUX_SPINLOCK_TYPES_RAW_H ++#define __LINUX_SPINLOCK_TYPES_RAW_H ++ ++#include ++ ++#if defined(CONFIG_SMP) ++# include ++#else ++# include ++#endif ++ ++#include ++ ++typedef struct raw_spinlock { ++ arch_spinlock_t raw_lock; ++#ifdef CONFIG_DEBUG_SPINLOCK ++ unsigned int magic, owner_cpu; ++ void *owner; ++#endif ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++} raw_spinlock_t; ++ ++#define SPINLOCK_MAGIC 0xdead4ead ++ ++#define SPINLOCK_OWNER_INIT ((void *)-1L) ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define SPIN_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } ++#else ++# define SPIN_DEP_MAP_INIT(lockname) ++#endif ++ ++#ifdef CONFIG_DEBUG_SPINLOCK ++# define SPIN_DEBUG_INIT(lockname) \ ++ .magic = SPINLOCK_MAGIC, \ ++ .owner_cpu = -1, \ ++ .owner = SPINLOCK_OWNER_INIT, ++#else ++# define SPIN_DEBUG_INIT(lockname) ++#endif ++ ++#define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ ++ { \ ++ .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ ++ SPIN_DEBUG_INIT(lockname) \ ++ SPIN_DEP_MAP_INIT(lockname) } ++ ++#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ ++ (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) ++ ++#define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) ++ ++#endif +diff --git a/include/linux/spinlock_types_rt.h b/include/linux/spinlock_types_rt.h +new file mode 100644 +index 000000000000..3e3d8c5f7a9a +--- /dev/null ++++ b/include/linux/spinlock_types_rt.h +@@ -0,0 +1,48 @@ ++#ifndef __LINUX_SPINLOCK_TYPES_RT_H ++#define __LINUX_SPINLOCK_TYPES_RT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++#include ++ ++/* ++ * PREEMPT_RT: spinlocks - an RT mutex plus lock-break field: ++ */ ++typedef struct spinlock { ++ struct rt_mutex lock; ++ unsigned int break_lock; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++} spinlock_t; ++ ++#ifdef CONFIG_DEBUG_RT_MUTEXES ++# define __RT_SPIN_INITIALIZER(name) \ ++ { \ ++ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ ++ .save_state = 1, \ ++ .file = __FILE__, \ ++ .line = __LINE__ , \ ++ } ++#else ++# define __RT_SPIN_INITIALIZER(name) \ ++ { \ ++ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ ++ .save_state = 1, \ ++ } ++#endif ++ ++/* ++.wait_list = PLIST_HEAD_INIT_RAW((name).lock.wait_list, (name).lock.wait_lock) ++*/ ++ ++#define __SPIN_LOCK_UNLOCKED(name) \ ++ { .lock = __RT_SPIN_INITIALIZER(name.lock), \ ++ SPIN_DEP_MAP_INIT(name) } ++ ++#define DEFINE_SPINLOCK(name) \ ++ spinlock_t name = __SPIN_LOCK_UNLOCKED(name) ++ ++#endif +diff --git a/include/linux/spinlock_types_up.h b/include/linux/spinlock_types_up.h +index c09b6407ae1b..b0243ba07fb7 100644 +--- a/include/linux/spinlock_types_up.h ++++ b/include/linux/spinlock_types_up.h +@@ -1,10 +1,6 @@ + #ifndef __LINUX_SPINLOCK_TYPES_UP_H + #define __LINUX_SPINLOCK_TYPES_UP_H + +-#ifndef __LINUX_SPINLOCK_TYPES_H +-# error "please don't include this file directly" +-#endif +- + /* + * include/linux/spinlock_types_up.h - spinlock type definitions for UP + * +diff --git a/include/linux/suspend.h b/include/linux/suspend.h +index 3f529ad9a9d2..328439ce71f5 100644 +--- a/include/linux/suspend.h ++++ b/include/linux/suspend.h +@@ -196,6 +196,12 @@ struct platform_s2idle_ops { + void (*end)(void); + }; + ++#if defined(CONFIG_SUSPEND) || defined(CONFIG_HIBERNATION) ++extern bool pm_in_action; ++#else ++# define pm_in_action false ++#endif ++ + #ifdef CONFIG_SUSPEND + extern suspend_state_t mem_sleep_current; + extern suspend_state_t mem_sleep_default; +diff --git a/include/linux/swait.h b/include/linux/swait.h +index 73e06e9986d4..f426a0661aa0 100644 +--- a/include/linux/swait.h ++++ b/include/linux/swait.h +@@ -160,7 +160,9 @@ static inline bool swq_has_sleeper(struct swait_queue_head *wq) + extern void swake_up_one(struct swait_queue_head *q); + extern void swake_up_all(struct swait_queue_head *q); + extern void swake_up_locked(struct swait_queue_head *q); ++extern void swake_up_all_locked(struct swait_queue_head *q); + ++extern void __prepare_to_swait(struct swait_queue_head *q, struct swait_queue *wait); + extern void prepare_to_swait_exclusive(struct swait_queue_head *q, struct swait_queue *wait, int state); + extern long prepare_to_swait_event(struct swait_queue_head *q, struct swait_queue *wait, int state); + +diff --git a/include/linux/swap.h b/include/linux/swap.h +index 7bd0a6f2ac2b..e643672fa802 100644 +--- a/include/linux/swap.h ++++ b/include/linux/swap.h +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + + struct notifier_block; +@@ -331,6 +332,7 @@ extern unsigned long nr_free_pagecache_pages(void); + + + /* linux/mm/swap.c */ ++DECLARE_LOCAL_IRQ_LOCK(swapvec_lock); + extern void lru_cache_add(struct page *); + extern void lru_cache_add_anon(struct page *page); + extern void lru_cache_add_file(struct page *page); +diff --git a/include/linux/swork.h b/include/linux/swork.h +new file mode 100644 +index 000000000000..f175fa9a6016 +--- /dev/null ++++ b/include/linux/swork.h +@@ -0,0 +1,24 @@ ++#ifndef _LINUX_SWORK_H ++#define _LINUX_SWORK_H ++ ++#include ++ ++struct swork_event { ++ struct list_head item; ++ unsigned long flags; ++ void (*func)(struct swork_event *); ++}; ++ ++static inline void INIT_SWORK(struct swork_event *event, ++ void (*func)(struct swork_event *)) ++{ ++ event->flags = 0; ++ event->func = func; ++} ++ ++bool swork_queue(struct swork_event *sev); ++ ++int swork_get(void); ++void swork_put(void); ++ ++#endif /* _LINUX_SWORK_H */ +diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h +index 8d8821b3689a..d3fcab20d2a3 100644 +--- a/include/linux/thread_info.h ++++ b/include/linux/thread_info.h +@@ -97,7 +97,17 @@ static inline int test_ti_thread_flag(struct thread_info *ti, int flag) + #define test_thread_flag(flag) \ + test_ti_thread_flag(current_thread_info(), flag) + +-#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) ++#ifdef CONFIG_PREEMPT_LAZY ++#define tif_need_resched() (test_thread_flag(TIF_NEED_RESCHED) || \ ++ test_thread_flag(TIF_NEED_RESCHED_LAZY)) ++#define tif_need_resched_now() (test_thread_flag(TIF_NEED_RESCHED)) ++#define tif_need_resched_lazy() test_thread_flag(TIF_NEED_RESCHED_LAZY)) ++ ++#else ++#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) ++#define tif_need_resched_now() test_thread_flag(TIF_NEED_RESCHED) ++#define tif_need_resched_lazy() 0 ++#endif + + #ifndef CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES + static inline int arch_within_stack_frames(const void * const stack, +diff --git a/include/linux/timer.h b/include/linux/timer.h +index 7b066fd38248..54627d046b3a 100644 +--- a/include/linux/timer.h ++++ b/include/linux/timer.h +@@ -172,7 +172,7 @@ extern void add_timer(struct timer_list *timer); + + extern int try_to_del_timer_sync(struct timer_list *timer); + +-#ifdef CONFIG_SMP ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) + extern int del_timer_sync(struct timer_list *timer); + #else + # define del_timer_sync(t) del_timer(t) +diff --git a/include/linux/trace_events.h b/include/linux/trace_events.h +index 78a010e19ed4..c20237c5ab66 100644 +--- a/include/linux/trace_events.h ++++ b/include/linux/trace_events.h +@@ -62,6 +62,9 @@ struct trace_entry { + unsigned char flags; + unsigned char preempt_count; + int pid; ++ unsigned short migrate_disable; ++ unsigned short padding; ++ unsigned char preempt_lazy_count; + }; + + #define TRACE_EVENT_TYPE_MAX \ +diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h +index efe79c1cdd47..128a8489047d 100644 +--- a/include/linux/uaccess.h ++++ b/include/linux/uaccess.h +@@ -185,6 +185,7 @@ static __always_inline void pagefault_disabled_dec(void) + */ + static inline void pagefault_disable(void) + { ++ migrate_disable(); + pagefault_disabled_inc(); + /* + * make sure to have issued the store before a pagefault +@@ -201,6 +202,7 @@ static inline void pagefault_enable(void) + */ + barrier(); + pagefault_disabled_dec(); ++ migrate_enable(); + } + + /* +diff --git a/include/linux/vmstat.h b/include/linux/vmstat.h +index f25cef84b41d..febee8649220 100644 +--- a/include/linux/vmstat.h ++++ b/include/linux/vmstat.h +@@ -54,7 +54,9 @@ DECLARE_PER_CPU(struct vm_event_state, vm_event_states); + */ + static inline void __count_vm_event(enum vm_event_item item) + { ++ preempt_disable_rt(); + raw_cpu_inc(vm_event_states.event[item]); ++ preempt_enable_rt(); + } + + static inline void count_vm_event(enum vm_event_item item) +@@ -64,7 +66,9 @@ static inline void count_vm_event(enum vm_event_item item) + + static inline void __count_vm_events(enum vm_event_item item, long delta) + { ++ preempt_disable_rt(); + raw_cpu_add(vm_event_states.event[item], delta); ++ preempt_enable_rt(); + } + + static inline void count_vm_events(enum vm_event_item item, long delta) +diff --git a/include/linux/wait.h b/include/linux/wait.h +index ed7c122cb31f..94bd2e841de6 100644 +--- a/include/linux/wait.h ++++ b/include/linux/wait.h +@@ -10,6 +10,7 @@ + + #include + #include ++#include + + typedef struct wait_queue_entry wait_queue_entry_t; + +@@ -488,8 +489,8 @@ do { \ + int __ret = 0; \ + struct hrtimer_sleeper __t; \ + \ +- hrtimer_init_on_stack(&__t.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); \ +- hrtimer_init_sleeper(&__t, current); \ ++ hrtimer_init_sleeper_on_stack(&__t, CLOCK_MONOTONIC, HRTIMER_MODE_REL, \ ++ current); \ + if ((timeout) != KTIME_MAX) \ + hrtimer_start_range_ns(&__t.timer, timeout, \ + current->timer_slack_ns, \ +diff --git a/include/net/gen_stats.h b/include/net/gen_stats.h +index 883bb9085f15..3b593cdeb9af 100644 +--- a/include/net/gen_stats.h ++++ b/include/net/gen_stats.h +@@ -6,6 +6,7 @@ + #include + #include + #include ++#include + + struct gnet_stats_basic_cpu { + struct gnet_stats_basic_packed bstats; +@@ -36,11 +37,11 @@ int gnet_stats_start_copy_compat(struct sk_buff *skb, int type, + spinlock_t *lock, struct gnet_dump *d, + int padattr); + +-int gnet_stats_copy_basic(const seqcount_t *running, ++int gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_dump *d, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b); +-void __gnet_stats_copy_basic(const seqcount_t *running, ++void __gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b); +@@ -60,13 +61,13 @@ int gen_new_estimator(struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu_bstats, + struct net_rate_estimator __rcu **rate_est, + spinlock_t *lock, +- seqcount_t *running, struct nlattr *opt); ++ net_seqlock_t *running, struct nlattr *opt); + void gen_kill_estimator(struct net_rate_estimator __rcu **ptr); + int gen_replace_estimator(struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu_bstats, + struct net_rate_estimator __rcu **ptr, + spinlock_t *lock, +- seqcount_t *running, struct nlattr *opt); ++ net_seqlock_t *running, struct nlattr *opt); + bool gen_estimator_active(struct net_rate_estimator __rcu **ptr); + bool gen_estimator_read(struct net_rate_estimator __rcu **ptr, + struct gnet_stats_rate_est64 *sample); +diff --git a/include/net/neighbour.h b/include/net/neighbour.h +index beeeed126872..6dd1765e22ec 100644 +--- a/include/net/neighbour.h ++++ b/include/net/neighbour.h +@@ -451,7 +451,7 @@ static inline int neigh_hh_bridge(struct hh_cache *hh, struct sk_buff *skb) + } + #endif + +-static inline int neigh_hh_output(const struct hh_cache *hh, struct sk_buff *skb) ++static inline int neigh_hh_output(struct hh_cache *hh, struct sk_buff *skb) + { + unsigned int hh_alen = 0; + unsigned int seq; +@@ -493,7 +493,7 @@ static inline int neigh_hh_output(const struct hh_cache *hh, struct sk_buff *skb + + static inline int neigh_output(struct neighbour *n, struct sk_buff *skb) + { +- const struct hh_cache *hh = &n->hh; ++ struct hh_cache *hh = &n->hh; + + if ((n->nud_state & NUD_CONNECTED) && hh->hh_len) + return neigh_hh_output(hh, skb); +@@ -534,7 +534,7 @@ struct neighbour_cb { + + #define NEIGH_CB(skb) ((struct neighbour_cb *)(skb)->cb) + +-static inline void neigh_ha_snapshot(char *dst, const struct neighbour *n, ++static inline void neigh_ha_snapshot(char *dst, struct neighbour *n, + const struct net_device *dev) + { + unsigned int seq; +diff --git a/include/net/net_seq_lock.h b/include/net/net_seq_lock.h +new file mode 100644 +index 000000000000..a7034298a82a +--- /dev/null ++++ b/include/net/net_seq_lock.h +@@ -0,0 +1,15 @@ ++#ifndef __NET_NET_SEQ_LOCK_H__ ++#define __NET_NET_SEQ_LOCK_H__ ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++# define net_seqlock_t seqlock_t ++# define net_seq_begin(__r) read_seqbegin(__r) ++# define net_seq_retry(__r, __s) read_seqretry(__r, __s) ++ ++#else ++# define net_seqlock_t seqcount_t ++# define net_seq_begin(__r) read_seqcount_begin(__r) ++# define net_seq_retry(__r, __s) read_seqcount_retry(__r, __s) ++#endif ++ ++#endif +diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h +index c44da48de7df..c85ac38f7fa9 100644 +--- a/include/net/sch_generic.h ++++ b/include/net/sch_generic.h +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -100,7 +101,7 @@ struct Qdisc { + struct sk_buff_head gso_skb ____cacheline_aligned_in_smp; + struct qdisc_skb_head q; + struct gnet_stats_basic_packed bstats; +- seqcount_t running; ++ net_seqlock_t running; + struct gnet_stats_queue qstats; + unsigned long state; + struct Qdisc *next_sched; +@@ -121,7 +122,11 @@ static inline bool qdisc_is_running(struct Qdisc *qdisc) + { + if (qdisc->flags & TCQ_F_NOLOCK) + return spin_is_locked(&qdisc->seqlock); ++#ifdef CONFIG_PREEMPT_RT_BASE ++ return spin_is_locked(&qdisc->running.lock) ? true : false; ++#else + return (raw_read_seqcount(&qdisc->running) & 1) ? true : false; ++#endif + } + + static inline bool qdisc_run_begin(struct Qdisc *qdisc) +@@ -132,17 +137,27 @@ static inline bool qdisc_run_begin(struct Qdisc *qdisc) + } else if (qdisc_is_running(qdisc)) { + return false; + } ++#ifdef CONFIG_PREEMPT_RT_BASE ++ if (try_write_seqlock(&qdisc->running)) ++ return true; ++ return false; ++#else + /* Variant of write_seqcount_begin() telling lockdep a trylock + * was attempted. + */ + raw_write_seqcount_begin(&qdisc->running); + seqcount_acquire(&qdisc->running.dep_map, 0, 1, _RET_IP_); + return true; ++#endif + } + + static inline void qdisc_run_end(struct Qdisc *qdisc) + { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ write_sequnlock(&qdisc->running); ++#else + write_seqcount_end(&qdisc->running); ++#endif + if (qdisc->flags & TCQ_F_NOLOCK) + spin_unlock(&qdisc->seqlock); + } +@@ -453,7 +468,7 @@ static inline spinlock_t *qdisc_root_sleeping_lock(const struct Qdisc *qdisc) + return qdisc_lock(root); + } + +-static inline seqcount_t *qdisc_root_sleeping_running(const struct Qdisc *qdisc) ++static inline net_seqlock_t *qdisc_root_sleeping_running(const struct Qdisc *qdisc) + { + struct Qdisc *root = qdisc_root_sleeping(qdisc); + +diff --git a/include/soc/at91/atmel_tcb.h b/include/soc/at91/atmel_tcb.h +new file mode 100644 +index 000000000000..657e234b1483 +--- /dev/null ++++ b/include/soc/at91/atmel_tcb.h +@@ -0,0 +1,183 @@ ++//SPDX-License-Identifier: GPL-2.0 ++/* Copyright (C) 2018 Microchip */ ++ ++#ifndef __SOC_ATMEL_TCB_H ++#define __SOC_ATMEL_TCB_H ++ ++/* Channel registers */ ++#define ATMEL_TC_COFFS(c) ((c) * 0x40) ++#define ATMEL_TC_CCR(c) ATMEL_TC_COFFS(c) ++#define ATMEL_TC_CMR(c) (ATMEL_TC_COFFS(c) + 0x4) ++#define ATMEL_TC_SMMR(c) (ATMEL_TC_COFFS(c) + 0x8) ++#define ATMEL_TC_RAB(c) (ATMEL_TC_COFFS(c) + 0xc) ++#define ATMEL_TC_CV(c) (ATMEL_TC_COFFS(c) + 0x10) ++#define ATMEL_TC_RA(c) (ATMEL_TC_COFFS(c) + 0x14) ++#define ATMEL_TC_RB(c) (ATMEL_TC_COFFS(c) + 0x18) ++#define ATMEL_TC_RC(c) (ATMEL_TC_COFFS(c) + 0x1c) ++#define ATMEL_TC_SR(c) (ATMEL_TC_COFFS(c) + 0x20) ++#define ATMEL_TC_IER(c) (ATMEL_TC_COFFS(c) + 0x24) ++#define ATMEL_TC_IDR(c) (ATMEL_TC_COFFS(c) + 0x28) ++#define ATMEL_TC_IMR(c) (ATMEL_TC_COFFS(c) + 0x2c) ++#define ATMEL_TC_EMR(c) (ATMEL_TC_COFFS(c) + 0x30) ++ ++/* Block registers */ ++#define ATMEL_TC_BCR 0xc0 ++#define ATMEL_TC_BMR 0xc4 ++#define ATMEL_TC_QIER 0xc8 ++#define ATMEL_TC_QIDR 0xcc ++#define ATMEL_TC_QIMR 0xd0 ++#define ATMEL_TC_QISR 0xd4 ++#define ATMEL_TC_FMR 0xd8 ++#define ATMEL_TC_WPMR 0xe4 ++ ++/* CCR fields */ ++#define ATMEL_TC_CCR_CLKEN BIT(0) ++#define ATMEL_TC_CCR_CLKDIS BIT(1) ++#define ATMEL_TC_CCR_SWTRG BIT(2) ++ ++/* Common CMR fields */ ++#define ATMEL_TC_CMR_TCLKS_MSK GENMASK(2, 0) ++#define ATMEL_TC_CMR_TCLK(x) (x) ++#define ATMEL_TC_CMR_XC(x) ((x) + 5) ++#define ATMEL_TC_CMR_CLKI BIT(3) ++#define ATMEL_TC_CMR_BURST_MSK GENMASK(5, 4) ++#define ATMEL_TC_CMR_BURST_XC(x) (((x) + 1) << 4) ++#define ATMEL_TC_CMR_WAVE BIT(15) ++ ++/* Capture mode CMR fields */ ++#define ATMEL_TC_CMR_LDBSTOP BIT(6) ++#define ATMEL_TC_CMR_LDBDIS BIT(7) ++#define ATMEL_TC_CMR_ETRGEDG_MSK GENMASK(9, 8) ++#define ATMEL_TC_CMR_ETRGEDG_NONE (0 << 8) ++#define ATMEL_TC_CMR_ETRGEDG_RISING (1 << 8) ++#define ATMEL_TC_CMR_ETRGEDG_FALLING (2 << 8) ++#define ATMEL_TC_CMR_ETRGEDG_BOTH (3 << 8) ++#define ATMEL_TC_CMR_ABETRG BIT(10) ++#define ATMEL_TC_CMR_CPCTRG BIT(14) ++#define ATMEL_TC_CMR_LDRA_MSK GENMASK(17, 16) ++#define ATMEL_TC_CMR_LDRA_NONE (0 << 16) ++#define ATMEL_TC_CMR_LDRA_RISING (1 << 16) ++#define ATMEL_TC_CMR_LDRA_FALLING (2 << 16) ++#define ATMEL_TC_CMR_LDRA_BOTH (3 << 16) ++#define ATMEL_TC_CMR_LDRB_MSK GENMASK(19, 18) ++#define ATMEL_TC_CMR_LDRB_NONE (0 << 18) ++#define ATMEL_TC_CMR_LDRB_RISING (1 << 18) ++#define ATMEL_TC_CMR_LDRB_FALLING (2 << 18) ++#define ATMEL_TC_CMR_LDRB_BOTH (3 << 18) ++#define ATMEL_TC_CMR_SBSMPLR_MSK GENMASK(22, 20) ++#define ATMEL_TC_CMR_SBSMPLR(x) ((x) << 20) ++ ++/* Waveform mode CMR fields */ ++#define ATMEL_TC_CMR_CPCSTOP BIT(6) ++#define ATMEL_TC_CMR_CPCDIS BIT(7) ++#define ATMEL_TC_CMR_EEVTEDG_MSK GENMASK(9, 8) ++#define ATMEL_TC_CMR_EEVTEDG_NONE (0 << 8) ++#define ATMEL_TC_CMR_EEVTEDG_RISING (1 << 8) ++#define ATMEL_TC_CMR_EEVTEDG_FALLING (2 << 8) ++#define ATMEL_TC_CMR_EEVTEDG_BOTH (3 << 8) ++#define ATMEL_TC_CMR_EEVT_MSK GENMASK(11, 10) ++#define ATMEL_TC_CMR_EEVT_XC(x) (((x) + 1) << 10) ++#define ATMEL_TC_CMR_ENETRG BIT(12) ++#define ATMEL_TC_CMR_WAVESEL_MSK GENMASK(14, 13) ++#define ATMEL_TC_CMR_WAVESEL_UP (0 << 13) ++#define ATMEL_TC_CMR_WAVESEL_UPDOWN (1 << 13) ++#define ATMEL_TC_CMR_WAVESEL_UPRC (2 << 13) ++#define ATMEL_TC_CMR_WAVESEL_UPDOWNRC (3 << 13) ++#define ATMEL_TC_CMR_ACPA_MSK GENMASK(17, 16) ++#define ATMEL_TC_CMR_ACPA(a) (ATMEL_TC_CMR_ACTION_##a << 16) ++#define ATMEL_TC_CMR_ACPC_MSK GENMASK(19, 18) ++#define ATMEL_TC_CMR_ACPC(a) (ATMEL_TC_CMR_ACTION_##a << 18) ++#define ATMEL_TC_CMR_AEEVT_MSK GENMASK(21, 20) ++#define ATMEL_TC_CMR_AEEVT(a) (ATMEL_TC_CMR_ACTION_##a << 20) ++#define ATMEL_TC_CMR_ASWTRG_MSK GENMASK(23, 22) ++#define ATMEL_TC_CMR_ASWTRG(a) (ATMEL_TC_CMR_ACTION_##a << 22) ++#define ATMEL_TC_CMR_BCPB_MSK GENMASK(25, 24) ++#define ATMEL_TC_CMR_BCPB(a) (ATMEL_TC_CMR_ACTION_##a << 24) ++#define ATMEL_TC_CMR_BCPC_MSK GENMASK(27, 26) ++#define ATMEL_TC_CMR_BCPC(a) (ATMEL_TC_CMR_ACTION_##a << 26) ++#define ATMEL_TC_CMR_BEEVT_MSK GENMASK(29, 28) ++#define ATMEL_TC_CMR_BEEVT(a) (ATMEL_TC_CMR_ACTION_##a << 28) ++#define ATMEL_TC_CMR_BSWTRG_MSK GENMASK(31, 30) ++#define ATMEL_TC_CMR_BSWTRG(a) (ATMEL_TC_CMR_ACTION_##a << 30) ++#define ATMEL_TC_CMR_ACTION_NONE 0 ++#define ATMEL_TC_CMR_ACTION_SET 1 ++#define ATMEL_TC_CMR_ACTION_CLEAR 2 ++#define ATMEL_TC_CMR_ACTION_TOGGLE 3 ++ ++/* SMMR fields */ ++#define ATMEL_TC_SMMR_GCEN BIT(0) ++#define ATMEL_TC_SMMR_DOWN BIT(1) ++ ++/* SR/IER/IDR/IMR fields */ ++#define ATMEL_TC_COVFS BIT(0) ++#define ATMEL_TC_LOVRS BIT(1) ++#define ATMEL_TC_CPAS BIT(2) ++#define ATMEL_TC_CPBS BIT(3) ++#define ATMEL_TC_CPCS BIT(4) ++#define ATMEL_TC_LDRAS BIT(5) ++#define ATMEL_TC_LDRBS BIT(6) ++#define ATMEL_TC_ETRGS BIT(7) ++#define ATMEL_TC_CLKSTA BIT(16) ++#define ATMEL_TC_MTIOA BIT(17) ++#define ATMEL_TC_MTIOB BIT(18) ++ ++/* EMR fields */ ++#define ATMEL_TC_EMR_TRIGSRCA_MSK GENMASK(1, 0) ++#define ATMEL_TC_EMR_TRIGSRCA_TIOA 0 ++#define ATMEL_TC_EMR_TRIGSRCA_PWMX 1 ++#define ATMEL_TC_EMR_TRIGSRCB_MSK GENMASK(5, 4) ++#define ATMEL_TC_EMR_TRIGSRCB_TIOB (0 << 4) ++#define ATMEL_TC_EMR_TRIGSRCB_PWM (1 << 4) ++#define ATMEL_TC_EMR_NOCLKDIV BIT(8) ++ ++/* BCR fields */ ++#define ATMEL_TC_BCR_SYNC BIT(0) ++ ++/* BMR fields */ ++#define ATMEL_TC_BMR_TCXC_MSK(c) GENMASK(((c) * 2) + 1, (c) * 2) ++#define ATMEL_TC_BMR_TCXC(x, c) ((x) << (2 * (c))) ++#define ATMEL_TC_BMR_QDEN BIT(8) ++#define ATMEL_TC_BMR_POSEN BIT(9) ++#define ATMEL_TC_BMR_SPEEDEN BIT(10) ++#define ATMEL_TC_BMR_QDTRANS BIT(11) ++#define ATMEL_TC_BMR_EDGPHA BIT(12) ++#define ATMEL_TC_BMR_INVA BIT(13) ++#define ATMEL_TC_BMR_INVB BIT(14) ++#define ATMEL_TC_BMR_INVIDX BIT(15) ++#define ATMEL_TC_BMR_SWAP BIT(16) ++#define ATMEL_TC_BMR_IDXPHB BIT(17) ++#define ATMEL_TC_BMR_AUTOC BIT(18) ++#define ATMEL_TC_MAXFILT_MSK GENMASK(25, 20) ++#define ATMEL_TC_MAXFILT(x) (((x) - 1) << 20) ++#define ATMEL_TC_MAXCMP_MSK GENMASK(29, 26) ++#define ATMEL_TC_MAXCMP(x) ((x) << 26) ++ ++/* QEDC fields */ ++#define ATMEL_TC_QEDC_IDX BIT(0) ++#define ATMEL_TC_QEDC_DIRCHG BIT(1) ++#define ATMEL_TC_QEDC_QERR BIT(2) ++#define ATMEL_TC_QEDC_MPE BIT(3) ++#define ATMEL_TC_QEDC_DIR BIT(8) ++ ++/* FMR fields */ ++#define ATMEL_TC_FMR_ENCF(x) BIT(x) ++ ++/* WPMR fields */ ++#define ATMEL_TC_WPMR_WPKEY (0x54494d << 8) ++#define ATMEL_TC_WPMR_WPEN BIT(0) ++ ++static const u8 atmel_tc_divisors[5] = { 2, 8, 32, 128, 0, }; ++ ++static const struct of_device_id atmel_tcb_dt_ids[] = { ++ { ++ .compatible = "atmel,at91rm9200-tcb", ++ .data = (void *)16, ++ }, { ++ .compatible = "atmel,at91sam9x5-tcb", ++ .data = (void *)32, ++ }, { ++ /* sentinel */ ++ } ++}; ++ ++#endif /* __SOC_ATMEL_TCB_H */ +diff --git a/init/Kconfig b/init/Kconfig +index 47035b5a46f6..b4e88fb19c26 100644 +--- a/init/Kconfig ++++ b/init/Kconfig +@@ -784,6 +784,7 @@ config CFS_BANDWIDTH + config RT_GROUP_SCHED + bool "Group scheduling for SCHED_RR/FIFO" + depends on CGROUP_SCHED ++ depends on !PREEMPT_RT_FULL + default n + help + This feature lets you explicitly allocate real CPU bandwidth +@@ -1637,6 +1638,7 @@ choice + + config SLAB + bool "SLAB" ++ depends on !PREEMPT_RT_FULL + select HAVE_HARDENED_USERCOPY_ALLOCATOR + help + The regular slab allocator that is established and known to work +@@ -1657,6 +1659,7 @@ config SLUB + config SLOB + depends on EXPERT + bool "SLOB (Simple Allocator)" ++ depends on !PREEMPT_RT_FULL + help + SLOB replaces the stock allocator with a drastically simpler + allocator. SLOB is generally more space efficient but +@@ -1698,7 +1701,7 @@ config SLAB_FREELIST_HARDENED + + config SLUB_CPU_PARTIAL + default y +- depends on SLUB && SMP ++ depends on SLUB && SMP && !PREEMPT_RT_FULL + bool "SLUB per cpu partial cache" + help + Per cpu partial caches accellerate objects allocation and freeing +diff --git a/init/Makefile b/init/Makefile +index a3e5ce2bcf08..7779232563ae 100644 +--- a/init/Makefile ++++ b/init/Makefile +@@ -34,4 +34,4 @@ silent_chk_compile.h = : + include/generated/compile.h: FORCE + @$($(quiet)chk_compile.h) + $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkcompile_h $@ \ +- "$(UTS_MACHINE)" "$(CONFIG_SMP)" "$(CONFIG_PREEMPT)" "$(CC) $(KBUILD_CFLAGS)" ++ "$(UTS_MACHINE)" "$(CONFIG_SMP)" "$(CONFIG_PREEMPT)" "$(CONFIG_PREEMPT_RT_FULL)" "$(CC) $(KBUILD_CFLAGS)" +diff --git a/init/init_task.c b/init/init_task.c +index 5aebe3be4d7c..9e3362748214 100644 +--- a/init/init_task.c ++++ b/init/init_task.c +@@ -50,6 +50,12 @@ static struct sighand_struct init_sighand = { + .signalfd_wqh = __WAIT_QUEUE_HEAD_INITIALIZER(init_sighand.signalfd_wqh), + }; + ++#if defined(CONFIG_POSIX_TIMERS) && defined(CONFIG_PREEMPT_RT_BASE) ++# define INIT_TIMER_LIST .posix_timer_list = NULL, ++#else ++# define INIT_TIMER_LIST ++#endif ++ + /* + * Set up the first task table, touch at your own risk!. Base=0, + * limit=0x1fffff (=2MB) +@@ -71,7 +77,8 @@ struct task_struct init_task + .static_prio = MAX_PRIO - 20, + .normal_prio = MAX_PRIO - 20, + .policy = SCHED_NORMAL, +- .cpus_allowed = CPU_MASK_ALL, ++ .cpus_ptr = &init_task.cpus_mask, ++ .cpus_mask = CPU_MASK_ALL, + .nr_cpus_allowed= NR_CPUS, + .mm = NULL, + .active_mm = &init_mm, +@@ -118,6 +125,7 @@ struct task_struct init_task + INIT_CPU_TIMERS(init_task) + .pi_lock = __RAW_SPIN_LOCK_UNLOCKED(init_task.pi_lock), + .timer_slack_ns = 50000, /* 50 usec default slack */ ++ INIT_TIMER_LIST + .thread_pid = &init_struct_pid, + .thread_group = LIST_HEAD_INIT(init_task.thread_group), + .thread_node = LIST_HEAD_INIT(init_signals.thread_head), +diff --git a/init/main.c b/init/main.c +index 020972fed117..b0e95351c22c 100644 +--- a/init/main.c ++++ b/init/main.c +@@ -561,6 +561,7 @@ asmlinkage __visible void __init start_kernel(void) + setup_command_line(command_line); + setup_nr_cpu_ids(); + setup_per_cpu_areas(); ++ softirq_early_init(); + smp_prepare_boot_cpu(); /* arch-specific boot-cpu hooks */ + boot_cpu_hotplug_init(); + +@@ -1129,6 +1130,7 @@ static noinline void __init kernel_init_freeable(void) + smp_prepare_cpus(setup_max_cpus); + + workqueue_init(); ++ kthread_init_global_worker(); + + init_mm_internals(); + +diff --git a/kernel/Kconfig.locks b/kernel/Kconfig.locks +index 84d882f3e299..af27c4000812 100644 +--- a/kernel/Kconfig.locks ++++ b/kernel/Kconfig.locks +@@ -225,11 +225,11 @@ config ARCH_SUPPORTS_ATOMIC_RMW + + config MUTEX_SPIN_ON_OWNER + def_bool y +- depends on SMP && ARCH_SUPPORTS_ATOMIC_RMW ++ depends on SMP && ARCH_SUPPORTS_ATOMIC_RMW && !PREEMPT_RT_FULL + + config RWSEM_SPIN_ON_OWNER + def_bool y +- depends on SMP && RWSEM_XCHGADD_ALGORITHM && ARCH_SUPPORTS_ATOMIC_RMW ++ depends on SMP && RWSEM_XCHGADD_ALGORITHM && ARCH_SUPPORTS_ATOMIC_RMW && !PREEMPT_RT_FULL + + config LOCK_SPIN_ON_OWNER + def_bool y +diff --git a/kernel/Kconfig.preempt b/kernel/Kconfig.preempt +index cd1655122ec0..306567f72a3e 100644 +--- a/kernel/Kconfig.preempt ++++ b/kernel/Kconfig.preempt +@@ -1,3 +1,16 @@ ++config PREEMPT ++ bool ++ select PREEMPT_COUNT ++ ++config PREEMPT_RT_BASE ++ bool ++ select PREEMPT ++ ++config HAVE_PREEMPT_LAZY ++ bool ++ ++config PREEMPT_LAZY ++ def_bool y if HAVE_PREEMPT_LAZY && PREEMPT_RT_FULL + + choice + prompt "Preemption Model" +@@ -34,10 +47,10 @@ config PREEMPT_VOLUNTARY + + Select this if you are building a kernel for a desktop system. + +-config PREEMPT ++config PREEMPT__LL + bool "Preemptible Kernel (Low-Latency Desktop)" + depends on !ARCH_NO_PREEMPT +- select PREEMPT_COUNT ++ select PREEMPT + select UNINLINE_SPIN_UNLOCK if !ARCH_INLINE_SPIN_UNLOCK + help + This option reduces the latency of the kernel by making +@@ -54,7 +67,23 @@ config PREEMPT + embedded system with latency requirements in the milliseconds + range. + ++config PREEMPT_RTB ++ bool "Preemptible Kernel (Basic RT)" ++ select PREEMPT_RT_BASE ++ help ++ This option is basically the same as (Low-Latency Desktop) but ++ enables changes which are preliminary for the full preemptible ++ RT kernel. ++ ++config PREEMPT_RT_FULL ++ bool "Fully Preemptible Kernel (RT)" ++ depends on IRQ_FORCED_THREADING ++ select PREEMPT_RT_BASE ++ select PREEMPT_RCU ++ help ++ All and everything ++ + endchoice + + config PREEMPT_COUNT +- bool +\ No newline at end of file ++ bool +diff --git a/kernel/cgroup/cgroup.c b/kernel/cgroup/cgroup.c +index 81441117f611..7b536796daf8 100644 +--- a/kernel/cgroup/cgroup.c ++++ b/kernel/cgroup/cgroup.c +@@ -4628,10 +4628,10 @@ static void css_free_rwork_fn(struct work_struct *work) + } + } + +-static void css_release_work_fn(struct work_struct *work) ++static void css_release_work_fn(struct swork_event *sev) + { + struct cgroup_subsys_state *css = +- container_of(work, struct cgroup_subsys_state, destroy_work); ++ container_of(sev, struct cgroup_subsys_state, destroy_swork); + struct cgroup_subsys *ss = css->ss; + struct cgroup *cgrp = css->cgroup; + +@@ -4693,8 +4693,8 @@ static void css_release(struct percpu_ref *ref) + struct cgroup_subsys_state *css = + container_of(ref, struct cgroup_subsys_state, refcnt); + +- INIT_WORK(&css->destroy_work, css_release_work_fn); +- queue_work(cgroup_destroy_wq, &css->destroy_work); ++ INIT_SWORK(&css->destroy_swork, css_release_work_fn); ++ swork_queue(&css->destroy_swork); + } + + static void init_and_link_css(struct cgroup_subsys_state *css, +@@ -5420,6 +5420,7 @@ static int __init cgroup_wq_init(void) + */ + cgroup_destroy_wq = alloc_workqueue("cgroup_destroy", 0, 1); + BUG_ON(!cgroup_destroy_wq); ++ BUG_ON(swork_get()); + return 0; + } + core_initcall(cgroup_wq_init); +diff --git a/kernel/cgroup/cpuset.c b/kernel/cgroup/cpuset.c +index ff956ccbb6df..92575cb9b493 100644 +--- a/kernel/cgroup/cpuset.c ++++ b/kernel/cgroup/cpuset.c +@@ -288,7 +288,7 @@ static struct cpuset top_cpuset = { + */ + + static DEFINE_MUTEX(cpuset_mutex); +-static DEFINE_SPINLOCK(callback_lock); ++static DEFINE_RAW_SPINLOCK(callback_lock); + + static struct workqueue_struct *cpuset_migrate_mm_wq; + +@@ -922,9 +922,9 @@ static void update_cpumasks_hier(struct cpuset *cs, struct cpumask *new_cpus) + continue; + rcu_read_unlock(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cpumask_copy(cp->effective_cpus, new_cpus); +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + WARN_ON(!is_in_v2_mode() && + !cpumask_equal(cp->cpus_allowed, cp->effective_cpus)); +@@ -989,9 +989,9 @@ static int update_cpumask(struct cpuset *cs, struct cpuset *trialcs, + if (retval < 0) + return retval; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cpumask_copy(cs->cpus_allowed, trialcs->cpus_allowed); +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + /* use trialcs->cpus_allowed as a temp variable */ + update_cpumasks_hier(cs, trialcs->cpus_allowed); +@@ -1175,9 +1175,9 @@ static void update_nodemasks_hier(struct cpuset *cs, nodemask_t *new_mems) + continue; + rcu_read_unlock(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cp->effective_mems = *new_mems; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + WARN_ON(!is_in_v2_mode() && + !nodes_equal(cp->mems_allowed, cp->effective_mems)); +@@ -1245,9 +1245,9 @@ static int update_nodemask(struct cpuset *cs, struct cpuset *trialcs, + if (retval < 0) + goto done; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->mems_allowed = trialcs->mems_allowed; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + /* use trialcs->mems_allowed as a temp variable */ + update_nodemasks_hier(cs, &trialcs->mems_allowed); +@@ -1338,9 +1338,9 @@ static int update_flag(cpuset_flagbits_t bit, struct cpuset *cs, + spread_flag_changed = ((is_spread_slab(cs) != is_spread_slab(trialcs)) + || (is_spread_page(cs) != is_spread_page(trialcs))); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->flags = trialcs->flags; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + if (!cpumask_empty(trialcs->cpus_allowed) && balance_flag_changed) + rebuild_sched_domains_locked(); +@@ -1755,7 +1755,7 @@ static int cpuset_common_seq_show(struct seq_file *sf, void *v) + cpuset_filetype_t type = seq_cft(sf)->private; + int ret = 0; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + + switch (type) { + case FILE_CPULIST: +@@ -1774,7 +1774,7 @@ static int cpuset_common_seq_show(struct seq_file *sf, void *v) + ret = -EINVAL; + } + +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + return ret; + } + +@@ -1989,12 +1989,12 @@ static int cpuset_css_online(struct cgroup_subsys_state *css) + + cpuset_inc(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + if (is_in_v2_mode()) { + cpumask_copy(cs->effective_cpus, parent->effective_cpus); + cs->effective_mems = parent->effective_mems; + } +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + if (!test_bit(CGRP_CPUSET_CLONE_CHILDREN, &css->cgroup->flags)) + goto out_unlock; +@@ -2021,12 +2021,12 @@ static int cpuset_css_online(struct cgroup_subsys_state *css) + } + rcu_read_unlock(); + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cs->mems_allowed = parent->mems_allowed; + cs->effective_mems = parent->mems_allowed; + cpumask_copy(cs->cpus_allowed, parent->cpus_allowed); + cpumask_copy(cs->effective_cpus, parent->cpus_allowed); +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + out_unlock: + mutex_unlock(&cpuset_mutex); + return 0; +@@ -2065,7 +2065,7 @@ static void cpuset_css_free(struct cgroup_subsys_state *css) + static void cpuset_bind(struct cgroup_subsys_state *root_css) + { + mutex_lock(&cpuset_mutex); +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + + if (is_in_v2_mode()) { + cpumask_copy(top_cpuset.cpus_allowed, cpu_possible_mask); +@@ -2076,7 +2076,7 @@ static void cpuset_bind(struct cgroup_subsys_state *root_css) + top_cpuset.mems_allowed = top_cpuset.effective_mems; + } + +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + mutex_unlock(&cpuset_mutex); + } + +@@ -2090,7 +2090,7 @@ static void cpuset_fork(struct task_struct *task) + if (task_css_is_root(task, cpuset_cgrp_id)) + return; + +- set_cpus_allowed_ptr(task, ¤t->cpus_allowed); ++ set_cpus_allowed_ptr(task, current->cpus_ptr); + task->mems_allowed = current->mems_allowed; + } + +@@ -2174,12 +2174,12 @@ hotplug_update_tasks_legacy(struct cpuset *cs, + { + bool is_empty; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cpumask_copy(cs->cpus_allowed, new_cpus); + cpumask_copy(cs->effective_cpus, new_cpus); + cs->mems_allowed = *new_mems; + cs->effective_mems = *new_mems; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + /* + * Don't call update_tasks_cpumask() if the cpuset becomes empty, +@@ -2216,10 +2216,10 @@ hotplug_update_tasks(struct cpuset *cs, + if (nodes_empty(*new_mems)) + *new_mems = parent_cs(cs)->effective_mems; + +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + cpumask_copy(cs->effective_cpus, new_cpus); + cs->effective_mems = *new_mems; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + + if (cpus_updated) + update_tasks_cpumask(cs); +@@ -2312,21 +2312,21 @@ static void cpuset_hotplug_workfn(struct work_struct *work) + + /* synchronize cpus_allowed to cpu_active_mask */ + if (cpus_updated) { +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + if (!on_dfl) + cpumask_copy(top_cpuset.cpus_allowed, &new_cpus); + cpumask_copy(top_cpuset.effective_cpus, &new_cpus); +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + /* we don't mess with cpumasks of tasks in top_cpuset */ + } + + /* synchronize mems_allowed to N_MEMORY */ + if (mems_updated) { +- spin_lock_irq(&callback_lock); ++ raw_spin_lock_irq(&callback_lock); + if (!on_dfl) + top_cpuset.mems_allowed = new_mems; + top_cpuset.effective_mems = new_mems; +- spin_unlock_irq(&callback_lock); ++ raw_spin_unlock_irq(&callback_lock); + update_tasks_nodemask(&top_cpuset); + } + +@@ -2425,11 +2425,11 @@ void cpuset_cpus_allowed(struct task_struct *tsk, struct cpumask *pmask) + { + unsigned long flags; + +- spin_lock_irqsave(&callback_lock, flags); ++ raw_spin_lock_irqsave(&callback_lock, flags); + rcu_read_lock(); + guarantee_online_cpus(task_cs(tsk), pmask); + rcu_read_unlock(); +- spin_unlock_irqrestore(&callback_lock, flags); ++ raw_spin_unlock_irqrestore(&callback_lock, flags); + } + + /** +@@ -2490,11 +2490,11 @@ nodemask_t cpuset_mems_allowed(struct task_struct *tsk) + nodemask_t mask; + unsigned long flags; + +- spin_lock_irqsave(&callback_lock, flags); ++ raw_spin_lock_irqsave(&callback_lock, flags); + rcu_read_lock(); + guarantee_online_mems(task_cs(tsk), &mask); + rcu_read_unlock(); +- spin_unlock_irqrestore(&callback_lock, flags); ++ raw_spin_unlock_irqrestore(&callback_lock, flags); + + return mask; + } +@@ -2586,14 +2586,14 @@ bool __cpuset_node_allowed(int node, gfp_t gfp_mask) + return true; + + /* Not hardwall and node outside mems_allowed: scan up cpusets */ +- spin_lock_irqsave(&callback_lock, flags); ++ raw_spin_lock_irqsave(&callback_lock, flags); + + rcu_read_lock(); + cs = nearest_hardwall_ancestor(task_cs(current)); + allowed = node_isset(node, cs->mems_allowed); + rcu_read_unlock(); + +- spin_unlock_irqrestore(&callback_lock, flags); ++ raw_spin_unlock_irqrestore(&callback_lock, flags); + return allowed; + } + +diff --git a/kernel/cgroup/rstat.c b/kernel/cgroup/rstat.c +index bb95a35e8c2d..3266a9781b4e 100644 +--- a/kernel/cgroup/rstat.c ++++ b/kernel/cgroup/rstat.c +@@ -159,8 +159,9 @@ static void cgroup_rstat_flush_locked(struct cgroup *cgrp, bool may_sleep) + raw_spinlock_t *cpu_lock = per_cpu_ptr(&cgroup_rstat_cpu_lock, + cpu); + struct cgroup *pos = NULL; ++ unsigned long flags; + +- raw_spin_lock(cpu_lock); ++ raw_spin_lock_irqsave(cpu_lock, flags); + while ((pos = cgroup_rstat_cpu_pop_updated(pos, cgrp, cpu))) { + struct cgroup_subsys_state *css; + +@@ -172,7 +173,7 @@ static void cgroup_rstat_flush_locked(struct cgroup *cgrp, bool may_sleep) + css->ss->css_rstat_flush(css, cpu); + rcu_read_unlock(); + } +- raw_spin_unlock(cpu_lock); ++ raw_spin_unlock_irqrestore(cpu_lock, flags); + + /* if @may_sleep, play nice and yield if necessary */ + if (may_sleep && (need_resched() || +diff --git a/kernel/cpu.c b/kernel/cpu.c +index 46aefe5c0e35..3857a0afdfbf 100644 +--- a/kernel/cpu.c ++++ b/kernel/cpu.c +@@ -75,6 +75,11 @@ static DEFINE_PER_CPU(struct cpuhp_cpu_state, cpuhp_state) = { + .fail = CPUHP_INVALID, + }; + ++#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PREEMPT_RT_FULL) ++static DEFINE_PER_CPU(struct rt_rw_lock, cpuhp_pin_lock) = \ ++ __RWLOCK_RT_INITIALIZER(cpuhp_pin_lock); ++#endif ++ + #if defined(CONFIG_LOCKDEP) && defined(CONFIG_SMP) + static struct lockdep_map cpuhp_state_up_map = + STATIC_LOCKDEP_MAP_INIT("cpuhp_state-up", &cpuhp_state_up_map); +@@ -281,6 +286,55 @@ static int cpu_hotplug_disabled; + + #ifdef CONFIG_HOTPLUG_CPU + ++/** ++ * pin_current_cpu - Prevent the current cpu from being unplugged ++ */ ++void pin_current_cpu(void) ++{ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct rt_rw_lock *cpuhp_pin; ++ unsigned int cpu; ++ int ret; ++ ++again: ++ cpuhp_pin = this_cpu_ptr(&cpuhp_pin_lock); ++ ret = __read_rt_trylock(cpuhp_pin); ++ if (ret) { ++ current->pinned_on_cpu = smp_processor_id(); ++ return; ++ } ++ cpu = smp_processor_id(); ++ preempt_lazy_enable(); ++ preempt_enable(); ++ ++ __read_rt_lock(cpuhp_pin); ++ ++ preempt_disable(); ++ preempt_lazy_disable(); ++ if (cpu != smp_processor_id()) { ++ __read_rt_unlock(cpuhp_pin); ++ goto again; ++ } ++ current->pinned_on_cpu = cpu; ++#endif ++} ++ ++/** ++ * unpin_current_cpu - Allow unplug of current cpu ++ */ ++void unpin_current_cpu(void) ++{ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct rt_rw_lock *cpuhp_pin = this_cpu_ptr(&cpuhp_pin_lock); ++ ++ if (WARN_ON(current->pinned_on_cpu != smp_processor_id())) ++ cpuhp_pin = per_cpu_ptr(&cpuhp_pin_lock, current->pinned_on_cpu); ++ ++ current->pinned_on_cpu = -1; ++ __read_rt_unlock(cpuhp_pin); ++#endif ++} ++ + DEFINE_STATIC_PERCPU_RWSEM(cpu_hotplug_lock); + + void cpus_read_lock(void) +@@ -838,6 +892,9 @@ static int take_cpu_down(void *_param) + + static int takedown_cpu(unsigned int cpu) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct rt_rw_lock *cpuhp_pin = per_cpu_ptr(&cpuhp_pin_lock, cpu); ++#endif + struct cpuhp_cpu_state *st = per_cpu_ptr(&cpuhp_state, cpu); + int err; + +@@ -850,11 +907,18 @@ static int takedown_cpu(unsigned int cpu) + */ + irq_lock_sparse(); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ __write_rt_lock(cpuhp_pin); ++#endif ++ + /* + * So now all preempt/rcu users must observe !cpu_active(). + */ + err = stop_machine_cpuslocked(take_cpu_down, NULL, cpumask_of(cpu)); + if (err) { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ __write_rt_unlock(cpuhp_pin); ++#endif + /* CPU refused to die */ + irq_unlock_sparse(); + /* Unpark the hotplug thread so we can rollback there */ +@@ -873,6 +937,9 @@ static int takedown_cpu(unsigned int cpu) + wait_for_ap_thread(st, false); + BUG_ON(st->state != CPUHP_AP_IDLE_DEAD); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ __write_rt_unlock(cpuhp_pin); ++#endif + /* Interrupts are moved away from the dying cpu, reenable alloc/free */ + irq_unlock_sparse(); + +diff --git a/kernel/debug/kdb/kdb_io.c b/kernel/debug/kdb/kdb_io.c +index 6a4b41484afe..197cb422f6e1 100644 +--- a/kernel/debug/kdb/kdb_io.c ++++ b/kernel/debug/kdb/kdb_io.c +@@ -857,9 +857,11 @@ int kdb_printf(const char *fmt, ...) + va_list ap; + int r; + ++ kdb_trap_printk++; + va_start(ap, fmt); + r = vkdb_printf(KDB_MSGSRC_INTERNAL, fmt, ap); + va_end(ap); ++ kdb_trap_printk--; + + return r; + } +diff --git a/kernel/events/core.c b/kernel/events/core.c +index 171b83ebed4a..a7807c609c22 100644 +--- a/kernel/events/core.c ++++ b/kernel/events/core.c +@@ -1102,7 +1102,7 @@ static void __perf_mux_hrtimer_init(struct perf_cpu_context *cpuctx, int cpu) + cpuctx->hrtimer_interval = ns_to_ktime(NSEC_PER_MSEC * interval); + + raw_spin_lock_init(&cpuctx->hrtimer_lock); +- hrtimer_init(timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_PINNED); ++ hrtimer_init(timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_PINNED_HARD); + timer->function = perf_mux_hrtimer_handler; + } + +@@ -9216,7 +9216,7 @@ static void perf_swevent_init_hrtimer(struct perf_event *event) + if (!is_sampling_event(event)) + return; + +- hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD); + hwc->hrtimer.function = perf_swevent_hrtimer; + + /* +diff --git a/kernel/exit.c b/kernel/exit.c +index 5c0964dc805a..47d4161d1104 100644 +--- a/kernel/exit.c ++++ b/kernel/exit.c +@@ -160,7 +160,7 @@ static void __exit_signal(struct task_struct *tsk) + * Do this under ->siglock, we can race with another thread + * doing sigqueue_free() if we have SIGQUEUE_PREALLOC signals. + */ +- flush_sigqueue(&tsk->pending); ++ flush_task_sigqueue(tsk); + tsk->sighand = NULL; + spin_unlock(&sighand->siglock); + +diff --git a/kernel/fork.c b/kernel/fork.c +index 69874db3fba8..aa4905338ff4 100644 +--- a/kernel/fork.c ++++ b/kernel/fork.c +@@ -40,6 +40,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -637,6 +638,19 @@ void __mmdrop(struct mm_struct *mm) + } + EXPORT_SYMBOL_GPL(__mmdrop); + ++#ifdef CONFIG_PREEMPT_RT_BASE ++/* ++ * RCU callback for delayed mm drop. Not strictly rcu, but we don't ++ * want another facility to make this work. ++ */ ++void __mmdrop_delayed(struct rcu_head *rhp) ++{ ++ struct mm_struct *mm = container_of(rhp, struct mm_struct, delayed_drop); ++ ++ __mmdrop(mm); ++} ++#endif ++ + static void mmdrop_async_fn(struct work_struct *work) + { + struct mm_struct *mm; +@@ -671,13 +685,24 @@ static inline void put_signal_struct(struct signal_struct *sig) + if (atomic_dec_and_test(&sig->sigcnt)) + free_signal_struct(sig); + } +- ++#ifdef CONFIG_PREEMPT_RT_BASE ++static ++#endif + void __put_task_struct(struct task_struct *tsk) + { + WARN_ON(!tsk->exit_state); + WARN_ON(atomic_read(&tsk->usage)); + WARN_ON(tsk == current); + ++ /* ++ * Remove function-return probe instances associated with this ++ * task and put them back on the free list. ++ */ ++ kprobe_flush_task(tsk); ++ ++ /* Task is done with its stack. */ ++ put_task_stack(tsk); ++ + cgroup_free(tsk); + task_numa_free(tsk); + security_task_free(tsk); +@@ -688,7 +713,18 @@ void __put_task_struct(struct task_struct *tsk) + if (!profile_handoff_task(tsk)) + free_task(tsk); + } ++#ifndef CONFIG_PREEMPT_RT_BASE + EXPORT_SYMBOL_GPL(__put_task_struct); ++#else ++void __put_task_struct_cb(struct rcu_head *rhp) ++{ ++ struct task_struct *tsk = container_of(rhp, struct task_struct, put_rcu); ++ ++ __put_task_struct(tsk); ++ ++} ++EXPORT_SYMBOL_GPL(__put_task_struct_cb); ++#endif + + void __init __weak arch_task_cache_init(void) { } + +@@ -845,6 +881,8 @@ static struct task_struct *dup_task_struct(struct task_struct *orig, int node) + #ifdef CONFIG_STACKPROTECTOR + tsk->stack_canary = get_random_canary(); + #endif ++ if (orig->cpus_ptr == &orig->cpus_mask) ++ tsk->cpus_ptr = &tsk->cpus_mask; + + /* + * One for us, one for whoever does the "release_task()" (usually +@@ -857,6 +895,7 @@ static struct task_struct *dup_task_struct(struct task_struct *orig, int node) + tsk->splice_pipe = NULL; + tsk->task_frag.page = NULL; + tsk->wake_q.next = NULL; ++ tsk->wake_q_sleeper.next = NULL; + + account_kernel_stack(tsk, 1); + +@@ -1583,6 +1622,9 @@ static void rt_mutex_init_task(struct task_struct *p) + */ + static void posix_cpu_timers_init(struct task_struct *tsk) + { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ tsk->posix_timer_list = NULL; ++#endif + tsk->cputime_expires.prof_exp = 0; + tsk->cputime_expires.virt_exp = 0; + tsk->cputime_expires.sched_exp = 0; +@@ -1785,6 +1827,7 @@ static __latent_entropy struct task_struct *copy_process( + spin_lock_init(&p->alloc_lock); + + init_sigpending(&p->pending); ++ p->sigqueue_cache = NULL; + + p->utime = p->stime = p->gtime = 0; + #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME +diff --git a/kernel/futex.c b/kernel/futex.c +index afdc5eadce6e..688b6fcb79cb 100644 +--- a/kernel/futex.c ++++ b/kernel/futex.c +@@ -240,7 +240,7 @@ struct futex_q { + struct plist_node list; + + struct task_struct *task; +- spinlock_t *lock_ptr; ++ raw_spinlock_t *lock_ptr; + union futex_key key; + struct futex_pi_state *pi_state; + struct rt_mutex_waiter *rt_waiter; +@@ -261,7 +261,7 @@ static const struct futex_q futex_q_init = { + */ + struct futex_hash_bucket { + atomic_t waiters; +- spinlock_t lock; ++ raw_spinlock_t lock; + struct plist_head chain; + } ____cacheline_aligned_in_smp; + +@@ -822,13 +822,13 @@ static void get_pi_state(struct futex_pi_state *pi_state) + * Drops a reference to the pi_state object and frees or caches it + * when the last reference is gone. + */ +-static void put_pi_state(struct futex_pi_state *pi_state) ++static struct futex_pi_state *__put_pi_state(struct futex_pi_state *pi_state) + { + if (!pi_state) +- return; ++ return NULL; + + if (!atomic_dec_and_test(&pi_state->refcount)) +- return; ++ return NULL; + + /* + * If pi_state->owner is NULL, the owner is most probably dying +@@ -848,9 +848,7 @@ static void put_pi_state(struct futex_pi_state *pi_state) + raw_spin_unlock_irq(&pi_state->pi_mutex.wait_lock); + } + +- if (current->pi_state_cache) { +- kfree(pi_state); +- } else { ++ if (!current->pi_state_cache) { + /* + * pi_state->list is already empty. + * clear pi_state->owner. +@@ -859,6 +857,30 @@ static void put_pi_state(struct futex_pi_state *pi_state) + pi_state->owner = NULL; + atomic_set(&pi_state->refcount, 1); + current->pi_state_cache = pi_state; ++ pi_state = NULL; ++ } ++ return pi_state; ++} ++ ++static void put_pi_state(struct futex_pi_state *pi_state) ++{ ++ kfree(__put_pi_state(pi_state)); ++} ++ ++static void put_pi_state_atomic(struct futex_pi_state *pi_state, ++ struct list_head *to_free) ++{ ++ if (__put_pi_state(pi_state)) ++ list_add(&pi_state->list, to_free); ++} ++ ++static void free_pi_state_list(struct list_head *to_free) ++{ ++ struct futex_pi_state *p, *next; ++ ++ list_for_each_entry_safe(p, next, to_free, list) { ++ list_del(&p->list); ++ kfree(p); + } + } + +@@ -875,6 +897,7 @@ void exit_pi_state_list(struct task_struct *curr) + struct futex_pi_state *pi_state; + struct futex_hash_bucket *hb; + union futex_key key = FUTEX_KEY_INIT; ++ LIST_HEAD(to_free); + + if (!futex_cmpxchg_enabled) + return; +@@ -908,7 +931,7 @@ void exit_pi_state_list(struct task_struct *curr) + } + raw_spin_unlock_irq(&curr->pi_lock); + +- spin_lock(&hb->lock); ++ raw_spin_lock(&hb->lock); + raw_spin_lock_irq(&pi_state->pi_mutex.wait_lock); + raw_spin_lock(&curr->pi_lock); + /* +@@ -918,8 +941,8 @@ void exit_pi_state_list(struct task_struct *curr) + if (head->next != next) { + /* retain curr->pi_lock for the loop invariant */ + raw_spin_unlock(&pi_state->pi_mutex.wait_lock); +- spin_unlock(&hb->lock); +- put_pi_state(pi_state); ++ raw_spin_unlock(&hb->lock); ++ put_pi_state_atomic(pi_state, &to_free); + continue; + } + +@@ -930,7 +953,7 @@ void exit_pi_state_list(struct task_struct *curr) + + raw_spin_unlock(&curr->pi_lock); + raw_spin_unlock_irq(&pi_state->pi_mutex.wait_lock); +- spin_unlock(&hb->lock); ++ raw_spin_unlock(&hb->lock); + + rt_mutex_futex_unlock(&pi_state->pi_mutex); + put_pi_state(pi_state); +@@ -938,6 +961,8 @@ void exit_pi_state_list(struct task_struct *curr) + raw_spin_lock_irq(&curr->pi_lock); + } + raw_spin_unlock_irq(&curr->pi_lock); ++ ++ free_pi_state_list(&to_free); + } + + #endif +@@ -1424,7 +1449,7 @@ static void __unqueue_futex(struct futex_q *q) + { + struct futex_hash_bucket *hb; + +- if (WARN_ON_SMP(!q->lock_ptr || !spin_is_locked(q->lock_ptr)) ++ if (WARN_ON_SMP(!q->lock_ptr || !raw_spin_is_locked(q->lock_ptr)) + || WARN_ON(plist_node_empty(&q->list))) + return; + +@@ -1474,6 +1499,7 @@ static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_pi_state *pi_ + struct task_struct *new_owner; + bool postunlock = false; + DEFINE_WAKE_Q(wake_q); ++ DEFINE_WAKE_Q(wake_sleeper_q); + int ret = 0; + + new_owner = rt_mutex_next_owner(&pi_state->pi_mutex); +@@ -1533,13 +1559,13 @@ static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_pi_state *pi_ + pi_state->owner = new_owner; + raw_spin_unlock(&new_owner->pi_lock); + +- postunlock = __rt_mutex_futex_unlock(&pi_state->pi_mutex, &wake_q); +- ++ postunlock = __rt_mutex_futex_unlock(&pi_state->pi_mutex, &wake_q, ++ &wake_sleeper_q); + out_unlock: + raw_spin_unlock_irq(&pi_state->pi_mutex.wait_lock); + + if (postunlock) +- rt_mutex_postunlock(&wake_q); ++ rt_mutex_postunlock(&wake_q, &wake_sleeper_q); + + return ret; + } +@@ -1551,21 +1577,21 @@ static inline void + double_lock_hb(struct futex_hash_bucket *hb1, struct futex_hash_bucket *hb2) + { + if (hb1 <= hb2) { +- spin_lock(&hb1->lock); ++ raw_spin_lock(&hb1->lock); + if (hb1 < hb2) +- spin_lock_nested(&hb2->lock, SINGLE_DEPTH_NESTING); ++ raw_spin_lock_nested(&hb2->lock, SINGLE_DEPTH_NESTING); + } else { /* hb1 > hb2 */ +- spin_lock(&hb2->lock); +- spin_lock_nested(&hb1->lock, SINGLE_DEPTH_NESTING); ++ raw_spin_lock(&hb2->lock); ++ raw_spin_lock_nested(&hb1->lock, SINGLE_DEPTH_NESTING); + } + } + + static inline void + double_unlock_hb(struct futex_hash_bucket *hb1, struct futex_hash_bucket *hb2) + { +- spin_unlock(&hb1->lock); ++ raw_spin_unlock(&hb1->lock); + if (hb1 != hb2) +- spin_unlock(&hb2->lock); ++ raw_spin_unlock(&hb2->lock); + } + + /* +@@ -1593,7 +1619,7 @@ futex_wake(u32 __user *uaddr, unsigned int flags, int nr_wake, u32 bitset) + if (!hb_waiters_pending(hb)) + goto out_put_key; + +- spin_lock(&hb->lock); ++ raw_spin_lock(&hb->lock); + + plist_for_each_entry_safe(this, next, &hb->chain, list) { + if (match_futex (&this->key, &key)) { +@@ -1612,7 +1638,7 @@ futex_wake(u32 __user *uaddr, unsigned int flags, int nr_wake, u32 bitset) + } + } + +- spin_unlock(&hb->lock); ++ raw_spin_unlock(&hb->lock); + wake_up_q(&wake_q); + out_put_key: + put_futex_key(&key); +@@ -1919,6 +1945,7 @@ static int futex_requeue(u32 __user *uaddr1, unsigned int flags, + struct futex_hash_bucket *hb1, *hb2; + struct futex_q *this, *next; + DEFINE_WAKE_Q(wake_q); ++ LIST_HEAD(to_free); + + if (nr_wake < 0 || nr_requeue < 0) + return -EINVAL; +@@ -2156,7 +2183,7 @@ static int futex_requeue(u32 __user *uaddr1, unsigned int flags, + * object. + */ + this->pi_state = NULL; +- put_pi_state(pi_state); ++ put_pi_state_atomic(pi_state, &to_free); + /* + * We stop queueing more waiters and let user + * space deal with the mess. +@@ -2173,7 +2200,7 @@ static int futex_requeue(u32 __user *uaddr1, unsigned int flags, + * in futex_proxy_trylock_atomic() or in lookup_pi_state(). We + * need to drop it here again. + */ +- put_pi_state(pi_state); ++ put_pi_state_atomic(pi_state, &to_free); + + out_unlock: + double_unlock_hb(hb1, hb2); +@@ -2194,6 +2221,7 @@ static int futex_requeue(u32 __user *uaddr1, unsigned int flags, + out_put_key1: + put_futex_key(&key1); + out: ++ free_pi_state_list(&to_free); + return ret ? ret : task_count; + } + +@@ -2217,7 +2245,7 @@ static inline struct futex_hash_bucket *queue_lock(struct futex_q *q) + + q->lock_ptr = &hb->lock; + +- spin_lock(&hb->lock); /* implies smp_mb(); (A) */ ++ raw_spin_lock(&hb->lock); /* implies smp_mb(); (A) */ + return hb; + } + +@@ -2225,7 +2253,7 @@ static inline void + queue_unlock(struct futex_hash_bucket *hb) + __releases(&hb->lock) + { +- spin_unlock(&hb->lock); ++ raw_spin_unlock(&hb->lock); + hb_waiters_dec(hb); + } + +@@ -2264,7 +2292,7 @@ static inline void queue_me(struct futex_q *q, struct futex_hash_bucket *hb) + __releases(&hb->lock) + { + __queue_me(q, hb); +- spin_unlock(&hb->lock); ++ raw_spin_unlock(&hb->lock); + } + + /** +@@ -2280,41 +2308,41 @@ static inline void queue_me(struct futex_q *q, struct futex_hash_bucket *hb) + */ + static int unqueue_me(struct futex_q *q) + { +- spinlock_t *lock_ptr; ++ raw_spinlock_t *lock_ptr; + int ret = 0; + + /* In the common case we don't take the spinlock, which is nice. */ + retry: + /* +- * q->lock_ptr can change between this read and the following spin_lock. +- * Use READ_ONCE to forbid the compiler from reloading q->lock_ptr and +- * optimizing lock_ptr out of the logic below. ++ * q->lock_ptr can change between this read and the following ++ * raw_spin_lock. Use READ_ONCE to forbid the compiler from reloading ++ * q->lock_ptr and optimizing lock_ptr out of the logic below. + */ + lock_ptr = READ_ONCE(q->lock_ptr); + if (lock_ptr != NULL) { +- spin_lock(lock_ptr); ++ raw_spin_lock(lock_ptr); + /* + * q->lock_ptr can change between reading it and +- * spin_lock(), causing us to take the wrong lock. This ++ * raw_spin_lock(), causing us to take the wrong lock. This + * corrects the race condition. + * + * Reasoning goes like this: if we have the wrong lock, + * q->lock_ptr must have changed (maybe several times) +- * between reading it and the spin_lock(). It can +- * change again after the spin_lock() but only if it was +- * already changed before the spin_lock(). It cannot, ++ * between reading it and the raw_spin_lock(). It can ++ * change again after the raw_spin_lock() but only if it was ++ * already changed before the raw_spin_lock(). It cannot, + * however, change back to the original value. Therefore + * we can detect whether we acquired the correct lock. + */ + if (unlikely(lock_ptr != q->lock_ptr)) { +- spin_unlock(lock_ptr); ++ raw_spin_unlock(lock_ptr); + goto retry; + } + __unqueue_futex(q); + + BUG_ON(q->pi_state); + +- spin_unlock(lock_ptr); ++ raw_spin_unlock(lock_ptr); + ret = 1; + } + +@@ -2330,13 +2358,16 @@ static int unqueue_me(struct futex_q *q) + static void unqueue_me_pi(struct futex_q *q) + __releases(q->lock_ptr) + { ++ struct futex_pi_state *ps; ++ + __unqueue_futex(q); + + BUG_ON(!q->pi_state); +- put_pi_state(q->pi_state); ++ ps = __put_pi_state(q->pi_state); + q->pi_state = NULL; + +- spin_unlock(q->lock_ptr); ++ raw_spin_unlock(q->lock_ptr); ++ kfree(ps); + } + + static int fixup_pi_state_owner(u32 __user *uaddr, struct futex_q *q, +@@ -2469,7 +2500,7 @@ static int fixup_pi_state_owner(u32 __user *uaddr, struct futex_q *q, + */ + handle_err: + raw_spin_unlock_irq(&pi_state->pi_mutex.wait_lock); +- spin_unlock(q->lock_ptr); ++ raw_spin_unlock(q->lock_ptr); + + switch (err) { + case -EFAULT: +@@ -2487,7 +2518,7 @@ static int fixup_pi_state_owner(u32 __user *uaddr, struct futex_q *q, + break; + } + +- spin_lock(q->lock_ptr); ++ raw_spin_lock(q->lock_ptr); + raw_spin_lock_irq(&pi_state->pi_mutex.wait_lock); + + /* +@@ -2583,7 +2614,7 @@ static void futex_wait_queue_me(struct futex_hash_bucket *hb, struct futex_q *q, + /* + * The task state is guaranteed to be set before another task can + * wake it. set_current_state() is implemented using smp_store_mb() and +- * queue_me() calls spin_unlock() upon completion, both serializing ++ * queue_me() calls raw_spin_unlock() upon completion, both serializing + * access to the hash list and forcing another memory barrier. + */ + set_current_state(TASK_INTERRUPTIBLE); +@@ -2701,10 +2732,9 @@ static int futex_wait(u32 __user *uaddr, unsigned int flags, u32 val, + if (abs_time) { + to = &timeout; + +- hrtimer_init_on_stack(&to->timer, (flags & FLAGS_CLOCKRT) ? +- CLOCK_REALTIME : CLOCK_MONOTONIC, +- HRTIMER_MODE_ABS); +- hrtimer_init_sleeper(to, current); ++ hrtimer_init_sleeper_on_stack(to, (flags & FLAGS_CLOCKRT) ? ++ CLOCK_REALTIME : CLOCK_MONOTONIC, ++ HRTIMER_MODE_ABS, current); + hrtimer_set_expires_range_ns(&to->timer, *abs_time, + current->timer_slack_ns); + } +@@ -2803,9 +2833,8 @@ static int futex_lock_pi(u32 __user *uaddr, unsigned int flags, + + if (time) { + to = &timeout; +- hrtimer_init_on_stack(&to->timer, CLOCK_REALTIME, +- HRTIMER_MODE_ABS); +- hrtimer_init_sleeper(to, current); ++ hrtimer_init_sleeper_on_stack(to, CLOCK_REALTIME, ++ HRTIMER_MODE_ABS, current); + hrtimer_set_expires(&to->timer, *time); + } + +@@ -2860,7 +2889,7 @@ static int futex_lock_pi(u32 __user *uaddr, unsigned int flags, + goto no_block; + } + +- rt_mutex_init_waiter(&rt_waiter); ++ rt_mutex_init_waiter(&rt_waiter, false); + + /* + * On PREEMPT_RT_FULL, when hb->lock becomes an rt_mutex, we must not +@@ -2876,7 +2905,7 @@ static int futex_lock_pi(u32 __user *uaddr, unsigned int flags, + * before __rt_mutex_start_proxy_lock() is done. + */ + raw_spin_lock_irq(&q.pi_state->pi_mutex.wait_lock); +- spin_unlock(q.lock_ptr); ++ raw_spin_unlock(q.lock_ptr); + /* + * __rt_mutex_start_proxy_lock() unconditionally enqueues the @rt_waiter + * such that futex_unlock_pi() is guaranteed to observe the waiter when +@@ -2897,7 +2926,7 @@ static int futex_lock_pi(u32 __user *uaddr, unsigned int flags, + ret = rt_mutex_wait_proxy_lock(&q.pi_state->pi_mutex, to, &rt_waiter); + + cleanup: +- spin_lock(q.lock_ptr); ++ raw_spin_lock(q.lock_ptr); + /* + * If we failed to acquire the lock (deadlock/signal/timeout), we must + * first acquire the hb->lock before removing the lock from the +@@ -2998,7 +3027,7 @@ static int futex_unlock_pi(u32 __user *uaddr, unsigned int flags) + return ret; + + hb = hash_futex(&key); +- spin_lock(&hb->lock); ++ raw_spin_lock(&hb->lock); + + /* + * Check waiters first. We do not trust user space values at +@@ -3032,7 +3061,7 @@ static int futex_unlock_pi(u32 __user *uaddr, unsigned int flags) + * rt_waiter. Also see the WARN in wake_futex_pi(). + */ + raw_spin_lock_irq(&pi_state->pi_mutex.wait_lock); +- spin_unlock(&hb->lock); ++ raw_spin_unlock(&hb->lock); + + /* drops pi_state->pi_mutex.wait_lock */ + ret = wake_futex_pi(uaddr, uval, pi_state); +@@ -3071,7 +3100,7 @@ static int futex_unlock_pi(u32 __user *uaddr, unsigned int flags) + * owner. + */ + if ((ret = cmpxchg_futex_value_locked(&curval, uaddr, uval, 0))) { +- spin_unlock(&hb->lock); ++ raw_spin_unlock(&hb->lock); + switch (ret) { + case -EFAULT: + goto pi_faulted; +@@ -3091,7 +3120,7 @@ static int futex_unlock_pi(u32 __user *uaddr, unsigned int flags) + ret = (curval == uval) ? 0 : -EAGAIN; + + out_unlock: +- spin_unlock(&hb->lock); ++ raw_spin_unlock(&hb->lock); + out_putkey: + put_futex_key(&key); + return ret; +@@ -3223,10 +3252,9 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + + if (abs_time) { + to = &timeout; +- hrtimer_init_on_stack(&to->timer, (flags & FLAGS_CLOCKRT) ? +- CLOCK_REALTIME : CLOCK_MONOTONIC, +- HRTIMER_MODE_ABS); +- hrtimer_init_sleeper(to, current); ++ hrtimer_init_sleeper_on_stack(to, (flags & FLAGS_CLOCKRT) ? ++ CLOCK_REALTIME : CLOCK_MONOTONIC, ++ HRTIMER_MODE_ABS, current); + hrtimer_set_expires_range_ns(&to->timer, *abs_time, + current->timer_slack_ns); + } +@@ -3235,7 +3263,7 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + * The waiter is allocated on our stack, manipulated by the requeue + * code while we sleep on uaddr. + */ +- rt_mutex_init_waiter(&rt_waiter); ++ rt_mutex_init_waiter(&rt_waiter, false); + + ret = get_futex_key(uaddr2, flags & FLAGS_SHARED, &key2, VERIFY_WRITE); + if (unlikely(ret != 0)) +@@ -3266,9 +3294,9 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + /* Queue the futex_q, drop the hb lock, wait for wakeup. */ + futex_wait_queue_me(hb, &q, to); + +- spin_lock(&hb->lock); ++ raw_spin_lock(&hb->lock); + ret = handle_early_requeue_pi_wakeup(hb, &q, &key2, to); +- spin_unlock(&hb->lock); ++ raw_spin_unlock(&hb->lock); + if (ret) + goto out_put_keys; + +@@ -3288,7 +3316,9 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + * did a lock-steal - fix up the PI-state in that case. + */ + if (q.pi_state && (q.pi_state->owner != current)) { +- spin_lock(q.lock_ptr); ++ struct futex_pi_state *ps_free; ++ ++ raw_spin_lock(q.lock_ptr); + ret = fixup_pi_state_owner(uaddr2, &q, current); + if (ret && rt_mutex_owner(&q.pi_state->pi_mutex) == current) { + pi_state = q.pi_state; +@@ -3298,8 +3328,9 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + * Drop the reference to the pi state which + * the requeue_pi() code acquired for us. + */ +- put_pi_state(q.pi_state); +- spin_unlock(q.lock_ptr); ++ ps_free = __put_pi_state(q.pi_state); ++ raw_spin_unlock(q.lock_ptr); ++ kfree(ps_free); + } + } else { + struct rt_mutex *pi_mutex; +@@ -3313,7 +3344,7 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, + pi_mutex = &q.pi_state->pi_mutex; + ret = rt_mutex_wait_proxy_lock(pi_mutex, to, &rt_waiter); + +- spin_lock(q.lock_ptr); ++ raw_spin_lock(q.lock_ptr); + if (ret && !rt_mutex_cleanup_proxy_lock(pi_mutex, &rt_waiter)) + ret = 0; + +@@ -3750,7 +3781,7 @@ static int __init futex_init(void) + for (i = 0; i < futex_hashsize; i++) { + atomic_set(&futex_queues[i].waiters, 0); + plist_head_init(&futex_queues[i].chain); +- spin_lock_init(&futex_queues[i].lock); ++ raw_spin_lock_init(&futex_queues[i].lock); + } + + return 0; +diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c +index 38554bc35375..06a80bbf78af 100644 +--- a/kernel/irq/handle.c ++++ b/kernel/irq/handle.c +@@ -185,10 +185,16 @@ irqreturn_t handle_irq_event_percpu(struct irq_desc *desc) + { + irqreturn_t retval; + unsigned int flags = 0; ++ struct pt_regs *regs = get_irq_regs(); ++ u64 ip = regs ? instruction_pointer(regs) : 0; + + retval = __handle_irq_event_percpu(desc, &flags); + +- add_interrupt_randomness(desc->irq_data.irq, flags); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ desc->random_ip = ip; ++#else ++ add_interrupt_randomness(desc->irq_data.irq, flags, ip); ++#endif + + if (!noirqdebug) + note_interrupt(desc, retval); +diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c +index cd4f9f3e8345..b2736d7d863b 100644 +--- a/kernel/irq/manage.c ++++ b/kernel/irq/manage.c +@@ -23,6 +23,7 @@ + #include "internals.h" + + #ifdef CONFIG_IRQ_FORCED_THREADING ++# ifndef CONFIG_PREEMPT_RT_BASE + __read_mostly bool force_irqthreads; + EXPORT_SYMBOL_GPL(force_irqthreads); + +@@ -32,6 +33,7 @@ static int __init setup_forced_irqthreads(char *arg) + return 0; + } + early_param("threadirqs", setup_forced_irqthreads); ++# endif + #endif + + static void __synchronize_hardirq(struct irq_desc *desc) +@@ -257,7 +259,12 @@ int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask, + + if (desc->affinity_notify) { + kref_get(&desc->affinity_notify->kref); ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ kthread_schedule_work(&desc->affinity_notify->work); ++#else + schedule_work(&desc->affinity_notify->work); ++#endif + } + irqd_set(data, IRQD_AFFINITY_SET); + +@@ -295,10 +302,8 @@ int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) + } + EXPORT_SYMBOL_GPL(irq_set_affinity_hint); + +-static void irq_affinity_notify(struct work_struct *work) ++static void _irq_affinity_notify(struct irq_affinity_notify *notify) + { +- struct irq_affinity_notify *notify = +- container_of(work, struct irq_affinity_notify, work); + struct irq_desc *desc = irq_to_desc(notify->irq); + cpumask_var_t cpumask; + unsigned long flags; +@@ -320,6 +325,25 @@ static void irq_affinity_notify(struct work_struct *work) + kref_put(¬ify->kref, notify->release); + } + ++#ifdef CONFIG_PREEMPT_RT_BASE ++ ++static void irq_affinity_notify(struct kthread_work *work) ++{ ++ struct irq_affinity_notify *notify = ++ container_of(work, struct irq_affinity_notify, work); ++ _irq_affinity_notify(notify); ++} ++ ++#else ++ ++static void irq_affinity_notify(struct work_struct *work) ++{ ++ struct irq_affinity_notify *notify = ++ container_of(work, struct irq_affinity_notify, work); ++ _irq_affinity_notify(notify); ++} ++#endif ++ + /** + * irq_set_affinity_notifier - control notification of IRQ affinity changes + * @irq: Interrupt for which to enable/disable notification +@@ -348,7 +372,11 @@ irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) + if (notify) { + notify->irq = irq; + kref_init(¬ify->kref); ++#ifdef CONFIG_PREEMPT_RT_BASE ++ kthread_init_work(¬ify->work, irq_affinity_notify); ++#else + INIT_WORK(¬ify->work, irq_affinity_notify); ++#endif + } + + raw_spin_lock_irqsave(&desc->lock, flags); +@@ -357,7 +385,11 @@ irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) + raw_spin_unlock_irqrestore(&desc->lock, flags); + + if (old_notify) { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ kthread_cancel_work_sync(¬ify->work); ++#else + cancel_work_sync(&old_notify->work); ++#endif + kref_put(&old_notify->kref, old_notify->release); + } + +@@ -936,7 +968,15 @@ irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action) + atomic_inc(&desc->threads_handled); + + irq_finalize_oneshot(desc, action); +- local_bh_enable(); ++ /* ++ * Interrupts which have real time requirements can be set up ++ * to avoid softirq processing in the thread handler. This is ++ * safe as these interrupts do not raise soft interrupts. ++ */ ++ if (irq_settings_no_softirq_call(desc)) ++ _local_bh_enable(); ++ else ++ local_bh_enable(); + return ret; + } + +@@ -1034,6 +1074,12 @@ static int irq_thread(void *data) + if (action_ret == IRQ_WAKE_THREAD) + irq_wake_secondary(desc, action); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ migrate_disable(); ++ add_interrupt_randomness(action->irq, 0, ++ desc->random_ip ^ (unsigned long) action); ++ migrate_enable(); ++#endif + wake_threads_waitq(desc); + } + +@@ -1446,6 +1492,9 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) + irqd_set(&desc->irq_data, IRQD_NO_BALANCING); + } + ++ if (new->flags & IRQF_NO_SOFTIRQ_CALL) ++ irq_settings_set_no_softirq_call(desc); ++ + if (irq_settings_can_autoenable(desc)) { + irq_startup(desc, IRQ_RESEND, IRQ_START_COND); + } else { +@@ -2229,7 +2278,7 @@ EXPORT_SYMBOL_GPL(irq_get_irqchip_state); + * This call sets the internal irqchip state of an interrupt, + * depending on the value of @which. + * +- * This function should be called with preemption disabled if the ++ * This function should be called with migration disabled if the + * interrupt controller has per-cpu registers. + */ + int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, +diff --git a/kernel/irq/settings.h b/kernel/irq/settings.h +index e43795cd2ccf..47e2f9e23586 100644 +--- a/kernel/irq/settings.h ++++ b/kernel/irq/settings.h +@@ -17,6 +17,7 @@ enum { + _IRQ_PER_CPU_DEVID = IRQ_PER_CPU_DEVID, + _IRQ_IS_POLLED = IRQ_IS_POLLED, + _IRQ_DISABLE_UNLAZY = IRQ_DISABLE_UNLAZY, ++ _IRQ_NO_SOFTIRQ_CALL = IRQ_NO_SOFTIRQ_CALL, + _IRQF_MODIFY_MASK = IRQF_MODIFY_MASK, + }; + +@@ -31,6 +32,7 @@ enum { + #define IRQ_PER_CPU_DEVID GOT_YOU_MORON + #define IRQ_IS_POLLED GOT_YOU_MORON + #define IRQ_DISABLE_UNLAZY GOT_YOU_MORON ++#define IRQ_NO_SOFTIRQ_CALL GOT_YOU_MORON + #undef IRQF_MODIFY_MASK + #define IRQF_MODIFY_MASK GOT_YOU_MORON + +@@ -41,6 +43,16 @@ irq_settings_clr_and_set(struct irq_desc *desc, u32 clr, u32 set) + desc->status_use_accessors |= (set & _IRQF_MODIFY_MASK); + } + ++static inline bool irq_settings_no_softirq_call(struct irq_desc *desc) ++{ ++ return desc->status_use_accessors & _IRQ_NO_SOFTIRQ_CALL; ++} ++ ++static inline void irq_settings_set_no_softirq_call(struct irq_desc *desc) ++{ ++ desc->status_use_accessors |= _IRQ_NO_SOFTIRQ_CALL; ++} ++ + static inline bool irq_settings_is_per_cpu(struct irq_desc *desc) + { + return desc->status_use_accessors & _IRQ_PER_CPU; +diff --git a/kernel/irq/spurious.c b/kernel/irq/spurious.c +index d867d6ddafdd..cd12ee86c01e 100644 +--- a/kernel/irq/spurious.c ++++ b/kernel/irq/spurious.c +@@ -442,6 +442,10 @@ MODULE_PARM_DESC(noirqdebug, "Disable irq lockup detection when true"); + + static int __init irqfixup_setup(char *str) + { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ pr_warn("irqfixup boot option not supported w/ CONFIG_PREEMPT_RT_BASE\n"); ++ return 1; ++#endif + irqfixup = 1; + printk(KERN_WARNING "Misrouted IRQ fixup support enabled.\n"); + printk(KERN_WARNING "This may impact system performance.\n"); +@@ -454,6 +458,10 @@ module_param(irqfixup, int, 0644); + + static int __init irqpoll_setup(char *str) + { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ pr_warn("irqpoll boot option not supported w/ CONFIG_PREEMPT_RT_BASE\n"); ++ return 1; ++#endif + irqfixup = 2; + printk(KERN_WARNING "Misrouted IRQ fixup and polling support " + "enabled\n"); +diff --git a/kernel/irq_work.c b/kernel/irq_work.c +index 73288914ed5e..2940622da5b3 100644 +--- a/kernel/irq_work.c ++++ b/kernel/irq_work.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + + +@@ -57,29 +58,35 @@ void __weak arch_irq_work_raise(void) + } + + /* Enqueue on current CPU, work must already be claimed and preempt disabled */ +-static void __irq_work_queue_local(struct irq_work *work) ++static void __irq_work_queue_local(struct irq_work *work, struct llist_head *list) + { +- /* If the work is "lazy", handle it from next tick if any */ +- if (work->flags & IRQ_WORK_LAZY) { +- if (llist_add(&work->llnode, this_cpu_ptr(&lazy_list)) && +- tick_nohz_tick_stopped()) +- arch_irq_work_raise(); +- } else { +- if (llist_add(&work->llnode, this_cpu_ptr(&raised_list))) +- arch_irq_work_raise(); +- } ++ bool empty; ++ ++ empty = llist_add(&work->llnode, list); ++ ++ if (empty && ++ (!(work->flags & IRQ_WORK_LAZY) || ++ tick_nohz_tick_stopped())) ++ arch_irq_work_raise(); + } + + /* Enqueue the irq work @work on the current CPU */ + bool irq_work_queue(struct irq_work *work) + { ++ struct llist_head *list; ++ + /* Only queue if not already pending */ + if (!irq_work_claim(work)) + return false; + + /* Queue the entry and raise the IPI if needed. */ + preempt_disable(); +- __irq_work_queue_local(work); ++ if (IS_ENABLED(CONFIG_PREEMPT_RT_FULL) && !(work->flags & IRQ_WORK_HARD_IRQ)) ++ list = this_cpu_ptr(&lazy_list); ++ else ++ list = this_cpu_ptr(&raised_list); ++ ++ __irq_work_queue_local(work, list); + preempt_enable(); + + return true; +@@ -98,6 +105,9 @@ bool irq_work_queue_on(struct irq_work *work, int cpu) + return irq_work_queue(work); + + #else /* CONFIG_SMP: */ ++ struct llist_head *list; ++ bool lazy_work, realtime = IS_ENABLED(CONFIG_PREEMPT_RT_FULL); ++ + /* All work should have been flushed before going offline */ + WARN_ON_ONCE(cpu_is_offline(cpu)); + +@@ -106,13 +116,21 @@ bool irq_work_queue_on(struct irq_work *work, int cpu) + return false; + + preempt_disable(); ++ ++ lazy_work = work->flags & IRQ_WORK_LAZY; ++ ++ if (lazy_work || (realtime && !(work->flags & IRQ_WORK_HARD_IRQ))) ++ list = &per_cpu(lazy_list, cpu); ++ else ++ list = &per_cpu(raised_list, cpu); ++ + if (cpu != smp_processor_id()) { + /* Arch remote IPI send/receive backend aren't NMI safe */ + WARN_ON_ONCE(in_nmi()); +- if (llist_add(&work->llnode, &per_cpu(raised_list, cpu))) ++ if (llist_add(&work->llnode, list)) + arch_send_call_function_single_ipi(cpu); + } else { +- __irq_work_queue_local(work); ++ __irq_work_queue_local(work, list); + } + preempt_enable(); + +@@ -128,9 +146,8 @@ bool irq_work_needs_cpu(void) + raised = this_cpu_ptr(&raised_list); + lazy = this_cpu_ptr(&lazy_list); + +- if (llist_empty(raised) || arch_irq_work_has_interrupt()) +- if (llist_empty(lazy)) +- return false; ++ if (llist_empty(raised) && llist_empty(lazy)) ++ return false; + + /* All work should have been flushed before going offline */ + WARN_ON_ONCE(cpu_is_offline(smp_processor_id())); +@@ -144,8 +161,12 @@ static void irq_work_run_list(struct llist_head *list) + struct llist_node *llnode; + unsigned long flags; + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ /* ++ * nort: On RT IRQ-work may run in SOFTIRQ context. ++ */ + BUG_ON(!irqs_disabled()); +- ++#endif + if (llist_empty(list)) + return; + +@@ -177,7 +198,16 @@ static void irq_work_run_list(struct llist_head *list) + void irq_work_run(void) + { + irq_work_run_list(this_cpu_ptr(&raised_list)); +- irq_work_run_list(this_cpu_ptr(&lazy_list)); ++ if (IS_ENABLED(CONFIG_PREEMPT_RT_FULL)) { ++ /* ++ * NOTE: we raise softirq via IPI for safety, ++ * and execute in irq_work_tick() to move the ++ * overhead from hard to soft irq context. ++ */ ++ if (!llist_empty(this_cpu_ptr(&lazy_list))) ++ raise_softirq(TIMER_SOFTIRQ); ++ } else ++ irq_work_run_list(this_cpu_ptr(&lazy_list)); + } + EXPORT_SYMBOL_GPL(irq_work_run); + +@@ -187,8 +217,17 @@ void irq_work_tick(void) + + if (!llist_empty(raised) && !arch_irq_work_has_interrupt()) + irq_work_run_list(raised); ++ ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT_FULL)) ++ irq_work_run_list(this_cpu_ptr(&lazy_list)); ++} ++ ++#if defined(CONFIG_IRQ_WORK) && defined(CONFIG_PREEMPT_RT_FULL) ++void irq_work_tick_soft(void) ++{ + irq_work_run_list(this_cpu_ptr(&lazy_list)); + } ++#endif + + /* + * Synchronize against the irq_work @entry, ensures the entry is not +diff --git a/kernel/ksysfs.c b/kernel/ksysfs.c +index 46ba853656f6..9a23632b6294 100644 +--- a/kernel/ksysfs.c ++++ b/kernel/ksysfs.c +@@ -140,6 +140,15 @@ KERNEL_ATTR_RO(vmcoreinfo); + + #endif /* CONFIG_CRASH_CORE */ + ++#if defined(CONFIG_PREEMPT_RT_FULL) ++static ssize_t realtime_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ return sprintf(buf, "%d\n", 1); ++} ++KERNEL_ATTR_RO(realtime); ++#endif ++ + /* whether file capabilities are enabled */ + static ssize_t fscaps_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +@@ -230,6 +239,9 @@ static struct attribute * kernel_attrs[] = { + #ifndef CONFIG_TINY_RCU + &rcu_expedited_attr.attr, + &rcu_normal_attr.attr, ++#endif ++#ifdef CONFIG_PREEMPT_RT_FULL ++ &realtime_attr.attr, + #endif + NULL + }; +diff --git a/kernel/kthread.c b/kernel/kthread.c +index 087d18d771b5..9db017761a1f 100644 +--- a/kernel/kthread.c ++++ b/kernel/kthread.c +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + #include + + static DEFINE_SPINLOCK(kthread_create_lock); +@@ -599,7 +600,7 @@ void __kthread_init_worker(struct kthread_worker *worker, + struct lock_class_key *key) + { + memset(worker, 0, sizeof(struct kthread_worker)); +- spin_lock_init(&worker->lock); ++ raw_spin_lock_init(&worker->lock); + lockdep_set_class_and_name(&worker->lock, key, name); + INIT_LIST_HEAD(&worker->work_list); + INIT_LIST_HEAD(&worker->delayed_work_list); +@@ -641,21 +642,21 @@ int kthread_worker_fn(void *worker_ptr) + + if (kthread_should_stop()) { + __set_current_state(TASK_RUNNING); +- spin_lock_irq(&worker->lock); ++ raw_spin_lock_irq(&worker->lock); + worker->task = NULL; +- spin_unlock_irq(&worker->lock); ++ raw_spin_unlock_irq(&worker->lock); + return 0; + } + + work = NULL; +- spin_lock_irq(&worker->lock); ++ raw_spin_lock_irq(&worker->lock); + if (!list_empty(&worker->work_list)) { + work = list_first_entry(&worker->work_list, + struct kthread_work, node); + list_del_init(&work->node); + } + worker->current_work = work; +- spin_unlock_irq(&worker->lock); ++ raw_spin_unlock_irq(&worker->lock); + + if (work) { + __set_current_state(TASK_RUNNING); +@@ -812,12 +813,12 @@ bool kthread_queue_work(struct kthread_worker *worker, + bool ret = false; + unsigned long flags; + +- spin_lock_irqsave(&worker->lock, flags); ++ raw_spin_lock_irqsave(&worker->lock, flags); + if (!queuing_blocked(worker, work)) { + kthread_insert_work(worker, work, &worker->work_list); + ret = true; + } +- spin_unlock_irqrestore(&worker->lock, flags); ++ raw_spin_unlock_irqrestore(&worker->lock, flags); + return ret; + } + EXPORT_SYMBOL_GPL(kthread_queue_work); +@@ -843,7 +844,7 @@ void kthread_delayed_work_timer_fn(struct timer_list *t) + if (WARN_ON_ONCE(!worker)) + return; + +- spin_lock(&worker->lock); ++ raw_spin_lock(&worker->lock); + /* Work must not be used with >1 worker, see kthread_queue_work(). */ + WARN_ON_ONCE(work->worker != worker); + +@@ -852,7 +853,7 @@ void kthread_delayed_work_timer_fn(struct timer_list *t) + list_del_init(&work->node); + kthread_insert_work(worker, work, &worker->work_list); + +- spin_unlock(&worker->lock); ++ raw_spin_unlock(&worker->lock); + } + EXPORT_SYMBOL(kthread_delayed_work_timer_fn); + +@@ -908,14 +909,14 @@ bool kthread_queue_delayed_work(struct kthread_worker *worker, + unsigned long flags; + bool ret = false; + +- spin_lock_irqsave(&worker->lock, flags); ++ raw_spin_lock_irqsave(&worker->lock, flags); + + if (!queuing_blocked(worker, work)) { + __kthread_queue_delayed_work(worker, dwork, delay); + ret = true; + } + +- spin_unlock_irqrestore(&worker->lock, flags); ++ raw_spin_unlock_irqrestore(&worker->lock, flags); + return ret; + } + EXPORT_SYMBOL_GPL(kthread_queue_delayed_work); +@@ -951,7 +952,7 @@ void kthread_flush_work(struct kthread_work *work) + if (!worker) + return; + +- spin_lock_irq(&worker->lock); ++ raw_spin_lock_irq(&worker->lock); + /* Work must not be used with >1 worker, see kthread_queue_work(). */ + WARN_ON_ONCE(work->worker != worker); + +@@ -963,7 +964,7 @@ void kthread_flush_work(struct kthread_work *work) + else + noop = true; + +- spin_unlock_irq(&worker->lock); ++ raw_spin_unlock_irq(&worker->lock); + + if (!noop) + wait_for_completion(&fwork.done); +@@ -996,9 +997,9 @@ static bool __kthread_cancel_work(struct kthread_work *work, bool is_dwork, + * any queuing is blocked by setting the canceling counter. + */ + work->canceling++; +- spin_unlock_irqrestore(&worker->lock, *flags); ++ raw_spin_unlock_irqrestore(&worker->lock, *flags); + del_timer_sync(&dwork->timer); +- spin_lock_irqsave(&worker->lock, *flags); ++ raw_spin_lock_irqsave(&worker->lock, *flags); + work->canceling--; + } + +@@ -1045,7 +1046,7 @@ bool kthread_mod_delayed_work(struct kthread_worker *worker, + unsigned long flags; + int ret = false; + +- spin_lock_irqsave(&worker->lock, flags); ++ raw_spin_lock_irqsave(&worker->lock, flags); + + /* Do not bother with canceling when never queued. */ + if (!work->worker) +@@ -1062,7 +1063,7 @@ bool kthread_mod_delayed_work(struct kthread_worker *worker, + fast_queue: + __kthread_queue_delayed_work(worker, dwork, delay); + out: +- spin_unlock_irqrestore(&worker->lock, flags); ++ raw_spin_unlock_irqrestore(&worker->lock, flags); + return ret; + } + EXPORT_SYMBOL_GPL(kthread_mod_delayed_work); +@@ -1076,7 +1077,7 @@ static bool __kthread_cancel_work_sync(struct kthread_work *work, bool is_dwork) + if (!worker) + goto out; + +- spin_lock_irqsave(&worker->lock, flags); ++ raw_spin_lock_irqsave(&worker->lock, flags); + /* Work must not be used with >1 worker, see kthread_queue_work(). */ + WARN_ON_ONCE(work->worker != worker); + +@@ -1090,13 +1091,13 @@ static bool __kthread_cancel_work_sync(struct kthread_work *work, bool is_dwork) + * In the meantime, block any queuing by setting the canceling counter. + */ + work->canceling++; +- spin_unlock_irqrestore(&worker->lock, flags); ++ raw_spin_unlock_irqrestore(&worker->lock, flags); + kthread_flush_work(work); +- spin_lock_irqsave(&worker->lock, flags); ++ raw_spin_lock_irqsave(&worker->lock, flags); + work->canceling--; + + out_fast: +- spin_unlock_irqrestore(&worker->lock, flags); ++ raw_spin_unlock_irqrestore(&worker->lock, flags); + out: + return ret; + } +@@ -1180,6 +1181,19 @@ void kthread_destroy_worker(struct kthread_worker *worker) + } + EXPORT_SYMBOL(kthread_destroy_worker); + ++DEFINE_KTHREAD_WORKER(kthread_global_worker); ++EXPORT_SYMBOL(kthread_global_worker); ++ ++__init void kthread_init_global_worker(void) ++{ ++ kthread_global_worker.task = kthread_create(kthread_worker_fn, ++ &kthread_global_worker, ++ "kswork"); ++ if (WARN_ON(IS_ERR(kthread_global_worker.task))) ++ return; ++ wake_up_process(kthread_global_worker.task); ++} ++ + #ifdef CONFIG_BLK_CGROUP + /** + * kthread_associate_blkcg - associate blkcg to current kthread +diff --git a/kernel/locking/Makefile b/kernel/locking/Makefile +index 392c7f23af76..c0bf04b6b965 100644 +--- a/kernel/locking/Makefile ++++ b/kernel/locking/Makefile +@@ -3,7 +3,7 @@ + # and is generally not a function of system call inputs. + KCOV_INSTRUMENT := n + +-obj-y += mutex.o semaphore.o rwsem.o percpu-rwsem.o ++obj-y += semaphore.o percpu-rwsem.o + + ifdef CONFIG_FUNCTION_TRACER + CFLAGS_REMOVE_lockdep.o = $(CC_FLAGS_FTRACE) +@@ -12,7 +12,11 @@ CFLAGS_REMOVE_mutex-debug.o = $(CC_FLAGS_FTRACE) + CFLAGS_REMOVE_rtmutex-debug.o = $(CC_FLAGS_FTRACE) + endif + ++ifneq ($(CONFIG_PREEMPT_RT_FULL),y) ++obj-y += mutex.o + obj-$(CONFIG_DEBUG_MUTEXES) += mutex-debug.o ++endif ++obj-y += rwsem.o + obj-$(CONFIG_LOCKDEP) += lockdep.o + ifeq ($(CONFIG_PROC_FS),y) + obj-$(CONFIG_LOCKDEP) += lockdep_proc.o +@@ -25,8 +29,11 @@ obj-$(CONFIG_RT_MUTEXES) += rtmutex.o + obj-$(CONFIG_DEBUG_RT_MUTEXES) += rtmutex-debug.o + obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o + obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock_debug.o ++ifneq ($(CONFIG_PREEMPT_RT_FULL),y) + obj-$(CONFIG_RWSEM_GENERIC_SPINLOCK) += rwsem-spinlock.o + obj-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem-xadd.o ++endif ++obj-$(CONFIG_PREEMPT_RT_FULL) += mutex-rt.o rwsem-rt.o rwlock-rt.o + obj-$(CONFIG_QUEUED_RWLOCKS) += qrwlock.o + obj-$(CONFIG_LOCK_TORTURE_TEST) += locktorture.o + obj-$(CONFIG_WW_MUTEX_SELFTEST) += test-ww_mutex.o +diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c +index 26b57e24476f..6daeb369f691 100644 +--- a/kernel/locking/lockdep.c ++++ b/kernel/locking/lockdep.c +@@ -3823,6 +3823,7 @@ static void check_flags(unsigned long flags) + } + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * We dont accurately track softirq state in e.g. + * hardirq contexts (such as on 4KSTACKS), so only +@@ -3837,6 +3838,7 @@ static void check_flags(unsigned long flags) + DEBUG_LOCKS_WARN_ON(!current->softirqs_enabled); + } + } ++#endif + + if (!debug_locks) + print_irqtrace_events(current); +diff --git a/kernel/locking/locktorture.c b/kernel/locking/locktorture.c +index 7d0b0ed74404..a81e6ef33a04 100644 +--- a/kernel/locking/locktorture.c ++++ b/kernel/locking/locktorture.c +@@ -29,7 +29,6 @@ + #include + #include + #include +-#include + #include + #include + #include +diff --git a/kernel/locking/mutex-rt.c b/kernel/locking/mutex-rt.c +new file mode 100644 +index 000000000000..4f81595c0f52 +--- /dev/null ++++ b/kernel/locking/mutex-rt.c +@@ -0,0 +1,223 @@ ++/* ++ * kernel/rt.c ++ * ++ * Real-Time Preemption Support ++ * ++ * started by Ingo Molnar: ++ * ++ * Copyright (C) 2004-2006 Red Hat, Inc., Ingo Molnar ++ * Copyright (C) 2006, Timesys Corp., Thomas Gleixner ++ * ++ * historic credit for proving that Linux spinlocks can be implemented via ++ * RT-aware mutexes goes to many people: The Pmutex project (Dirk Grambow ++ * and others) who prototyped it on 2.4 and did lots of comparative ++ * research and analysis; TimeSys, for proving that you can implement a ++ * fully preemptible kernel via the use of IRQ threading and mutexes; ++ * Bill Huey for persuasively arguing on lkml that the mutex model is the ++ * right one; and to MontaVista, who ported pmutexes to 2.6. ++ * ++ * This code is a from-scratch implementation and is not based on pmutexes, ++ * but the idea of converting spinlocks to mutexes is used here too. ++ * ++ * lock debugging, locking tree, deadlock detection: ++ * ++ * Copyright (C) 2004, LynuxWorks, Inc., Igor Manyilov, Bill Huey ++ * Released under the General Public License (GPL). ++ * ++ * Includes portions of the generic R/W semaphore implementation from: ++ * ++ * Copyright (c) 2001 David Howells (dhowells@redhat.com). ++ * - Derived partially from idea by Andrea Arcangeli ++ * - Derived also from comments by Linus ++ * ++ * Pending ownership of locks and ownership stealing: ++ * ++ * Copyright (C) 2005, Kihon Technologies Inc., Steven Rostedt ++ * ++ * (also by Steven Rostedt) ++ * - Converted single pi_lock to individual task locks. ++ * ++ * By Esben Nielsen: ++ * Doing priority inheritance with help of the scheduler. ++ * ++ * Copyright (C) 2006, Timesys Corp., Thomas Gleixner ++ * - major rework based on Esben Nielsens initial patch ++ * - replaced thread_info references by task_struct refs ++ * - removed task->pending_owner dependency ++ * - BKL drop/reacquire for semaphore style locks to avoid deadlocks ++ * in the scheduler return path as discussed with Steven Rostedt ++ * ++ * Copyright (C) 2006, Kihon Technologies Inc. ++ * Steven Rostedt ++ * - debugged and patched Thomas Gleixner's rework. ++ * - added back the cmpxchg to the rework. ++ * - turned atomic require back on for SMP. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "rtmutex_common.h" ++ ++/* ++ * struct mutex functions ++ */ ++void __mutex_do_init(struct mutex *mutex, const char *name, ++ struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held lock: ++ */ ++ debug_check_no_locks_freed((void *)mutex, sizeof(*mutex)); ++ lockdep_init_map(&mutex->dep_map, name, key, 0); ++#endif ++ mutex->lock.save_state = 0; ++} ++EXPORT_SYMBOL(__mutex_do_init); ++ ++void __lockfunc _mutex_lock(struct mutex *lock) ++{ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ __rt_mutex_lock_state(&lock->lock, TASK_UNINTERRUPTIBLE); ++} ++EXPORT_SYMBOL(_mutex_lock); ++ ++void __lockfunc _mutex_lock_io(struct mutex *lock) ++{ ++ int token; ++ ++ token = io_schedule_prepare(); ++ _mutex_lock(lock); ++ io_schedule_finish(token); ++} ++EXPORT_SYMBOL_GPL(_mutex_lock_io); ++ ++int __lockfunc _mutex_lock_interruptible(struct mutex *lock) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ ret = __rt_mutex_lock_state(&lock->lock, TASK_INTERRUPTIBLE); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_interruptible); ++ ++int __lockfunc _mutex_lock_killable(struct mutex *lock) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ ret = __rt_mutex_lock_state(&lock->lock, TASK_KILLABLE); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_killable); ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++void __lockfunc _mutex_lock_nested(struct mutex *lock, int subclass) ++{ ++ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); ++ __rt_mutex_lock_state(&lock->lock, TASK_UNINTERRUPTIBLE); ++} ++EXPORT_SYMBOL(_mutex_lock_nested); ++ ++void __lockfunc _mutex_lock_io_nested(struct mutex *lock, int subclass) ++{ ++ int token; ++ ++ token = io_schedule_prepare(); ++ ++ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); ++ __rt_mutex_lock_state(&lock->lock, TASK_UNINTERRUPTIBLE); ++ ++ io_schedule_finish(token); ++} ++EXPORT_SYMBOL_GPL(_mutex_lock_io_nested); ++ ++void __lockfunc _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest) ++{ ++ mutex_acquire_nest(&lock->dep_map, 0, 0, nest, _RET_IP_); ++ __rt_mutex_lock_state(&lock->lock, TASK_UNINTERRUPTIBLE); ++} ++EXPORT_SYMBOL(_mutex_lock_nest_lock); ++ ++int __lockfunc _mutex_lock_interruptible_nested(struct mutex *lock, int subclass) ++{ ++ int ret; ++ ++ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); ++ ret = __rt_mutex_lock_state(&lock->lock, TASK_INTERRUPTIBLE); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_interruptible_nested); ++ ++int __lockfunc _mutex_lock_killable_nested(struct mutex *lock, int subclass) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, subclass, 0, _RET_IP_); ++ ret = __rt_mutex_lock_state(&lock->lock, TASK_KILLABLE); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_killable_nested); ++#endif ++ ++int __lockfunc _mutex_trylock(struct mutex *lock) ++{ ++ int ret = __rt_mutex_trylock(&lock->lock); ++ ++ if (ret) ++ mutex_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_trylock); ++ ++void __lockfunc _mutex_unlock(struct mutex *lock) ++{ ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ __rt_mutex_unlock(&lock->lock); ++} ++EXPORT_SYMBOL(_mutex_unlock); ++ ++/** ++ * atomic_dec_and_mutex_lock - return holding mutex if we dec to 0 ++ * @cnt: the atomic which we are to dec ++ * @lock: the mutex to return holding if we dec to 0 ++ * ++ * return true and hold lock if we dec to 0, return false otherwise ++ */ ++int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock) ++{ ++ /* dec if we can't possibly hit 0 */ ++ if (atomic_add_unless(cnt, -1, 1)) ++ return 0; ++ /* we might hit 0, so take the lock */ ++ mutex_lock(lock); ++ if (!atomic_dec_and_test(cnt)) { ++ /* when we actually did the dec, we didn't hit 0 */ ++ mutex_unlock(lock); ++ return 0; ++ } ++ /* we hit 0, and we hold the lock */ ++ return 1; ++} ++EXPORT_SYMBOL(atomic_dec_and_mutex_lock); +diff --git a/kernel/locking/rtmutex.c b/kernel/locking/rtmutex.c +index 9562aaa2afdc..44a33057a83a 100644 +--- a/kernel/locking/rtmutex.c ++++ b/kernel/locking/rtmutex.c +@@ -7,6 +7,11 @@ + * Copyright (C) 2005-2006 Timesys Corp., Thomas Gleixner + * Copyright (C) 2005 Kihon Technologies Inc., Steven Rostedt + * Copyright (C) 2006 Esben Nielsen ++ * Adaptive Spinlocks: ++ * Copyright (C) 2008 Novell, Inc., Gregory Haskins, Sven Dietrich, ++ * and Peter Morreale, ++ * Adaptive Spinlocks simplification: ++ * Copyright (C) 2008 Red Hat, Inc., Steven Rostedt + * + * See Documentation/locking/rt-mutex-design.txt for details. + */ +@@ -18,6 +23,8 @@ + #include + #include + #include ++#include ++#include + + #include "rtmutex_common.h" + +@@ -228,7 +235,7 @@ static inline bool unlock_rt_mutex_safe(struct rt_mutex *lock, + * Only use with rt_mutex_waiter_{less,equal}() + */ + #define task_to_waiter(p) \ +- &(struct rt_mutex_waiter){ .prio = (p)->prio, .deadline = (p)->dl.deadline } ++ &(struct rt_mutex_waiter){ .prio = (p)->prio, .deadline = (p)->dl.deadline, .task = (p) } + + static inline int + rt_mutex_waiter_less(struct rt_mutex_waiter *left, +@@ -268,6 +275,27 @@ rt_mutex_waiter_equal(struct rt_mutex_waiter *left, + return 1; + } + ++#define STEAL_NORMAL 0 ++#define STEAL_LATERAL 1 ++ ++static inline int ++rt_mutex_steal(struct rt_mutex *lock, struct rt_mutex_waiter *waiter, int mode) ++{ ++ struct rt_mutex_waiter *top_waiter = rt_mutex_top_waiter(lock); ++ ++ if (waiter == top_waiter || rt_mutex_waiter_less(waiter, top_waiter)) ++ return 1; ++ ++ /* ++ * Note that RT tasks are excluded from lateral-steals ++ * to prevent the introduction of an unbounded latency. ++ */ ++ if (mode == STEAL_NORMAL || rt_task(waiter->task)) ++ return 0; ++ ++ return rt_mutex_waiter_equal(waiter, top_waiter); ++} ++ + static void + rt_mutex_enqueue(struct rt_mutex *lock, struct rt_mutex_waiter *waiter) + { +@@ -372,6 +400,14 @@ static bool rt_mutex_cond_detect_deadlock(struct rt_mutex_waiter *waiter, + return debug_rt_mutex_detect_deadlock(waiter, chwalk); + } + ++static void rt_mutex_wake_waiter(struct rt_mutex_waiter *waiter) ++{ ++ if (waiter->savestate) ++ wake_up_lock_sleeper(waiter->task); ++ else ++ wake_up_process(waiter->task); ++} ++ + /* + * Max number of times we'll walk the boosting chain: + */ +@@ -696,13 +732,16 @@ static int rt_mutex_adjust_prio_chain(struct task_struct *task, + * follow here. This is the end of the chain we are walking. + */ + if (!rt_mutex_owner(lock)) { ++ struct rt_mutex_waiter *lock_top_waiter; ++ + /* + * If the requeue [7] above changed the top waiter, + * then we need to wake the new top waiter up to try + * to get the lock. + */ +- if (prerequeue_top_waiter != rt_mutex_top_waiter(lock)) +- wake_up_process(rt_mutex_top_waiter(lock)->task); ++ lock_top_waiter = rt_mutex_top_waiter(lock); ++ if (prerequeue_top_waiter != lock_top_waiter) ++ rt_mutex_wake_waiter(lock_top_waiter); + raw_spin_unlock_irq(&lock->wait_lock); + return 0; + } +@@ -804,9 +843,11 @@ static int rt_mutex_adjust_prio_chain(struct task_struct *task, + * @task: The task which wants to acquire the lock + * @waiter: The waiter that is queued to the lock's wait tree if the + * callsite called task_blocked_on_lock(), otherwise NULL ++ * @mode: Lock steal mode (STEAL_NORMAL, STEAL_LATERAL) + */ +-static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, +- struct rt_mutex_waiter *waiter) ++static int __try_to_take_rt_mutex(struct rt_mutex *lock, ++ struct task_struct *task, ++ struct rt_mutex_waiter *waiter, int mode) + { + lockdep_assert_held(&lock->wait_lock); + +@@ -842,12 +883,11 @@ static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, + */ + if (waiter) { + /* +- * If waiter is not the highest priority waiter of +- * @lock, give up. ++ * If waiter is not the highest priority waiter of @lock, ++ * or its peer when lateral steal is allowed, give up. + */ +- if (waiter != rt_mutex_top_waiter(lock)) ++ if (!rt_mutex_steal(lock, waiter, mode)) + return 0; +- + /* + * We can acquire the lock. Remove the waiter from the + * lock waiters tree. +@@ -865,14 +905,12 @@ static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, + */ + if (rt_mutex_has_waiters(lock)) { + /* +- * If @task->prio is greater than or equal to +- * the top waiter priority (kernel view), +- * @task lost. ++ * If @task->prio is greater than the top waiter ++ * priority (kernel view), or equal to it when a ++ * lateral steal is forbidden, @task lost. + */ +- if (!rt_mutex_waiter_less(task_to_waiter(task), +- rt_mutex_top_waiter(lock))) ++ if (!rt_mutex_steal(lock, task_to_waiter(task), mode)) + return 0; +- + /* + * The current top waiter stays enqueued. We + * don't have to change anything in the lock +@@ -919,6 +957,338 @@ static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, + return 1; + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * preemptible spin_lock functions: ++ */ ++static inline void rt_spin_lock_fastlock(struct rt_mutex *lock, ++ void (*slowfn)(struct rt_mutex *lock)) ++{ ++ might_sleep_no_state_check(); ++ ++ if (likely(rt_mutex_cmpxchg_acquire(lock, NULL, current))) ++ return; ++ else ++ slowfn(lock); ++} ++ ++static inline void rt_spin_lock_fastunlock(struct rt_mutex *lock, ++ void (*slowfn)(struct rt_mutex *lock)) ++{ ++ if (likely(rt_mutex_cmpxchg_release(lock, current, NULL))) ++ return; ++ else ++ slowfn(lock); ++} ++#ifdef CONFIG_SMP ++/* ++ * Note that owner is a speculative pointer and dereferencing relies ++ * on rcu_read_lock() and the check against the lock owner. ++ */ ++static int adaptive_wait(struct rt_mutex *lock, ++ struct task_struct *owner) ++{ ++ int res = 0; ++ ++ rcu_read_lock(); ++ for (;;) { ++ if (owner != rt_mutex_owner(lock)) ++ break; ++ /* ++ * Ensure that owner->on_cpu is dereferenced _after_ ++ * checking the above to be valid. ++ */ ++ barrier(); ++ if (!owner->on_cpu) { ++ res = 1; ++ break; ++ } ++ cpu_relax(); ++ } ++ rcu_read_unlock(); ++ return res; ++} ++#else ++static int adaptive_wait(struct rt_mutex *lock, ++ struct task_struct *orig_owner) ++{ ++ return 1; ++} ++#endif ++ ++static int task_blocks_on_rt_mutex(struct rt_mutex *lock, ++ struct rt_mutex_waiter *waiter, ++ struct task_struct *task, ++ enum rtmutex_chainwalk chwalk); ++/* ++ * Slow path lock function spin_lock style: this variant is very ++ * careful not to miss any non-lock wakeups. ++ * ++ * We store the current state under p->pi_lock in p->saved_state and ++ * the try_to_wake_up() code handles this accordingly. ++ */ ++void __sched rt_spin_lock_slowlock_locked(struct rt_mutex *lock, ++ struct rt_mutex_waiter *waiter, ++ unsigned long flags) ++{ ++ struct task_struct *lock_owner, *self = current; ++ struct rt_mutex_waiter *top_waiter; ++ int ret; ++ ++ if (__try_to_take_rt_mutex(lock, self, NULL, STEAL_LATERAL)) ++ return; ++ ++ BUG_ON(rt_mutex_owner(lock) == self); ++ ++ /* ++ * We save whatever state the task is in and we'll restore it ++ * after acquiring the lock taking real wakeups into account ++ * as well. We are serialized via pi_lock against wakeups. See ++ * try_to_wake_up(). ++ */ ++ raw_spin_lock(&self->pi_lock); ++ self->saved_state = self->state; ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock(&self->pi_lock); ++ ++ ret = task_blocks_on_rt_mutex(lock, waiter, self, RT_MUTEX_MIN_CHAINWALK); ++ BUG_ON(ret); ++ ++ for (;;) { ++ /* Try to acquire the lock again. */ ++ if (__try_to_take_rt_mutex(lock, self, waiter, STEAL_LATERAL)) ++ break; ++ ++ top_waiter = rt_mutex_top_waiter(lock); ++ lock_owner = rt_mutex_owner(lock); ++ ++ raw_spin_unlock_irqrestore(&lock->wait_lock, flags); ++ ++ debug_rt_mutex_print_deadlock(waiter); ++ ++ if (top_waiter != waiter || adaptive_wait(lock, lock_owner)) ++ schedule(); ++ ++ raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ ++ raw_spin_lock(&self->pi_lock); ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock(&self->pi_lock); ++ } ++ ++ /* ++ * Restore the task state to current->saved_state. We set it ++ * to the original state above and the try_to_wake_up() code ++ * has possibly updated it when a real (non-rtmutex) wakeup ++ * happened while we were blocked. Clear saved_state so ++ * try_to_wakeup() does not get confused. ++ */ ++ raw_spin_lock(&self->pi_lock); ++ __set_current_state_no_track(self->saved_state); ++ self->saved_state = TASK_RUNNING; ++ raw_spin_unlock(&self->pi_lock); ++ ++ /* ++ * try_to_take_rt_mutex() sets the waiter bit ++ * unconditionally. We might have to fix that up: ++ */ ++ fixup_rt_mutex_waiters(lock); ++ ++ BUG_ON(rt_mutex_has_waiters(lock) && waiter == rt_mutex_top_waiter(lock)); ++ BUG_ON(!RB_EMPTY_NODE(&waiter->tree_entry)); ++} ++ ++static void noinline __sched rt_spin_lock_slowlock(struct rt_mutex *lock) ++{ ++ struct rt_mutex_waiter waiter; ++ unsigned long flags; ++ ++ rt_mutex_init_waiter(&waiter, true); ++ ++ raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ rt_spin_lock_slowlock_locked(lock, &waiter, flags); ++ raw_spin_unlock_irqrestore(&lock->wait_lock, flags); ++ debug_rt_mutex_free_waiter(&waiter); ++} ++ ++static bool __sched __rt_mutex_unlock_common(struct rt_mutex *lock, ++ struct wake_q_head *wake_q, ++ struct wake_q_head *wq_sleeper); ++/* ++ * Slow path to release a rt_mutex spin_lock style ++ */ ++void __sched rt_spin_lock_slowunlock(struct rt_mutex *lock) ++{ ++ unsigned long flags; ++ DEFINE_WAKE_Q(wake_q); ++ DEFINE_WAKE_Q(wake_sleeper_q); ++ bool postunlock; ++ ++ raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ postunlock = __rt_mutex_unlock_common(lock, &wake_q, &wake_sleeper_q); ++ raw_spin_unlock_irqrestore(&lock->wait_lock, flags); ++ ++ if (postunlock) ++ rt_mutex_postunlock(&wake_q, &wake_sleeper_q); ++} ++ ++void __lockfunc rt_spin_lock(spinlock_t *lock) ++{ ++ sleeping_lock_inc(); ++ migrate_disable(); ++ spin_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); ++} ++EXPORT_SYMBOL(rt_spin_lock); ++ ++void __lockfunc __rt_spin_lock(struct rt_mutex *lock) ++{ ++ rt_spin_lock_fastlock(lock, rt_spin_lock_slowlock); ++} ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++void __lockfunc rt_spin_lock_nested(spinlock_t *lock, int subclass) ++{ ++ sleeping_lock_inc(); ++ migrate_disable(); ++ spin_acquire(&lock->dep_map, subclass, 0, _RET_IP_); ++ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); ++} ++EXPORT_SYMBOL(rt_spin_lock_nested); ++#endif ++ ++void __lockfunc rt_spin_unlock(spinlock_t *lock) ++{ ++ /* NOTE: we always pass in '1' for nested, for simplicity */ ++ spin_release(&lock->dep_map, 1, _RET_IP_); ++ rt_spin_lock_fastunlock(&lock->lock, rt_spin_lock_slowunlock); ++ migrate_enable(); ++ sleeping_lock_dec(); ++} ++EXPORT_SYMBOL(rt_spin_unlock); ++ ++void __lockfunc __rt_spin_unlock(struct rt_mutex *lock) ++{ ++ rt_spin_lock_fastunlock(lock, rt_spin_lock_slowunlock); ++} ++EXPORT_SYMBOL(__rt_spin_unlock); ++ ++/* ++ * Wait for the lock to get unlocked: instead of polling for an unlock ++ * (like raw spinlocks do), we lock and unlock, to force the kernel to ++ * schedule if there's contention: ++ */ ++void __lockfunc rt_spin_unlock_wait(spinlock_t *lock) ++{ ++ spin_lock(lock); ++ spin_unlock(lock); ++} ++EXPORT_SYMBOL(rt_spin_unlock_wait); ++ ++int __lockfunc rt_spin_trylock(spinlock_t *lock) ++{ ++ int ret; ++ ++ sleeping_lock_inc(); ++ migrate_disable(); ++ ret = __rt_mutex_trylock(&lock->lock); ++ if (ret) { ++ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ } else { ++ migrate_enable(); ++ sleeping_lock_dec(); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_spin_trylock); ++ ++int __lockfunc rt_spin_trylock_bh(spinlock_t *lock) ++{ ++ int ret; ++ ++ local_bh_disable(); ++ ret = __rt_mutex_trylock(&lock->lock); ++ if (ret) { ++ sleeping_lock_inc(); ++ migrate_disable(); ++ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ } else ++ local_bh_enable(); ++ return ret; ++} ++EXPORT_SYMBOL(rt_spin_trylock_bh); ++ ++int __lockfunc rt_spin_trylock_irqsave(spinlock_t *lock, unsigned long *flags) ++{ ++ int ret; ++ ++ *flags = 0; ++ ret = __rt_mutex_trylock(&lock->lock); ++ if (ret) { ++ sleeping_lock_inc(); ++ migrate_disable(); ++ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_spin_trylock_irqsave); ++ ++void ++__rt_spin_lock_init(spinlock_t *lock, const char *name, struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held lock: ++ */ ++ debug_check_no_locks_freed((void *)lock, sizeof(*lock)); ++ lockdep_init_map(&lock->dep_map, name, key, 0); ++#endif ++} ++EXPORT_SYMBOL(__rt_spin_lock_init); ++ ++#endif /* PREEMPT_RT_FULL */ ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ static inline int __sched ++__mutex_lock_check_stamp(struct rt_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ struct ww_mutex *ww = container_of(lock, struct ww_mutex, base.lock); ++ struct ww_acquire_ctx *hold_ctx = READ_ONCE(ww->ctx); ++ ++ if (!hold_ctx) ++ return 0; ++ ++ if (unlikely(ctx == hold_ctx)) ++ return -EALREADY; ++ ++ if (ctx->stamp - hold_ctx->stamp <= LONG_MAX && ++ (ctx->stamp != hold_ctx->stamp || ctx > hold_ctx)) { ++#ifdef CONFIG_DEBUG_MUTEXES ++ DEBUG_LOCKS_WARN_ON(ctx->contending_lock); ++ ctx->contending_lock = ww; ++#endif ++ return -EDEADLK; ++ } ++ ++ return 0; ++} ++#else ++ static inline int __sched ++__mutex_lock_check_stamp(struct rt_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ BUG(); ++ return 0; ++} ++ ++#endif ++ ++static inline int ++try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, ++ struct rt_mutex_waiter *waiter) ++{ ++ return __try_to_take_rt_mutex(lock, task, waiter, STEAL_NORMAL); ++} ++ + /* + * Task blocks on lock. + * +@@ -1016,6 +1386,7 @@ static int task_blocks_on_rt_mutex(struct rt_mutex *lock, + * Called with lock->wait_lock held and interrupts disabled. + */ + static void mark_wakeup_next_waiter(struct wake_q_head *wake_q, ++ struct wake_q_head *wake_sleeper_q, + struct rt_mutex *lock) + { + struct rt_mutex_waiter *waiter; +@@ -1055,7 +1426,10 @@ static void mark_wakeup_next_waiter(struct wake_q_head *wake_q, + * Pairs with preempt_enable() in rt_mutex_postunlock(); + */ + preempt_disable(); +- wake_q_add(wake_q, waiter->task); ++ if (waiter->savestate) ++ wake_q_add_sleeper(wake_sleeper_q, waiter->task); ++ else ++ wake_q_add(wake_q, waiter->task); + raw_spin_unlock(¤t->pi_lock); + } + +@@ -1137,21 +1511,22 @@ void rt_mutex_adjust_pi(struct task_struct *task) + return; + } + next_lock = waiter->lock; +- raw_spin_unlock_irqrestore(&task->pi_lock, flags); + + /* gets dropped in rt_mutex_adjust_prio_chain()! */ + get_task_struct(task); + ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); + rt_mutex_adjust_prio_chain(task, RT_MUTEX_MIN_CHAINWALK, NULL, + next_lock, NULL, task); + } + +-void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter) ++void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter, bool savestate) + { + debug_rt_mutex_init_waiter(waiter); + RB_CLEAR_NODE(&waiter->pi_tree_entry); + RB_CLEAR_NODE(&waiter->tree_entry); + waiter->task = NULL; ++ waiter->savestate = savestate; + } + + /** +@@ -1167,7 +1542,8 @@ void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter) + static int __sched + __rt_mutex_slowlock(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- struct rt_mutex_waiter *waiter) ++ struct rt_mutex_waiter *waiter, ++ struct ww_acquire_ctx *ww_ctx) + { + int ret = 0; + +@@ -1176,16 +1552,17 @@ __rt_mutex_slowlock(struct rt_mutex *lock, int state, + if (try_to_take_rt_mutex(lock, current, waiter)) + break; + +- /* +- * TASK_INTERRUPTIBLE checks for signals and +- * timeout. Ignored otherwise. +- */ +- if (likely(state == TASK_INTERRUPTIBLE)) { +- /* Signal pending? */ +- if (signal_pending(current)) +- ret = -EINTR; +- if (timeout && !timeout->task) +- ret = -ETIMEDOUT; ++ if (timeout && !timeout->task) { ++ ret = -ETIMEDOUT; ++ break; ++ } ++ if (signal_pending_state(state, current)) { ++ ret = -EINTR; ++ break; ++ } ++ ++ if (ww_ctx && ww_ctx->acquired > 0) { ++ ret = __mutex_lock_check_stamp(lock, ww_ctx); + if (ret) + break; + } +@@ -1224,33 +1601,104 @@ static void rt_mutex_handle_deadlock(int res, int detect_deadlock, + } + } + +-/* +- * Slow path lock function: +- */ +-static int __sched +-rt_mutex_slowlock(struct rt_mutex *lock, int state, +- struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk) ++static __always_inline void ww_mutex_lock_acquired(struct ww_mutex *ww, ++ struct ww_acquire_ctx *ww_ctx) + { +- struct rt_mutex_waiter waiter; +- unsigned long flags; +- int ret = 0; ++#ifdef CONFIG_DEBUG_MUTEXES ++ /* ++ * If this WARN_ON triggers, you used ww_mutex_lock to acquire, ++ * but released with a normal mutex_unlock in this call. ++ * ++ * This should never happen, always use ww_mutex_unlock. ++ */ ++ DEBUG_LOCKS_WARN_ON(ww->ctx); + +- rt_mutex_init_waiter(&waiter); ++ /* ++ * Not quite done after calling ww_acquire_done() ? ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->done_acquire); ++ ++ if (ww_ctx->contending_lock) { ++ /* ++ * After -EDEADLK you tried to ++ * acquire a different ww_mutex? Bad! ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->contending_lock != ww); ++ ++ /* ++ * You called ww_mutex_lock after receiving -EDEADLK, ++ * but 'forgot' to unlock everything else first? ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->acquired > 0); ++ ww_ctx->contending_lock = NULL; ++ } + + /* +- * Technically we could use raw_spin_[un]lock_irq() here, but this can +- * be called in early boot if the cmpxchg() fast path is disabled +- * (debug, no architecture support). In this case we will acquire the +- * rtmutex with lock->wait_lock held. But we cannot unconditionally +- * enable interrupts in that early boot case. So we need to use the +- * irqsave/restore variants. ++ * Naughty, using a different class will lead to undefined behavior! + */ +- raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ DEBUG_LOCKS_WARN_ON(ww_ctx->ww_class != ww->ww_class); ++#endif ++ ww_ctx->acquired++; ++} ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void ww_mutex_account_lock(struct rt_mutex *lock, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++ struct ww_mutex *ww = container_of(lock, struct ww_mutex, base.lock); ++ struct rt_mutex_waiter *waiter, *n; ++ ++ /* ++ * This branch gets optimized out for the common case, ++ * and is only important for ww_mutex_lock. ++ */ ++ ww_mutex_lock_acquired(ww, ww_ctx); ++ ww->ctx = ww_ctx; ++ ++ /* ++ * Give any possible sleeping processes the chance to wake up, ++ * so they can recheck if they have to back off. ++ */ ++ rbtree_postorder_for_each_entry_safe(waiter, n, &lock->waiters.rb_root, ++ tree_entry) { ++ /* XXX debug rt mutex waiter wakeup */ ++ ++ BUG_ON(waiter->lock != lock); ++ rt_mutex_wake_waiter(waiter); ++ } ++} ++ ++#else ++ ++static void ww_mutex_account_lock(struct rt_mutex *lock, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++ BUG(); ++} ++#endif ++ ++int __sched rt_mutex_slowlock_locked(struct rt_mutex *lock, int state, ++ struct hrtimer_sleeper *timeout, ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx, ++ struct rt_mutex_waiter *waiter) ++{ ++ int ret; ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (ww_ctx) { ++ struct ww_mutex *ww; ++ ++ ww = container_of(lock, struct ww_mutex, base.lock); ++ if (unlikely(ww_ctx == READ_ONCE(ww->ctx))) ++ return -EALREADY; ++ } ++#endif + + /* Try to acquire the lock again: */ + if (try_to_take_rt_mutex(lock, current, NULL)) { +- raw_spin_unlock_irqrestore(&lock->wait_lock, flags); ++ if (ww_ctx) ++ ww_mutex_account_lock(lock, ww_ctx); + return 0; + } + +@@ -1260,16 +1708,26 @@ rt_mutex_slowlock(struct rt_mutex *lock, int state, + if (unlikely(timeout)) + hrtimer_start_expires(&timeout->timer, HRTIMER_MODE_ABS); + +- ret = task_blocks_on_rt_mutex(lock, &waiter, current, chwalk); ++ ret = task_blocks_on_rt_mutex(lock, waiter, current, chwalk); + +- if (likely(!ret)) ++ if (likely(!ret)) { + /* sleep on the mutex */ +- ret = __rt_mutex_slowlock(lock, state, timeout, &waiter); ++ ret = __rt_mutex_slowlock(lock, state, timeout, waiter, ++ ww_ctx); ++ } else if (ww_ctx) { ++ /* ww_mutex received EDEADLK, let it become EALREADY */ ++ ret = __mutex_lock_check_stamp(lock, ww_ctx); ++ BUG_ON(!ret); ++ } + + if (unlikely(ret)) { + __set_current_state(TASK_RUNNING); +- remove_waiter(lock, &waiter); +- rt_mutex_handle_deadlock(ret, chwalk, &waiter); ++ remove_waiter(lock, waiter); ++ /* ww_mutex wants to report EDEADLK/EALREADY, let it */ ++ if (!ww_ctx) ++ rt_mutex_handle_deadlock(ret, chwalk, waiter); ++ } else if (ww_ctx) { ++ ww_mutex_account_lock(lock, ww_ctx); + } + + /* +@@ -1277,6 +1735,36 @@ rt_mutex_slowlock(struct rt_mutex *lock, int state, + * unconditionally. We might have to fix that up. + */ + fixup_rt_mutex_waiters(lock); ++ return ret; ++} ++ ++/* ++ * Slow path lock function: ++ */ ++static int __sched ++rt_mutex_slowlock(struct rt_mutex *lock, int state, ++ struct hrtimer_sleeper *timeout, ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++ struct rt_mutex_waiter waiter; ++ unsigned long flags; ++ int ret = 0; ++ ++ rt_mutex_init_waiter(&waiter, false); ++ ++ /* ++ * Technically we could use raw_spin_[un]lock_irq() here, but this can ++ * be called in early boot if the cmpxchg() fast path is disabled ++ * (debug, no architecture support). In this case we will acquire the ++ * rtmutex with lock->wait_lock held. But we cannot unconditionally ++ * enable interrupts in that early boot case. So we need to use the ++ * irqsave/restore variants. ++ */ ++ raw_spin_lock_irqsave(&lock->wait_lock, flags); ++ ++ ret = rt_mutex_slowlock_locked(lock, state, timeout, chwalk, ww_ctx, ++ &waiter); + + raw_spin_unlock_irqrestore(&lock->wait_lock, flags); + +@@ -1337,7 +1825,8 @@ static inline int rt_mutex_slowtrylock(struct rt_mutex *lock) + * Return whether the current task needs to call rt_mutex_postunlock(). + */ + static bool __sched rt_mutex_slowunlock(struct rt_mutex *lock, +- struct wake_q_head *wake_q) ++ struct wake_q_head *wake_q, ++ struct wake_q_head *wake_sleeper_q) + { + unsigned long flags; + +@@ -1391,7 +1880,7 @@ static bool __sched rt_mutex_slowunlock(struct rt_mutex *lock, + * + * Queue the next waiter for wakeup once we release the wait_lock. + */ +- mark_wakeup_next_waiter(wake_q, lock); ++ mark_wakeup_next_waiter(wake_q, wake_sleeper_q, lock); + raw_spin_unlock_irqrestore(&lock->wait_lock, flags); + + return true; /* call rt_mutex_postunlock() */ +@@ -1405,29 +1894,45 @@ static bool __sched rt_mutex_slowunlock(struct rt_mutex *lock, + */ + static inline int + rt_mutex_fastlock(struct rt_mutex *lock, int state, ++ struct ww_acquire_ctx *ww_ctx, + int (*slowfn)(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk)) ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx)) + { + if (likely(rt_mutex_cmpxchg_acquire(lock, NULL, current))) + return 0; + +- return slowfn(lock, state, NULL, RT_MUTEX_MIN_CHAINWALK); ++ /* ++ * If rt_mutex blocks, the function sched_submit_work will not call ++ * blk_schedule_flush_plug (because tsk_is_pi_blocked would be true). ++ * We must call blk_schedule_flush_plug here, if we don't call it, ++ * a deadlock in I/O may happen. ++ */ ++ if (unlikely(blk_needs_flush_plug(current))) ++ blk_schedule_flush_plug(current); ++ ++ return slowfn(lock, state, NULL, RT_MUTEX_MIN_CHAINWALK, ww_ctx); + } + + static inline int + rt_mutex_timed_fastlock(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, + enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx, + int (*slowfn)(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk)) ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx)) + { + if (chwalk == RT_MUTEX_MIN_CHAINWALK && + likely(rt_mutex_cmpxchg_acquire(lock, NULL, current))) + return 0; + +- return slowfn(lock, state, timeout, chwalk); ++ if (unlikely(blk_needs_flush_plug(current))) ++ blk_schedule_flush_plug(current); ++ ++ return slowfn(lock, state, timeout, chwalk, ww_ctx); + } + + static inline int +@@ -1443,9 +1948,11 @@ rt_mutex_fasttrylock(struct rt_mutex *lock, + /* + * Performs the wakeup of the the top-waiter and re-enables preemption. + */ +-void rt_mutex_postunlock(struct wake_q_head *wake_q) ++void rt_mutex_postunlock(struct wake_q_head *wake_q, ++ struct wake_q_head *wake_sleeper_q) + { + wake_up_q(wake_q); ++ wake_up_q_sleeper(wake_sleeper_q); + + /* Pairs with preempt_disable() in rt_mutex_slowunlock() */ + preempt_enable(); +@@ -1454,23 +1961,46 @@ void rt_mutex_postunlock(struct wake_q_head *wake_q) + static inline void + rt_mutex_fastunlock(struct rt_mutex *lock, + bool (*slowfn)(struct rt_mutex *lock, +- struct wake_q_head *wqh)) ++ struct wake_q_head *wqh, ++ struct wake_q_head *wq_sleeper)) + { + DEFINE_WAKE_Q(wake_q); ++ DEFINE_WAKE_Q(wake_sleeper_q); + + if (likely(rt_mutex_cmpxchg_release(lock, current, NULL))) + return; + +- if (slowfn(lock, &wake_q)) +- rt_mutex_postunlock(&wake_q); ++ if (slowfn(lock, &wake_q, &wake_sleeper_q)) ++ rt_mutex_postunlock(&wake_q, &wake_sleeper_q); + } + +-static inline void __rt_mutex_lock(struct rt_mutex *lock, unsigned int subclass) ++int __sched __rt_mutex_lock_state(struct rt_mutex *lock, int state) + { + might_sleep(); ++ return rt_mutex_fastlock(lock, state, NULL, rt_mutex_slowlock); ++} ++ ++/** ++ * rt_mutex_lock_state - lock a rt_mutex with a given state ++ * ++ * @lock: The rt_mutex to be locked ++ * @state: The state to set when blocking on the rt_mutex ++ */ ++static inline int __sched rt_mutex_lock_state(struct rt_mutex *lock, ++ unsigned int subclass, int state) ++{ ++ int ret; + + mutex_acquire(&lock->dep_map, subclass, 0, _RET_IP_); +- rt_mutex_fastlock(lock, TASK_UNINTERRUPTIBLE, rt_mutex_slowlock); ++ ret = __rt_mutex_lock_state(lock, state); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++ ++static inline void __rt_mutex_lock(struct rt_mutex *lock, unsigned int subclass) ++{ ++ rt_mutex_lock_state(lock, subclass, TASK_UNINTERRUPTIBLE); + } + + #ifdef CONFIG_DEBUG_LOCK_ALLOC +@@ -1511,16 +2041,7 @@ EXPORT_SYMBOL_GPL(rt_mutex_lock); + */ + int __sched rt_mutex_lock_interruptible(struct rt_mutex *lock) + { +- int ret; +- +- might_sleep(); +- +- mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); +- ret = rt_mutex_fastlock(lock, TASK_INTERRUPTIBLE, rt_mutex_slowlock); +- if (ret) +- mutex_release(&lock->dep_map, 1, _RET_IP_); +- +- return ret; ++ return rt_mutex_lock_state(lock, 0, TASK_INTERRUPTIBLE); + } + EXPORT_SYMBOL_GPL(rt_mutex_lock_interruptible); + +@@ -1537,6 +2058,22 @@ int __sched __rt_mutex_futex_trylock(struct rt_mutex *lock) + return __rt_mutex_slowtrylock(lock); + } + ++/** ++ * rt_mutex_lock_killable - lock a rt_mutex killable ++ * ++ * @lock: the rt_mutex to be locked ++ * @detect_deadlock: deadlock detection on/off ++ * ++ * Returns: ++ * 0 on success ++ * -EINTR when interrupted by a signal ++ */ ++int __sched rt_mutex_lock_killable(struct rt_mutex *lock) ++{ ++ return rt_mutex_lock_state(lock, 0, TASK_KILLABLE); ++} ++EXPORT_SYMBOL_GPL(rt_mutex_lock_killable); ++ + /** + * rt_mutex_timed_lock - lock a rt_mutex interruptible + * the timeout structure is provided +@@ -1560,6 +2097,7 @@ rt_mutex_timed_lock(struct rt_mutex *lock, struct hrtimer_sleeper *timeout) + mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); + ret = rt_mutex_timed_fastlock(lock, TASK_INTERRUPTIBLE, timeout, + RT_MUTEX_MIN_CHAINWALK, ++ NULL, + rt_mutex_slowlock); + if (ret) + mutex_release(&lock->dep_map, 1, _RET_IP_); +@@ -1568,6 +2106,18 @@ rt_mutex_timed_lock(struct rt_mutex *lock, struct hrtimer_sleeper *timeout) + } + EXPORT_SYMBOL_GPL(rt_mutex_timed_lock); + ++int __sched __rt_mutex_trylock(struct rt_mutex *lock) ++{ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (WARN_ON_ONCE(in_irq() || in_nmi())) ++#else ++ if (WARN_ON_ONCE(in_irq() || in_nmi() || in_serving_softirq())) ++#endif ++ return 0; ++ ++ return rt_mutex_fasttrylock(lock, rt_mutex_slowtrylock); ++} ++ + /** + * rt_mutex_trylock - try to lock a rt_mutex + * +@@ -1583,10 +2133,7 @@ int __sched rt_mutex_trylock(struct rt_mutex *lock) + { + int ret; + +- if (WARN_ON_ONCE(in_irq() || in_nmi() || in_serving_softirq())) +- return 0; +- +- ret = rt_mutex_fasttrylock(lock, rt_mutex_slowtrylock); ++ ret = __rt_mutex_trylock(lock); + if (ret) + mutex_acquire(&lock->dep_map, 0, 1, _RET_IP_); + +@@ -1594,6 +2141,11 @@ int __sched rt_mutex_trylock(struct rt_mutex *lock) + } + EXPORT_SYMBOL_GPL(rt_mutex_trylock); + ++void __sched __rt_mutex_unlock(struct rt_mutex *lock) ++{ ++ rt_mutex_fastunlock(lock, rt_mutex_slowunlock); ++} ++ + /** + * rt_mutex_unlock - unlock a rt_mutex + * +@@ -1602,16 +2154,13 @@ EXPORT_SYMBOL_GPL(rt_mutex_trylock); + void __sched rt_mutex_unlock(struct rt_mutex *lock) + { + mutex_release(&lock->dep_map, 1, _RET_IP_); +- rt_mutex_fastunlock(lock, rt_mutex_slowunlock); ++ __rt_mutex_unlock(lock); + } + EXPORT_SYMBOL_GPL(rt_mutex_unlock); + +-/** +- * Futex variant, that since futex variants do not use the fast-path, can be +- * simple and will not need to retry. +- */ +-bool __sched __rt_mutex_futex_unlock(struct rt_mutex *lock, +- struct wake_q_head *wake_q) ++static bool __sched __rt_mutex_unlock_common(struct rt_mutex *lock, ++ struct wake_q_head *wake_q, ++ struct wake_q_head *wq_sleeper) + { + lockdep_assert_held(&lock->wait_lock); + +@@ -1628,23 +2177,35 @@ bool __sched __rt_mutex_futex_unlock(struct rt_mutex *lock, + * avoid inversion prior to the wakeup. preempt_disable() + * therein pairs with rt_mutex_postunlock(). + */ +- mark_wakeup_next_waiter(wake_q, lock); ++ mark_wakeup_next_waiter(wake_q, wq_sleeper, lock); + + return true; /* call postunlock() */ + } + ++/** ++ * Futex variant, that since futex variants do not use the fast-path, can be ++ * simple and will not need to retry. ++ */ ++bool __sched __rt_mutex_futex_unlock(struct rt_mutex *lock, ++ struct wake_q_head *wake_q, ++ struct wake_q_head *wq_sleeper) ++{ ++ return __rt_mutex_unlock_common(lock, wake_q, wq_sleeper); ++} ++ + void __sched rt_mutex_futex_unlock(struct rt_mutex *lock) + { + DEFINE_WAKE_Q(wake_q); ++ DEFINE_WAKE_Q(wake_sleeper_q); + unsigned long flags; + bool postunlock; + + raw_spin_lock_irqsave(&lock->wait_lock, flags); +- postunlock = __rt_mutex_futex_unlock(lock, &wake_q); ++ postunlock = __rt_mutex_futex_unlock(lock, &wake_q, &wake_sleeper_q); + raw_spin_unlock_irqrestore(&lock->wait_lock, flags); + + if (postunlock) +- rt_mutex_postunlock(&wake_q); ++ rt_mutex_postunlock(&wake_q, &wake_sleeper_q); + } + + /** +@@ -1683,7 +2244,7 @@ void __rt_mutex_init(struct rt_mutex *lock, const char *name, + if (name && key) + debug_rt_mutex_init(lock, name, key); + } +-EXPORT_SYMBOL_GPL(__rt_mutex_init); ++EXPORT_SYMBOL(__rt_mutex_init); + + /** + * rt_mutex_init_proxy_locked - initialize and lock a rt_mutex on behalf of a +@@ -1703,6 +2264,14 @@ void rt_mutex_init_proxy_locked(struct rt_mutex *lock, + struct task_struct *proxy_owner) + { + __rt_mutex_init(lock, NULL, NULL); ++#ifdef CONFIG_DEBUG_SPINLOCK ++ /* ++ * get another key class for the wait_lock. LOCK_PI and UNLOCK_PI is ++ * holding the ->wait_lock of the proxy_lock while unlocking a sleeping ++ * lock. ++ */ ++ raw_spin_lock_init(&lock->wait_lock); ++#endif + debug_rt_mutex_proxy_lock(lock, proxy_owner); + rt_mutex_set_owner(lock, proxy_owner); + } +@@ -1850,17 +2419,36 @@ int rt_mutex_wait_proxy_lock(struct rt_mutex *lock, + struct hrtimer_sleeper *to, + struct rt_mutex_waiter *waiter) + { ++ struct task_struct *tsk = current; + int ret; + + raw_spin_lock_irq(&lock->wait_lock); + /* sleep on the mutex */ + set_current_state(TASK_INTERRUPTIBLE); +- ret = __rt_mutex_slowlock(lock, TASK_INTERRUPTIBLE, to, waiter); ++ ret = __rt_mutex_slowlock(lock, TASK_INTERRUPTIBLE, to, waiter, NULL); + /* + * try_to_take_rt_mutex() sets the waiter bit unconditionally. We might + * have to fix that up. + */ + fixup_rt_mutex_waiters(lock); ++ /* ++ * RT has a problem here when the wait got interrupted by a timeout ++ * or a signal. task->pi_blocked_on is still set. The task must ++ * acquire the hash bucket lock when returning from this function. ++ * ++ * If the hash bucket lock is contended then the ++ * BUG_ON(rt_mutex_real_waiter(task->pi_blocked_on)) in ++ * task_blocks_on_rt_mutex() will trigger. This can be avoided by ++ * clearing task->pi_blocked_on which removes the task from the ++ * boosting chain of the rtmutex. That's correct because the task ++ * is not longer blocked on it. ++ */ ++ if (ret) { ++ raw_spin_lock(&tsk->pi_lock); ++ tsk->pi_blocked_on = NULL; ++ raw_spin_unlock(&tsk->pi_lock); ++ } ++ + raw_spin_unlock_irq(&lock->wait_lock); + + return ret; +@@ -1922,3 +2510,99 @@ bool rt_mutex_cleanup_proxy_lock(struct rt_mutex *lock, + + return cleanup; + } ++ ++static inline int ++ww_mutex_deadlock_injection(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++#ifdef CONFIG_DEBUG_WW_MUTEX_SLOWPATH ++ unsigned tmp; ++ ++ if (ctx->deadlock_inject_countdown-- == 0) { ++ tmp = ctx->deadlock_inject_interval; ++ if (tmp > UINT_MAX/4) ++ tmp = UINT_MAX; ++ else ++ tmp = tmp*2 + tmp + tmp/2; ++ ++ ctx->deadlock_inject_interval = tmp; ++ ctx->deadlock_inject_countdown = tmp; ++ ctx->contending_lock = lock; ++ ++ ww_mutex_unlock(lock); ++ ++ return -EDEADLK; ++ } ++#endif ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++int __sched ++ww_mutex_lock_interruptible(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ int ret; ++ ++ might_sleep(); ++ ++ mutex_acquire_nest(&lock->base.dep_map, 0, 0, ++ ctx ? &ctx->dep_map : NULL, _RET_IP_); ++ ret = rt_mutex_slowlock(&lock->base.lock, TASK_INTERRUPTIBLE, NULL, 0, ++ ctx); ++ if (ret) ++ mutex_release(&lock->base.dep_map, 1, _RET_IP_); ++ else if (!ret && ctx && ctx->acquired > 1) ++ return ww_mutex_deadlock_injection(lock, ctx); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(ww_mutex_lock_interruptible); ++ ++int __sched ++ww_mutex_lock(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ int ret; ++ ++ might_sleep(); ++ ++ mutex_acquire_nest(&lock->base.dep_map, 0, 0, ++ ctx ? &ctx->dep_map : NULL, _RET_IP_); ++ ret = rt_mutex_slowlock(&lock->base.lock, TASK_UNINTERRUPTIBLE, NULL, 0, ++ ctx); ++ if (ret) ++ mutex_release(&lock->base.dep_map, 1, _RET_IP_); ++ else if (!ret && ctx && ctx->acquired > 1) ++ return ww_mutex_deadlock_injection(lock, ctx); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(ww_mutex_lock); ++ ++void __sched ww_mutex_unlock(struct ww_mutex *lock) ++{ ++ int nest = !!lock->ctx; ++ ++ /* ++ * The unlocking fastpath is the 0->1 transition from 'locked' ++ * into 'unlocked' state: ++ */ ++ if (nest) { ++#ifdef CONFIG_DEBUG_MUTEXES ++ DEBUG_LOCKS_WARN_ON(!lock->ctx->acquired); ++#endif ++ if (lock->ctx->acquired > 0) ++ lock->ctx->acquired--; ++ lock->ctx = NULL; ++ } ++ ++ mutex_release(&lock->base.dep_map, nest, _RET_IP_); ++ __rt_mutex_unlock(&lock->base.lock); ++} ++EXPORT_SYMBOL(ww_mutex_unlock); ++ ++int __rt_mutex_owner_current(struct rt_mutex *lock) ++{ ++ return rt_mutex_owner(lock) == current; ++} ++EXPORT_SYMBOL(__rt_mutex_owner_current); ++#endif +diff --git a/kernel/locking/rtmutex_common.h b/kernel/locking/rtmutex_common.h +index d1d62f942be2..758dc43872e5 100644 +--- a/kernel/locking/rtmutex_common.h ++++ b/kernel/locking/rtmutex_common.h +@@ -15,6 +15,7 @@ + + #include + #include ++#include + + /* + * This is the control structure for tasks blocked on a rt_mutex, +@@ -29,6 +30,7 @@ struct rt_mutex_waiter { + struct rb_node pi_tree_entry; + struct task_struct *task; + struct rt_mutex *lock; ++ bool savestate; + #ifdef CONFIG_DEBUG_RT_MUTEXES + unsigned long ip; + struct pid *deadlock_task_pid; +@@ -135,7 +137,7 @@ extern void rt_mutex_init_proxy_locked(struct rt_mutex *lock, + struct task_struct *proxy_owner); + extern void rt_mutex_proxy_unlock(struct rt_mutex *lock, + struct task_struct *proxy_owner); +-extern void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter); ++extern void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter, bool savetate); + extern int __rt_mutex_start_proxy_lock(struct rt_mutex *lock, + struct rt_mutex_waiter *waiter, + struct task_struct *task); +@@ -153,9 +155,27 @@ extern int __rt_mutex_futex_trylock(struct rt_mutex *l); + + extern void rt_mutex_futex_unlock(struct rt_mutex *lock); + extern bool __rt_mutex_futex_unlock(struct rt_mutex *lock, +- struct wake_q_head *wqh); +- +-extern void rt_mutex_postunlock(struct wake_q_head *wake_q); ++ struct wake_q_head *wqh, ++ struct wake_q_head *wq_sleeper); ++ ++extern void rt_mutex_postunlock(struct wake_q_head *wake_q, ++ struct wake_q_head *wake_sleeper_q); ++ ++/* RW semaphore special interface */ ++struct ww_acquire_ctx; ++ ++extern int __rt_mutex_lock_state(struct rt_mutex *lock, int state); ++extern int __rt_mutex_trylock(struct rt_mutex *lock); ++extern void __rt_mutex_unlock(struct rt_mutex *lock); ++int __sched rt_mutex_slowlock_locked(struct rt_mutex *lock, int state, ++ struct hrtimer_sleeper *timeout, ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx, ++ struct rt_mutex_waiter *waiter); ++void __sched rt_spin_lock_slowlock_locked(struct rt_mutex *lock, ++ struct rt_mutex_waiter *waiter, ++ unsigned long flags); ++void __sched rt_spin_lock_slowunlock(struct rt_mutex *lock); + + #ifdef CONFIG_DEBUG_RT_MUTEXES + # include "rtmutex-debug.h" +diff --git a/kernel/locking/rwlock-rt.c b/kernel/locking/rwlock-rt.c +new file mode 100644 +index 000000000000..c3b91205161c +--- /dev/null ++++ b/kernel/locking/rwlock-rt.c +@@ -0,0 +1,378 @@ ++/* ++ */ ++#include ++#include ++ ++#include "rtmutex_common.h" ++#include ++ ++/* ++ * RT-specific reader/writer locks ++ * ++ * write_lock() ++ * 1) Lock lock->rtmutex ++ * 2) Remove the reader BIAS to force readers into the slow path ++ * 3) Wait until all readers have left the critical region ++ * 4) Mark it write locked ++ * ++ * write_unlock() ++ * 1) Remove the write locked marker ++ * 2) Set the reader BIAS so readers can use the fast path again ++ * 3) Unlock lock->rtmutex to release blocked readers ++ * ++ * read_lock() ++ * 1) Try fast path acquisition (reader BIAS is set) ++ * 2) Take lock->rtmutex.wait_lock which protects the writelocked flag ++ * 3) If !writelocked, acquire it for read ++ * 4) If writelocked, block on lock->rtmutex ++ * 5) unlock lock->rtmutex, goto 1) ++ * ++ * read_unlock() ++ * 1) Try fast path release (reader count != 1) ++ * 2) Wake the writer waiting in write_lock()#3 ++ * ++ * read_lock()#3 has the consequence, that rw locks on RT are not writer ++ * fair, but writers, which should be avoided in RT tasks (think tasklist ++ * lock), are subject to the rtmutex priority/DL inheritance mechanism. ++ * ++ * It's possible to make the rw locks writer fair by keeping a list of ++ * active readers. A blocked writer would force all newly incoming readers ++ * to block on the rtmutex, but the rtmutex would have to be proxy locked ++ * for one reader after the other. We can't use multi-reader inheritance ++ * because there is no way to support that with ++ * SCHED_DEADLINE. Implementing the one by one reader boosting/handover ++ * mechanism is a major surgery for a very dubious value. ++ * ++ * The risk of writer starvation is there, but the pathological use cases ++ * which trigger it are not necessarily the typical RT workloads. ++ */ ++ ++void __rwlock_biased_rt_init(struct rt_rw_lock *lock, const char *name, ++ struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held semaphore: ++ */ ++ debug_check_no_locks_freed((void *)lock, sizeof(*lock)); ++ lockdep_init_map(&lock->dep_map, name, key, 0); ++#endif ++ atomic_set(&lock->readers, READER_BIAS); ++ rt_mutex_init(&lock->rtmutex); ++ lock->rtmutex.save_state = 1; ++} ++ ++int __read_rt_trylock(struct rt_rw_lock *lock) ++{ ++ int r, old; ++ ++ /* ++ * Increment reader count, if lock->readers < 0, i.e. READER_BIAS is ++ * set. ++ */ ++ for (r = atomic_read(&lock->readers); r < 0;) { ++ old = atomic_cmpxchg(&lock->readers, r, r + 1); ++ if (likely(old == r)) ++ return 1; ++ r = old; ++ } ++ return 0; ++} ++ ++void __sched __read_rt_lock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ struct rt_mutex_waiter waiter; ++ unsigned long flags; ++ ++ if (__read_rt_trylock(lock)) ++ return; ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ /* ++ * Allow readers as long as the writer has not completely ++ * acquired the semaphore for write. ++ */ ++ if (atomic_read(&lock->readers) != WRITER_BIAS) { ++ atomic_inc(&lock->readers); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return; ++ } ++ ++ /* ++ * Call into the slow lock path with the rtmutex->wait_lock ++ * held, so this can't result in the following race: ++ * ++ * Reader1 Reader2 Writer ++ * read_lock() ++ * write_lock() ++ * rtmutex_lock(m) ++ * swait() ++ * read_lock() ++ * unlock(m->wait_lock) ++ * read_unlock() ++ * swake() ++ * lock(m->wait_lock) ++ * lock->writelocked=true ++ * unlock(m->wait_lock) ++ * ++ * write_unlock() ++ * lock->writelocked=false ++ * rtmutex_unlock(m) ++ * read_lock() ++ * write_lock() ++ * rtmutex_lock(m) ++ * swait() ++ * rtmutex_lock(m) ++ * ++ * That would put Reader1 behind the writer waiting on ++ * Reader2 to call read_unlock() which might be unbound. ++ */ ++ rt_mutex_init_waiter(&waiter, true); ++ rt_spin_lock_slowlock_locked(m, &waiter, flags); ++ /* ++ * The slowlock() above is guaranteed to return with the rtmutex is ++ * now held, so there can't be a writer active. Increment the reader ++ * count and immediately drop the rtmutex again. ++ */ ++ atomic_inc(&lock->readers); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ rt_spin_lock_slowunlock(m); ++ ++ debug_rt_mutex_free_waiter(&waiter); ++} ++ ++void __read_rt_unlock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ struct task_struct *tsk; ++ ++ /* ++ * sem->readers can only hit 0 when a writer is waiting for the ++ * active readers to leave the critical region. ++ */ ++ if (!atomic_dec_and_test(&lock->readers)) ++ return; ++ ++ raw_spin_lock_irq(&m->wait_lock); ++ /* ++ * Wake the writer, i.e. the rtmutex owner. It might release the ++ * rtmutex concurrently in the fast path, but to clean up the rw ++ * lock it needs to acquire m->wait_lock. The worst case which can ++ * happen is a spurious wakeup. ++ */ ++ tsk = rt_mutex_owner(m); ++ if (tsk) ++ wake_up_process(tsk); ++ ++ raw_spin_unlock_irq(&m->wait_lock); ++} ++ ++static void __write_unlock_common(struct rt_rw_lock *lock, int bias, ++ unsigned long flags) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ ++ atomic_add(READER_BIAS - bias, &lock->readers); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ rt_spin_lock_slowunlock(m); ++} ++ ++void __sched __write_rt_lock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ struct task_struct *self = current; ++ unsigned long flags; ++ ++ /* Take the rtmutex as a first step */ ++ __rt_spin_lock(m); ++ ++ /* Force readers into slow path */ ++ atomic_sub(READER_BIAS, &lock->readers); ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ ++ raw_spin_lock(&self->pi_lock); ++ self->saved_state = self->state; ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock(&self->pi_lock); ++ ++ for (;;) { ++ /* Have all readers left the critical region? */ ++ if (!atomic_read(&lock->readers)) { ++ atomic_set(&lock->readers, WRITER_BIAS); ++ raw_spin_lock(&self->pi_lock); ++ __set_current_state_no_track(self->saved_state); ++ self->saved_state = TASK_RUNNING; ++ raw_spin_unlock(&self->pi_lock); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return; ++ } ++ ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ ++ if (atomic_read(&lock->readers) != 0) ++ schedule(); ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ ++ raw_spin_lock(&self->pi_lock); ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock(&self->pi_lock); ++ } ++} ++ ++int __write_rt_trylock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ unsigned long flags; ++ ++ if (!__rt_mutex_trylock(m)) ++ return 0; ++ ++ atomic_sub(READER_BIAS, &lock->readers); ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ if (!atomic_read(&lock->readers)) { ++ atomic_set(&lock->readers, WRITER_BIAS); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return 1; ++ } ++ __write_unlock_common(lock, 0, flags); ++ return 0; ++} ++ ++void __write_rt_unlock(struct rt_rw_lock *lock) ++{ ++ struct rt_mutex *m = &lock->rtmutex; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ __write_unlock_common(lock, WRITER_BIAS, flags); ++} ++ ++/* Map the reader biased implementation */ ++static inline int do_read_rt_trylock(rwlock_t *rwlock) ++{ ++ return __read_rt_trylock(rwlock); ++} ++ ++static inline int do_write_rt_trylock(rwlock_t *rwlock) ++{ ++ return __write_rt_trylock(rwlock); ++} ++ ++static inline void do_read_rt_lock(rwlock_t *rwlock) ++{ ++ __read_rt_lock(rwlock); ++} ++ ++static inline void do_write_rt_lock(rwlock_t *rwlock) ++{ ++ __write_rt_lock(rwlock); ++} ++ ++static inline void do_read_rt_unlock(rwlock_t *rwlock) ++{ ++ __read_rt_unlock(rwlock); ++} ++ ++static inline void do_write_rt_unlock(rwlock_t *rwlock) ++{ ++ __write_rt_unlock(rwlock); ++} ++ ++static inline void do_rwlock_rt_init(rwlock_t *rwlock, const char *name, ++ struct lock_class_key *key) ++{ ++ __rwlock_biased_rt_init(rwlock, name, key); ++} ++ ++int __lockfunc rt_read_can_lock(rwlock_t *rwlock) ++{ ++ return atomic_read(&rwlock->readers) < 0; ++} ++ ++int __lockfunc rt_write_can_lock(rwlock_t *rwlock) ++{ ++ return atomic_read(&rwlock->readers) == READER_BIAS; ++} ++ ++/* ++ * The common functions which get wrapped into the rwlock API. ++ */ ++int __lockfunc rt_read_trylock(rwlock_t *rwlock) ++{ ++ int ret; ++ ++ sleeping_lock_inc(); ++ migrate_disable(); ++ ret = do_read_rt_trylock(rwlock); ++ if (ret) { ++ rwlock_acquire_read(&rwlock->dep_map, 0, 1, _RET_IP_); ++ } else { ++ migrate_enable(); ++ sleeping_lock_dec(); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_read_trylock); ++ ++int __lockfunc rt_write_trylock(rwlock_t *rwlock) ++{ ++ int ret; ++ ++ sleeping_lock_inc(); ++ migrate_disable(); ++ ret = do_write_rt_trylock(rwlock); ++ if (ret) { ++ rwlock_acquire(&rwlock->dep_map, 0, 1, _RET_IP_); ++ } else { ++ migrate_enable(); ++ sleeping_lock_dec(); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_write_trylock); ++ ++void __lockfunc rt_read_lock(rwlock_t *rwlock) ++{ ++ sleeping_lock_inc(); ++ migrate_disable(); ++ rwlock_acquire_read(&rwlock->dep_map, 0, 0, _RET_IP_); ++ do_read_rt_lock(rwlock); ++} ++EXPORT_SYMBOL(rt_read_lock); ++ ++void __lockfunc rt_write_lock(rwlock_t *rwlock) ++{ ++ sleeping_lock_inc(); ++ migrate_disable(); ++ rwlock_acquire(&rwlock->dep_map, 0, 0, _RET_IP_); ++ do_write_rt_lock(rwlock); ++} ++EXPORT_SYMBOL(rt_write_lock); ++ ++void __lockfunc rt_read_unlock(rwlock_t *rwlock) ++{ ++ rwlock_release(&rwlock->dep_map, 1, _RET_IP_); ++ do_read_rt_unlock(rwlock); ++ migrate_enable(); ++ sleeping_lock_dec(); ++} ++EXPORT_SYMBOL(rt_read_unlock); ++ ++void __lockfunc rt_write_unlock(rwlock_t *rwlock) ++{ ++ rwlock_release(&rwlock->dep_map, 1, _RET_IP_); ++ do_write_rt_unlock(rwlock); ++ migrate_enable(); ++ sleeping_lock_dec(); ++} ++EXPORT_SYMBOL(rt_write_unlock); ++ ++void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key) ++{ ++ do_rwlock_rt_init(rwlock, name, key); ++} ++EXPORT_SYMBOL(__rt_rwlock_init); +diff --git a/kernel/locking/rwsem-rt.c b/kernel/locking/rwsem-rt.c +new file mode 100644 +index 000000000000..f518495bd6cc +--- /dev/null ++++ b/kernel/locking/rwsem-rt.c +@@ -0,0 +1,302 @@ ++/* ++ */ ++#include ++#include ++#include ++#include ++#include ++ ++#include "rtmutex_common.h" ++ ++/* ++ * RT-specific reader/writer semaphores ++ * ++ * down_write() ++ * 1) Lock sem->rtmutex ++ * 2) Remove the reader BIAS to force readers into the slow path ++ * 3) Wait until all readers have left the critical region ++ * 4) Mark it write locked ++ * ++ * up_write() ++ * 1) Remove the write locked marker ++ * 2) Set the reader BIAS so readers can use the fast path again ++ * 3) Unlock sem->rtmutex to release blocked readers ++ * ++ * down_read() ++ * 1) Try fast path acquisition (reader BIAS is set) ++ * 2) Take sem->rtmutex.wait_lock which protects the writelocked flag ++ * 3) If !writelocked, acquire it for read ++ * 4) If writelocked, block on sem->rtmutex ++ * 5) unlock sem->rtmutex, goto 1) ++ * ++ * up_read() ++ * 1) Try fast path release (reader count != 1) ++ * 2) Wake the writer waiting in down_write()#3 ++ * ++ * down_read()#3 has the consequence, that rw semaphores on RT are not writer ++ * fair, but writers, which should be avoided in RT tasks (think mmap_sem), ++ * are subject to the rtmutex priority/DL inheritance mechanism. ++ * ++ * It's possible to make the rw semaphores writer fair by keeping a list of ++ * active readers. A blocked writer would force all newly incoming readers to ++ * block on the rtmutex, but the rtmutex would have to be proxy locked for one ++ * reader after the other. We can't use multi-reader inheritance because there ++ * is no way to support that with SCHED_DEADLINE. Implementing the one by one ++ * reader boosting/handover mechanism is a major surgery for a very dubious ++ * value. ++ * ++ * The risk of writer starvation is there, but the pathological use cases ++ * which trigger it are not necessarily the typical RT workloads. ++ */ ++ ++void __rwsem_init(struct rw_semaphore *sem, const char *name, ++ struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held semaphore: ++ */ ++ debug_check_no_locks_freed((void *)sem, sizeof(*sem)); ++ lockdep_init_map(&sem->dep_map, name, key, 0); ++#endif ++ atomic_set(&sem->readers, READER_BIAS); ++} ++EXPORT_SYMBOL(__rwsem_init); ++ ++int __down_read_trylock(struct rw_semaphore *sem) ++{ ++ int r, old; ++ ++ /* ++ * Increment reader count, if sem->readers < 0, i.e. READER_BIAS is ++ * set. ++ */ ++ for (r = atomic_read(&sem->readers); r < 0;) { ++ old = atomic_cmpxchg(&sem->readers, r, r + 1); ++ if (likely(old == r)) ++ return 1; ++ r = old; ++ } ++ return 0; ++} ++ ++static int __sched __down_read_common(struct rw_semaphore *sem, int state) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ struct rt_mutex_waiter waiter; ++ int ret; ++ ++ if (__down_read_trylock(sem)) ++ return 0; ++ /* ++ * If rt_mutex blocks, the function sched_submit_work will not call ++ * blk_schedule_flush_plug (because tsk_is_pi_blocked would be true). ++ * We must call blk_schedule_flush_plug here, if we don't call it, ++ * a deadlock in I/O may happen. ++ */ ++ if (unlikely(blk_needs_flush_plug(current))) ++ blk_schedule_flush_plug(current); ++ ++ might_sleep(); ++ raw_spin_lock_irq(&m->wait_lock); ++ /* ++ * Allow readers as long as the writer has not completely ++ * acquired the semaphore for write. ++ */ ++ if (atomic_read(&sem->readers) != WRITER_BIAS) { ++ atomic_inc(&sem->readers); ++ raw_spin_unlock_irq(&m->wait_lock); ++ return 0; ++ } ++ ++ /* ++ * Call into the slow lock path with the rtmutex->wait_lock ++ * held, so this can't result in the following race: ++ * ++ * Reader1 Reader2 Writer ++ * down_read() ++ * down_write() ++ * rtmutex_lock(m) ++ * swait() ++ * down_read() ++ * unlock(m->wait_lock) ++ * up_read() ++ * swake() ++ * lock(m->wait_lock) ++ * sem->writelocked=true ++ * unlock(m->wait_lock) ++ * ++ * up_write() ++ * sem->writelocked=false ++ * rtmutex_unlock(m) ++ * down_read() ++ * down_write() ++ * rtmutex_lock(m) ++ * swait() ++ * rtmutex_lock(m) ++ * ++ * That would put Reader1 behind the writer waiting on ++ * Reader2 to call up_read() which might be unbound. ++ */ ++ rt_mutex_init_waiter(&waiter, false); ++ ret = rt_mutex_slowlock_locked(m, state, NULL, RT_MUTEX_MIN_CHAINWALK, ++ NULL, &waiter); ++ /* ++ * The slowlock() above is guaranteed to return with the rtmutex (for ++ * ret = 0) is now held, so there can't be a writer active. Increment ++ * the reader count and immediately drop the rtmutex again. ++ * For ret != 0 we don't hold the rtmutex and need unlock the wait_lock. ++ * We don't own the lock then. ++ */ ++ if (!ret) ++ atomic_inc(&sem->readers); ++ raw_spin_unlock_irq(&m->wait_lock); ++ if (!ret) ++ __rt_mutex_unlock(m); ++ ++ debug_rt_mutex_free_waiter(&waiter); ++ return ret; ++} ++ ++void __down_read(struct rw_semaphore *sem) ++{ ++ int ret; ++ ++ ret = __down_read_common(sem, TASK_UNINTERRUPTIBLE); ++ WARN_ON_ONCE(ret); ++} ++ ++int __down_read_killable(struct rw_semaphore *sem) ++{ ++ int ret; ++ ++ ret = __down_read_common(sem, TASK_KILLABLE); ++ if (likely(!ret)) ++ return ret; ++ WARN_ONCE(ret != -EINTR, "Unexpected state: %d\n", ret); ++ return -EINTR; ++} ++ ++void __up_read(struct rw_semaphore *sem) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ struct task_struct *tsk; ++ ++ /* ++ * sem->readers can only hit 0 when a writer is waiting for the ++ * active readers to leave the critical region. ++ */ ++ if (!atomic_dec_and_test(&sem->readers)) ++ return; ++ ++ might_sleep(); ++ raw_spin_lock_irq(&m->wait_lock); ++ /* ++ * Wake the writer, i.e. the rtmutex owner. It might release the ++ * rtmutex concurrently in the fast path (due to a signal), but to ++ * clean up the rwsem it needs to acquire m->wait_lock. The worst ++ * case which can happen is a spurious wakeup. ++ */ ++ tsk = rt_mutex_owner(m); ++ if (tsk) ++ wake_up_process(tsk); ++ ++ raw_spin_unlock_irq(&m->wait_lock); ++} ++ ++static void __up_write_unlock(struct rw_semaphore *sem, int bias, ++ unsigned long flags) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ ++ atomic_add(READER_BIAS - bias, &sem->readers); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ __rt_mutex_unlock(m); ++} ++ ++static int __sched __down_write_common(struct rw_semaphore *sem, int state) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ unsigned long flags; ++ ++ /* Take the rtmutex as a first step */ ++ if (__rt_mutex_lock_state(m, state)) ++ return -EINTR; ++ ++ /* Force readers into slow path */ ++ atomic_sub(READER_BIAS, &sem->readers); ++ might_sleep(); ++ ++ set_current_state(state); ++ for (;;) { ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ /* Have all readers left the critical region? */ ++ if (!atomic_read(&sem->readers)) { ++ atomic_set(&sem->readers, WRITER_BIAS); ++ __set_current_state(TASK_RUNNING); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return 0; ++ } ++ ++ if (signal_pending_state(state, current)) { ++ __set_current_state(TASK_RUNNING); ++ __up_write_unlock(sem, 0, flags); ++ return -EINTR; ++ } ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ ++ if (atomic_read(&sem->readers) != 0) { ++ schedule(); ++ set_current_state(state); ++ } ++ } ++} ++ ++void __sched __down_write(struct rw_semaphore *sem) ++{ ++ __down_write_common(sem, TASK_UNINTERRUPTIBLE); ++} ++ ++int __sched __down_write_killable(struct rw_semaphore *sem) ++{ ++ return __down_write_common(sem, TASK_KILLABLE); ++} ++ ++int __down_write_trylock(struct rw_semaphore *sem) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ unsigned long flags; ++ ++ if (!__rt_mutex_trylock(m)) ++ return 0; ++ ++ atomic_sub(READER_BIAS, &sem->readers); ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ if (!atomic_read(&sem->readers)) { ++ atomic_set(&sem->readers, WRITER_BIAS); ++ raw_spin_unlock_irqrestore(&m->wait_lock, flags); ++ return 1; ++ } ++ __up_write_unlock(sem, 0, flags); ++ return 0; ++} ++ ++void __up_write(struct rw_semaphore *sem) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ __up_write_unlock(sem, WRITER_BIAS, flags); ++} ++ ++void __downgrade_write(struct rw_semaphore *sem) ++{ ++ struct rt_mutex *m = &sem->rtmutex; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&m->wait_lock, flags); ++ /* Release it and account current as reader */ ++ __up_write_unlock(sem, WRITER_BIAS - 1, flags); ++} +diff --git a/kernel/locking/spinlock.c b/kernel/locking/spinlock.c +index 936f3d14dd6b..e89b70f474af 100644 +--- a/kernel/locking/spinlock.c ++++ b/kernel/locking/spinlock.c +@@ -117,8 +117,11 @@ void __lockfunc __raw_##op##_lock_bh(locktype##_t *lock) \ + * __[spin|read|write]_lock_bh() + */ + BUILD_LOCK_OPS(spin, raw_spinlock); ++ ++#ifndef CONFIG_PREEMPT_RT_FULL + BUILD_LOCK_OPS(read, rwlock); + BUILD_LOCK_OPS(write, rwlock); ++#endif + + #endif + +@@ -202,6 +205,8 @@ void __lockfunc _raw_spin_unlock_bh(raw_spinlock_t *lock) + EXPORT_SYMBOL(_raw_spin_unlock_bh); + #endif + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #ifndef CONFIG_INLINE_READ_TRYLOCK + int __lockfunc _raw_read_trylock(rwlock_t *lock) + { +@@ -346,6 +351,8 @@ void __lockfunc _raw_write_unlock_bh(rwlock_t *lock) + EXPORT_SYMBOL(_raw_write_unlock_bh); + #endif + ++#endif /* !PREEMPT_RT_FULL */ ++ + #ifdef CONFIG_DEBUG_LOCK_ALLOC + + void __lockfunc _raw_spin_lock_nested(raw_spinlock_t *lock, int subclass) +diff --git a/kernel/locking/spinlock_debug.c b/kernel/locking/spinlock_debug.c +index 9aa0fccd5d43..76d0b40d9193 100644 +--- a/kernel/locking/spinlock_debug.c ++++ b/kernel/locking/spinlock_debug.c +@@ -31,6 +31,7 @@ void __raw_spin_lock_init(raw_spinlock_t *lock, const char *name, + + EXPORT_SYMBOL(__raw_spin_lock_init); + ++#ifndef CONFIG_PREEMPT_RT_FULL + void __rwlock_init(rwlock_t *lock, const char *name, + struct lock_class_key *key) + { +@@ -48,6 +49,7 @@ void __rwlock_init(rwlock_t *lock, const char *name, + } + + EXPORT_SYMBOL(__rwlock_init); ++#endif + + static void spin_dump(raw_spinlock_t *lock, const char *msg) + { +@@ -135,6 +137,7 @@ void do_raw_spin_unlock(raw_spinlock_t *lock) + arch_spin_unlock(&lock->raw_lock); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + static void rwlock_bug(rwlock_t *lock, const char *msg) + { + if (!debug_locks_off()) +@@ -224,3 +227,5 @@ void do_raw_write_unlock(rwlock_t *lock) + debug_write_unlock(lock); + arch_write_unlock(&lock->raw_lock); + } ++ ++#endif +diff --git a/kernel/panic.c b/kernel/panic.c +index 6a6df23acd1a..8f0a896e8428 100644 +--- a/kernel/panic.c ++++ b/kernel/panic.c +@@ -479,9 +479,11 @@ static u64 oops_id; + + static int init_oops_id(void) + { ++#ifndef CONFIG_PREEMPT_RT_FULL + if (!oops_id) + get_random_bytes(&oops_id, sizeof(oops_id)); + else ++#endif + oops_id++; + + return 0; +diff --git a/kernel/power/hibernate.c b/kernel/power/hibernate.c +index f5ce9f7ec132..0f00ba01376f 100644 +--- a/kernel/power/hibernate.c ++++ b/kernel/power/hibernate.c +@@ -690,6 +690,10 @@ static int load_image_and_restore(void) + return error; + } + ++#ifndef CONFIG_SUSPEND ++bool pm_in_action; ++#endif ++ + /** + * hibernate - Carry out system hibernation, including saving the image. + */ +@@ -703,6 +707,8 @@ int hibernate(void) + return -EPERM; + } + ++ pm_in_action = true; ++ + lock_system_sleep(); + /* The snapshot device should not be opened while we're running */ + if (!atomic_add_unless(&snapshot_device_available, -1, 0)) { +@@ -781,6 +787,7 @@ int hibernate(void) + atomic_inc(&snapshot_device_available); + Unlock: + unlock_system_sleep(); ++ pm_in_action = false; + pr_info("hibernation exit\n"); + + return error; +diff --git a/kernel/power/suspend.c b/kernel/power/suspend.c +index 0bd595a0b610..a4456772d98e 100644 +--- a/kernel/power/suspend.c ++++ b/kernel/power/suspend.c +@@ -600,6 +600,8 @@ static int enter_state(suspend_state_t state) + return error; + } + ++bool pm_in_action; ++ + /** + * pm_suspend - Externally visible function for suspending the system. + * @state: System sleep state to enter. +@@ -614,6 +616,7 @@ int pm_suspend(suspend_state_t state) + if (state <= PM_SUSPEND_ON || state >= PM_SUSPEND_MAX) + return -EINVAL; + ++ pm_in_action = true; + pr_info("suspend entry (%s)\n", mem_sleep_labels[state]); + error = enter_state(state); + if (error) { +@@ -623,6 +626,7 @@ int pm_suspend(suspend_state_t state) + suspend_stats.success++; + } + pr_info("suspend exit\n"); ++ pm_in_action = false; + return error; + } + EXPORT_SYMBOL(pm_suspend); +diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c +index 06045abd1887..a43d07d4e043 100644 +--- a/kernel/printk/printk.c ++++ b/kernel/printk/printk.c +@@ -405,6 +405,65 @@ DEFINE_RAW_SPINLOCK(logbuf_lock); + printk_safe_exit_irqrestore(flags); \ + } while (0) + ++#ifdef CONFIG_EARLY_PRINTK ++struct console *early_console; ++ ++static void early_vprintk(const char *fmt, va_list ap) ++{ ++ if (early_console) { ++ char buf[512]; ++ int n = vscnprintf(buf, sizeof(buf), fmt, ap); ++ ++ early_console->write(early_console, buf, n); ++ } ++} ++ ++asmlinkage void early_printk(const char *fmt, ...) ++{ ++ va_list ap; ++ ++ va_start(ap, fmt); ++ early_vprintk(fmt, ap); ++ va_end(ap); ++} ++ ++/* ++ * This is independent of any log levels - a global ++ * kill switch that turns off all of printk. ++ * ++ * Used by the NMI watchdog if early-printk is enabled. ++ */ ++static bool __read_mostly printk_killswitch; ++ ++static int __init force_early_printk_setup(char *str) ++{ ++ printk_killswitch = true; ++ return 0; ++} ++early_param("force_early_printk", force_early_printk_setup); ++ ++void printk_kill(void) ++{ ++ printk_killswitch = true; ++} ++ ++#ifdef CONFIG_PRINTK ++static int forced_early_printk(const char *fmt, va_list ap) ++{ ++ if (!printk_killswitch) ++ return 0; ++ early_vprintk(fmt, ap); ++ return 1; ++} ++#endif ++ ++#else ++static inline int forced_early_printk(const char *fmt, va_list ap) ++{ ++ return 0; ++} ++#endif ++ + #ifdef CONFIG_PRINTK + DECLARE_WAIT_QUEUE_HEAD(log_wait); + /* the next printk record to read by syslog(READ) or /proc/kmsg */ +@@ -1361,12 +1420,23 @@ static int syslog_print_all(char __user *buf, int size, bool clear) + u64 next_seq; + u64 seq; + u32 idx; ++ int attempts = 0; ++ int num_msg; + + text = kmalloc(LOG_LINE_MAX + PREFIX_MAX, GFP_KERNEL); + if (!text) + return -ENOMEM; + + logbuf_lock_irq(); ++ ++try_again: ++ attempts++; ++ if (attempts > 10) { ++ len = -EBUSY; ++ goto out; ++ } ++ num_msg = 0; ++ + /* + * Find first record that fits, including all following records, + * into the user-provided buffer for this dump. +@@ -1379,6 +1449,14 @@ static int syslog_print_all(char __user *buf, int size, bool clear) + len += msg_print_text(msg, true, NULL, 0); + idx = log_next(idx); + seq++; ++ num_msg++; ++ if (num_msg > 5) { ++ num_msg = 0; ++ logbuf_unlock_irq(); ++ logbuf_lock_irq(); ++ if (clear_seq < log_first_seq) ++ goto try_again; ++ } + } + + /* move first record forward until length fits into the buffer */ +@@ -1390,6 +1468,14 @@ static int syslog_print_all(char __user *buf, int size, bool clear) + len -= msg_print_text(msg, true, NULL, 0); + idx = log_next(idx); + seq++; ++ num_msg++; ++ if (num_msg > 5) { ++ num_msg = 0; ++ logbuf_unlock_irq(); ++ logbuf_lock_irq(); ++ if (clear_seq < log_first_seq) ++ goto try_again; ++ } + } + + /* last message fitting into this dump */ +@@ -1427,6 +1513,7 @@ static int syslog_print_all(char __user *buf, int size, bool clear) + clear_seq = log_next_seq; + clear_idx = log_next_idx; + } ++out: + logbuf_unlock_irq(); + + kfree(text); +@@ -1558,6 +1645,7 @@ SYSCALL_DEFINE3(syslog, int, type, char __user *, buf, int, len) + return do_syslog(type, buf, len, SYSLOG_FROM_READER); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Special console_lock variants that help to reduce the risk of soft-lockups. + * They allow to pass console_lock to another printk() call using a busy wait. +@@ -1698,6 +1786,15 @@ static int console_trylock_spinning(void) + return 1; + } + ++#else ++ ++static int console_trylock_spinning(void) ++{ ++ return console_trylock(); ++} ++ ++#endif ++ + /* + * Call the console drivers, asking them to write out + * log_buf[start] to log_buf[end - 1]. +@@ -1713,6 +1810,12 @@ static void call_console_drivers(const char *ext_text, size_t ext_len, + if (!console_drivers) + return; + ++ if (IS_ENABLED(CONFIG_PREEMPT_RT_BASE)) { ++ if (in_irq() || in_nmi()) ++ return; ++ } ++ ++ migrate_disable(); + for_each_console(con) { + if (exclusive_console && con != exclusive_console) + continue; +@@ -1728,6 +1831,7 @@ static void call_console_drivers(const char *ext_text, size_t ext_len, + else + con->write(con, text, len); + } ++ migrate_enable(); + } + + int printk_delay_msec __read_mostly; +@@ -1897,6 +2001,13 @@ asmlinkage int vprintk_emit(int facility, int level, + bool in_sched = false; + unsigned long flags; + ++ /* ++ * Fall back to early_printk if a debugging subsystem has ++ * killed printk output ++ */ ++ if (unlikely(forced_early_printk(fmt, args))) ++ return 1; ++ + if (level == LOGLEVEL_SCHED) { + level = LOGLEVEL_DEFAULT; + in_sched = true; +@@ -1912,20 +2023,30 @@ asmlinkage int vprintk_emit(int facility, int level, + + /* If called from the scheduler, we can not call up(). */ + if (!in_sched) { ++ int may_trylock = 1; ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* ++ * we can't take a sleeping lock with IRQs or preeption disabled ++ * so we can't print in these contexts ++ */ ++ if (!(preempt_count() == 0 && !irqs_disabled())) ++ may_trylock = 0; ++#endif + /* + * Disable preemption to avoid being preempted while holding + * console_sem which would prevent anyone from printing to + * console + */ +- preempt_disable(); ++ migrate_disable(); + /* + * Try to acquire and then immediately release the console + * semaphore. The release will print out buffers and wake up + * /dev/kmsg and syslog() users. + */ +- if (console_trylock_spinning()) ++ if (may_trylock && console_trylock_spinning()) + console_unlock(); +- preempt_enable(); ++ migrate_enable(); + } + + wake_up_klogd(); +@@ -2037,26 +2158,6 @@ static bool suppress_message_printing(int level) { return false; } + + #endif /* CONFIG_PRINTK */ + +-#ifdef CONFIG_EARLY_PRINTK +-struct console *early_console; +- +-asmlinkage __visible void early_printk(const char *fmt, ...) +-{ +- va_list ap; +- char buf[512]; +- int n; +- +- if (!early_console) +- return; +- +- va_start(ap, fmt); +- n = vscnprintf(buf, sizeof(buf), fmt, ap); +- va_end(ap); +- +- early_console->write(early_console, buf, n); +-} +-#endif +- + static int __add_preferred_console(char *name, int idx, char *options, + char *brl_options) + { +@@ -2398,6 +2499,10 @@ void console_unlock(void) + console_seq++; + raw_spin_unlock(&logbuf_lock); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ printk_safe_exit_irqrestore(flags); ++ call_console_drivers(ext_text, ext_len, text, len); ++#else + /* + * While actively printing out messages, if another printk() + * were to occur on another CPU, it may wait for this one to +@@ -2416,6 +2521,7 @@ void console_unlock(void) + } + + printk_safe_exit_irqrestore(flags); ++#endif + + if (do_cond_resched) + cond_resched(); +@@ -2467,6 +2573,11 @@ void console_unblank(void) + { + struct console *c; + ++ if (IS_ENABLED(CONFIG_PREEMPT_RT_BASE)) { ++ if (in_irq() || in_nmi()) ++ return; ++ } ++ + /* + * console_unblank can no longer be called in interrupt context unless + * oops_in_progress is set to 1.. +diff --git a/kernel/ptrace.c b/kernel/ptrace.c +index fed682a01a75..ace2839323de 100644 +--- a/kernel/ptrace.c ++++ b/kernel/ptrace.c +@@ -174,7 +174,14 @@ static bool ptrace_freeze_traced(struct task_struct *task) + + spin_lock_irq(&task->sighand->siglock); + if (task_is_traced(task) && !__fatal_signal_pending(task)) { +- task->state = __TASK_TRACED; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&task->pi_lock, flags); ++ if (task->state & __TASK_TRACED) ++ task->state = __TASK_TRACED; ++ else ++ task->saved_state = __TASK_TRACED; ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); + ret = true; + } + spin_unlock_irq(&task->sighand->siglock); +diff --git a/kernel/rcu/Kconfig b/kernel/rcu/Kconfig +index 9210379c0353..a243a78ff38c 100644 +--- a/kernel/rcu/Kconfig ++++ b/kernel/rcu/Kconfig +@@ -172,7 +172,7 @@ config RCU_FANOUT_LEAF + + config RCU_FAST_NO_HZ + bool "Accelerate last non-dyntick-idle CPU's grace periods" +- depends on NO_HZ_COMMON && SMP && RCU_EXPERT ++ depends on NO_HZ_COMMON && SMP && RCU_EXPERT && !PREEMPT_RT_FULL + default n + help + This option permits CPUs to enter dynticks-idle state even if +@@ -190,8 +190,8 @@ config RCU_FAST_NO_HZ + + config RCU_BOOST + bool "Enable RCU priority boosting" +- depends on RT_MUTEXES && PREEMPT_RCU && RCU_EXPERT +- default n ++ depends on (RT_MUTEXES && PREEMPT_RCU && RCU_EXPERT) || PREEMPT_RT_FULL ++ default y if PREEMPT_RT_FULL + help + This option boosts the priority of preempted RCU readers that + block the current preemptible RCU grace period for too long. +diff --git a/kernel/rcu/rcu.h b/kernel/rcu/rcu.h +index 4d04683c31b2..808cce9a5d43 100644 +--- a/kernel/rcu/rcu.h ++++ b/kernel/rcu/rcu.h +@@ -528,7 +528,6 @@ static inline void show_rcu_gp_kthreads(void) { } + static inline int rcu_get_gp_kthreads_prio(void) { return 0; } + #else /* #ifdef CONFIG_TINY_RCU */ + unsigned long rcu_get_gp_seq(void); +-unsigned long rcu_bh_get_gp_seq(void); + unsigned long rcu_sched_get_gp_seq(void); + unsigned long rcu_exp_batches_completed(void); + unsigned long rcu_exp_batches_completed_sched(void); +@@ -536,10 +535,18 @@ unsigned long srcu_batches_completed(struct srcu_struct *sp); + void show_rcu_gp_kthreads(void); + int rcu_get_gp_kthreads_prio(void); + void rcu_force_quiescent_state(void); +-void rcu_bh_force_quiescent_state(void); + void rcu_sched_force_quiescent_state(void); + extern struct workqueue_struct *rcu_gp_wq; + extern struct workqueue_struct *rcu_par_gp_wq; ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++#define rcu_bh_get_gp_seq rcu_get_gp_seq ++#define rcu_bh_force_quiescent_state rcu_force_quiescent_state ++#else ++unsigned long rcu_bh_get_gp_seq(void); ++void rcu_bh_force_quiescent_state(void); ++#endif ++ + #endif /* #else #ifdef CONFIG_TINY_RCU */ + + #ifdef CONFIG_RCU_NOCB_CPU +diff --git a/kernel/rcu/rcutorture.c b/kernel/rcu/rcutorture.c +index 0b7af7e2bcbb..e95d121efc80 100644 +--- a/kernel/rcu/rcutorture.c ++++ b/kernel/rcu/rcutorture.c +@@ -434,6 +434,7 @@ static struct rcu_torture_ops rcu_ops = { + .name = "rcu" + }; + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Definitions for rcu_bh torture testing. + */ +@@ -475,6 +476,12 @@ static struct rcu_torture_ops rcu_bh_ops = { + .name = "rcu_bh" + }; + ++#else ++static struct rcu_torture_ops rcu_bh_ops = { ++ .ttype = INVALID_RCU_FLAVOR, ++}; ++#endif ++ + /* + * Don't even think about trying any of these in real life!!! + * The names includes "busted", and they really means it! +diff --git a/kernel/rcu/srcutree.c b/kernel/rcu/srcutree.c +index 1ff17e297f0c..0f09a1a9e17c 100644 +--- a/kernel/rcu/srcutree.c ++++ b/kernel/rcu/srcutree.c +@@ -38,6 +38,8 @@ + #include + #include + #include ++#include ++#include + + #include "rcu.h" + #include "rcu_segcblist.h" +@@ -460,21 +462,6 @@ static void srcu_gp_start(struct srcu_struct *sp) + WARN_ON_ONCE(state != SRCU_STATE_SCAN1); + } + +-/* +- * Track online CPUs to guide callback workqueue placement. +- */ +-DEFINE_PER_CPU(bool, srcu_online); +- +-void srcu_online_cpu(unsigned int cpu) +-{ +- WRITE_ONCE(per_cpu(srcu_online, cpu), true); +-} +- +-void srcu_offline_cpu(unsigned int cpu) +-{ +- WRITE_ONCE(per_cpu(srcu_online, cpu), false); +-} +- + /* + * Place the workqueue handler on the specified CPU if online, otherwise + * just run it whereever. This is useful for placing workqueue handlers +@@ -486,12 +473,12 @@ static bool srcu_queue_delayed_work_on(int cpu, struct workqueue_struct *wq, + { + bool ret; + +- preempt_disable(); +- if (READ_ONCE(per_cpu(srcu_online, cpu))) ++ cpus_read_lock(); ++ if (cpu_online(cpu)) + ret = queue_delayed_work_on(cpu, wq, dwork, delay); + else + ret = queue_delayed_work(wq, dwork, delay); +- preempt_enable(); ++ cpus_read_unlock(); + return ret; + } + +@@ -774,6 +761,8 @@ static void srcu_flip(struct srcu_struct *sp) + * negligible when amoritized over that time period, and the extra latency + * of a needlessly non-expedited grace period is similarly negligible. + */ ++static DEFINE_LOCAL_IRQ_LOCK(sp_llock); ++ + static bool srcu_might_be_idle(struct srcu_struct *sp) + { + unsigned long curseq; +@@ -782,13 +771,13 @@ static bool srcu_might_be_idle(struct srcu_struct *sp) + unsigned long t; + + /* If the local srcu_data structure has callbacks, not idle. */ +- local_irq_save(flags); ++ local_lock_irqsave(sp_llock, flags); + sdp = this_cpu_ptr(sp->sda); + if (rcu_segcblist_pend_cbs(&sdp->srcu_cblist)) { +- local_irq_restore(flags); ++ local_unlock_irqrestore(sp_llock, flags); + return false; /* Callbacks already present, so not idle. */ + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(sp_llock, flags); + + /* + * No local callbacks, so probabalistically probe global state. +@@ -866,7 +855,7 @@ void __call_srcu(struct srcu_struct *sp, struct rcu_head *rhp, + return; + } + rhp->func = func; +- local_irq_save(flags); ++ local_lock_irqsave(sp_llock, flags); + sdp = this_cpu_ptr(sp->sda); + spin_lock_rcu_node(sdp); + rcu_segcblist_enqueue(&sdp->srcu_cblist, rhp, false); +@@ -882,7 +871,8 @@ void __call_srcu(struct srcu_struct *sp, struct rcu_head *rhp, + sdp->srcu_gp_seq_needed_exp = s; + needexp = true; + } +- spin_unlock_irqrestore_rcu_node(sdp, flags); ++ spin_unlock_rcu_node(sdp); ++ local_unlock_irqrestore(sp_llock, flags); + if (needgp) + srcu_funnel_gp_start(sp, sdp, s, do_norm); + else if (needexp) +diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c +index f7e89c989df7..278fe66bfb70 100644 +--- a/kernel/rcu/tree.c ++++ b/kernel/rcu/tree.c +@@ -61,6 +61,13 @@ + #include + #include + #include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../time/tick-internal.h" + + #include "tree.h" + #include "rcu.h" +@@ -244,6 +251,19 @@ void rcu_sched_qs(void) + this_cpu_ptr(&rcu_sched_data), true); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void rcu_preempt_qs(void); ++ ++void rcu_bh_qs(void) ++{ ++ unsigned long flags; ++ ++ /* Callers to this function, rcu_preempt_qs(), must disable irqs. */ ++ local_irq_save(flags); ++ rcu_preempt_qs(); ++ local_irq_restore(flags); ++} ++#else + void rcu_bh_qs(void) + { + RCU_LOCKDEP_WARN(preemptible(), "rcu_bh_qs() invoked with preemption enabled!!!"); +@@ -254,6 +274,7 @@ void rcu_bh_qs(void) + __this_cpu_write(rcu_bh_data.cpu_no_qs.b.norm, false); + } + } ++#endif + + /* + * Steal a bit from the bottom of ->dynticks for idle entry/exit +@@ -568,6 +589,7 @@ unsigned long rcu_sched_get_gp_seq(void) + } + EXPORT_SYMBOL_GPL(rcu_sched_get_gp_seq); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Return the number of RCU-bh GPs completed thus far for debug & stats. + */ +@@ -576,6 +598,7 @@ unsigned long rcu_bh_get_gp_seq(void) + return READ_ONCE(rcu_bh_state.gp_seq); + } + EXPORT_SYMBOL_GPL(rcu_bh_get_gp_seq); ++#endif + + /* + * Return the number of RCU expedited batches completed thus far for +@@ -599,6 +622,7 @@ unsigned long rcu_exp_batches_completed_sched(void) + } + EXPORT_SYMBOL_GPL(rcu_exp_batches_completed_sched); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Force a quiescent state. + */ +@@ -617,6 +641,13 @@ void rcu_bh_force_quiescent_state(void) + } + EXPORT_SYMBOL_GPL(rcu_bh_force_quiescent_state); + ++#else ++void rcu_force_quiescent_state(void) ++{ ++} ++EXPORT_SYMBOL_GPL(rcu_force_quiescent_state); ++#endif ++ + /* + * Force a quiescent state for RCU-sched. + */ +@@ -674,9 +705,11 @@ void rcutorture_get_gp_data(enum rcutorture_type test_type, int *flags, + case RCU_FLAVOR: + rsp = rcu_state_p; + break; ++#ifndef CONFIG_PREEMPT_RT_FULL + case RCU_BH_FLAVOR: + rsp = &rcu_bh_state; + break; ++#endif + case RCU_SCHED_FLAVOR: + rsp = &rcu_sched_state; + break; +@@ -1263,6 +1296,7 @@ static int rcu_implicit_dynticks_qs(struct rcu_data *rdp) + !rdp->rcu_iw_pending && rdp->rcu_iw_gp_seq != rnp->gp_seq && + (rnp->ffmask & rdp->grpmask)) { + init_irq_work(&rdp->rcu_iw, rcu_iw_handler); ++ rdp->rcu_iw.flags = IRQ_WORK_HARD_IRQ; + rdp->rcu_iw_pending = true; + rdp->rcu_iw_gp_seq = rnp->gp_seq; + irq_work_queue_on(&rdp->rcu_iw, rdp->cpu); +@@ -2870,18 +2904,17 @@ __rcu_process_callbacks(struct rcu_state *rsp) + /* + * Do RCU core processing for the current CPU. + */ +-static __latent_entropy void rcu_process_callbacks(struct softirq_action *unused) ++static __latent_entropy void rcu_process_callbacks(void) + { + struct rcu_state *rsp; + + if (cpu_is_offline(smp_processor_id())) + return; +- trace_rcu_utilization(TPS("Start RCU core")); + for_each_rcu_flavor(rsp) + __rcu_process_callbacks(rsp); +- trace_rcu_utilization(TPS("End RCU core")); + } + ++static DEFINE_PER_CPU(struct task_struct *, rcu_cpu_kthread_task); + /* + * Schedule RCU callback invocation. If the specified type of RCU + * does not support RCU priority boosting, just do a direct call, +@@ -2893,19 +2926,106 @@ static void invoke_rcu_callbacks(struct rcu_state *rsp, struct rcu_data *rdp) + { + if (unlikely(!READ_ONCE(rcu_scheduler_fully_active))) + return; +- if (likely(!rsp->boost)) { +- rcu_do_batch(rsp, rdp); +- return; +- } +- invoke_rcu_callbacks_kthread(); ++ rcu_do_batch(rsp, rdp); + } + ++static void rcu_wake_cond(struct task_struct *t, int status) ++{ ++ /* ++ * If the thread is yielding, only wake it when this ++ * is invoked from idle ++ */ ++ if (t && (status != RCU_KTHREAD_YIELDING || is_idle_task(current))) ++ wake_up_process(t); ++} ++ ++/* ++ * Wake up this CPU's rcuc kthread to do RCU core processing. ++ */ + static void invoke_rcu_core(void) + { +- if (cpu_online(smp_processor_id())) +- raise_softirq(RCU_SOFTIRQ); ++ unsigned long flags; ++ struct task_struct *t; ++ ++ if (!cpu_online(smp_processor_id())) ++ return; ++ local_irq_save(flags); ++ __this_cpu_write(rcu_cpu_has_work, 1); ++ t = __this_cpu_read(rcu_cpu_kthread_task); ++ if (t != NULL && current != t) ++ rcu_wake_cond(t, __this_cpu_read(rcu_cpu_kthread_status)); ++ local_irq_restore(flags); ++} ++ ++static void rcu_cpu_kthread_park(unsigned int cpu) ++{ ++ per_cpu(rcu_cpu_kthread_status, cpu) = RCU_KTHREAD_OFFCPU; ++} ++ ++static int rcu_cpu_kthread_should_run(unsigned int cpu) ++{ ++ return __this_cpu_read(rcu_cpu_has_work); + } + ++/* ++ * Per-CPU kernel thread that invokes RCU callbacks. This replaces the ++ * RCU softirq used in flavors and configurations of RCU that do not ++ * support RCU priority boosting. ++ */ ++static void rcu_cpu_kthread(unsigned int cpu) ++{ ++ unsigned int *statusp = this_cpu_ptr(&rcu_cpu_kthread_status); ++ char work, *workp = this_cpu_ptr(&rcu_cpu_has_work); ++ int spincnt; ++ ++ for (spincnt = 0; spincnt < 10; spincnt++) { ++ trace_rcu_utilization(TPS("Start CPU kthread@rcu_wait")); ++ local_bh_disable(); ++ *statusp = RCU_KTHREAD_RUNNING; ++ this_cpu_inc(rcu_cpu_kthread_loops); ++ local_irq_disable(); ++ work = *workp; ++ *workp = 0; ++ local_irq_enable(); ++ if (work) ++ rcu_process_callbacks(); ++ local_bh_enable(); ++ if (*workp == 0) { ++ trace_rcu_utilization(TPS("End CPU kthread@rcu_wait")); ++ *statusp = RCU_KTHREAD_WAITING; ++ return; ++ } ++ } ++ *statusp = RCU_KTHREAD_YIELDING; ++ trace_rcu_utilization(TPS("Start CPU kthread@rcu_yield")); ++ schedule_timeout_interruptible(2); ++ trace_rcu_utilization(TPS("End CPU kthread@rcu_yield")); ++ *statusp = RCU_KTHREAD_WAITING; ++} ++ ++static struct smp_hotplug_thread rcu_cpu_thread_spec = { ++ .store = &rcu_cpu_kthread_task, ++ .thread_should_run = rcu_cpu_kthread_should_run, ++ .thread_fn = rcu_cpu_kthread, ++ .thread_comm = "rcuc/%u", ++ .setup = rcu_cpu_kthread_setup, ++ .park = rcu_cpu_kthread_park, ++}; ++ ++/* ++ * Spawn per-CPU RCU core processing kthreads. ++ */ ++static int __init rcu_spawn_core_kthreads(void) ++{ ++ int cpu; ++ ++ for_each_possible_cpu(cpu) ++ per_cpu(rcu_cpu_has_work, cpu) = 0; ++ BUG_ON(smpboot_register_percpu_thread(&rcu_cpu_thread_spec)); ++ return 0; ++} ++early_initcall(rcu_spawn_core_kthreads); ++ + /* + * Handle any core-RCU processing required by a call_rcu() invocation. + */ +@@ -3057,6 +3177,7 @@ void call_rcu_sched(struct rcu_head *head, rcu_callback_t func) + } + EXPORT_SYMBOL_GPL(call_rcu_sched); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /** + * call_rcu_bh() - Queue an RCU for invocation after a quicker grace period. + * @head: structure to be used for queueing the RCU updates. +@@ -3084,6 +3205,7 @@ void call_rcu_bh(struct rcu_head *head, rcu_callback_t func) + __call_rcu(head, func, &rcu_bh_state, -1, 0); + } + EXPORT_SYMBOL_GPL(call_rcu_bh); ++#endif + + /* + * Queue an RCU callback for lazy invocation after a grace period. +@@ -3169,6 +3291,7 @@ void synchronize_sched(void) + } + EXPORT_SYMBOL_GPL(synchronize_sched); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /** + * synchronize_rcu_bh - wait until an rcu_bh grace period has elapsed. + * +@@ -3195,6 +3318,7 @@ void synchronize_rcu_bh(void) + wait_rcu_gp(call_rcu_bh); + } + EXPORT_SYMBOL_GPL(synchronize_rcu_bh); ++#endif + + /** + * get_state_synchronize_rcu - Snapshot current RCU state +@@ -3502,6 +3626,7 @@ static void _rcu_barrier(struct rcu_state *rsp) + mutex_unlock(&rsp->barrier_mutex); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + /** + * rcu_barrier_bh - Wait until all in-flight call_rcu_bh() callbacks complete. + */ +@@ -3510,6 +3635,7 @@ void rcu_barrier_bh(void) + _rcu_barrier(&rcu_bh_state); + } + EXPORT_SYMBOL_GPL(rcu_barrier_bh); ++#endif + + /** + * rcu_barrier_sched - Wait for in-flight call_rcu_sched() callbacks. +@@ -3659,8 +3785,6 @@ int rcutree_online_cpu(unsigned int cpu) + rnp->ffmask |= rdp->grpmask; + raw_spin_unlock_irqrestore_rcu_node(rnp, flags); + } +- if (IS_ENABLED(CONFIG_TREE_SRCU)) +- srcu_online_cpu(cpu); + if (rcu_scheduler_active == RCU_SCHEDULER_INACTIVE) + return 0; /* Too early in boot for scheduler work. */ + sync_sched_exp_online_cleanup(cpu); +@@ -3688,8 +3812,6 @@ int rcutree_offline_cpu(unsigned int cpu) + } + + rcutree_affinity_setting(cpu, cpu); +- if (IS_ENABLED(CONFIG_TREE_SRCU)) +- srcu_offline_cpu(cpu); + return 0; + } + +@@ -4157,12 +4279,13 @@ void __init rcu_init(void) + + rcu_bootup_announce(); + rcu_init_geometry(); ++#ifndef CONFIG_PREEMPT_RT_FULL + rcu_init_one(&rcu_bh_state); ++#endif + rcu_init_one(&rcu_sched_state); + if (dump_tree) + rcu_dump_rcu_node_tree(&rcu_sched_state); + __rcu_init_preempt(); +- open_softirq(RCU_SOFTIRQ, rcu_process_callbacks); + + /* + * We don't need protection against CPU-hotplug here because +diff --git a/kernel/rcu/tree.h b/kernel/rcu/tree.h +index 4e74df768c57..98257d20feb2 100644 +--- a/kernel/rcu/tree.h ++++ b/kernel/rcu/tree.h +@@ -413,7 +413,9 @@ extern struct list_head rcu_struct_flavors; + */ + extern struct rcu_state rcu_sched_state; + ++#ifndef CONFIG_PREEMPT_RT_FULL + extern struct rcu_state rcu_bh_state; ++#endif + + #ifdef CONFIG_PREEMPT_RCU + extern struct rcu_state rcu_preempt_state; +@@ -421,12 +423,10 @@ extern struct rcu_state rcu_preempt_state; + + int rcu_dynticks_snap(struct rcu_dynticks *rdtp); + +-#ifdef CONFIG_RCU_BOOST + DECLARE_PER_CPU(unsigned int, rcu_cpu_kthread_status); + DECLARE_PER_CPU(int, rcu_cpu_kthread_cpu); + DECLARE_PER_CPU(unsigned int, rcu_cpu_kthread_loops); + DECLARE_PER_CPU(char, rcu_cpu_has_work); +-#endif /* #ifdef CONFIG_RCU_BOOST */ + + #ifndef RCU_TREE_NONCORE + +@@ -449,8 +449,8 @@ static void dump_blkd_tasks(struct rcu_state *rsp, struct rcu_node *rnp, + int ncheck); + static void rcu_initiate_boost(struct rcu_node *rnp, unsigned long flags); + static void rcu_preempt_boost_start_gp(struct rcu_node *rnp); +-static void invoke_rcu_callbacks_kthread(void); + static bool rcu_is_callbacks_kthread(void); ++static void rcu_cpu_kthread_setup(unsigned int cpu); + #ifdef CONFIG_RCU_BOOST + static int rcu_spawn_one_boost_kthread(struct rcu_state *rsp, + struct rcu_node *rnp); +diff --git a/kernel/rcu/tree_exp.h b/kernel/rcu/tree_exp.h +index 0b2c2ad69629..a0486414edb4 100644 +--- a/kernel/rcu/tree_exp.h ++++ b/kernel/rcu/tree_exp.h +@@ -472,7 +472,6 @@ static void sync_rcu_exp_select_node_cpus(struct work_struct *wp) + static void sync_rcu_exp_select_cpus(struct rcu_state *rsp, + smp_call_func_t func) + { +- int cpu; + struct rcu_node *rnp; + + trace_rcu_exp_grace_period(rsp->name, rcu_exp_gp_seq_endval(rsp), TPS("reset")); +@@ -494,13 +493,7 @@ static void sync_rcu_exp_select_cpus(struct rcu_state *rsp, + continue; + } + INIT_WORK(&rnp->rew.rew_work, sync_rcu_exp_select_node_cpus); +- preempt_disable(); +- cpu = cpumask_next(rnp->grplo - 1, cpu_online_mask); +- /* If all offline, queue the work on an unbound CPU. */ +- if (unlikely(cpu > rnp->grphi)) +- cpu = WORK_CPU_UNBOUND; +- queue_work_on(cpu, rcu_par_gp_wq, &rnp->rew.rew_work); +- preempt_enable(); ++ queue_work_on(rnp->grplo, rcu_par_gp_wq, &rnp->rew.rew_work); + rnp->exp_need_flush = true; + } + +diff --git a/kernel/rcu/tree_plugin.h b/kernel/rcu/tree_plugin.h +index a97c20ea9bce..2e8737f1010f 100644 +--- a/kernel/rcu/tree_plugin.h ++++ b/kernel/rcu/tree_plugin.h +@@ -24,41 +24,16 @@ + * Paul E. McKenney + */ + +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include "../time/tick-internal.h" +- +-#ifdef CONFIG_RCU_BOOST +- + #include "../locking/rtmutex_common.h" + + /* + * Control variables for per-CPU and per-rcu_node kthreads. These + * handle all flavors of RCU. + */ +-static DEFINE_PER_CPU(struct task_struct *, rcu_cpu_kthread_task); + DEFINE_PER_CPU(unsigned int, rcu_cpu_kthread_status); + DEFINE_PER_CPU(unsigned int, rcu_cpu_kthread_loops); + DEFINE_PER_CPU(char, rcu_cpu_has_work); + +-#else /* #ifdef CONFIG_RCU_BOOST */ +- +-/* +- * Some architectures do not define rt_mutexes, but if !CONFIG_RCU_BOOST, +- * all uses are in dead code. Provide a definition to keep the compiler +- * happy, but add WARN_ON_ONCE() to complain if used in the wrong place. +- * This probably needs to be excluded from -rt builds. +- */ +-#define rt_mutex_owner(a) ({ WARN_ON_ONCE(1); NULL; }) +-#define rt_mutex_futex_unlock(x) WARN_ON_ONCE(1) +- +-#endif /* #else #ifdef CONFIG_RCU_BOOST */ +- + #ifdef CONFIG_RCU_NOCB_CPU + static cpumask_var_t rcu_nocb_mask; /* CPUs to have callbacks offloaded. */ + static bool __read_mostly rcu_nocb_poll; /* Offload kthread are to poll. */ +@@ -337,9 +312,13 @@ static void rcu_preempt_note_context_switch(bool preempt) + struct task_struct *t = current; + struct rcu_data *rdp; + struct rcu_node *rnp; ++ int sleeping_l = 0; + + lockdep_assert_irqs_disabled(); +- WARN_ON_ONCE(!preempt && t->rcu_read_lock_nesting > 0); ++#if defined(CONFIG_PREEMPT_RT_FULL) ++ sleeping_l = t->sleeping_lock; ++#endif ++ WARN_ON_ONCE(!preempt && t->rcu_read_lock_nesting > 0 && !sleeping_l); + if (t->rcu_read_lock_nesting > 0 && + !t->rcu_read_unlock_special.b.blocked) { + +@@ -520,7 +499,7 @@ static void rcu_read_unlock_special(struct task_struct *t) + } + + /* Hardware IRQ handlers cannot block, complain if they get here. */ +- if (in_irq() || in_serving_softirq()) { ++ if (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_OFFSET)) { + lockdep_rcu_suspicious(__FILE__, __LINE__, + "rcu_read_unlock() from irq or softirq with blocking in critical section!!!\n"); + pr_alert("->rcu_read_unlock_special: %#x (b: %d, enq: %d nq: %d)\n", +@@ -1022,18 +1001,21 @@ dump_blkd_tasks(struct rcu_state *rsp, struct rcu_node *rnp, int ncheck) + + #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ + ++/* ++ * If boosting, set rcuc kthreads to realtime priority. ++ */ ++static void rcu_cpu_kthread_setup(unsigned int cpu) ++{ + #ifdef CONFIG_RCU_BOOST ++ struct sched_param sp; + +-static void rcu_wake_cond(struct task_struct *t, int status) +-{ +- /* +- * If the thread is yielding, only wake it when this +- * is invoked from idle +- */ +- if (status != RCU_KTHREAD_YIELDING || is_idle_task(current)) +- wake_up_process(t); ++ sp.sched_priority = kthread_prio; ++ sched_setscheduler_nocheck(current, SCHED_FIFO, &sp); ++#endif /* #ifdef CONFIG_RCU_BOOST */ + } + ++#ifdef CONFIG_RCU_BOOST ++ + /* + * Carry out RCU priority boosting on the task indicated by ->exp_tasks + * or ->boost_tasks, advancing the pointer to the next task in the +@@ -1171,23 +1153,6 @@ static void rcu_initiate_boost(struct rcu_node *rnp, unsigned long flags) + } + } + +-/* +- * Wake up the per-CPU kthread to invoke RCU callbacks. +- */ +-static void invoke_rcu_callbacks_kthread(void) +-{ +- unsigned long flags; +- +- local_irq_save(flags); +- __this_cpu_write(rcu_cpu_has_work, 1); +- if (__this_cpu_read(rcu_cpu_kthread_task) != NULL && +- current != __this_cpu_read(rcu_cpu_kthread_task)) { +- rcu_wake_cond(__this_cpu_read(rcu_cpu_kthread_task), +- __this_cpu_read(rcu_cpu_kthread_status)); +- } +- local_irq_restore(flags); +-} +- + /* + * Is the current CPU running the RCU-callbacks kthread? + * Caller must have preemption disabled. +@@ -1242,67 +1207,6 @@ static int rcu_spawn_one_boost_kthread(struct rcu_state *rsp, + return 0; + } + +-static void rcu_kthread_do_work(void) +-{ +- rcu_do_batch(&rcu_sched_state, this_cpu_ptr(&rcu_sched_data)); +- rcu_do_batch(&rcu_bh_state, this_cpu_ptr(&rcu_bh_data)); +- rcu_do_batch(&rcu_preempt_state, this_cpu_ptr(&rcu_preempt_data)); +-} +- +-static void rcu_cpu_kthread_setup(unsigned int cpu) +-{ +- struct sched_param sp; +- +- sp.sched_priority = kthread_prio; +- sched_setscheduler_nocheck(current, SCHED_FIFO, &sp); +-} +- +-static void rcu_cpu_kthread_park(unsigned int cpu) +-{ +- per_cpu(rcu_cpu_kthread_status, cpu) = RCU_KTHREAD_OFFCPU; +-} +- +-static int rcu_cpu_kthread_should_run(unsigned int cpu) +-{ +- return __this_cpu_read(rcu_cpu_has_work); +-} +- +-/* +- * Per-CPU kernel thread that invokes RCU callbacks. This replaces the +- * RCU softirq used in flavors and configurations of RCU that do not +- * support RCU priority boosting. +- */ +-static void rcu_cpu_kthread(unsigned int cpu) +-{ +- unsigned int *statusp = this_cpu_ptr(&rcu_cpu_kthread_status); +- char work, *workp = this_cpu_ptr(&rcu_cpu_has_work); +- int spincnt; +- +- for (spincnt = 0; spincnt < 10; spincnt++) { +- trace_rcu_utilization(TPS("Start CPU kthread@rcu_wait")); +- local_bh_disable(); +- *statusp = RCU_KTHREAD_RUNNING; +- this_cpu_inc(rcu_cpu_kthread_loops); +- local_irq_disable(); +- work = *workp; +- *workp = 0; +- local_irq_enable(); +- if (work) +- rcu_kthread_do_work(); +- local_bh_enable(); +- if (*workp == 0) { +- trace_rcu_utilization(TPS("End CPU kthread@rcu_wait")); +- *statusp = RCU_KTHREAD_WAITING; +- return; +- } +- } +- *statusp = RCU_KTHREAD_YIELDING; +- trace_rcu_utilization(TPS("Start CPU kthread@rcu_yield")); +- schedule_timeout_interruptible(2); +- trace_rcu_utilization(TPS("End CPU kthread@rcu_yield")); +- *statusp = RCU_KTHREAD_WAITING; +-} +- + /* + * Set the per-rcu_node kthread's affinity to cover all CPUs that are + * served by the rcu_node in question. The CPU hotplug lock is still +@@ -1333,26 +1237,12 @@ static void rcu_boost_kthread_setaffinity(struct rcu_node *rnp, int outgoingcpu) + free_cpumask_var(cm); + } + +-static struct smp_hotplug_thread rcu_cpu_thread_spec = { +- .store = &rcu_cpu_kthread_task, +- .thread_should_run = rcu_cpu_kthread_should_run, +- .thread_fn = rcu_cpu_kthread, +- .thread_comm = "rcuc/%u", +- .setup = rcu_cpu_kthread_setup, +- .park = rcu_cpu_kthread_park, +-}; +- + /* + * Spawn boost kthreads -- called as soon as the scheduler is running. + */ + static void __init rcu_spawn_boost_kthreads(void) + { + struct rcu_node *rnp; +- int cpu; +- +- for_each_possible_cpu(cpu) +- per_cpu(rcu_cpu_has_work, cpu) = 0; +- BUG_ON(smpboot_register_percpu_thread(&rcu_cpu_thread_spec)); + rcu_for_each_leaf_node(rcu_state_p, rnp) + (void)rcu_spawn_one_boost_kthread(rcu_state_p, rnp); + } +@@ -1375,11 +1265,6 @@ static void rcu_initiate_boost(struct rcu_node *rnp, unsigned long flags) + raw_spin_unlock_irqrestore_rcu_node(rnp, flags); + } + +-static void invoke_rcu_callbacks_kthread(void) +-{ +- WARN_ON_ONCE(1); +-} +- + static bool rcu_is_callbacks_kthread(void) + { + return false; +@@ -1403,7 +1288,7 @@ static void rcu_prepare_kthreads(int cpu) + + #endif /* #else #ifdef CONFIG_RCU_BOOST */ + +-#if !defined(CONFIG_RCU_FAST_NO_HZ) ++#if !defined(CONFIG_RCU_FAST_NO_HZ) || defined(CONFIG_PREEMPT_RT_FULL) + + /* + * Check to see if any future RCU-related work will need to be done +@@ -1419,7 +1304,9 @@ int rcu_needs_cpu(u64 basemono, u64 *nextevt) + *nextevt = KTIME_MAX; + return rcu_cpu_has_callbacks(NULL); + } ++#endif /* !defined(CONFIG_RCU_FAST_NO_HZ) || defined(CONFIG_PREEMPT_RT_FULL) */ + ++#if !defined(CONFIG_RCU_FAST_NO_HZ) + /* + * Because we do not have RCU_FAST_NO_HZ, don't bother cleaning up + * after it. +@@ -1516,6 +1403,8 @@ static bool __maybe_unused rcu_try_advance_all_cbs(void) + return cbs_ready; + } + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + /* + * Allow the CPU to enter dyntick-idle mode unless it has callbacks ready + * to invoke. If the CPU has callbacks, try to advance them. Tell the +@@ -1558,6 +1447,7 @@ int rcu_needs_cpu(u64 basemono, u64 *nextevt) + *nextevt = basemono + dj * TICK_NSEC; + return 0; + } ++#endif /* #ifndef CONFIG_PREEMPT_RT_FULL */ + + /* + * Prepare a CPU for idle from an RCU perspective. The first major task +diff --git a/kernel/rcu/update.c b/kernel/rcu/update.c +index 81688a133552..ed75addd3ccd 100644 +--- a/kernel/rcu/update.c ++++ b/kernel/rcu/update.c +@@ -68,8 +68,10 @@ extern int rcu_expedited; /* from sysctl */ + module_param(rcu_expedited, int, 0); + extern int rcu_normal; /* from sysctl */ + module_param(rcu_normal, int, 0); +-static int rcu_normal_after_boot; ++static int rcu_normal_after_boot = IS_ENABLED(CONFIG_PREEMPT_RT_FULL); ++#ifndef CONFIG_PREEMPT_RT_FULL + module_param(rcu_normal_after_boot, int, 0); ++#endif + #endif /* #ifndef CONFIG_TINY_RCU */ + + #ifdef CONFIG_DEBUG_LOCK_ALLOC +@@ -288,6 +290,7 @@ int rcu_read_lock_held(void) + } + EXPORT_SYMBOL_GPL(rcu_read_lock_held); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /** + * rcu_read_lock_bh_held() - might we be in RCU-bh read-side critical section? + * +@@ -314,6 +317,7 @@ int rcu_read_lock_bh_held(void) + return in_softirq() || irqs_disabled(); + } + EXPORT_SYMBOL_GPL(rcu_read_lock_bh_held); ++#endif + + #endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ + +diff --git a/kernel/sched/Makefile b/kernel/sched/Makefile +index 7fe183404c38..2b765aa4e2c4 100644 +--- a/kernel/sched/Makefile ++++ b/kernel/sched/Makefile +@@ -18,7 +18,7 @@ endif + + obj-y += core.o loadavg.o clock.o cputime.o + obj-y += idle.o fair.o rt.o deadline.o +-obj-y += wait.o wait_bit.o swait.o completion.o ++obj-y += wait.o wait_bit.o swait.o swork.o completion.o + + obj-$(CONFIG_SMP) += cpupri.o cpudeadline.o topology.o stop_task.o pelt.o + obj-$(CONFIG_SCHED_AUTOGROUP) += autogroup.o +diff --git a/kernel/sched/completion.c b/kernel/sched/completion.c +index a1ad5b7d5521..49c14137988e 100644 +--- a/kernel/sched/completion.c ++++ b/kernel/sched/completion.c +@@ -29,12 +29,12 @@ void complete(struct completion *x) + { + unsigned long flags; + +- spin_lock_irqsave(&x->wait.lock, flags); ++ raw_spin_lock_irqsave(&x->wait.lock, flags); + + if (x->done != UINT_MAX) + x->done++; +- __wake_up_locked(&x->wait, TASK_NORMAL, 1); +- spin_unlock_irqrestore(&x->wait.lock, flags); ++ swake_up_locked(&x->wait); ++ raw_spin_unlock_irqrestore(&x->wait.lock, flags); + } + EXPORT_SYMBOL(complete); + +@@ -58,10 +58,10 @@ void complete_all(struct completion *x) + { + unsigned long flags; + +- spin_lock_irqsave(&x->wait.lock, flags); ++ raw_spin_lock_irqsave(&x->wait.lock, flags); + x->done = UINT_MAX; +- __wake_up_locked(&x->wait, TASK_NORMAL, 0); +- spin_unlock_irqrestore(&x->wait.lock, flags); ++ swake_up_all_locked(&x->wait); ++ raw_spin_unlock_irqrestore(&x->wait.lock, flags); + } + EXPORT_SYMBOL(complete_all); + +@@ -70,20 +70,20 @@ do_wait_for_common(struct completion *x, + long (*action)(long), long timeout, int state) + { + if (!x->done) { +- DECLARE_WAITQUEUE(wait, current); ++ DECLARE_SWAITQUEUE(wait); + +- __add_wait_queue_entry_tail_exclusive(&x->wait, &wait); + do { + if (signal_pending_state(state, current)) { + timeout = -ERESTARTSYS; + break; + } ++ __prepare_to_swait(&x->wait, &wait); + __set_current_state(state); +- spin_unlock_irq(&x->wait.lock); ++ raw_spin_unlock_irq(&x->wait.lock); + timeout = action(timeout); +- spin_lock_irq(&x->wait.lock); ++ raw_spin_lock_irq(&x->wait.lock); + } while (!x->done && timeout); +- __remove_wait_queue(&x->wait, &wait); ++ __finish_swait(&x->wait, &wait); + if (!x->done) + return timeout; + } +@@ -100,9 +100,9 @@ __wait_for_common(struct completion *x, + + complete_acquire(x); + +- spin_lock_irq(&x->wait.lock); ++ raw_spin_lock_irq(&x->wait.lock); + timeout = do_wait_for_common(x, action, timeout, state); +- spin_unlock_irq(&x->wait.lock); ++ raw_spin_unlock_irq(&x->wait.lock); + + complete_release(x); + +@@ -291,12 +291,12 @@ bool try_wait_for_completion(struct completion *x) + if (!READ_ONCE(x->done)) + return false; + +- spin_lock_irqsave(&x->wait.lock, flags); ++ raw_spin_lock_irqsave(&x->wait.lock, flags); + if (!x->done) + ret = false; + else if (x->done != UINT_MAX) + x->done--; +- spin_unlock_irqrestore(&x->wait.lock, flags); ++ raw_spin_unlock_irqrestore(&x->wait.lock, flags); + return ret; + } + EXPORT_SYMBOL(try_wait_for_completion); +@@ -322,8 +322,8 @@ bool completion_done(struct completion *x) + * otherwise we can end up freeing the completion before complete() + * is done referencing it. + */ +- spin_lock_irqsave(&x->wait.lock, flags); +- spin_unlock_irqrestore(&x->wait.lock, flags); ++ raw_spin_lock_irqsave(&x->wait.lock, flags); ++ raw_spin_unlock_irqrestore(&x->wait.lock, flags); + return true; + } + EXPORT_SYMBOL(completion_done); +diff --git a/kernel/sched/core.c b/kernel/sched/core.c +index 6859ea1d5c04..1b2503b87473 100644 +--- a/kernel/sched/core.c ++++ b/kernel/sched/core.c +@@ -44,7 +44,11 @@ const_debug unsigned int sysctl_sched_features = + * Number of tasks to iterate in a single balance run. + * Limited because this is done with IRQs disabled. + */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++const_debug unsigned int sysctl_sched_nr_migrate = 8; ++#else + const_debug unsigned int sysctl_sched_nr_migrate = 32; ++#endif + + /* + * period over which we measure -rt task CPU usage in us. +@@ -315,7 +319,7 @@ static void hrtick_rq_init(struct rq *rq) + rq->hrtick_csd.info = rq; + #endif + +- hrtimer_init(&rq->hrtick_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ hrtimer_init(&rq->hrtick_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD); + rq->hrtick_timer.function = hrtick; + } + #else /* CONFIG_SCHED_HRTICK */ +@@ -397,9 +401,15 @@ static bool set_nr_if_polling(struct task_struct *p) + #endif + #endif + +-void wake_q_add(struct wake_q_head *head, struct task_struct *task) ++void __wake_q_add(struct wake_q_head *head, struct task_struct *task, ++ bool sleeper) + { +- struct wake_q_node *node = &task->wake_q; ++ struct wake_q_node *node; ++ ++ if (sleeper) ++ node = &task->wake_q_sleeper; ++ else ++ node = &task->wake_q; + + /* + * Atomically grab the task, if ->wake_q is !nil already it means +@@ -422,24 +432,32 @@ void wake_q_add(struct wake_q_head *head, struct task_struct *task) + head->lastp = &node->next; + } + +-void wake_up_q(struct wake_q_head *head) ++void __wake_up_q(struct wake_q_head *head, bool sleeper) + { + struct wake_q_node *node = head->first; + + while (node != WAKE_Q_TAIL) { + struct task_struct *task; + +- task = container_of(node, struct task_struct, wake_q); ++ if (sleeper) ++ task = container_of(node, struct task_struct, wake_q_sleeper); ++ else ++ task = container_of(node, struct task_struct, wake_q); + BUG_ON(!task); + /* Task can safely be re-inserted now: */ + node = node->next; +- task->wake_q.next = NULL; +- ++ if (sleeper) ++ task->wake_q_sleeper.next = NULL; ++ else ++ task->wake_q.next = NULL; + /* + * wake_up_process() executes a full barrier, which pairs with + * the queueing in wake_q_add() so as not to miss wakeups. + */ +- wake_up_process(task); ++ if (sleeper) ++ wake_up_lock_sleeper(task); ++ else ++ wake_up_process(task); + put_task_struct(task); + } + } +@@ -475,6 +493,48 @@ void resched_curr(struct rq *rq) + trace_sched_wake_idle_without_ipi(cpu); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++ ++static int tsk_is_polling(struct task_struct *p) ++{ ++#ifdef TIF_POLLING_NRFLAG ++ return test_tsk_thread_flag(p, TIF_POLLING_NRFLAG); ++#else ++ return 0; ++#endif ++} ++ ++void resched_curr_lazy(struct rq *rq) ++{ ++ struct task_struct *curr = rq->curr; ++ int cpu; ++ ++ if (!sched_feat(PREEMPT_LAZY)) { ++ resched_curr(rq); ++ return; ++ } ++ ++ lockdep_assert_held(&rq->lock); ++ ++ if (test_tsk_need_resched(curr)) ++ return; ++ ++ if (test_tsk_need_resched_lazy(curr)) ++ return; ++ ++ set_tsk_need_resched_lazy(curr); ++ ++ cpu = cpu_of(rq); ++ if (cpu == smp_processor_id()) ++ return; ++ ++ /* NEED_RESCHED_LAZY must be visible before we test polling */ ++ smp_mb(); ++ if (!tsk_is_polling(curr)) ++ smp_send_reschedule(cpu); ++} ++#endif ++ + void resched_cpu(int cpu) + { + struct rq *rq = cpu_rq(cpu); +@@ -878,10 +938,10 @@ static inline bool is_per_cpu_kthread(struct task_struct *p) + */ + static inline bool is_cpu_allowed(struct task_struct *p, int cpu) + { +- if (!cpumask_test_cpu(cpu, &p->cpus_allowed)) ++ if (!cpumask_test_cpu(cpu, p->cpus_ptr)) + return false; + +- if (is_per_cpu_kthread(p)) ++ if (is_per_cpu_kthread(p) || __migrate_disabled(p)) + return cpu_online(cpu); + + return cpu_active(cpu); +@@ -973,7 +1033,7 @@ static int migration_cpu_stop(void *data) + local_irq_disable(); + /* + * We need to explicitly wake pending tasks before running +- * __migrate_task() such that we will not miss enforcing cpus_allowed ++ * __migrate_task() such that we will not miss enforcing cpus_ptr + * during wakeups, see set_cpus_allowed_ptr()'s TASK_WAKING test. + */ + sched_ttwu_pending(); +@@ -1004,11 +1064,20 @@ static int migration_cpu_stop(void *data) + */ + void set_cpus_allowed_common(struct task_struct *p, const struct cpumask *new_mask) + { +- cpumask_copy(&p->cpus_allowed, new_mask); ++ cpumask_copy(&p->cpus_mask, new_mask); + p->nr_cpus_allowed = cpumask_weight(new_mask); + } + +-void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) ++#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++int __migrate_disabled(struct task_struct *p) ++{ ++ return p->migrate_disable; ++} ++EXPORT_SYMBOL_GPL(__migrate_disabled); ++#endif ++ ++static void __do_set_cpus_allowed_tail(struct task_struct *p, ++ const struct cpumask *new_mask) + { + struct rq *rq = task_rq(p); + bool queued, running; +@@ -1037,6 +1106,20 @@ void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) + set_curr_task(rq, p); + } + ++void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) ++{ ++#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++ if (__migrate_disabled(p)) { ++ lockdep_assert_held(&p->pi_lock); ++ ++ cpumask_copy(&p->cpus_mask, new_mask); ++ p->migrate_disable_update = 1; ++ return; ++ } ++#endif ++ __do_set_cpus_allowed_tail(p, new_mask); ++} ++ + /* + * Change a given task's CPU affinity. Migrate the thread to a + * proper CPU and schedule it away if the CPU it's executing on +@@ -1074,7 +1157,7 @@ static int __set_cpus_allowed_ptr(struct task_struct *p, + goto out; + } + +- if (cpumask_equal(&p->cpus_allowed, new_mask)) ++ if (cpumask_equal(p->cpus_ptr, new_mask)) + goto out; + + if (!cpumask_intersects(new_mask, cpu_valid_mask)) { +@@ -1095,8 +1178,15 @@ static int __set_cpus_allowed_ptr(struct task_struct *p, + } + + /* Can the task run on the task's current CPU? If so, we're done */ +- if (cpumask_test_cpu(task_cpu(p), new_mask)) ++ if (cpumask_test_cpu(task_cpu(p), new_mask) || __migrate_disabled(p)) ++ goto out; ++ ++#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++ if (__migrate_disabled(p)) { ++ p->migrate_disable_update = 1; + goto out; ++ } ++#endif + + dest_cpu = cpumask_any_and(cpu_valid_mask, new_mask); + if (task_running(rq, p) || p->state == TASK_WAKING) { +@@ -1237,10 +1327,10 @@ static int migrate_swap_stop(void *data) + if (task_cpu(arg->src_task) != arg->src_cpu) + goto unlock; + +- if (!cpumask_test_cpu(arg->dst_cpu, &arg->src_task->cpus_allowed)) ++ if (!cpumask_test_cpu(arg->dst_cpu, arg->src_task->cpus_ptr)) + goto unlock; + +- if (!cpumask_test_cpu(arg->src_cpu, &arg->dst_task->cpus_allowed)) ++ if (!cpumask_test_cpu(arg->src_cpu, arg->dst_task->cpus_ptr)) + goto unlock; + + __migrate_swap_task(arg->src_task, arg->dst_cpu); +@@ -1282,10 +1372,10 @@ int migrate_swap(struct task_struct *cur, struct task_struct *p, + if (!cpu_active(arg.src_cpu) || !cpu_active(arg.dst_cpu)) + goto out; + +- if (!cpumask_test_cpu(arg.dst_cpu, &arg.src_task->cpus_allowed)) ++ if (!cpumask_test_cpu(arg.dst_cpu, arg.src_task->cpus_ptr)) + goto out; + +- if (!cpumask_test_cpu(arg.src_cpu, &arg.dst_task->cpus_allowed)) ++ if (!cpumask_test_cpu(arg.src_cpu, arg.dst_task->cpus_ptr)) + goto out; + + trace_sched_swap_numa(cur, arg.src_cpu, p, arg.dst_cpu); +@@ -1296,6 +1386,18 @@ int migrate_swap(struct task_struct *cur, struct task_struct *p, + } + #endif /* CONFIG_NUMA_BALANCING */ + ++static bool check_task_state(struct task_struct *p, long match_state) ++{ ++ bool match = false; ++ ++ raw_spin_lock_irq(&p->pi_lock); ++ if (p->state == match_state || p->saved_state == match_state) ++ match = true; ++ raw_spin_unlock_irq(&p->pi_lock); ++ ++ return match; ++} ++ + /* + * wait_task_inactive - wait for a thread to unschedule. + * +@@ -1340,7 +1442,7 @@ unsigned long wait_task_inactive(struct task_struct *p, long match_state) + * is actually now running somewhere else! + */ + while (task_running(rq, p)) { +- if (match_state && unlikely(p->state != match_state)) ++ if (match_state && !check_task_state(p, match_state)) + return 0; + cpu_relax(); + } +@@ -1355,7 +1457,8 @@ unsigned long wait_task_inactive(struct task_struct *p, long match_state) + running = task_running(rq, p); + queued = task_on_rq_queued(p); + ncsw = 0; +- if (!match_state || p->state == match_state) ++ if (!match_state || p->state == match_state || ++ p->saved_state == match_state) + ncsw = p->nvcsw | LONG_MIN; /* sets MSB */ + task_rq_unlock(rq, p, &rf); + +@@ -1430,7 +1533,7 @@ void kick_process(struct task_struct *p) + EXPORT_SYMBOL_GPL(kick_process); + + /* +- * ->cpus_allowed is protected by both rq->lock and p->pi_lock ++ * ->cpus_ptr is protected by both rq->lock and p->pi_lock + * + * A few notes on cpu_active vs cpu_online: + * +@@ -1470,14 +1573,14 @@ static int select_fallback_rq(int cpu, struct task_struct *p) + for_each_cpu(dest_cpu, nodemask) { + if (!cpu_active(dest_cpu)) + continue; +- if (cpumask_test_cpu(dest_cpu, &p->cpus_allowed)) ++ if (cpumask_test_cpu(dest_cpu, p->cpus_ptr)) + return dest_cpu; + } + } + + for (;;) { + /* Any allowed, online CPU? */ +- for_each_cpu(dest_cpu, &p->cpus_allowed) { ++ for_each_cpu(dest_cpu, p->cpus_ptr) { + if (!is_cpu_allowed(p, dest_cpu)) + continue; + +@@ -1521,7 +1624,7 @@ static int select_fallback_rq(int cpu, struct task_struct *p) + } + + /* +- * The caller (fork, wakeup) owns p->pi_lock, ->cpus_allowed is stable. ++ * The caller (fork, wakeup) owns p->pi_lock, ->cpus_ptr is stable. + */ + static inline + int select_task_rq(struct task_struct *p, int cpu, int sd_flags, int wake_flags) +@@ -1531,11 +1634,11 @@ int select_task_rq(struct task_struct *p, int cpu, int sd_flags, int wake_flags) + if (p->nr_cpus_allowed > 1) + cpu = p->sched_class->select_task_rq(p, cpu, sd_flags, wake_flags); + else +- cpu = cpumask_any(&p->cpus_allowed); ++ cpu = cpumask_any(p->cpus_ptr); + + /* + * In order not to call set_task_cpu() on a blocking task we need +- * to rely on ttwu() to place the task on a valid ->cpus_allowed ++ * to rely on ttwu() to place the task on a valid ->cpus_ptr + * CPU. + * + * Since this is common to all placement strategies, this lives here. +@@ -1638,10 +1741,6 @@ static inline void ttwu_activate(struct rq *rq, struct task_struct *p, int en_fl + { + activate_task(rq, p, en_flags); + p->on_rq = TASK_ON_RQ_QUEUED; +- +- /* If a worker is waking up, notify the workqueue: */ +- if (p->flags & PF_WQ_WORKER) +- wq_worker_waking_up(p, cpu_of(rq)); + } + + /* +@@ -1960,8 +2059,27 @@ try_to_wake_up(struct task_struct *p, unsigned int state, int wake_flags) + */ + raw_spin_lock_irqsave(&p->pi_lock, flags); + smp_mb__after_spinlock(); +- if (!(p->state & state)) ++ if (!(p->state & state)) { ++ /* ++ * The task might be running due to a spinlock sleeper ++ * wakeup. Check the saved state and set it to running ++ * if the wakeup condition is true. ++ */ ++ if (!(wake_flags & WF_LOCK_SLEEPER)) { ++ if (p->saved_state & state) { ++ p->saved_state = TASK_RUNNING; ++ success = 1; ++ } ++ } + goto out; ++ } ++ ++ /* ++ * If this is a regular wakeup, then we can unconditionally ++ * clear the saved state of a "lock sleeper". ++ */ ++ if (!(wake_flags & WF_LOCK_SLEEPER)) ++ p->saved_state = TASK_RUNNING; + + trace_sched_waking(p); + +@@ -2058,56 +2176,6 @@ try_to_wake_up(struct task_struct *p, unsigned int state, int wake_flags) + return success; + } + +-/** +- * try_to_wake_up_local - try to wake up a local task with rq lock held +- * @p: the thread to be awakened +- * @rf: request-queue flags for pinning +- * +- * Put @p on the run-queue if it's not already there. The caller must +- * ensure that this_rq() is locked, @p is bound to this_rq() and not +- * the current task. +- */ +-static void try_to_wake_up_local(struct task_struct *p, struct rq_flags *rf) +-{ +- struct rq *rq = task_rq(p); +- +- if (WARN_ON_ONCE(rq != this_rq()) || +- WARN_ON_ONCE(p == current)) +- return; +- +- lockdep_assert_held(&rq->lock); +- +- if (!raw_spin_trylock(&p->pi_lock)) { +- /* +- * This is OK, because current is on_cpu, which avoids it being +- * picked for load-balance and preemption/IRQs are still +- * disabled avoiding further scheduler activity on it and we've +- * not yet picked a replacement task. +- */ +- rq_unlock(rq, rf); +- raw_spin_lock(&p->pi_lock); +- rq_relock(rq, rf); +- } +- +- if (!(p->state & TASK_NORMAL)) +- goto out; +- +- trace_sched_waking(p); +- +- if (!task_on_rq_queued(p)) { +- if (p->in_iowait) { +- delayacct_blkio_end(p); +- atomic_dec(&rq->nr_iowait); +- } +- ttwu_activate(rq, p, ENQUEUE_WAKEUP | ENQUEUE_NOCLOCK); +- } +- +- ttwu_do_wakeup(rq, p, 0, rf); +- ttwu_stat(p, smp_processor_id(), 0); +-out: +- raw_spin_unlock(&p->pi_lock); +-} +- + /** + * wake_up_process - Wake up a specific process + * @p: The process to be woken up. +@@ -2125,6 +2193,18 @@ int wake_up_process(struct task_struct *p) + } + EXPORT_SYMBOL(wake_up_process); + ++/** ++ * wake_up_lock_sleeper - Wake up a specific process blocked on a "sleeping lock" ++ * @p: The process to be woken up. ++ * ++ * Same as wake_up_process() above, but wake_flags=WF_LOCK_SLEEPER to indicate ++ * the nature of the wakeup. ++ */ ++int wake_up_lock_sleeper(struct task_struct *p) ++{ ++ return try_to_wake_up(p, TASK_UNINTERRUPTIBLE, WF_LOCK_SLEEPER); ++} ++ + int wake_up_state(struct task_struct *p, unsigned int state) + { + return try_to_wake_up(p, state, 0); +@@ -2362,6 +2442,9 @@ int sched_fork(unsigned long clone_flags, struct task_struct *p) + p->on_cpu = 0; + #endif + init_task_preempt_count(p); ++#ifdef CONFIG_HAVE_PREEMPT_LAZY ++ task_thread_info(p)->preempt_lazy_count = 0; ++#endif + #ifdef CONFIG_SMP + plist_node_init(&p->pushable_tasks, MAX_PRIO); + RB_CLEAR_NODE(&p->pushable_dl_tasks); +@@ -2402,7 +2485,7 @@ void wake_up_new_task(struct task_struct *p) + #ifdef CONFIG_SMP + /* + * Fork balancing, do it here and not earlier because: +- * - cpus_allowed can change in the fork path ++ * - cpus_ptr can change in the fork path + * - any previously selected CPU might disappear through hotplug + * + * Use __set_task_cpu() to avoid calling sched_class::migrate_task_rq, +@@ -2690,23 +2773,18 @@ static struct rq *finish_task_switch(struct task_struct *prev) + * provided by mmdrop(), + * - a sync_core for SYNC_CORE. + */ ++ /* ++ * We use mmdrop_delayed() here so we don't have to do the ++ * full __mmdrop() when we are the last user. ++ */ + if (mm) { + membarrier_mm_sync_core_before_usermode(mm); +- mmdrop(mm); ++ mmdrop_delayed(mm); + } + if (unlikely(prev_state == TASK_DEAD)) { + if (prev->sched_class->task_dead) + prev->sched_class->task_dead(prev); + +- /* +- * Remove function-return probe instances associated with this +- * task and put them back on the free list. +- */ +- kprobe_flush_task(prev); +- +- /* Task is done with its stack. */ +- put_task_stack(prev); +- + put_task_struct(prev); + } + +@@ -3428,25 +3506,13 @@ static void __sched notrace __schedule(bool preempt) + atomic_inc(&rq->nr_iowait); + delayacct_blkio_start(); + } +- +- /* +- * If a worker went to sleep, notify and ask workqueue +- * whether it wants to wake up a task to maintain +- * concurrency. +- */ +- if (prev->flags & PF_WQ_WORKER) { +- struct task_struct *to_wakeup; +- +- to_wakeup = wq_worker_sleeping(prev); +- if (to_wakeup) +- try_to_wake_up_local(to_wakeup, &rf); +- } + } + switch_count = &prev->nvcsw; + } + + next = pick_next_task(rq, prev, &rf); + clear_tsk_need_resched(prev); ++ clear_tsk_need_resched_lazy(prev); + clear_preempt_need_resched(); + + if (likely(prev != next)) { +@@ -3498,8 +3564,24 @@ void __noreturn do_task_dead(void) + + static inline void sched_submit_work(struct task_struct *tsk) + { +- if (!tsk->state || tsk_is_pi_blocked(tsk)) ++ if (!tsk->state) ++ return; ++ /* ++ * If a worker went to sleep, notify and ask workqueue whether ++ * it wants to wake up a task to maintain concurrency. ++ * As this function is called inside the schedule() context, ++ * we disable preemption to avoid it calling schedule() again ++ * in the possible wakeup of a kworker. ++ */ ++ if (tsk->flags & PF_WQ_WORKER) { ++ preempt_disable(); ++ wq_worker_sleeping(tsk); ++ preempt_enable_no_resched(); ++ } ++ ++ if (tsk_is_pi_blocked(tsk)) + return; ++ + /* + * If we are going to sleep and we have plugged IO queued, + * make sure to submit it to avoid deadlocks. +@@ -3508,6 +3590,12 @@ static inline void sched_submit_work(struct task_struct *tsk) + blk_schedule_flush_plug(tsk); + } + ++static void sched_update_worker(struct task_struct *tsk) ++{ ++ if (tsk->flags & PF_WQ_WORKER) ++ wq_worker_running(tsk); ++} ++ + asmlinkage __visible void __sched schedule(void) + { + struct task_struct *tsk = current; +@@ -3518,6 +3606,7 @@ asmlinkage __visible void __sched schedule(void) + __schedule(false); + sched_preempt_enable_no_resched(); + } while (need_resched()); ++ sched_update_worker(tsk); + } + EXPORT_SYMBOL(schedule); + +@@ -3606,6 +3695,30 @@ static void __sched notrace preempt_schedule_common(void) + } while (need_resched()); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++/* ++ * If TIF_NEED_RESCHED is then we allow to be scheduled away since this is ++ * set by a RT task. Oterwise we try to avoid beeing scheduled out as long as ++ * preempt_lazy_count counter >0. ++ */ ++static __always_inline int preemptible_lazy(void) ++{ ++ if (test_thread_flag(TIF_NEED_RESCHED)) ++ return 1; ++ if (current_thread_info()->preempt_lazy_count) ++ return 0; ++ return 1; ++} ++ ++#else ++ ++static inline int preemptible_lazy(void) ++{ ++ return 1; ++} ++ ++#endif ++ + #ifdef CONFIG_PREEMPT + /* + * this is the entry point to schedule() from in-kernel preemption +@@ -3620,7 +3733,8 @@ asmlinkage __visible void __sched notrace preempt_schedule(void) + */ + if (likely(!preemptible())) + return; +- ++ if (!preemptible_lazy()) ++ return; + preempt_schedule_common(); + } + NOKPROBE_SYMBOL(preempt_schedule); +@@ -3647,6 +3761,9 @@ asmlinkage __visible void __sched notrace preempt_schedule_notrace(void) + if (likely(!preemptible())) + return; + ++ if (!preemptible_lazy()) ++ return; ++ + do { + /* + * Because the function tracer can trace preempt_count_sub() +@@ -4275,7 +4392,7 @@ static int __sched_setscheduler(struct task_struct *p, + * the entire root_domain to become SCHED_DEADLINE. We + * will also fail if there's no bandwidth available. + */ +- if (!cpumask_subset(span, &p->cpus_allowed) || ++ if (!cpumask_subset(span, p->cpus_ptr) || + rq->rd->dl_bw.bw == 0) { + task_rq_unlock(rq, p, &rf); + return -EPERM; +@@ -4874,7 +4991,7 @@ long sched_getaffinity(pid_t pid, struct cpumask *mask) + goto out_unlock; + + raw_spin_lock_irqsave(&p->pi_lock, flags); +- cpumask_and(mask, &p->cpus_allowed, cpu_active_mask); ++ cpumask_and(mask, &p->cpus_mask, cpu_active_mask); + raw_spin_unlock_irqrestore(&p->pi_lock, flags); + + out_unlock: +@@ -5415,7 +5532,9 @@ void init_idle(struct task_struct *idle, int cpu) + + /* Set the preempt count _outside_ the spinlocks! */ + init_idle_preempt_count(idle, cpu); +- ++#ifdef CONFIG_HAVE_PREEMPT_LAZY ++ task_thread_info(idle)->preempt_lazy_count = 0; ++#endif + /* + * The idle tasks have their own, simple scheduling class: + */ +@@ -5454,7 +5573,7 @@ int task_can_attach(struct task_struct *p, + * allowed nodes is unnecessary. Thus, cpusets are not + * applicable for such threads. This prevents checking for + * success of set_cpus_allowed_ptr() on all attached tasks +- * before cpus_allowed may be changed. ++ * before cpus_mask may be changed. + */ + if (p->flags & PF_NO_SETAFFINITY) { + ret = -EINVAL; +@@ -5481,7 +5600,7 @@ int migrate_task_to(struct task_struct *p, int target_cpu) + if (curr_cpu == target_cpu) + return 0; + +- if (!cpumask_test_cpu(target_cpu, &p->cpus_allowed)) ++ if (!cpumask_test_cpu(target_cpu, p->cpus_ptr)) + return -EINVAL; + + /* TODO: This is not properly updating schedstats */ +@@ -5520,6 +5639,8 @@ void sched_setnuma(struct task_struct *p, int nid) + #endif /* CONFIG_NUMA_BALANCING */ + + #ifdef CONFIG_HOTPLUG_CPU ++static DEFINE_PER_CPU(struct mm_struct *, idle_last_mm); ++ + /* + * Ensure that the idle task is using init_mm right before its CPU goes + * offline. +@@ -5535,7 +5656,11 @@ void idle_task_exit(void) + current->active_mm = &init_mm; + finish_arch_post_lock_switch(); + } +- mmdrop(mm); ++ /* ++ * Defer the cleanup to an alive cpu. On RT we can neither ++ * call mmdrop() nor mmdrop_delayed() from here. ++ */ ++ per_cpu(idle_last_mm, smp_processor_id()) = mm; + } + + /* +@@ -5619,7 +5744,7 @@ static void migrate_tasks(struct rq *dead_rq, struct rq_flags *rf) + put_prev_task(rq, next); + + /* +- * Rules for changing task_struct::cpus_allowed are holding ++ * Rules for changing task_struct::cpus_mask are holding + * both pi_lock and rq->lock, such that holding either + * stabilizes the mask. + * +@@ -5847,6 +5972,10 @@ int sched_cpu_dying(unsigned int cpu) + update_max_interval(); + nohz_balance_exit_idle(rq); + hrtick_clear(rq); ++ if (per_cpu(idle_last_mm, cpu)) { ++ mmdrop_delayed(per_cpu(idle_last_mm, cpu)); ++ per_cpu(idle_last_mm, cpu) = NULL; ++ } + return 0; + } + #endif +@@ -6081,7 +6210,7 @@ void __init sched_init(void) + #ifdef CONFIG_DEBUG_ATOMIC_SLEEP + static inline int preempt_count_equals(int preempt_offset) + { +- int nested = preempt_count() + rcu_preempt_depth(); ++ int nested = preempt_count() + sched_rcu_preempt_depth(); + + return (nested == preempt_offset); + } +@@ -7067,3 +7196,196 @@ const u32 sched_prio_to_wmult[40] = { + }; + + #undef CREATE_TRACE_POINTS ++ ++#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++ ++static inline void ++update_nr_migratory(struct task_struct *p, long delta) ++{ ++ if (unlikely((p->sched_class == &rt_sched_class || ++ p->sched_class == &dl_sched_class) && ++ p->nr_cpus_allowed > 1)) { ++ if (p->sched_class == &rt_sched_class) ++ task_rq(p)->rt.rt_nr_migratory += delta; ++ else ++ task_rq(p)->dl.dl_nr_migratory += delta; ++ } ++} ++ ++static inline void ++migrate_disable_update_cpus_allowed(struct task_struct *p) ++{ ++ struct rq *rq; ++ struct rq_flags rf; ++ ++ p->cpus_ptr = cpumask_of(smp_processor_id()); ++ ++ rq = task_rq_lock(p, &rf); ++ update_nr_migratory(p, -1); ++ p->nr_cpus_allowed = 1; ++ task_rq_unlock(rq, p, &rf); ++} ++ ++static inline void ++migrate_enable_update_cpus_allowed(struct task_struct *p) ++{ ++ struct rq *rq; ++ struct rq_flags rf; ++ ++ p->cpus_ptr = &p->cpus_mask; ++ ++ rq = task_rq_lock(p, &rf); ++ p->nr_cpus_allowed = cpumask_weight(&p->cpus_mask); ++ update_nr_migratory(p, 1); ++ task_rq_unlock(rq, p, &rf); ++} ++ ++void migrate_disable(void) ++{ ++ struct task_struct *p = current; ++ ++ if (in_atomic() || irqs_disabled()) { ++#ifdef CONFIG_SCHED_DEBUG ++ p->migrate_disable_atomic++; ++#endif ++ return; ++ } ++#ifdef CONFIG_SCHED_DEBUG ++ if (unlikely(p->migrate_disable_atomic)) { ++ tracing_off(); ++ WARN_ON_ONCE(1); ++ } ++#endif ++ ++ if (p->migrate_disable) { ++ p->migrate_disable++; ++ return; ++ } ++ ++ preempt_disable(); ++ preempt_lazy_disable(); ++ pin_current_cpu(); ++ ++ migrate_disable_update_cpus_allowed(p); ++ p->migrate_disable = 1; ++ ++ preempt_enable(); ++} ++EXPORT_SYMBOL(migrate_disable); ++ ++void migrate_enable(void) ++{ ++ struct task_struct *p = current; ++ ++ if (in_atomic() || irqs_disabled()) { ++#ifdef CONFIG_SCHED_DEBUG ++ p->migrate_disable_atomic--; ++#endif ++ return; ++ } ++ ++#ifdef CONFIG_SCHED_DEBUG ++ if (unlikely(p->migrate_disable_atomic)) { ++ tracing_off(); ++ WARN_ON_ONCE(1); ++ } ++#endif ++ ++ WARN_ON_ONCE(p->migrate_disable <= 0); ++ if (p->migrate_disable > 1) { ++ p->migrate_disable--; ++ return; ++ } ++ ++ preempt_disable(); ++ ++ p->migrate_disable = 0; ++ migrate_enable_update_cpus_allowed(p); ++ ++ if (p->migrate_disable_update) { ++ struct rq *rq; ++ struct rq_flags rf; ++ ++ rq = task_rq_lock(p, &rf); ++ update_rq_clock(rq); ++ ++ __do_set_cpus_allowed_tail(p, &p->cpus_mask); ++ task_rq_unlock(rq, p, &rf); ++ ++ p->migrate_disable_update = 0; ++ ++ WARN_ON(smp_processor_id() != task_cpu(p)); ++ if (!cpumask_test_cpu(task_cpu(p), &p->cpus_mask)) { ++ const struct cpumask *cpu_valid_mask = cpu_active_mask; ++ struct migration_arg arg; ++ unsigned int dest_cpu; ++ ++ if (p->flags & PF_KTHREAD) { ++ /* ++ * Kernel threads are allowed on online && !active CPUs ++ */ ++ cpu_valid_mask = cpu_online_mask; ++ } ++ dest_cpu = cpumask_any_and(cpu_valid_mask, &p->cpus_mask); ++ arg.task = p; ++ arg.dest_cpu = dest_cpu; ++ ++ unpin_current_cpu(); ++ preempt_lazy_enable(); ++ preempt_enable(); ++ stop_one_cpu(task_cpu(p), migration_cpu_stop, &arg); ++ tlb_migrate_finish(p->mm); ++ ++ return; ++ } ++ } ++ unpin_current_cpu(); ++ preempt_lazy_enable(); ++ preempt_enable(); ++} ++EXPORT_SYMBOL(migrate_enable); ++ ++#elif !defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++void migrate_disable(void) ++{ ++#ifdef CONFIG_SCHED_DEBUG ++ struct task_struct *p = current; ++ ++ if (in_atomic() || irqs_disabled()) { ++ p->migrate_disable_atomic++; ++ return; ++ } ++ ++ if (unlikely(p->migrate_disable_atomic)) { ++ tracing_off(); ++ WARN_ON_ONCE(1); ++ } ++ ++ p->migrate_disable++; ++#endif ++ barrier(); ++} ++EXPORT_SYMBOL(migrate_disable); ++ ++void migrate_enable(void) ++{ ++#ifdef CONFIG_SCHED_DEBUG ++ struct task_struct *p = current; ++ ++ if (in_atomic() || irqs_disabled()) { ++ p->migrate_disable_atomic--; ++ return; ++ } ++ ++ if (unlikely(p->migrate_disable_atomic)) { ++ tracing_off(); ++ WARN_ON_ONCE(1); ++ } ++ ++ WARN_ON_ONCE(p->migrate_disable <= 0); ++ p->migrate_disable--; ++#endif ++ barrier(); ++} ++EXPORT_SYMBOL(migrate_enable); ++#endif +diff --git a/kernel/sched/cpudeadline.c b/kernel/sched/cpudeadline.c +index 50316455ea66..d57fb2f8ae67 100644 +--- a/kernel/sched/cpudeadline.c ++++ b/kernel/sched/cpudeadline.c +@@ -124,14 +124,14 @@ int cpudl_find(struct cpudl *cp, struct task_struct *p, + const struct sched_dl_entity *dl_se = &p->dl; + + if (later_mask && +- cpumask_and(later_mask, cp->free_cpus, &p->cpus_allowed)) { ++ cpumask_and(later_mask, cp->free_cpus, p->cpus_ptr)) { + return 1; + } else { + int best_cpu = cpudl_maximum(cp); + + WARN_ON(best_cpu != -1 && !cpu_present(best_cpu)); + +- if (cpumask_test_cpu(best_cpu, &p->cpus_allowed) && ++ if (cpumask_test_cpu(best_cpu, p->cpus_ptr) && + dl_time_before(dl_se->deadline, cp->elements[0].dl)) { + if (later_mask) + cpumask_set_cpu(best_cpu, later_mask); +diff --git a/kernel/sched/cpupri.c b/kernel/sched/cpupri.c +index daaadf939ccb..f7d2c10b4c92 100644 +--- a/kernel/sched/cpupri.c ++++ b/kernel/sched/cpupri.c +@@ -98,11 +98,11 @@ int cpupri_find(struct cpupri *cp, struct task_struct *p, + if (skip) + continue; + +- if (cpumask_any_and(&p->cpus_allowed, vec->mask) >= nr_cpu_ids) ++ if (cpumask_any_and(p->cpus_ptr, vec->mask) >= nr_cpu_ids) + continue; + + if (lowest_mask) { +- cpumask_and(lowest_mask, &p->cpus_allowed, vec->mask); ++ cpumask_and(lowest_mask, p->cpus_ptr, vec->mask); + + /* + * We have to ensure that we have at least one bit +diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c +index 72c07059ef37..1794e152d888 100644 +--- a/kernel/sched/deadline.c ++++ b/kernel/sched/deadline.c +@@ -538,7 +538,7 @@ static struct rq *dl_task_offline_migration(struct rq *rq, struct task_struct *p + * If we cannot preempt any rq, fall back to pick any + * online CPU: + */ +- cpu = cpumask_any_and(cpu_active_mask, &p->cpus_allowed); ++ cpu = cpumask_any_and(cpu_active_mask, p->cpus_ptr); + if (cpu >= nr_cpu_ids) { + /* + * Failed to find any suitable CPU. +@@ -1053,7 +1053,7 @@ void init_dl_task_timer(struct sched_dl_entity *dl_se) + { + struct hrtimer *timer = &dl_se->dl_timer; + +- hrtimer_init(timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ hrtimer_init(timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD); + timer->function = dl_task_timer; + } + +@@ -1823,7 +1823,7 @@ static void set_curr_task_dl(struct rq *rq) + static int pick_dl_task(struct rq *rq, struct task_struct *p, int cpu) + { + if (!task_running(rq, p) && +- cpumask_test_cpu(cpu, &p->cpus_allowed)) ++ cpumask_test_cpu(cpu, p->cpus_ptr)) + return 1; + return 0; + } +@@ -1973,7 +1973,7 @@ static struct rq *find_lock_later_rq(struct task_struct *task, struct rq *rq) + /* Retry if something changed. */ + if (double_lock_balance(rq, later_rq)) { + if (unlikely(task_rq(task) != rq || +- !cpumask_test_cpu(later_rq->cpu, &task->cpus_allowed) || ++ !cpumask_test_cpu(later_rq->cpu, task->cpus_ptr) || + task_running(rq, task) || + !dl_task(task) || + !task_on_rq_queued(task))) { +diff --git a/kernel/sched/debug.c b/kernel/sched/debug.c +index 78fadf0438ea..dd6c364d6f01 100644 +--- a/kernel/sched/debug.c ++++ b/kernel/sched/debug.c +@@ -982,6 +982,10 @@ void proc_sched_show_task(struct task_struct *p, struct pid_namespace *ns, + P(dl.runtime); + P(dl.deadline); + } ++#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT_RT_BASE) ++ P(migrate_disable); ++#endif ++ P(nr_cpus_allowed); + #undef PN_SCHEDSTAT + #undef PN + #undef __PN +diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c +index 4a433608ba74..2cca09d59019 100644 +--- a/kernel/sched/fair.c ++++ b/kernel/sched/fair.c +@@ -1630,7 +1630,7 @@ static void task_numa_compare(struct task_numa_env *env, + * be incurred if the tasks were swapped. + */ + /* Skip this swap candidate if cannot move to the source cpu */ +- if (!cpumask_test_cpu(env->src_cpu, &cur->cpus_allowed)) ++ if (!cpumask_test_cpu(env->src_cpu, cur->cpus_ptr)) + goto unlock; + + /* +@@ -1727,7 +1727,7 @@ static void task_numa_find_cpu(struct task_numa_env *env, + + for_each_cpu(cpu, cpumask_of_node(env->dst_nid)) { + /* Skip this CPU if the source task cannot migrate */ +- if (!cpumask_test_cpu(cpu, &env->p->cpus_allowed)) ++ if (!cpumask_test_cpu(cpu, env->p->cpus_ptr)) + continue; + + env->dst_cpu = cpu; +@@ -4021,7 +4021,7 @@ check_preempt_tick(struct cfs_rq *cfs_rq, struct sched_entity *curr) + ideal_runtime = sched_slice(cfs_rq, curr); + delta_exec = curr->sum_exec_runtime - curr->prev_sum_exec_runtime; + if (delta_exec > ideal_runtime) { +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + /* + * The current task ran long enough, ensure it doesn't get + * re-elected due to buddy favours. +@@ -4045,7 +4045,7 @@ check_preempt_tick(struct cfs_rq *cfs_rq, struct sched_entity *curr) + return; + + if (delta > ideal_runtime) +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + } + + static void +@@ -4187,7 +4187,7 @@ entity_tick(struct cfs_rq *cfs_rq, struct sched_entity *curr, int queued) + * validating it and just reschedule. + */ + if (queued) { +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + return; + } + /* +@@ -4371,7 +4371,7 @@ static void __account_cfs_rq_runtime(struct cfs_rq *cfs_rq, u64 delta_exec) + * hierarchy can be throttled + */ + if (!assign_cfs_rq_runtime(cfs_rq) && likely(cfs_rq->curr)) +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + } + + static __always_inline +@@ -4557,7 +4557,7 @@ static u64 distribute_cfs_runtime(struct cfs_bandwidth *cfs_b, + struct rq *rq = rq_of(cfs_rq); + struct rq_flags rf; + +- rq_lock(rq, &rf); ++ rq_lock_irqsave(rq, &rf); + if (!cfs_rq_throttled(cfs_rq)) + goto next; + +@@ -4574,7 +4574,7 @@ static u64 distribute_cfs_runtime(struct cfs_bandwidth *cfs_b, + unthrottle_cfs_rq(cfs_rq); + + next: +- rq_unlock(rq, &rf); ++ rq_unlock_irqrestore(rq, &rf); + + if (!remaining) + break; +@@ -4590,7 +4590,7 @@ static u64 distribute_cfs_runtime(struct cfs_bandwidth *cfs_b, + * period the timer is deactivated until scheduling resumes; cfs_b->idle is + * used to track this state. + */ +-static int do_sched_cfs_period_timer(struct cfs_bandwidth *cfs_b, int overrun) ++static int do_sched_cfs_period_timer(struct cfs_bandwidth *cfs_b, int overrun, unsigned long flags) + { + u64 runtime, runtime_expires; + int throttled; +@@ -4632,11 +4632,11 @@ static int do_sched_cfs_period_timer(struct cfs_bandwidth *cfs_b, int overrun) + while (throttled && cfs_b->runtime > 0 && !cfs_b->distribute_running) { + runtime = cfs_b->runtime; + cfs_b->distribute_running = 1; +- raw_spin_unlock(&cfs_b->lock); ++ raw_spin_unlock_irqrestore(&cfs_b->lock, flags); + /* we can't nest cfs_b->lock while distributing bandwidth */ + runtime = distribute_cfs_runtime(cfs_b, runtime, + runtime_expires); +- raw_spin_lock(&cfs_b->lock); ++ raw_spin_lock_irqsave(&cfs_b->lock, flags); + + cfs_b->distribute_running = 0; + throttled = !list_empty(&cfs_b->throttled_cfs_rq); +@@ -4745,17 +4745,18 @@ static __always_inline void return_cfs_rq_runtime(struct cfs_rq *cfs_rq) + static void do_sched_cfs_slack_timer(struct cfs_bandwidth *cfs_b) + { + u64 runtime = 0, slice = sched_cfs_bandwidth_slice(); ++ unsigned long flags; + u64 expires; + + /* confirm we're still not at a refresh boundary */ +- raw_spin_lock(&cfs_b->lock); ++ raw_spin_lock_irqsave(&cfs_b->lock, flags); + if (cfs_b->distribute_running) { +- raw_spin_unlock(&cfs_b->lock); ++ raw_spin_unlock_irqrestore(&cfs_b->lock, flags); + return; + } + + if (runtime_refresh_within(cfs_b, min_bandwidth_expiration)) { +- raw_spin_unlock(&cfs_b->lock); ++ raw_spin_unlock_irqrestore(&cfs_b->lock, flags); + return; + } + +@@ -4766,18 +4767,18 @@ static void do_sched_cfs_slack_timer(struct cfs_bandwidth *cfs_b) + if (runtime) + cfs_b->distribute_running = 1; + +- raw_spin_unlock(&cfs_b->lock); ++ raw_spin_unlock_irqrestore(&cfs_b->lock, flags); + + if (!runtime) + return; + + runtime = distribute_cfs_runtime(cfs_b, runtime, expires); + +- raw_spin_lock(&cfs_b->lock); ++ raw_spin_lock_irqsave(&cfs_b->lock, flags); + if (expires == cfs_b->runtime_expires) + cfs_b->runtime -= min(runtime, cfs_b->runtime); + cfs_b->distribute_running = 0; +- raw_spin_unlock(&cfs_b->lock); ++ raw_spin_unlock_irqrestore(&cfs_b->lock, flags); + } + + /* +@@ -4857,11 +4858,12 @@ static enum hrtimer_restart sched_cfs_period_timer(struct hrtimer *timer) + { + struct cfs_bandwidth *cfs_b = + container_of(timer, struct cfs_bandwidth, period_timer); ++ unsigned long flags; + int overrun; + int idle = 0; + int count = 0; + +- raw_spin_lock(&cfs_b->lock); ++ raw_spin_lock_irqsave(&cfs_b->lock, flags); + for (;;) { + overrun = hrtimer_forward_now(timer, cfs_b->period); + if (!overrun) +@@ -4889,11 +4891,11 @@ static enum hrtimer_restart sched_cfs_period_timer(struct hrtimer *timer) + count = 0; + } + +- idle = do_sched_cfs_period_timer(cfs_b, overrun); ++ idle = do_sched_cfs_period_timer(cfs_b, overrun, flags); + } + if (idle) + cfs_b->period_active = 0; +- raw_spin_unlock(&cfs_b->lock); ++ raw_spin_unlock_irqrestore(&cfs_b->lock, flags); + + return idle ? HRTIMER_NORESTART : HRTIMER_RESTART; + } +@@ -5065,7 +5067,7 @@ static void hrtick_start_fair(struct rq *rq, struct task_struct *p) + + if (delta < 0) { + if (rq->curr == p) +- resched_curr(rq); ++ resched_curr_lazy(rq); + return; + } + hrtick_start(rq, delta); +@@ -5739,7 +5741,7 @@ find_idlest_group(struct sched_domain *sd, struct task_struct *p, + + /* Skip over this group if it has no CPUs allowed */ + if (!cpumask_intersects(sched_group_span(group), +- &p->cpus_allowed)) ++ p->cpus_ptr)) + continue; + + local_group = cpumask_test_cpu(this_cpu, +@@ -5871,7 +5873,7 @@ find_idlest_group_cpu(struct sched_group *group, struct task_struct *p, int this + return cpumask_first(sched_group_span(group)); + + /* Traverse only the allowed CPUs */ +- for_each_cpu_and(i, sched_group_span(group), &p->cpus_allowed) { ++ for_each_cpu_and(i, sched_group_span(group), p->cpus_ptr) { + if (available_idle_cpu(i)) { + struct rq *rq = cpu_rq(i); + struct cpuidle_state *idle = idle_get_state(rq); +@@ -5911,7 +5913,7 @@ static inline int find_idlest_cpu(struct sched_domain *sd, struct task_struct *p + { + int new_cpu = cpu; + +- if (!cpumask_intersects(sched_domain_span(sd), &p->cpus_allowed)) ++ if (!cpumask_intersects(sched_domain_span(sd), p->cpus_ptr)) + return prev_cpu; + + /* +@@ -6028,7 +6030,7 @@ static int select_idle_core(struct task_struct *p, struct sched_domain *sd, int + if (!test_idle_cores(target, false)) + return -1; + +- cpumask_and(cpus, sched_domain_span(sd), &p->cpus_allowed); ++ cpumask_and(cpus, sched_domain_span(sd), p->cpus_ptr); + + for_each_cpu_wrap(core, cpus, target) { + bool idle = true; +@@ -6062,7 +6064,7 @@ static int select_idle_smt(struct task_struct *p, struct sched_domain *sd, int t + return -1; + + for_each_cpu(cpu, cpu_smt_mask(target)) { +- if (!cpumask_test_cpu(cpu, &p->cpus_allowed)) ++ if (!cpumask_test_cpu(cpu, p->cpus_ptr)) + continue; + if (available_idle_cpu(cpu)) + return cpu; +@@ -6125,7 +6127,7 @@ static int select_idle_cpu(struct task_struct *p, struct sched_domain *sd, int t + for_each_cpu_wrap(cpu, sched_domain_span(sd), target) { + if (!--nr) + return -1; +- if (!cpumask_test_cpu(cpu, &p->cpus_allowed)) ++ if (!cpumask_test_cpu(cpu, p->cpus_ptr)) + continue; + if (available_idle_cpu(cpu)) + break; +@@ -6162,7 +6164,7 @@ static int select_idle_sibling(struct task_struct *p, int prev, int target) + recent_used_cpu != target && + cpus_share_cache(recent_used_cpu, target) && + available_idle_cpu(recent_used_cpu) && +- cpumask_test_cpu(p->recent_used_cpu, &p->cpus_allowed)) { ++ cpumask_test_cpu(p->recent_used_cpu, p->cpus_ptr)) { + /* + * Replace recent_used_cpu with prev as it is a potential + * candidate for the next wake: +@@ -6380,7 +6382,7 @@ select_task_rq_fair(struct task_struct *p, int prev_cpu, int sd_flag, int wake_f + if (sd_flag & SD_BALANCE_WAKE) { + record_wakee(p); + want_affine = !wake_wide(p) && !wake_cap(p, cpu, prev_cpu) +- && cpumask_test_cpu(cpu, &p->cpus_allowed); ++ && cpumask_test_cpu(cpu, p->cpus_ptr); + } + + rcu_read_lock(); +@@ -6641,7 +6643,7 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p, int wake_ + return; + + preempt: +- resched_curr(rq); ++ resched_curr_lazy(rq); + /* + * Only set the backward buddy when the current task is still + * on the rq. This can happen when a wakeup gets interleaved +@@ -7119,14 +7121,14 @@ int can_migrate_task(struct task_struct *p, struct lb_env *env) + /* + * We do not migrate tasks that are: + * 1) throttled_lb_pair, or +- * 2) cannot be migrated to this CPU due to cpus_allowed, or ++ * 2) cannot be migrated to this CPU due to cpus_ptr, or + * 3) running (obviously), or + * 4) are cache-hot on their current CPU. + */ + if (throttled_lb_pair(task_group(p), env->src_cpu, env->dst_cpu)) + return 0; + +- if (!cpumask_test_cpu(env->dst_cpu, &p->cpus_allowed)) { ++ if (!cpumask_test_cpu(env->dst_cpu, p->cpus_ptr)) { + int cpu; + + schedstat_inc(p->se.statistics.nr_failed_migrations_affine); +@@ -7146,7 +7148,7 @@ int can_migrate_task(struct task_struct *p, struct lb_env *env) + + /* Prevent to re-select dst_cpu via env's CPUs: */ + for_each_cpu_and(cpu, env->dst_grpmask, env->cpus) { +- if (cpumask_test_cpu(cpu, &p->cpus_allowed)) { ++ if (cpumask_test_cpu(cpu, p->cpus_ptr)) { + env->flags |= LBF_DST_PINNED; + env->new_dst_cpu = cpu; + break; +@@ -7743,7 +7745,7 @@ check_cpu_capacity(struct rq *rq, struct sched_domain *sd) + + /* + * Group imbalance indicates (and tries to solve) the problem where balancing +- * groups is inadequate due to ->cpus_allowed constraints. ++ * groups is inadequate due to ->cpus_ptr constraints. + * + * Imagine a situation of two groups of 4 CPUs each and 4 tasks each with a + * cpumask covering 1 CPU of the first group and 3 CPUs of the second group. +@@ -8358,7 +8360,7 @@ static struct sched_group *find_busiest_group(struct lb_env *env) + /* + * If the busiest group is imbalanced the below checks don't + * work because they assume all things are equal, which typically +- * isn't true due to cpus_allowed constraints and the like. ++ * isn't true due to cpus_ptr constraints and the like. + */ + if (busiest->group_type == group_imbalanced) + goto force_balance; +@@ -8754,7 +8756,7 @@ static int load_balance(int this_cpu, struct rq *this_rq, + * if the curr task on busiest CPU can't be + * moved to this_cpu: + */ +- if (!cpumask_test_cpu(this_cpu, &busiest->curr->cpus_allowed)) { ++ if (!cpumask_test_cpu(this_cpu, busiest->curr->cpus_ptr)) { + raw_spin_unlock_irqrestore(&busiest->lock, + flags); + env.flags |= LBF_ALL_PINNED; +@@ -9732,7 +9734,7 @@ static void task_fork_fair(struct task_struct *p) + * 'current' within the tree based on its new key value. + */ + swap(curr->vruntime, se->vruntime); +- resched_curr(rq); ++ resched_curr_lazy(rq); + } + + se->vruntime -= cfs_rq->min_vruntime; +@@ -9756,7 +9758,7 @@ prio_changed_fair(struct rq *rq, struct task_struct *p, int oldprio) + */ + if (rq->curr == p) { + if (p->prio > oldprio) +- resched_curr(rq); ++ resched_curr_lazy(rq); + } else + check_preempt_curr(rq, p, 0); + } +diff --git a/kernel/sched/features.h b/kernel/sched/features.h +index 85ae8488039c..12a12be6770b 100644 +--- a/kernel/sched/features.h ++++ b/kernel/sched/features.h +@@ -46,11 +46,19 @@ SCHED_FEAT(LB_BIAS, true) + */ + SCHED_FEAT(NONTASK_CAPACITY, true) + ++#ifdef CONFIG_PREEMPT_RT_FULL ++SCHED_FEAT(TTWU_QUEUE, false) ++# ifdef CONFIG_PREEMPT_LAZY ++SCHED_FEAT(PREEMPT_LAZY, true) ++# endif ++#else ++ + /* + * Queue remote wakeups on the target CPU and process them + * using the scheduler IPI. Reduces rq->lock contention/bounces. + */ + SCHED_FEAT(TTWU_QUEUE, true) ++#endif + + /* + * When doing wakeups, attempt to limit superfluous scans of the LLC domain. +diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c +index b980cc96604f..aeb99395c03b 100644 +--- a/kernel/sched/rt.c ++++ b/kernel/sched/rt.c +@@ -45,8 +45,8 @@ void init_rt_bandwidth(struct rt_bandwidth *rt_b, u64 period, u64 runtime) + + raw_spin_lock_init(&rt_b->rt_runtime_lock); + +- hrtimer_init(&rt_b->rt_period_timer, +- CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ hrtimer_init(&rt_b->rt_period_timer, CLOCK_MONOTONIC, ++ HRTIMER_MODE_REL_HARD); + rt_b->rt_period_timer.function = sched_rt_period_timer; + } + +@@ -1611,7 +1611,7 @@ static void put_prev_task_rt(struct rq *rq, struct task_struct *p) + static int pick_rt_task(struct rq *rq, struct task_struct *p, int cpu) + { + if (!task_running(rq, p) && +- cpumask_test_cpu(cpu, &p->cpus_allowed)) ++ cpumask_test_cpu(cpu, p->cpus_ptr)) + return 1; + + return 0; +@@ -1748,7 +1748,7 @@ static struct rq *find_lock_lowest_rq(struct task_struct *task, struct rq *rq) + * Also make sure that it wasn't scheduled on its rq. + */ + if (unlikely(task_rq(task) != rq || +- !cpumask_test_cpu(lowest_rq->cpu, &task->cpus_allowed) || ++ !cpumask_test_cpu(lowest_rq->cpu, task->cpus_ptr) || + task_running(rq, task) || + !rt_task(task) || + !task_on_rq_queued(task))) { +diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h +index 9a7c3d08b39f..f7c1c262457f 100644 +--- a/kernel/sched/sched.h ++++ b/kernel/sched/sched.h +@@ -1443,6 +1443,7 @@ static inline int task_on_rq_migrating(struct task_struct *p) + #define WF_SYNC 0x01 /* Waker goes to sleep after wakeup */ + #define WF_FORK 0x02 /* Child wakeup after fork */ + #define WF_MIGRATED 0x4 /* Internal use, task got migrated */ ++#define WF_LOCK_SLEEPER 0x08 /* wakeup spinlock "sleeper" */ + + /* + * To aid in avoiding the subversion of "niceness" due to uneven distribution +@@ -1637,6 +1638,15 @@ extern void reweight_task(struct task_struct *p, int prio); + extern void resched_curr(struct rq *rq); + extern void resched_cpu(int cpu); + ++#ifdef CONFIG_PREEMPT_LAZY ++extern void resched_curr_lazy(struct rq *rq); ++#else ++static inline void resched_curr_lazy(struct rq *rq) ++{ ++ resched_curr(rq); ++} ++#endif ++ + extern struct rt_bandwidth def_rt_bandwidth; + extern void init_rt_bandwidth(struct rt_bandwidth *rt_b, u64 period, u64 runtime); + +diff --git a/kernel/sched/swait.c b/kernel/sched/swait.c +index 66b59ac77c22..119a56d7f739 100644 +--- a/kernel/sched/swait.c ++++ b/kernel/sched/swait.c +@@ -32,6 +32,25 @@ void swake_up_locked(struct swait_queue_head *q) + } + EXPORT_SYMBOL(swake_up_locked); + ++void swake_up_all_locked(struct swait_queue_head *q) ++{ ++ struct swait_queue *curr; ++ int wakes = 0; ++ ++ while (!list_empty(&q->task_list)) { ++ ++ curr = list_first_entry(&q->task_list, typeof(*curr), ++ task_list); ++ wake_up_process(curr->task); ++ list_del_init(&curr->task_list); ++ wakes++; ++ } ++ if (pm_in_action) ++ return; ++ WARN(wakes > 2, "complete_all() with %d waiters\n", wakes); ++} ++EXPORT_SYMBOL(swake_up_all_locked); ++ + void swake_up_one(struct swait_queue_head *q) + { + unsigned long flags; +@@ -51,6 +70,7 @@ void swake_up_all(struct swait_queue_head *q) + struct swait_queue *curr; + LIST_HEAD(tmp); + ++ WARN_ON(irqs_disabled()); + raw_spin_lock_irq(&q->lock); + list_splice_init(&q->task_list, &tmp); + while (!list_empty(&tmp)) { +@@ -69,7 +89,7 @@ void swake_up_all(struct swait_queue_head *q) + } + EXPORT_SYMBOL(swake_up_all); + +-static void __prepare_to_swait(struct swait_queue_head *q, struct swait_queue *wait) ++void __prepare_to_swait(struct swait_queue_head *q, struct swait_queue *wait) + { + wait->task = current; + if (list_empty(&wait->task_list)) +diff --git a/kernel/sched/swork.c b/kernel/sched/swork.c +new file mode 100644 +index 000000000000..c90d14b9b126 +--- /dev/null ++++ b/kernel/sched/swork.c +@@ -0,0 +1,173 @@ ++/* ++ * Copyright (C) 2014 BMW Car IT GmbH, Daniel Wagner daniel.wagner@bmw-carit.de ++ * ++ * Provides a framework for enqueuing callbacks from irq context ++ * PREEMPT_RT_FULL safe. The callbacks are executed in kthread context. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define SWORK_EVENT_PENDING 1 ++ ++static DEFINE_MUTEX(worker_mutex); ++static struct sworker *glob_worker; ++ ++struct sworker { ++ struct list_head events; ++ struct swait_queue_head wq; ++ ++ raw_spinlock_t lock; ++ ++ struct task_struct *task; ++ int refs; ++}; ++ ++static bool swork_readable(struct sworker *worker) ++{ ++ bool r; ++ ++ if (kthread_should_stop()) ++ return true; ++ ++ raw_spin_lock_irq(&worker->lock); ++ r = !list_empty(&worker->events); ++ raw_spin_unlock_irq(&worker->lock); ++ ++ return r; ++} ++ ++static int swork_kthread(void *arg) ++{ ++ struct sworker *worker = arg; ++ ++ for (;;) { ++ swait_event_interruptible_exclusive(worker->wq, ++ swork_readable(worker)); ++ if (kthread_should_stop()) ++ break; ++ ++ raw_spin_lock_irq(&worker->lock); ++ while (!list_empty(&worker->events)) { ++ struct swork_event *sev; ++ ++ sev = list_first_entry(&worker->events, ++ struct swork_event, item); ++ list_del(&sev->item); ++ raw_spin_unlock_irq(&worker->lock); ++ ++ WARN_ON_ONCE(!test_and_clear_bit(SWORK_EVENT_PENDING, ++ &sev->flags)); ++ sev->func(sev); ++ raw_spin_lock_irq(&worker->lock); ++ } ++ raw_spin_unlock_irq(&worker->lock); ++ } ++ return 0; ++} ++ ++static struct sworker *swork_create(void) ++{ ++ struct sworker *worker; ++ ++ worker = kzalloc(sizeof(*worker), GFP_KERNEL); ++ if (!worker) ++ return ERR_PTR(-ENOMEM); ++ ++ INIT_LIST_HEAD(&worker->events); ++ raw_spin_lock_init(&worker->lock); ++ init_swait_queue_head(&worker->wq); ++ ++ worker->task = kthread_run(swork_kthread, worker, "kswork"); ++ if (IS_ERR(worker->task)) { ++ kfree(worker); ++ return ERR_PTR(-ENOMEM); ++ } ++ ++ return worker; ++} ++ ++static void swork_destroy(struct sworker *worker) ++{ ++ kthread_stop(worker->task); ++ ++ WARN_ON(!list_empty(&worker->events)); ++ kfree(worker); ++} ++ ++/** ++ * swork_queue - queue swork ++ * ++ * Returns %false if @work was already on a queue, %true otherwise. ++ * ++ * The work is queued and processed on a random CPU ++ */ ++bool swork_queue(struct swork_event *sev) ++{ ++ unsigned long flags; ++ ++ if (test_and_set_bit(SWORK_EVENT_PENDING, &sev->flags)) ++ return false; ++ ++ raw_spin_lock_irqsave(&glob_worker->lock, flags); ++ list_add_tail(&sev->item, &glob_worker->events); ++ raw_spin_unlock_irqrestore(&glob_worker->lock, flags); ++ ++ swake_up_one(&glob_worker->wq); ++ return true; ++} ++EXPORT_SYMBOL_GPL(swork_queue); ++ ++/** ++ * swork_get - get an instance of the sworker ++ * ++ * Returns an negative error code if the initialization if the worker did not ++ * work, %0 otherwise. ++ * ++ */ ++int swork_get(void) ++{ ++ struct sworker *worker; ++ ++ mutex_lock(&worker_mutex); ++ if (!glob_worker) { ++ worker = swork_create(); ++ if (IS_ERR(worker)) { ++ mutex_unlock(&worker_mutex); ++ return -ENOMEM; ++ } ++ ++ glob_worker = worker; ++ } ++ ++ glob_worker->refs++; ++ mutex_unlock(&worker_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(swork_get); ++ ++/** ++ * swork_put - puts an instance of the sworker ++ * ++ * Will destroy the sworker thread. This function must not be called until all ++ * queued events have been completed. ++ */ ++void swork_put(void) ++{ ++ mutex_lock(&worker_mutex); ++ ++ glob_worker->refs--; ++ if (glob_worker->refs > 0) ++ goto out; ++ ++ swork_destroy(glob_worker); ++ glob_worker = NULL; ++out: ++ mutex_unlock(&worker_mutex); ++} ++EXPORT_SYMBOL_GPL(swork_put); +diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c +index c0a751464971..6e95f1ca3e22 100644 +--- a/kernel/sched/topology.c ++++ b/kernel/sched/topology.c +@@ -279,6 +279,7 @@ static int init_rootdomain(struct root_domain *rd) + rd->rto_cpu = -1; + raw_spin_lock_init(&rd->rto_lock); + init_irq_work(&rd->rto_push_work, rto_push_irq_work_func); ++ rd->rto_push_work.flags |= IRQ_WORK_HARD_IRQ; + #endif + + init_dl_bw(&rd->dl_bw); +diff --git a/kernel/signal.c b/kernel/signal.c +index 0e6bc3049427..ac32b4f41d24 100644 +--- a/kernel/signal.c ++++ b/kernel/signal.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -388,13 +389,30 @@ void task_join_group_stop(struct task_struct *task) + } + } + ++static inline struct sigqueue *get_task_cache(struct task_struct *t) ++{ ++ struct sigqueue *q = t->sigqueue_cache; ++ ++ if (cmpxchg(&t->sigqueue_cache, q, NULL) != q) ++ return NULL; ++ return q; ++} ++ ++static inline int put_task_cache(struct task_struct *t, struct sigqueue *q) ++{ ++ if (cmpxchg(&t->sigqueue_cache, NULL, q) == NULL) ++ return 0; ++ return 1; ++} ++ + /* + * allocate a new signal queue record + * - this may be called without locks if and only if t == current, otherwise an + * appropriate lock must be held to stop the target task from exiting + */ + static struct sigqueue * +-__sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimit) ++__sigqueue_do_alloc(int sig, struct task_struct *t, gfp_t flags, ++ int override_rlimit, int fromslab) + { + struct sigqueue *q = NULL; + struct user_struct *user; +@@ -411,7 +429,10 @@ __sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimi + if (override_rlimit || + atomic_read(&user->sigpending) <= + task_rlimit(t, RLIMIT_SIGPENDING)) { +- q = kmem_cache_alloc(sigqueue_cachep, flags); ++ if (!fromslab) ++ q = get_task_cache(t); ++ if (!q) ++ q = kmem_cache_alloc(sigqueue_cachep, flags); + } else { + print_dropped_signal(sig); + } +@@ -428,6 +449,13 @@ __sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimi + return q; + } + ++static struct sigqueue * ++__sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, ++ int override_rlimit) ++{ ++ return __sigqueue_do_alloc(sig, t, flags, override_rlimit, 0); ++} ++ + static void __sigqueue_free(struct sigqueue *q) + { + if (q->flags & SIGQUEUE_PREALLOC) +@@ -437,6 +465,21 @@ static void __sigqueue_free(struct sigqueue *q) + kmem_cache_free(sigqueue_cachep, q); + } + ++static void sigqueue_free_current(struct sigqueue *q) ++{ ++ struct user_struct *up; ++ ++ if (q->flags & SIGQUEUE_PREALLOC) ++ return; ++ ++ up = q->user; ++ if (rt_prio(current->normal_prio) && !put_task_cache(current, q)) { ++ atomic_dec(&up->sigpending); ++ free_uid(up); ++ } else ++ __sigqueue_free(q); ++} ++ + void flush_sigqueue(struct sigpending *queue) + { + struct sigqueue *q; +@@ -449,6 +492,21 @@ void flush_sigqueue(struct sigpending *queue) + } + } + ++/* ++ * Called from __exit_signal. Flush tsk->pending and ++ * tsk->sigqueue_cache ++ */ ++void flush_task_sigqueue(struct task_struct *tsk) ++{ ++ struct sigqueue *q; ++ ++ flush_sigqueue(&tsk->pending); ++ ++ q = get_task_cache(tsk); ++ if (q) ++ kmem_cache_free(sigqueue_cachep, q); ++} ++ + /* + * Flush all pending signals for this kthread. + */ +@@ -572,7 +630,7 @@ static void collect_signal(int sig, struct sigpending *list, siginfo_t *info, + (info->si_code == SI_TIMER) && + (info->si_sys_private); + +- __sigqueue_free(first); ++ sigqueue_free_current(first); + } else { + /* + * Ok, it wasn't in the queue. This must be +@@ -609,6 +667,8 @@ int dequeue_signal(struct task_struct *tsk, sigset_t *mask, siginfo_t *info) + bool resched_timer = false; + int signr; + ++ WARN_ON_ONCE(tsk != current); ++ + /* We only dequeue private signals from ourselves, we don't let + * signalfd steal them + */ +@@ -1268,8 +1328,8 @@ int do_send_sig_info(int sig, struct siginfo *info, struct task_struct *p, + * We don't want to have recursive SIGSEGV's etc, for example, + * that is why we also clear SIGNAL_UNKILLABLE. + */ +-int +-force_sig_info(int sig, struct siginfo *info, struct task_struct *t) ++static int ++do_force_sig_info(int sig, struct siginfo *info, struct task_struct *t) + { + unsigned long int flags; + int ret, blocked, ignored; +@@ -1298,6 +1358,39 @@ force_sig_info(int sig, struct siginfo *info, struct task_struct *t) + return ret; + } + ++int force_sig_info(int sig, struct siginfo *info, struct task_struct *t) ++{ ++/* ++ * On some archs, PREEMPT_RT has to delay sending a signal from a trap ++ * since it can not enable preemption, and the signal code's spin_locks ++ * turn into mutexes. Instead, it must set TIF_NOTIFY_RESUME which will ++ * send the signal on exit of the trap. ++ */ ++#ifdef ARCH_RT_DELAYS_SIGNAL_SEND ++ if (in_atomic()) { ++ if (WARN_ON_ONCE(t != current)) ++ return 0; ++ if (WARN_ON_ONCE(t->forced_info.si_signo)) ++ return 0; ++ ++ if (is_si_special(info)) { ++ WARN_ON_ONCE(info != SEND_SIG_PRIV); ++ t->forced_info.si_signo = sig; ++ t->forced_info.si_errno = 0; ++ t->forced_info.si_code = SI_KERNEL; ++ t->forced_info.si_pid = 0; ++ t->forced_info.si_uid = 0; ++ } else { ++ t->forced_info = *info; ++ } ++ ++ set_tsk_thread_flag(t, TIF_NOTIFY_RESUME); ++ return 0; ++ } ++#endif ++ return do_force_sig_info(sig, info, t); ++} ++ + /* + * Nuke all other threads in the group. + */ +@@ -1714,7 +1807,8 @@ EXPORT_SYMBOL(kill_pid); + */ + struct sigqueue *sigqueue_alloc(void) + { +- struct sigqueue *q = __sigqueue_alloc(-1, current, GFP_KERNEL, 0); ++ /* Preallocated sigqueue objects always from the slabcache ! */ ++ struct sigqueue *q = __sigqueue_do_alloc(-1, current, GFP_KERNEL, 0, 1); + + if (q) + q->flags |= SIGQUEUE_PREALLOC; +@@ -2094,15 +2188,7 @@ static void ptrace_stop(int exit_code, int why, int clear_code, siginfo_t *info) + if (gstop_done && ptrace_reparented(current)) + do_notify_parent_cldstop(current, false, why); + +- /* +- * Don't want to allow preemption here, because +- * sys_ptrace() needs this task to be inactive. +- * +- * XXX: implement read_unlock_no_resched(). +- */ +- preempt_disable(); + read_unlock(&tasklist_lock); +- preempt_enable_no_resched(); + freezable_schedule(); + } else { + /* +diff --git a/kernel/softirq.c b/kernel/softirq.c +index 6f584861d329..25bcf2f2714b 100644 +--- a/kernel/softirq.c ++++ b/kernel/softirq.c +@@ -21,11 +21,14 @@ + #include + #include + #include ++#include + #include + #include + #include + #include ++#include + #include ++#include + + #define CREATE_TRACE_POINTS + #include +@@ -56,12 +59,136 @@ EXPORT_PER_CPU_SYMBOL(irq_stat); + static struct softirq_action softirq_vec[NR_SOFTIRQS] __cacheline_aligned_in_smp; + + DEFINE_PER_CPU(struct task_struct *, ksoftirqd); ++#ifdef CONFIG_PREEMPT_RT_FULL ++#define TIMER_SOFTIRQS ((1 << TIMER_SOFTIRQ) | (1 << HRTIMER_SOFTIRQ)) ++DEFINE_PER_CPU(struct task_struct *, ktimer_softirqd); ++#endif + + const char * const softirq_to_name[NR_SOFTIRQS] = { + "HI", "TIMER", "NET_TX", "NET_RX", "BLOCK", "IRQ_POLL", + "TASKLET", "SCHED", "HRTIMER", "RCU" + }; + ++#ifdef CONFIG_NO_HZ_COMMON ++# ifdef CONFIG_PREEMPT_RT_FULL ++ ++struct softirq_runner { ++ struct task_struct *runner[NR_SOFTIRQS]; ++}; ++ ++static DEFINE_PER_CPU(struct softirq_runner, softirq_runners); ++ ++static inline void softirq_set_runner(unsigned int sirq) ++{ ++ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); ++ ++ sr->runner[sirq] = current; ++} ++ ++static inline void softirq_clr_runner(unsigned int sirq) ++{ ++ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); ++ ++ sr->runner[sirq] = NULL; ++} ++ ++static bool softirq_check_runner_tsk(struct task_struct *tsk, ++ unsigned int *pending) ++{ ++ bool ret = false; ++ ++ if (!tsk) ++ return ret; ++ ++ /* ++ * The wakeup code in rtmutex.c wakes up the task ++ * _before_ it sets pi_blocked_on to NULL under ++ * tsk->pi_lock. So we need to check for both: state ++ * and pi_blocked_on. ++ * The test against UNINTERRUPTIBLE + ->sleeping_lock is in case the ++ * task does cpu_chill(). ++ */ ++ raw_spin_lock(&tsk->pi_lock); ++ if (tsk->pi_blocked_on || tsk->state == TASK_RUNNING || ++ (tsk->state == TASK_UNINTERRUPTIBLE && tsk->sleeping_lock)) { ++ /* Clear all bits pending in that task */ ++ *pending &= ~(tsk->softirqs_raised); ++ ret = true; ++ } ++ raw_spin_unlock(&tsk->pi_lock); ++ ++ return ret; ++} ++ ++/* ++ * On preempt-rt a softirq running context might be blocked on a ++ * lock. There might be no other runnable task on this CPU because the ++ * lock owner runs on some other CPU. So we have to go into idle with ++ * the pending bit set. Therefor we need to check this otherwise we ++ * warn about false positives which confuses users and defeats the ++ * whole purpose of this test. ++ * ++ * This code is called with interrupts disabled. ++ */ ++void softirq_check_pending_idle(void) ++{ ++ struct task_struct *tsk; ++ static int rate_limit; ++ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); ++ u32 warnpending; ++ int i; ++ ++ if (rate_limit >= 10) ++ return; ++ ++ warnpending = local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK; ++ if (!warnpending) ++ return; ++ for (i = 0; i < NR_SOFTIRQS; i++) { ++ tsk = sr->runner[i]; ++ ++ if (softirq_check_runner_tsk(tsk, &warnpending)) ++ warnpending &= ~(1 << i); ++ } ++ ++ if (warnpending) { ++ tsk = __this_cpu_read(ksoftirqd); ++ softirq_check_runner_tsk(tsk, &warnpending); ++ } ++ ++ if (warnpending) { ++ tsk = __this_cpu_read(ktimer_softirqd); ++ softirq_check_runner_tsk(tsk, &warnpending); ++ } ++ ++ if (warnpending) { ++ printk(KERN_ERR "NOHZ: local_softirq_pending %02x\n", ++ warnpending); ++ rate_limit++; ++ } ++} ++# else ++/* ++ * On !PREEMPT_RT we just printk rate limited: ++ */ ++void softirq_check_pending_idle(void) ++{ ++ static int rate_limit; ++ ++ if (rate_limit < 10 && ++ (local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK)) { ++ printk(KERN_ERR "NOHZ: local_softirq_pending %02x\n", ++ local_softirq_pending()); ++ rate_limit++; ++ } ++} ++# endif ++ ++#else /* !CONFIG_NO_HZ_COMMON */ ++static inline void softirq_set_runner(unsigned int sirq) { } ++static inline void softirq_clr_runner(unsigned int sirq) { } ++#endif ++ + /* + * we cannot loop indefinitely here to avoid userspace starvation, + * but we also don't want to introduce a worst case 1/HZ latency +@@ -77,6 +204,38 @@ static void wakeup_softirqd(void) + wake_up_process(tsk); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void wakeup_timer_softirqd(void) ++{ ++ /* Interrupts are disabled: no need to stop preemption */ ++ struct task_struct *tsk = __this_cpu_read(ktimer_softirqd); ++ ++ if (tsk && tsk->state != TASK_RUNNING) ++ wake_up_process(tsk); ++} ++#endif ++ ++static void handle_softirq(unsigned int vec_nr) ++{ ++ struct softirq_action *h = softirq_vec + vec_nr; ++ int prev_count; ++ ++ prev_count = preempt_count(); ++ ++ kstat_incr_softirqs_this_cpu(vec_nr); ++ ++ trace_softirq_entry(vec_nr); ++ h->action(h); ++ trace_softirq_exit(vec_nr); ++ if (unlikely(prev_count != preempt_count())) { ++ pr_err("huh, entered softirq %u %s %p with preempt_count %08x, exited with %08x?\n", ++ vec_nr, softirq_to_name[vec_nr], h->action, ++ prev_count, preempt_count()); ++ preempt_count_set(prev_count); ++ } ++} ++ ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * If ksoftirqd is scheduled, we do not want to process pending softirqs + * right now. Let ksoftirqd handle this at its own rate, to get fairness, +@@ -92,6 +251,47 @@ static bool ksoftirqd_running(unsigned long pending) + return tsk && (tsk->state == TASK_RUNNING); + } + ++static inline int ksoftirqd_softirq_pending(void) ++{ ++ return local_softirq_pending(); ++} ++ ++static void handle_pending_softirqs(u32 pending) ++{ ++ struct softirq_action *h = softirq_vec; ++ int softirq_bit; ++ ++ local_irq_enable(); ++ ++ h = softirq_vec; ++ ++ while ((softirq_bit = ffs(pending))) { ++ unsigned int vec_nr; ++ ++ h += softirq_bit - 1; ++ vec_nr = h - softirq_vec; ++ handle_softirq(vec_nr); ++ ++ h++; ++ pending >>= softirq_bit; ++ } ++ ++ rcu_bh_qs(); ++ local_irq_disable(); ++} ++ ++static void run_ksoftirqd(unsigned int cpu) ++{ ++ local_irq_disable(); ++ if (ksoftirqd_softirq_pending()) { ++ __do_softirq(); ++ local_irq_enable(); ++ cond_resched(); ++ return; ++ } ++ local_irq_enable(); ++} ++ + /* + * preempt_count and SOFTIRQ_OFFSET usage: + * - preempt_count is changed by SOFTIRQ_OFFSET on entering or leaving +@@ -251,10 +451,8 @@ asmlinkage __visible void __softirq_entry __do_softirq(void) + unsigned long end = jiffies + MAX_SOFTIRQ_TIME; + unsigned long old_flags = current->flags; + int max_restart = MAX_SOFTIRQ_RESTART; +- struct softirq_action *h; + bool in_hardirq; + __u32 pending; +- int softirq_bit; + + /* + * Mask out PF_MEMALLOC s current task context is borrowed for the +@@ -273,36 +471,7 @@ asmlinkage __visible void __softirq_entry __do_softirq(void) + /* Reset the pending bitmask before enabling irqs */ + set_softirq_pending(0); + +- local_irq_enable(); +- +- h = softirq_vec; +- +- while ((softirq_bit = ffs(pending))) { +- unsigned int vec_nr; +- int prev_count; +- +- h += softirq_bit - 1; +- +- vec_nr = h - softirq_vec; +- prev_count = preempt_count(); +- +- kstat_incr_softirqs_this_cpu(vec_nr); +- +- trace_softirq_entry(vec_nr); +- h->action(h); +- trace_softirq_exit(vec_nr); +- if (unlikely(prev_count != preempt_count())) { +- pr_err("huh, entered softirq %u %s %p with preempt_count %08x, exited with %08x?\n", +- vec_nr, softirq_to_name[vec_nr], h->action, +- prev_count, preempt_count()); +- preempt_count_set(prev_count); +- } +- h++; +- pending >>= softirq_bit; +- } +- +- rcu_bh_qs(); +- local_irq_disable(); ++ handle_pending_softirqs(pending); + + pending = local_softirq_pending(); + if (pending) { +@@ -338,6 +507,309 @@ asmlinkage __visible void do_softirq(void) + local_irq_restore(flags); + } + ++/* ++ * This function must run with irqs disabled! ++ */ ++void raise_softirq_irqoff(unsigned int nr) ++{ ++ __raise_softirq_irqoff(nr); ++ ++ /* ++ * If we're in an interrupt or softirq, we're done ++ * (this also catches softirq-disabled code). We will ++ * actually run the softirq once we return from ++ * the irq or softirq. ++ * ++ * Otherwise we wake up ksoftirqd to make sure we ++ * schedule the softirq soon. ++ */ ++ if (!in_interrupt()) ++ wakeup_softirqd(); ++} ++ ++void __raise_softirq_irqoff(unsigned int nr) ++{ ++ trace_softirq_raise(nr); ++ or_softirq_pending(1UL << nr); ++} ++ ++static inline void local_bh_disable_nort(void) { local_bh_disable(); } ++static inline void _local_bh_enable_nort(void) { _local_bh_enable(); } ++static void ksoftirqd_set_sched_params(unsigned int cpu) { } ++ ++#else /* !PREEMPT_RT_FULL */ ++ ++/* ++ * On RT we serialize softirq execution with a cpu local lock per softirq ++ */ ++static DEFINE_PER_CPU(struct local_irq_lock [NR_SOFTIRQS], local_softirq_locks); ++ ++void __init softirq_early_init(void) ++{ ++ int i; ++ ++ for (i = 0; i < NR_SOFTIRQS; i++) ++ local_irq_lock_init(local_softirq_locks[i]); ++} ++ ++static void lock_softirq(int which) ++{ ++ local_lock(local_softirq_locks[which]); ++} ++ ++static void unlock_softirq(int which) ++{ ++ local_unlock(local_softirq_locks[which]); ++} ++ ++static void do_single_softirq(int which) ++{ ++ unsigned long old_flags = current->flags; ++ ++ current->flags &= ~PF_MEMALLOC; ++ vtime_account_irq_enter(current); ++ current->flags |= PF_IN_SOFTIRQ; ++ lockdep_softirq_enter(); ++ local_irq_enable(); ++ handle_softirq(which); ++ local_irq_disable(); ++ lockdep_softirq_exit(); ++ current->flags &= ~PF_IN_SOFTIRQ; ++ vtime_account_irq_enter(current); ++ current_restore_flags(old_flags, PF_MEMALLOC); ++} ++ ++/* ++ * Called with interrupts disabled. Process softirqs which were raised ++ * in current context (or on behalf of ksoftirqd). ++ */ ++static void do_current_softirqs(void) ++{ ++ while (current->softirqs_raised) { ++ int i = __ffs(current->softirqs_raised); ++ unsigned int pending, mask = (1U << i); ++ ++ current->softirqs_raised &= ~mask; ++ local_irq_enable(); ++ ++ /* ++ * If the lock is contended, we boost the owner to ++ * process the softirq or leave the critical section ++ * now. ++ */ ++ lock_softirq(i); ++ local_irq_disable(); ++ softirq_set_runner(i); ++ /* ++ * Check with the local_softirq_pending() bits, ++ * whether we need to process this still or if someone ++ * else took care of it. ++ */ ++ pending = local_softirq_pending(); ++ if (pending & mask) { ++ set_softirq_pending(pending & ~mask); ++ do_single_softirq(i); ++ } ++ softirq_clr_runner(i); ++ WARN_ON(current->softirq_nestcnt != 1); ++ local_irq_enable(); ++ unlock_softirq(i); ++ local_irq_disable(); ++ } ++} ++ ++void __local_bh_disable(void) ++{ ++ if (++current->softirq_nestcnt == 1) ++ migrate_disable(); ++} ++EXPORT_SYMBOL(__local_bh_disable); ++ ++void __local_bh_enable(void) ++{ ++ if (WARN_ON(current->softirq_nestcnt == 0)) ++ return; ++ ++ local_irq_disable(); ++ if (current->softirq_nestcnt == 1 && current->softirqs_raised) ++ do_current_softirqs(); ++ local_irq_enable(); ++ ++ if (--current->softirq_nestcnt == 0) ++ migrate_enable(); ++} ++EXPORT_SYMBOL(__local_bh_enable); ++ ++void _local_bh_enable(void) ++{ ++ if (WARN_ON(current->softirq_nestcnt == 0)) ++ return; ++ if (--current->softirq_nestcnt == 0) ++ migrate_enable(); ++} ++EXPORT_SYMBOL(_local_bh_enable); ++ ++int in_serving_softirq(void) ++{ ++ return current->flags & PF_IN_SOFTIRQ; ++} ++EXPORT_SYMBOL(in_serving_softirq); ++ ++/* Called with preemption disabled */ ++static void run_ksoftirqd(unsigned int cpu) ++{ ++ local_irq_disable(); ++ current->softirq_nestcnt++; ++ ++ do_current_softirqs(); ++ current->softirq_nestcnt--; ++ local_irq_enable(); ++ cond_resched(); ++} ++ ++/* ++ * Called from netif_rx_ni(). Preemption enabled, but migration ++ * disabled. So the cpu can't go away under us. ++ */ ++void thread_do_softirq(void) ++{ ++ if (!in_serving_softirq() && current->softirqs_raised) { ++ current->softirq_nestcnt++; ++ do_current_softirqs(); ++ current->softirq_nestcnt--; ++ } ++} ++ ++static void do_raise_softirq_irqoff(unsigned int nr) ++{ ++ unsigned int mask; ++ ++ mask = 1UL << nr; ++ ++ trace_softirq_raise(nr); ++ or_softirq_pending(mask); ++ ++ /* ++ * If we are not in a hard interrupt and inside a bh disabled ++ * region, we simply raise the flag on current. local_bh_enable() ++ * will make sure that the softirq is executed. Otherwise we ++ * delegate it to ksoftirqd. ++ */ ++ if (!in_irq() && current->softirq_nestcnt) ++ current->softirqs_raised |= mask; ++ else if (!__this_cpu_read(ksoftirqd) || !__this_cpu_read(ktimer_softirqd)) ++ return; ++ ++ if (mask & TIMER_SOFTIRQS) ++ __this_cpu_read(ktimer_softirqd)->softirqs_raised |= mask; ++ else ++ __this_cpu_read(ksoftirqd)->softirqs_raised |= mask; ++} ++ ++static void wakeup_proper_softirq(unsigned int nr) ++{ ++ if ((1UL << nr) & TIMER_SOFTIRQS) ++ wakeup_timer_softirqd(); ++ else ++ wakeup_softirqd(); ++} ++ ++void __raise_softirq_irqoff(unsigned int nr) ++{ ++ do_raise_softirq_irqoff(nr); ++ if (!in_irq() && !current->softirq_nestcnt) ++ wakeup_proper_softirq(nr); ++} ++ ++/* ++ * Same as __raise_softirq_irqoff() but will process them in ksoftirqd ++ */ ++void __raise_softirq_irqoff_ksoft(unsigned int nr) ++{ ++ unsigned int mask; ++ ++ if (WARN_ON_ONCE(!__this_cpu_read(ksoftirqd) || ++ !__this_cpu_read(ktimer_softirqd))) ++ return; ++ mask = 1UL << nr; ++ ++ trace_softirq_raise(nr); ++ or_softirq_pending(mask); ++ if (mask & TIMER_SOFTIRQS) ++ __this_cpu_read(ktimer_softirqd)->softirqs_raised |= mask; ++ else ++ __this_cpu_read(ksoftirqd)->softirqs_raised |= mask; ++ wakeup_proper_softirq(nr); ++} ++ ++/* ++ * This function must run with irqs disabled! ++ */ ++void raise_softirq_irqoff(unsigned int nr) ++{ ++ do_raise_softirq_irqoff(nr); ++ ++ /* ++ * If we're in an hard interrupt we let irq return code deal ++ * with the wakeup of ksoftirqd. ++ */ ++ if (in_irq()) ++ return; ++ /* ++ * If we are in thread context but outside of a bh disabled ++ * region, we need to wake ksoftirqd as well. ++ * ++ * CHECKME: Some of the places which do that could be wrapped ++ * into local_bh_disable/enable pairs. Though it's unclear ++ * whether this is worth the effort. To find those places just ++ * raise a WARN() if the condition is met. ++ */ ++ if (!current->softirq_nestcnt) ++ wakeup_proper_softirq(nr); ++} ++ ++static inline int ksoftirqd_softirq_pending(void) ++{ ++ return current->softirqs_raised; ++} ++ ++static inline void local_bh_disable_nort(void) { } ++static inline void _local_bh_enable_nort(void) { } ++ ++static inline void ksoftirqd_set_sched_params(unsigned int cpu) ++{ ++ /* Take over all but timer pending softirqs when starting */ ++ local_irq_disable(); ++ current->softirqs_raised = local_softirq_pending() & ~TIMER_SOFTIRQS; ++ local_irq_enable(); ++} ++ ++static inline void ktimer_softirqd_set_sched_params(unsigned int cpu) ++{ ++ struct sched_param param = { .sched_priority = 1 }; ++ ++ sched_setscheduler(current, SCHED_FIFO, ¶m); ++ ++ /* Take over timer pending softirqs when starting */ ++ local_irq_disable(); ++ current->softirqs_raised = local_softirq_pending() & TIMER_SOFTIRQS; ++ local_irq_enable(); ++} ++ ++static inline void ktimer_softirqd_clr_sched_params(unsigned int cpu, ++ bool online) ++{ ++ struct sched_param param = { .sched_priority = 0 }; ++ ++ sched_setscheduler(current, SCHED_NORMAL, ¶m); ++} ++ ++static int ktimer_softirqd_should_run(unsigned int cpu) ++{ ++ return current->softirqs_raised; ++} ++ ++#endif /* PREEMPT_RT_FULL */ + /* + * Enter an interrupt context. + */ +@@ -349,9 +821,9 @@ void irq_enter(void) + * Prevent raise_softirq from needlessly waking up ksoftirqd + * here, as softirq will be serviced on return from interrupt. + */ +- local_bh_disable(); ++ local_bh_disable_nort(); + tick_irq_enter(); +- _local_bh_enable(); ++ _local_bh_enable_nort(); + } + + __irq_enter(); +@@ -359,6 +831,7 @@ void irq_enter(void) + + static inline void invoke_softirq(void) + { ++#ifndef CONFIG_PREEMPT_RT_FULL + if (ksoftirqd_running(local_softirq_pending())) + return; + +@@ -381,6 +854,18 @@ static inline void invoke_softirq(void) + } else { + wakeup_softirqd(); + } ++#else /* PREEMPT_RT_FULL */ ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ if (__this_cpu_read(ksoftirqd) && ++ __this_cpu_read(ksoftirqd)->softirqs_raised) ++ wakeup_softirqd(); ++ if (__this_cpu_read(ktimer_softirqd) && ++ __this_cpu_read(ktimer_softirqd)->softirqs_raised) ++ wakeup_timer_softirqd(); ++ local_irq_restore(flags); ++#endif + } + + static inline void tick_irq_exit(void) +@@ -416,26 +901,6 @@ void irq_exit(void) + trace_hardirq_exit(); /* must be last! */ + } + +-/* +- * This function must run with irqs disabled! +- */ +-inline void raise_softirq_irqoff(unsigned int nr) +-{ +- __raise_softirq_irqoff(nr); +- +- /* +- * If we're in an interrupt or softirq, we're done +- * (this also catches softirq-disabled code). We will +- * actually run the softirq once we return from +- * the irq or softirq. +- * +- * Otherwise we wake up ksoftirqd to make sure we +- * schedule the softirq soon. +- */ +- if (!in_interrupt()) +- wakeup_softirqd(); +-} +- + void raise_softirq(unsigned int nr) + { + unsigned long flags; +@@ -445,12 +910,6 @@ void raise_softirq(unsigned int nr) + local_irq_restore(flags); + } + +-void __raise_softirq_irqoff(unsigned int nr) +-{ +- trace_softirq_raise(nr); +- or_softirq_pending(1UL << nr); +-} +- + void open_softirq(int nr, void (*action)(struct softirq_action *)) + { + softirq_vec[nr].action = action; +@@ -475,11 +934,38 @@ static void __tasklet_schedule_common(struct tasklet_struct *t, + unsigned long flags; + + local_irq_save(flags); ++ if (!tasklet_trylock(t)) { ++ local_irq_restore(flags); ++ return; ++ } ++ + head = this_cpu_ptr(headp); +- t->next = NULL; +- *head->tail = t; +- head->tail = &(t->next); +- raise_softirq_irqoff(softirq_nr); ++again: ++ /* We may have been preempted before tasklet_trylock ++ * and __tasklet_action may have already run. ++ * So double check the sched bit while the takslet ++ * is locked before adding it to the list. ++ */ ++ if (test_bit(TASKLET_STATE_SCHED, &t->state)) { ++ t->next = NULL; ++ *head->tail = t; ++ head->tail = &(t->next); ++ raise_softirq_irqoff(softirq_nr); ++ tasklet_unlock(t); ++ } else { ++ /* This is subtle. If we hit the corner case above ++ * It is possible that we get preempted right here, ++ * and another task has successfully called ++ * tasklet_schedule(), then this function, and ++ * failed on the trylock. Thus we must be sure ++ * before releasing the tasklet lock, that the ++ * SCHED_BIT is clear. Otherwise the tasklet ++ * may get its SCHED_BIT set, but not added to the ++ * list ++ */ ++ if (!tasklet_tryunlock(t)) ++ goto again; ++ } + local_irq_restore(flags); + } + +@@ -497,11 +983,21 @@ void __tasklet_hi_schedule(struct tasklet_struct *t) + } + EXPORT_SYMBOL(__tasklet_hi_schedule); + ++void tasklet_enable(struct tasklet_struct *t) ++{ ++ if (!atomic_dec_and_test(&t->count)) ++ return; ++ if (test_and_clear_bit(TASKLET_STATE_PENDING, &t->state)) ++ tasklet_schedule(t); ++} ++EXPORT_SYMBOL(tasklet_enable); ++ + static void tasklet_action_common(struct softirq_action *a, + struct tasklet_head *tl_head, + unsigned int softirq_nr) + { + struct tasklet_struct *list; ++ int loops = 1000000; + + local_irq_disable(); + list = tl_head->head; +@@ -513,25 +1009,56 @@ static void tasklet_action_common(struct softirq_action *a, + struct tasklet_struct *t = list; + + list = list->next; ++ /* ++ * Should always succeed - after a tasklist got on the ++ * list (after getting the SCHED bit set from 0 to 1), ++ * nothing but the tasklet softirq it got queued to can ++ * lock it: ++ */ ++ if (!tasklet_trylock(t)) { ++ WARN_ON(1); ++ continue; ++ } + +- if (tasklet_trylock(t)) { +- if (!atomic_read(&t->count)) { +- if (!test_and_clear_bit(TASKLET_STATE_SCHED, +- &t->state)) +- BUG(); +- t->func(t->data); ++ t->next = NULL; ++ ++ if (unlikely(atomic_read(&t->count))) { ++out_disabled: ++ /* implicit unlock: */ ++ wmb(); ++ t->state = TASKLET_STATEF_PENDING; ++ continue; ++ } ++ /* ++ * After this point on the tasklet might be rescheduled ++ * on another CPU, but it can only be added to another ++ * CPU's tasklet list if we unlock the tasklet (which we ++ * dont do yet). ++ */ ++ if (!test_and_clear_bit(TASKLET_STATE_SCHED, &t->state)) ++ WARN_ON(1); ++again: ++ t->func(t->data); ++ ++ while (!tasklet_tryunlock(t)) { ++ /* ++ * If it got disabled meanwhile, bail out: ++ */ ++ if (atomic_read(&t->count)) ++ goto out_disabled; ++ /* ++ * If it got scheduled meanwhile, re-execute ++ * the tasklet function: ++ */ ++ if (test_and_clear_bit(TASKLET_STATE_SCHED, &t->state)) ++ goto again; ++ if (!--loops) { ++ printk("hm, tasklet state: %08lx\n", t->state); ++ WARN_ON(1); + tasklet_unlock(t); +- continue; ++ break; + } +- tasklet_unlock(t); + } +- +- local_irq_disable(); +- t->next = NULL; +- *tl_head->tail = t; +- tl_head->tail = &t->next; +- __raise_softirq_irqoff(softirq_nr); +- local_irq_enable(); + } + } + +@@ -563,7 +1090,7 @@ void tasklet_kill(struct tasklet_struct *t) + + while (test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) { + do { +- yield(); ++ msleep(1); + } while (test_bit(TASKLET_STATE_SCHED, &t->state)); + } + tasklet_unlock_wait(t); +@@ -637,25 +1164,26 @@ void __init softirq_init(void) + open_softirq(HI_SOFTIRQ, tasklet_hi_action); + } + +-static int ksoftirqd_should_run(unsigned int cpu) ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) ++void tasklet_unlock_wait(struct tasklet_struct *t) + { +- return local_softirq_pending(); +-} +- +-static void run_ksoftirqd(unsigned int cpu) +-{ +- local_irq_disable(); +- if (local_softirq_pending()) { ++ while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { + /* +- * We can safely run softirq on inline stack, as we are not deep +- * in the task stack here. ++ * Hack for now to avoid this busy-loop: + */ +- __do_softirq(); +- local_irq_enable(); +- cond_resched(); +- return; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ msleep(1); ++#else ++ barrier(); ++#endif + } +- local_irq_enable(); ++} ++EXPORT_SYMBOL(tasklet_unlock_wait); ++#endif ++ ++static int ksoftirqd_should_run(unsigned int cpu) ++{ ++ return ksoftirqd_softirq_pending(); + } + + #ifdef CONFIG_HOTPLUG_CPU +@@ -722,17 +1250,31 @@ static int takeover_tasklets(unsigned int cpu) + + static struct smp_hotplug_thread softirq_threads = { + .store = &ksoftirqd, ++ .setup = ksoftirqd_set_sched_params, + .thread_should_run = ksoftirqd_should_run, + .thread_fn = run_ksoftirqd, + .thread_comm = "ksoftirqd/%u", + }; + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static struct smp_hotplug_thread softirq_timer_threads = { ++ .store = &ktimer_softirqd, ++ .setup = ktimer_softirqd_set_sched_params, ++ .cleanup = ktimer_softirqd_clr_sched_params, ++ .thread_should_run = ktimer_softirqd_should_run, ++ .thread_fn = run_ksoftirqd, ++ .thread_comm = "ktimersoftd/%u", ++}; ++#endif ++ + static __init int spawn_ksoftirqd(void) + { + cpuhp_setup_state_nocalls(CPUHP_SOFTIRQ_DEAD, "softirq:dead", NULL, + takeover_tasklets); + BUG_ON(smpboot_register_percpu_thread(&softirq_threads)); +- ++#ifdef CONFIG_PREEMPT_RT_FULL ++ BUG_ON(smpboot_register_percpu_thread(&softirq_timer_threads)); ++#endif + return 0; + } + early_initcall(spawn_ksoftirqd); +diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c +index fdeb9bc6affb..efa1e433974b 100644 +--- a/kernel/time/alarmtimer.c ++++ b/kernel/time/alarmtimer.c +@@ -436,7 +436,7 @@ int alarm_cancel(struct alarm *alarm) + int ret = alarm_try_to_cancel(alarm); + if (ret >= 0) + return ret; +- cpu_relax(); ++ hrtimer_grab_expiry_lock(&alarm->timer); + } + } + EXPORT_SYMBOL_GPL(alarm_cancel); +diff --git a/kernel/time/hrtimer.c b/kernel/time/hrtimer.c +index e1a549c9e399..4534e7871c8c 100644 +--- a/kernel/time/hrtimer.c ++++ b/kernel/time/hrtimer.c +@@ -730,6 +730,29 @@ static void hrtimer_switch_to_hres(void) + retrigger_next_event(NULL); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++static struct swork_event clock_set_delay_work; ++ ++static void run_clock_set_delay(struct swork_event *event) ++{ ++ clock_was_set(); ++} ++ ++void clock_was_set_delayed(void) ++{ ++ swork_queue(&clock_set_delay_work); ++} ++ ++static __init int create_clock_set_delay_thread(void) ++{ ++ WARN_ON(swork_get()); ++ INIT_SWORK(&clock_set_delay_work, run_clock_set_delay); ++ return 0; ++} ++early_initcall(create_clock_set_delay_thread); ++#else /* PREEMPT_RT_FULL */ ++ + static void clock_was_set_work(struct work_struct *work) + { + clock_was_set(); +@@ -745,6 +768,7 @@ void clock_was_set_delayed(void) + { + schedule_work(&hrtimer_work); + } ++#endif + + #else + +@@ -939,6 +963,16 @@ u64 hrtimer_forward(struct hrtimer *timer, ktime_t now, ktime_t interval) + } + EXPORT_SYMBOL_GPL(hrtimer_forward); + ++void hrtimer_grab_expiry_lock(const struct hrtimer *timer) ++{ ++ struct hrtimer_clock_base *base = timer->base; ++ ++ if (base && base->cpu_base) { ++ spin_lock(&base->cpu_base->softirq_expiry_lock); ++ spin_unlock(&base->cpu_base->softirq_expiry_lock); ++ } ++} ++ + /* + * enqueue_hrtimer - internal function to (re)start a timer + * +@@ -1108,7 +1142,9 @@ void hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, + * Check whether the HRTIMER_MODE_SOFT bit and hrtimer.is_soft + * match. + */ ++#ifndef CONFIG_PREEMPT_RT_BASE + WARN_ON_ONCE(!(mode & HRTIMER_MODE_SOFT) ^ !timer->is_soft); ++#endif + + base = lock_hrtimer_base(timer, &flags); + +@@ -1171,7 +1207,7 @@ int hrtimer_cancel(struct hrtimer *timer) + + if (ret >= 0) + return ret; +- cpu_relax(); ++ hrtimer_grab_expiry_lock(timer); + } + } + EXPORT_SYMBOL_GPL(hrtimer_cancel); +@@ -1268,10 +1304,17 @@ static inline int hrtimer_clockid_to_base(clockid_t clock_id) + static void __hrtimer_init(struct hrtimer *timer, clockid_t clock_id, + enum hrtimer_mode mode) + { +- bool softtimer = !!(mode & HRTIMER_MODE_SOFT); +- int base = softtimer ? HRTIMER_MAX_CLOCK_BASES / 2 : 0; ++ bool softtimer; ++ int base; + struct hrtimer_cpu_base *cpu_base; + ++ softtimer = !!(mode & HRTIMER_MODE_SOFT); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (!softtimer && !(mode & HRTIMER_MODE_HARD)) ++ softtimer = true; ++#endif ++ base = softtimer ? HRTIMER_MAX_CLOCK_BASES / 2 : 0; ++ + memset(timer, 0, sizeof(struct hrtimer)); + + cpu_base = raw_cpu_ptr(&hrtimer_bases); +@@ -1468,6 +1511,7 @@ static __latent_entropy void hrtimer_run_softirq(struct softirq_action *h) + unsigned long flags; + ktime_t now; + ++ spin_lock(&cpu_base->softirq_expiry_lock); + raw_spin_lock_irqsave(&cpu_base->lock, flags); + + now = hrtimer_update_base(cpu_base); +@@ -1477,6 +1521,7 @@ static __latent_entropy void hrtimer_run_softirq(struct softirq_action *h) + hrtimer_update_softirq_timer(cpu_base, true); + + raw_spin_unlock_irqrestore(&cpu_base->lock, flags); ++ spin_unlock(&cpu_base->softirq_expiry_lock); + } + + #ifdef CONFIG_HIGH_RES_TIMERS +@@ -1648,13 +1693,52 @@ static enum hrtimer_restart hrtimer_wakeup(struct hrtimer *timer) + return HRTIMER_NORESTART; + } + +-void hrtimer_init_sleeper(struct hrtimer_sleeper *sl, struct task_struct *task) ++static void __hrtimer_init_sleeper(struct hrtimer_sleeper *sl, ++ clockid_t clock_id, ++ enum hrtimer_mode mode, ++ struct task_struct *task) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (!(mode & (HRTIMER_MODE_SOFT | HRTIMER_MODE_HARD))) { ++ if (task_is_realtime(current) || system_state != SYSTEM_RUNNING) ++ mode |= HRTIMER_MODE_HARD; ++ else ++ mode |= HRTIMER_MODE_SOFT; ++ } ++#endif ++ __hrtimer_init(&sl->timer, clock_id, mode); + sl->timer.function = hrtimer_wakeup; + sl->task = task; + } ++ ++/** ++ * hrtimer_init_sleeper - initialize sleeper to the given clock ++ * @sl: sleeper to be initialized ++ * @clock_id: the clock to be used ++ * @mode: timer mode abs/rel ++ * @task: the task to wake up ++ */ ++void hrtimer_init_sleeper(struct hrtimer_sleeper *sl, clockid_t clock_id, ++ enum hrtimer_mode mode, struct task_struct *task) ++{ ++ debug_init(&sl->timer, clock_id, mode); ++ __hrtimer_init_sleeper(sl, clock_id, mode, task); ++ ++} + EXPORT_SYMBOL_GPL(hrtimer_init_sleeper); + ++#ifdef CONFIG_DEBUG_OBJECTS_TIMERS ++void hrtimer_init_sleeper_on_stack(struct hrtimer_sleeper *sl, ++ clockid_t clock_id, ++ enum hrtimer_mode mode, ++ struct task_struct *task) ++{ ++ debug_object_init_on_stack(&sl->timer, &hrtimer_debug_descr); ++ __hrtimer_init_sleeper(sl, clock_id, mode, task); ++} ++EXPORT_SYMBOL_GPL(hrtimer_init_sleeper_on_stack); ++#endif ++ + int nanosleep_copyout(struct restart_block *restart, struct timespec64 *ts) + { + switch(restart->nanosleep.type) { +@@ -1678,8 +1762,6 @@ static int __sched do_nanosleep(struct hrtimer_sleeper *t, enum hrtimer_mode mod + { + struct restart_block *restart; + +- hrtimer_init_sleeper(t, current); +- + do { + set_current_state(TASK_INTERRUPTIBLE); + hrtimer_start_expires(&t->timer, mode); +@@ -1687,12 +1769,12 @@ static int __sched do_nanosleep(struct hrtimer_sleeper *t, enum hrtimer_mode mod + if (likely(t->task)) + freezable_schedule(); + ++ __set_current_state(TASK_RUNNING); + hrtimer_cancel(&t->timer); + mode = HRTIMER_MODE_ABS; + + } while (t->task && !signal_pending(current)); + +- __set_current_state(TASK_RUNNING); + + if (!t->task) + return 0; +@@ -1716,10 +1798,9 @@ static long __sched hrtimer_nanosleep_restart(struct restart_block *restart) + struct hrtimer_sleeper t; + int ret; + +- hrtimer_init_on_stack(&t.timer, restart->nanosleep.clockid, +- HRTIMER_MODE_ABS); ++ hrtimer_init_sleeper_on_stack(&t, restart->nanosleep.clockid, ++ HRTIMER_MODE_ABS, current); + hrtimer_set_expires_tv64(&t.timer, restart->nanosleep.expires); +- + ret = do_nanosleep(&t, HRTIMER_MODE_ABS); + destroy_hrtimer_on_stack(&t.timer); + return ret; +@@ -1737,7 +1818,7 @@ long hrtimer_nanosleep(const struct timespec64 *rqtp, + if (dl_task(current) || rt_task(current)) + slack = 0; + +- hrtimer_init_on_stack(&t.timer, clockid, mode); ++ hrtimer_init_sleeper_on_stack(&t, clockid, mode, current); + hrtimer_set_expires_range_ns(&t.timer, timespec64_to_ktime(*rqtp), slack); + ret = do_nanosleep(&t, mode); + if (ret != -ERESTART_RESTARTBLOCK) +@@ -1797,6 +1878,38 @@ COMPAT_SYSCALL_DEFINE2(nanosleep, struct compat_timespec __user *, rqtp, + } + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * Sleep for 1 ms in hope whoever holds what we want will let it go. ++ */ ++void cpu_chill(void) ++{ ++ unsigned int freeze_flag = current->flags & PF_NOFREEZE; ++ struct task_struct *self = current; ++ ktime_t chill_time; ++ ++ raw_spin_lock_irq(&self->pi_lock); ++ self->saved_state = self->state; ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ raw_spin_unlock_irq(&self->pi_lock); ++ ++ chill_time = ktime_set(0, NSEC_PER_MSEC); ++ ++ current->flags |= PF_NOFREEZE; ++ sleeping_lock_inc(); ++ schedule_hrtimeout(&chill_time, HRTIMER_MODE_REL_HARD); ++ sleeping_lock_dec(); ++ if (!freeze_flag) ++ current->flags &= ~PF_NOFREEZE; ++ ++ raw_spin_lock_irq(&self->pi_lock); ++ __set_current_state_no_track(self->saved_state); ++ self->saved_state = TASK_RUNNING; ++ raw_spin_unlock_irq(&self->pi_lock); ++} ++EXPORT_SYMBOL(cpu_chill); ++#endif ++ + /* + * Functions related to boot-time initialization: + */ +@@ -1818,6 +1931,7 @@ int hrtimers_prepare_cpu(unsigned int cpu) + cpu_base->softirq_next_timer = NULL; + cpu_base->expires_next = KTIME_MAX; + cpu_base->softirq_expires_next = KTIME_MAX; ++ spin_lock_init(&cpu_base->softirq_expiry_lock); + return 0; + } + +@@ -1936,11 +2050,9 @@ schedule_hrtimeout_range_clock(ktime_t *expires, u64 delta, + return -EINTR; + } + +- hrtimer_init_on_stack(&t.timer, clock_id, mode); ++ hrtimer_init_sleeper_on_stack(&t, clock_id, mode, current); + hrtimer_set_expires_range_ns(&t.timer, *expires, delta); + +- hrtimer_init_sleeper(&t, current); +- + hrtimer_start_expires(&t.timer, mode); + + if (likely(t.task)) +diff --git a/kernel/time/itimer.c b/kernel/time/itimer.c +index 9a65713c8309..a5ff222df4c7 100644 +--- a/kernel/time/itimer.c ++++ b/kernel/time/itimer.c +@@ -215,6 +215,7 @@ int do_setitimer(int which, struct itimerval *value, struct itimerval *ovalue) + /* We are sharing ->siglock with it_real_fn() */ + if (hrtimer_try_to_cancel(timer) < 0) { + spin_unlock_irq(&tsk->sighand->siglock); ++ hrtimer_grab_expiry_lock(timer); + goto again; + } + expires = timeval_to_ktime(value->it_value); +diff --git a/kernel/time/jiffies.c b/kernel/time/jiffies.c +index 497719127bf9..62acb8914c9e 100644 +--- a/kernel/time/jiffies.c ++++ b/kernel/time/jiffies.c +@@ -74,7 +74,8 @@ static struct clocksource clocksource_jiffies = { + .max_cycles = 10, + }; + +-__cacheline_aligned_in_smp DEFINE_SEQLOCK(jiffies_lock); ++__cacheline_aligned_in_smp DEFINE_RAW_SPINLOCK(jiffies_lock); ++__cacheline_aligned_in_smp seqcount_t jiffies_seq; + + #if (BITS_PER_LONG < 64) + u64 get_jiffies_64(void) +@@ -83,9 +84,9 @@ u64 get_jiffies_64(void) + u64 ret; + + do { +- seq = read_seqbegin(&jiffies_lock); ++ seq = read_seqcount_begin(&jiffies_seq); + ret = jiffies_64; +- } while (read_seqretry(&jiffies_lock, seq)); ++ } while (read_seqcount_retry(&jiffies_seq, seq)); + return ret; + } + EXPORT_SYMBOL(get_jiffies_64); +diff --git a/kernel/time/posix-cpu-timers.c b/kernel/time/posix-cpu-timers.c +index 76801b9b481e..59ceedbb03f0 100644 +--- a/kernel/time/posix-cpu-timers.c ++++ b/kernel/time/posix-cpu-timers.c +@@ -3,8 +3,10 @@ + * Implement CPU time clocks for the POSIX clock interface. + */ + ++#include + #include + #include ++#include + #include + #include + #include +@@ -15,6 +17,7 @@ + #include + #include + #include ++#include + + #include "posix-timers.h" + +@@ -786,6 +789,7 @@ check_timers_list(struct list_head *timers, + return t->expires; + + t->firing = 1; ++ t->firing_cpu = smp_processor_id(); + list_move_tail(&t->entry, firing); + } + +@@ -1131,18 +1135,31 @@ static inline int fastpath_timer_check(struct task_struct *tsk) + return 0; + } + ++static DEFINE_PER_CPU(spinlock_t, cpu_timer_expiry_lock) = __SPIN_LOCK_UNLOCKED(cpu_timer_expiry_lock); ++ ++void cpu_timers_grab_expiry_lock(struct k_itimer *timer) ++{ ++ int cpu = timer->it.cpu.firing_cpu; ++ ++ if (cpu >= 0) { ++ spinlock_t *expiry_lock = per_cpu_ptr(&cpu_timer_expiry_lock, cpu); ++ ++ spin_lock_irq(expiry_lock); ++ spin_unlock_irq(expiry_lock); ++ } ++} ++ + /* + * This is called from the timer interrupt handler. The irq handler has + * already updated our counts. We need to check if any timers fire now. + * Interrupts are disabled. + */ +-void run_posix_cpu_timers(struct task_struct *tsk) ++static void __run_posix_cpu_timers(struct task_struct *tsk) + { + LIST_HEAD(firing); + struct k_itimer *timer, *next; + unsigned long flags; +- +- lockdep_assert_irqs_disabled(); ++ spinlock_t *expiry_lock; + + /* + * The fast path checks that there are no expired thread or thread +@@ -1151,6 +1168,9 @@ void run_posix_cpu_timers(struct task_struct *tsk) + if (!fastpath_timer_check(tsk)) + return; + ++ expiry_lock = this_cpu_ptr(&cpu_timer_expiry_lock); ++ spin_lock(expiry_lock); ++ + if (!lock_task_sighand(tsk, &flags)) + return; + /* +@@ -1185,6 +1205,7 @@ void run_posix_cpu_timers(struct task_struct *tsk) + list_del_init(&timer->it.cpu.entry); + cpu_firing = timer->it.cpu.firing; + timer->it.cpu.firing = 0; ++ timer->it.cpu.firing_cpu = -1; + /* + * The firing flag is -1 if we collided with a reset + * of the timer, which already reported this +@@ -1194,8 +1215,156 @@ void run_posix_cpu_timers(struct task_struct *tsk) + cpu_timer_fire(timer); + spin_unlock(&timer->it_lock); + } ++ spin_unlock(expiry_lock); ++} ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++#include ++#include ++DEFINE_PER_CPU(struct task_struct *, posix_timer_task); ++DEFINE_PER_CPU(struct task_struct *, posix_timer_tasklist); ++DEFINE_PER_CPU(bool, posix_timer_th_active); ++ ++static void posix_cpu_kthread_fn(unsigned int cpu) ++{ ++ struct task_struct *tsk = NULL; ++ struct task_struct *next = NULL; ++ ++ BUG_ON(per_cpu(posix_timer_task, cpu) != current); ++ ++ /* grab task list */ ++ raw_local_irq_disable(); ++ tsk = per_cpu(posix_timer_tasklist, cpu); ++ per_cpu(posix_timer_tasklist, cpu) = NULL; ++ raw_local_irq_enable(); ++ ++ /* its possible the list is empty, just return */ ++ if (!tsk) ++ return; ++ ++ /* Process task list */ ++ while (1) { ++ /* save next */ ++ next = tsk->posix_timer_list; ++ ++ /* run the task timers, clear its ptr and ++ * unreference it ++ */ ++ __run_posix_cpu_timers(tsk); ++ tsk->posix_timer_list = NULL; ++ put_task_struct(tsk); ++ ++ /* check if this is the last on the list */ ++ if (next == tsk) ++ break; ++ tsk = next; ++ } ++} ++ ++static inline int __fastpath_timer_check(struct task_struct *tsk) ++{ ++ /* tsk == current, ensure it is safe to use ->signal/sighand */ ++ if (unlikely(tsk->exit_state)) ++ return 0; ++ ++ if (!task_cputime_zero(&tsk->cputime_expires)) ++ return 1; ++ ++ if (!task_cputime_zero(&tsk->signal->cputime_expires)) ++ return 1; ++ ++ return 0; ++} ++ ++void run_posix_cpu_timers(struct task_struct *tsk) ++{ ++ unsigned int cpu = smp_processor_id(); ++ struct task_struct *tasklist; ++ ++ BUG_ON(!irqs_disabled()); ++ ++ if (per_cpu(posix_timer_th_active, cpu) != true) ++ return; ++ ++ /* get per-cpu references */ ++ tasklist = per_cpu(posix_timer_tasklist, cpu); ++ ++ /* check to see if we're already queued */ ++ if (!tsk->posix_timer_list && __fastpath_timer_check(tsk)) { ++ get_task_struct(tsk); ++ if (tasklist) { ++ tsk->posix_timer_list = tasklist; ++ } else { ++ /* ++ * The list is terminated by a self-pointing ++ * task_struct ++ */ ++ tsk->posix_timer_list = tsk; ++ } ++ per_cpu(posix_timer_tasklist, cpu) = tsk; ++ ++ wake_up_process(per_cpu(posix_timer_task, cpu)); ++ } ++} ++ ++static int posix_cpu_kthread_should_run(unsigned int cpu) ++{ ++ return __this_cpu_read(posix_timer_tasklist) != NULL; ++} ++ ++static void posix_cpu_kthread_park(unsigned int cpu) ++{ ++ this_cpu_write(posix_timer_th_active, false); ++} ++ ++static void posix_cpu_kthread_unpark(unsigned int cpu) ++{ ++ this_cpu_write(posix_timer_th_active, true); + } + ++static void posix_cpu_kthread_setup(unsigned int cpu) ++{ ++ struct sched_param sp; ++ ++ sp.sched_priority = MAX_RT_PRIO - 1; ++ sched_setscheduler_nocheck(current, SCHED_FIFO, &sp); ++ posix_cpu_kthread_unpark(cpu); ++} ++ ++static struct smp_hotplug_thread posix_cpu_thread = { ++ .store = &posix_timer_task, ++ .thread_should_run = posix_cpu_kthread_should_run, ++ .thread_fn = posix_cpu_kthread_fn, ++ .thread_comm = "posixcputmr/%u", ++ .setup = posix_cpu_kthread_setup, ++ .park = posix_cpu_kthread_park, ++ .unpark = posix_cpu_kthread_unpark, ++}; ++ ++static int __init posix_cpu_thread_init(void) ++{ ++ /* Start one for boot CPU. */ ++ unsigned long cpu; ++ int ret; ++ ++ /* init the per-cpu posix_timer_tasklets */ ++ for_each_possible_cpu(cpu) ++ per_cpu(posix_timer_tasklist, cpu) = NULL; ++ ++ ret = smpboot_register_percpu_thread(&posix_cpu_thread); ++ WARN_ON(ret); ++ ++ return 0; ++} ++early_initcall(posix_cpu_thread_init); ++#else /* CONFIG_PREEMPT_RT_BASE */ ++void run_posix_cpu_timers(struct task_struct *tsk) ++{ ++ lockdep_assert_irqs_disabled(); ++ __run_posix_cpu_timers(tsk); ++} ++#endif /* CONFIG_PREEMPT_RT_BASE */ ++ + /* + * Set one of the process-wide special case CPU timers or RLIMIT_CPU. + * The tsk->sighand->siglock must be held by the caller. +@@ -1312,6 +1481,8 @@ static int do_cpu_nanosleep(const clockid_t which_clock, int flags, + spin_unlock_irq(&timer.it_lock); + + while (error == TIMER_RETRY) { ++ ++ cpu_timers_grab_expiry_lock(&timer); + /* + * We need to handle case when timer was or is in the + * middle of firing. In other cases we already freed +diff --git a/kernel/time/posix-timers.c b/kernel/time/posix-timers.c +index 5a01c4fdbfef..c7e97d421590 100644 +--- a/kernel/time/posix-timers.c ++++ b/kernel/time/posix-timers.c +@@ -463,7 +463,7 @@ static struct k_itimer * alloc_posix_timer(void) + + static void k_itimer_rcu_free(struct rcu_head *head) + { +- struct k_itimer *tmr = container_of(head, struct k_itimer, it.rcu); ++ struct k_itimer *tmr = container_of(head, struct k_itimer, rcu); + + kmem_cache_free(posix_timers_cache, tmr); + } +@@ -480,7 +480,7 @@ static void release_posix_timer(struct k_itimer *tmr, int it_id_set) + } + put_pid(tmr->it_pid); + sigqueue_free(tmr->sigq); +- call_rcu(&tmr->it.rcu, k_itimer_rcu_free); ++ call_rcu(&tmr->rcu, k_itimer_rcu_free); + } + + static int common_timer_create(struct k_itimer *new_timer) +@@ -826,6 +826,17 @@ static int common_hrtimer_try_to_cancel(struct k_itimer *timr) + return hrtimer_try_to_cancel(&timr->it.real.timer); + } + ++static void timer_wait_for_callback(const struct k_clock *kc, struct k_itimer *timer) ++{ ++ if (kc->timer_arm == common_hrtimer_arm) ++ hrtimer_grab_expiry_lock(&timer->it.real.timer); ++ else if (kc == &alarm_clock) ++ hrtimer_grab_expiry_lock(&timer->it.alarm.alarmtimer.timer); ++ else ++ /* posix-cpu-timers */ ++ cpu_timers_grab_expiry_lock(timer); ++} ++ + /* Set a POSIX.1b interval timer. */ + int common_timer_set(struct k_itimer *timr, int flags, + struct itimerspec64 *new_setting, +@@ -891,11 +902,15 @@ static int do_timer_settime(timer_t timer_id, int flags, + else + error = kc->timer_set(timr, flags, new_spec64, old_spec64); + +- unlock_timer(timr, flag); + if (error == TIMER_RETRY) { ++ rcu_read_lock(); ++ unlock_timer(timr, flag); ++ timer_wait_for_callback(kc, timr); ++ rcu_read_unlock(); + old_spec64 = NULL; // We already got the old time... + goto retry; + } ++ unlock_timer(timr, flag); + + return error; + } +@@ -957,13 +972,21 @@ int common_timer_del(struct k_itimer *timer) + return 0; + } + +-static inline int timer_delete_hook(struct k_itimer *timer) ++static int timer_delete_hook(struct k_itimer *timer) + { + const struct k_clock *kc = timer->kclock; ++ int ret; + + if (WARN_ON_ONCE(!kc || !kc->timer_del)) + return -EINVAL; +- return kc->timer_del(timer); ++ ret = kc->timer_del(timer); ++ if (ret == TIMER_RETRY) { ++ rcu_read_lock(); ++ spin_unlock_irq(&timer->it_lock); ++ timer_wait_for_callback(kc, timer); ++ rcu_read_unlock(); ++ } ++ return ret; + } + + /* Delete a POSIX.1b interval timer. */ +@@ -977,10 +1000,8 @@ SYSCALL_DEFINE1(timer_delete, timer_t, timer_id) + if (!timer) + return -EINVAL; + +- if (timer_delete_hook(timer) == TIMER_RETRY) { +- unlock_timer(timer, flags); ++ if (timer_delete_hook(timer) == TIMER_RETRY) + goto retry_delete; +- } + + spin_lock(¤t->sighand->siglock); + list_del(&timer->list); +@@ -1006,10 +1027,9 @@ static void itimer_delete(struct k_itimer *timer) + retry_delete: + spin_lock_irqsave(&timer->it_lock, flags); + +- if (timer_delete_hook(timer) == TIMER_RETRY) { +- unlock_timer(timer, flags); ++ if (timer_delete_hook(timer) == TIMER_RETRY) + goto retry_delete; +- } ++ + list_del(&timer->list); + /* + * This keeps any tasks waiting on the spin lock from thinking +diff --git a/kernel/time/posix-timers.h b/kernel/time/posix-timers.h +index ddb21145211a..725bd230a8db 100644 +--- a/kernel/time/posix-timers.h ++++ b/kernel/time/posix-timers.h +@@ -32,6 +32,8 @@ extern const struct k_clock clock_process; + extern const struct k_clock clock_thread; + extern const struct k_clock alarm_clock; + ++extern void cpu_timers_grab_expiry_lock(struct k_itimer *timer); ++ + int posix_timer_event(struct k_itimer *timr, int si_private); + + void common_timer_get(struct k_itimer *timr, struct itimerspec64 *cur_setting); +diff --git a/kernel/time/tick-broadcast-hrtimer.c b/kernel/time/tick-broadcast-hrtimer.c +index a59641fb88b6..52649fdea3b5 100644 +--- a/kernel/time/tick-broadcast-hrtimer.c ++++ b/kernel/time/tick-broadcast-hrtimer.c +@@ -106,7 +106,7 @@ static enum hrtimer_restart bc_handler(struct hrtimer *t) + + void tick_setup_hrtimer_broadcast(void) + { +- hrtimer_init(&bctimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); ++ hrtimer_init(&bctimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD); + bctimer.function = bc_handler; + clockevents_register_device(&ce_broadcast_hrtimer); + } +diff --git a/kernel/time/tick-common.c b/kernel/time/tick-common.c +index a02e0f6b287c..32f5101f07ce 100644 +--- a/kernel/time/tick-common.c ++++ b/kernel/time/tick-common.c +@@ -79,13 +79,15 @@ int tick_is_oneshot_available(void) + static void tick_periodic(int cpu) + { + if (tick_do_timer_cpu == cpu) { +- write_seqlock(&jiffies_lock); ++ raw_spin_lock(&jiffies_lock); ++ write_seqcount_begin(&jiffies_seq); + + /* Keep track of the next tick event */ + tick_next_period = ktime_add(tick_next_period, tick_period); + + do_timer(1); +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + update_wall_time(); + } + +@@ -157,9 +159,9 @@ void tick_setup_periodic(struct clock_event_device *dev, int broadcast) + ktime_t next; + + do { +- seq = read_seqbegin(&jiffies_lock); ++ seq = read_seqcount_begin(&jiffies_seq); + next = tick_next_period; +- } while (read_seqretry(&jiffies_lock, seq)); ++ } while (read_seqcount_retry(&jiffies_seq, seq)); + + clockevents_switch_state(dev, CLOCK_EVT_STATE_ONESHOT); + +diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c +index 5b33e2f5c0ed..da4a3f8feb56 100644 +--- a/kernel/time/tick-sched.c ++++ b/kernel/time/tick-sched.c +@@ -67,7 +67,8 @@ static void tick_do_update_jiffies64(ktime_t now) + return; + + /* Reevaluate with jiffies_lock held */ +- write_seqlock(&jiffies_lock); ++ raw_spin_lock(&jiffies_lock); ++ write_seqcount_begin(&jiffies_seq); + + delta = ktime_sub(now, last_jiffies_update); + if (delta >= tick_period) { +@@ -90,10 +91,12 @@ static void tick_do_update_jiffies64(ktime_t now) + /* Keep the tick_next_period variable up to date */ + tick_next_period = ktime_add(last_jiffies_update, tick_period); + } else { +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + return; + } +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + update_wall_time(); + } + +@@ -104,12 +107,14 @@ static ktime_t tick_init_jiffy_update(void) + { + ktime_t period; + +- write_seqlock(&jiffies_lock); ++ raw_spin_lock(&jiffies_lock); ++ write_seqcount_begin(&jiffies_seq); + /* Did we start the jiffies update yet ? */ + if (last_jiffies_update == 0) + last_jiffies_update = tick_next_period; + period = last_jiffies_update; +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + return period; + } + +@@ -227,6 +232,7 @@ static void nohz_full_kick_func(struct irq_work *work) + + static DEFINE_PER_CPU(struct irq_work, nohz_full_kick_work) = { + .func = nohz_full_kick_func, ++ .flags = IRQ_WORK_HARD_IRQ, + }; + + /* +@@ -652,10 +658,10 @@ static ktime_t tick_nohz_next_event(struct tick_sched *ts, int cpu) + + /* Read jiffies and the time when jiffies were updated last */ + do { +- seq = read_seqbegin(&jiffies_lock); ++ seq = read_seqcount_begin(&jiffies_seq); + basemono = last_jiffies_update; + basejiff = jiffies; +- } while (read_seqretry(&jiffies_lock, seq)); ++ } while (read_seqcount_retry(&jiffies_seq, seq)); + ts->last_jiffies = basejiff; + ts->timer_expires_base = basemono; + +@@ -886,14 +892,7 @@ static bool can_stop_idle_tick(int cpu, struct tick_sched *ts) + return false; + + if (unlikely(local_softirq_pending() && cpu_online(cpu))) { +- static int ratelimit; +- +- if (ratelimit < 10 && +- (local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK)) { +- pr_warn("NOHZ: local_softirq_pending %02x\n", +- (unsigned int) local_softirq_pending()); +- ratelimit++; +- } ++ softirq_check_pending_idle(); + return false; + } + +@@ -1305,7 +1304,7 @@ void tick_setup_sched_timer(void) + /* + * Emulate tick processing via per-CPU hrtimers: + */ +- hrtimer_init(&ts->sched_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); ++ hrtimer_init(&ts->sched_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD); + ts->sched_timer.function = tick_sched_timer; + + /* Get the next period (per-CPU) */ +diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c +index 443edcddac8a..0517bc42c6b6 100644 +--- a/kernel/time/timekeeping.c ++++ b/kernel/time/timekeeping.c +@@ -2418,8 +2418,10 @@ EXPORT_SYMBOL(hardpps); + */ + void xtime_update(unsigned long ticks) + { +- write_seqlock(&jiffies_lock); ++ raw_spin_lock(&jiffies_lock); ++ write_seqcount_begin(&jiffies_seq); + do_timer(ticks); +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + update_wall_time(); + } +diff --git a/kernel/time/timekeeping.h b/kernel/time/timekeeping.h +index 141ab3ab0354..099737f6f10c 100644 +--- a/kernel/time/timekeeping.h ++++ b/kernel/time/timekeeping.h +@@ -25,7 +25,8 @@ static inline void sched_clock_resume(void) { } + extern void do_timer(unsigned long ticks); + extern void update_wall_time(void); + +-extern seqlock_t jiffies_lock; ++extern raw_spinlock_t jiffies_lock; ++extern seqcount_t jiffies_seq; + + #define CS_NAME_LEN 32 + +diff --git a/kernel/time/timer.c b/kernel/time/timer.c +index fa49cd753dea..d6289d8df06b 100644 +--- a/kernel/time/timer.c ++++ b/kernel/time/timer.c +@@ -197,6 +197,7 @@ EXPORT_SYMBOL(jiffies_64); + struct timer_base { + raw_spinlock_t lock; + struct timer_list *running_timer; ++ spinlock_t expiry_lock; + unsigned long clk; + unsigned long next_expiry; + unsigned int cpu; +@@ -213,8 +214,7 @@ static DEFINE_PER_CPU(struct timer_base, timer_bases[NR_BASES]); + static DEFINE_STATIC_KEY_FALSE(timers_nohz_active); + static DEFINE_MUTEX(timer_keys_mutex); + +-static void timer_update_keys(struct work_struct *work); +-static DECLARE_WORK(timer_update_work, timer_update_keys); ++static struct swork_event timer_update_swork; + + #ifdef CONFIG_SMP + unsigned int sysctl_timer_migration = 1; +@@ -232,7 +232,7 @@ static void timers_update_migration(void) + static inline void timers_update_migration(void) { } + #endif /* !CONFIG_SMP */ + +-static void timer_update_keys(struct work_struct *work) ++static void timer_update_keys(struct swork_event *event) + { + mutex_lock(&timer_keys_mutex); + timers_update_migration(); +@@ -242,9 +242,17 @@ static void timer_update_keys(struct work_struct *work) + + void timers_update_nohz(void) + { +- schedule_work(&timer_update_work); ++ swork_queue(&timer_update_swork); + } + ++static __init int hrtimer_init_thread(void) ++{ ++ WARN_ON(swork_get()); ++ INIT_SWORK(&timer_update_swork, timer_update_keys); ++ return 0; ++} ++early_initcall(hrtimer_init_thread); ++ + int timer_migration_handler(struct ctl_table *table, int write, + void __user *buffer, size_t *lenp, + loff_t *ppos) +@@ -1207,14 +1215,8 @@ int del_timer(struct timer_list *timer) + } + EXPORT_SYMBOL(del_timer); + +-/** +- * try_to_del_timer_sync - Try to deactivate a timer +- * @timer: timer to delete +- * +- * This function tries to deactivate a timer. Upon successful (ret >= 0) +- * exit the timer is not queued and the handler is not running on any CPU. +- */ +-int try_to_del_timer_sync(struct timer_list *timer) ++static int __try_to_del_timer_sync(struct timer_list *timer, ++ struct timer_base **basep) + { + struct timer_base *base; + unsigned long flags; +@@ -1222,7 +1224,7 @@ int try_to_del_timer_sync(struct timer_list *timer) + + debug_assert_init(timer); + +- base = lock_timer_base(timer, &flags); ++ *basep = base = lock_timer_base(timer, &flags); + + if (base->running_timer != timer) + ret = detach_if_pending(timer, base, true); +@@ -1231,9 +1233,42 @@ int try_to_del_timer_sync(struct timer_list *timer) + + return ret; + } ++ ++/** ++ * try_to_del_timer_sync - Try to deactivate a timer ++ * @timer: timer to delete ++ * ++ * This function tries to deactivate a timer. Upon successful (ret >= 0) ++ * exit the timer is not queued and the handler is not running on any CPU. ++ */ ++int try_to_del_timer_sync(struct timer_list *timer) ++{ ++ struct timer_base *base; ++ ++ return __try_to_del_timer_sync(timer, &base); ++} + EXPORT_SYMBOL(try_to_del_timer_sync); + +-#ifdef CONFIG_SMP ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) ++static int __del_timer_sync(struct timer_list *timer) ++{ ++ struct timer_base *base; ++ int ret; ++ ++ for (;;) { ++ ret = __try_to_del_timer_sync(timer, &base); ++ if (ret >= 0) ++ return ret; ++ ++ /* ++ * When accessing the lock, timers of base are no longer expired ++ * and so timer is no longer running. ++ */ ++ spin_lock(&base->expiry_lock); ++ spin_unlock(&base->expiry_lock); ++ } ++} ++ + /** + * del_timer_sync - deactivate a timer and wait for the handler to finish. + * @timer: the timer to be deactivated +@@ -1289,12 +1324,8 @@ int del_timer_sync(struct timer_list *timer) + * could lead to deadlock. + */ + WARN_ON(in_irq() && !(timer->flags & TIMER_IRQSAFE)); +- for (;;) { +- int ret = try_to_del_timer_sync(timer); +- if (ret >= 0) +- return ret; +- cpu_relax(); +- } ++ ++ return __del_timer_sync(timer); + } + EXPORT_SYMBOL(del_timer_sync); + #endif +@@ -1354,13 +1385,20 @@ static void expire_timers(struct timer_base *base, struct hlist_head *head) + + fn = timer->function; + +- if (timer->flags & TIMER_IRQSAFE) { ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT_FULL) && ++ timer->flags & TIMER_IRQSAFE) { + raw_spin_unlock(&base->lock); + call_timer_fn(timer, fn); ++ base->running_timer = NULL; ++ spin_unlock(&base->expiry_lock); ++ spin_lock(&base->expiry_lock); + raw_spin_lock(&base->lock); + } else { + raw_spin_unlock_irq(&base->lock); + call_timer_fn(timer, fn); ++ base->running_timer = NULL; ++ spin_unlock(&base->expiry_lock); ++ spin_lock(&base->expiry_lock); + raw_spin_lock_irq(&base->lock); + } + } +@@ -1655,6 +1693,7 @@ static inline void __run_timers(struct timer_base *base) + if (!time_after_eq(jiffies, base->clk)) + return; + ++ spin_lock(&base->expiry_lock); + raw_spin_lock_irq(&base->lock); + + /* +@@ -1681,8 +1720,8 @@ static inline void __run_timers(struct timer_base *base) + while (levels--) + expire_timers(base, heads + levels); + } +- base->running_timer = NULL; + raw_spin_unlock_irq(&base->lock); ++ spin_unlock(&base->expiry_lock); + } + + /* +@@ -1692,6 +1731,8 @@ static __latent_entropy void run_timer_softirq(struct softirq_action *h) + { + struct timer_base *base = this_cpu_ptr(&timer_bases[BASE_STD]); + ++ irq_work_tick_soft(); ++ + __run_timers(base); + if (IS_ENABLED(CONFIG_NO_HZ_COMMON)) + __run_timers(this_cpu_ptr(&timer_bases[BASE_DEF])); +@@ -1927,6 +1968,7 @@ static void __init init_timer_cpu(int cpu) + base->cpu = cpu; + raw_spin_lock_init(&base->lock); + base->clk = jiffies; ++ spin_lock_init(&base->expiry_lock); + } + } + +diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c +index 3b0de19b9ed7..f82da65109eb 100644 +--- a/kernel/trace/trace.c ++++ b/kernel/trace/trace.c +@@ -2137,6 +2137,7 @@ tracing_generic_entry_update(struct trace_entry *entry, unsigned long flags, + struct task_struct *tsk = current; + + entry->preempt_count = pc & 0xff; ++ entry->preempt_lazy_count = preempt_lazy_count(); + entry->pid = (tsk) ? tsk->pid : 0; + entry->flags = + #ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT +@@ -2147,8 +2148,11 @@ tracing_generic_entry_update(struct trace_entry *entry, unsigned long flags, + ((pc & NMI_MASK ) ? TRACE_FLAG_NMI : 0) | + ((pc & HARDIRQ_MASK) ? TRACE_FLAG_HARDIRQ : 0) | + ((pc & SOFTIRQ_OFFSET) ? TRACE_FLAG_SOFTIRQ : 0) | +- (tif_need_resched() ? TRACE_FLAG_NEED_RESCHED : 0) | ++ (tif_need_resched_now() ? TRACE_FLAG_NEED_RESCHED : 0) | ++ (need_resched_lazy() ? TRACE_FLAG_NEED_RESCHED_LAZY : 0) | + (test_preempt_need_resched() ? TRACE_FLAG_PREEMPT_RESCHED : 0); ++ ++ entry->migrate_disable = (tsk) ? __migrate_disabled(tsk) & 0xFF : 0; + } + EXPORT_SYMBOL_GPL(tracing_generic_entry_update); + +@@ -3347,14 +3351,17 @@ get_total_entries(struct trace_buffer *buf, + + static void print_lat_help_header(struct seq_file *m) + { +- seq_puts(m, "# _------=> CPU# \n" +- "# / _-----=> irqs-off \n" +- "# | / _----=> need-resched \n" +- "# || / _---=> hardirq/softirq \n" +- "# ||| / _--=> preempt-depth \n" +- "# |||| / delay \n" +- "# cmd pid ||||| time | caller \n" +- "# \\ / ||||| \\ | / \n"); ++ seq_puts(m, "# _--------=> CPU# \n" ++ "# / _-------=> irqs-off \n" ++ "# | / _------=> need-resched \n" ++ "# || / _-----=> need-resched_lazy \n" ++ "# ||| / _----=> hardirq/softirq \n" ++ "# |||| / _---=> preempt-depth \n" ++ "# ||||| / _--=> preempt-lazy-depth\n" ++ "# |||||| / _-=> migrate-disable \n" ++ "# ||||||| / delay \n" ++ "# cmd pid |||||||| time | caller \n" ++ "# \\ / |||||||| \\ | / \n"); + } + + static void print_event_info(struct trace_buffer *buf, struct seq_file *m) +@@ -3392,15 +3399,17 @@ static void print_func_help_header_irq(struct trace_buffer *buf, struct seq_file + tgid ? tgid_space : space); + seq_printf(m, "# %s / _----=> need-resched\n", + tgid ? tgid_space : space); +- seq_printf(m, "# %s| / _---=> hardirq/softirq\n", ++ seq_printf(m, "# %s| / _---=> need-resched_lazy\n", ++ tgid ? tgid_space : space); ++ seq_printf(m, "# %s|| / _--=> hardirq/softirq\n", + tgid ? tgid_space : space); +- seq_printf(m, "# %s|| / _--=> preempt-depth\n", ++ seq_printf(m, "# %s||| / preempt-depth\n", + tgid ? tgid_space : space); +- seq_printf(m, "# %s||| / delay\n", ++ seq_printf(m, "# %s|||| / delay\n", + tgid ? tgid_space : space); +- seq_printf(m, "# TASK-PID %sCPU# |||| TIMESTAMP FUNCTION\n", ++ seq_printf(m, "# TASK-PID %sCPU# ||||| TIMESTAMP FUNCTION\n", + tgid ? " TGID " : space); +- seq_printf(m, "# | | %s | |||| | |\n", ++ seq_printf(m, "# | | %s | ||||| | |\n", + tgid ? " | " : space); + } + +diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h +index d11d7bfc3fa5..6eba8c96f4bc 100644 +--- a/kernel/trace/trace.h ++++ b/kernel/trace/trace.h +@@ -127,6 +127,7 @@ struct kretprobe_trace_entry_head { + * NEED_RESCHED - reschedule is requested + * HARDIRQ - inside an interrupt handler + * SOFTIRQ - inside a softirq handler ++ * NEED_RESCHED_LAZY - lazy reschedule is requested + */ + enum trace_flag_type { + TRACE_FLAG_IRQS_OFF = 0x01, +@@ -136,6 +137,7 @@ enum trace_flag_type { + TRACE_FLAG_SOFTIRQ = 0x10, + TRACE_FLAG_PREEMPT_RESCHED = 0x20, + TRACE_FLAG_NMI = 0x40, ++ TRACE_FLAG_NEED_RESCHED_LAZY = 0x80, + }; + + #define TRACE_BUF_SIZE 1024 +diff --git a/kernel/trace/trace_events.c b/kernel/trace/trace_events.c +index 7345f5f8f3fe..6455e2ca7987 100644 +--- a/kernel/trace/trace_events.c ++++ b/kernel/trace/trace_events.c +@@ -188,6 +188,8 @@ static int trace_define_common_fields(void) + __common_field(unsigned char, flags); + __common_field(unsigned char, preempt_count); + __common_field(int, pid); ++ __common_field(unsigned short, migrate_disable); ++ __common_field(unsigned short, padding); + + return ret; + } +diff --git a/kernel/trace/trace_hwlat.c b/kernel/trace/trace_hwlat.c +index 1e6db9cbe4dc..fa95139445b2 100644 +--- a/kernel/trace/trace_hwlat.c ++++ b/kernel/trace/trace_hwlat.c +@@ -277,7 +277,7 @@ static void move_to_next_cpu(void) + * of this thread, than stop migrating for the duration + * of the current test. + */ +- if (!cpumask_equal(current_mask, ¤t->cpus_allowed)) ++ if (!cpumask_equal(current_mask, current->cpus_ptr)) + goto disable; + + get_online_cpus(); +diff --git a/kernel/trace/trace_output.c b/kernel/trace/trace_output.c +index 6e6cc64faa38..3f78b0afb729 100644 +--- a/kernel/trace/trace_output.c ++++ b/kernel/trace/trace_output.c +@@ -448,6 +448,7 @@ int trace_print_lat_fmt(struct trace_seq *s, struct trace_entry *entry) + { + char hardsoft_irq; + char need_resched; ++ char need_resched_lazy; + char irqs_off; + int hardirq; + int softirq; +@@ -478,6 +479,9 @@ int trace_print_lat_fmt(struct trace_seq *s, struct trace_entry *entry) + break; + } + ++ need_resched_lazy = ++ (entry->flags & TRACE_FLAG_NEED_RESCHED_LAZY) ? 'L' : '.'; ++ + hardsoft_irq = + (nmi && hardirq) ? 'Z' : + nmi ? 'z' : +@@ -486,14 +490,25 @@ int trace_print_lat_fmt(struct trace_seq *s, struct trace_entry *entry) + softirq ? 's' : + '.' ; + +- trace_seq_printf(s, "%c%c%c", +- irqs_off, need_resched, hardsoft_irq); ++ trace_seq_printf(s, "%c%c%c%c", ++ irqs_off, need_resched, need_resched_lazy, ++ hardsoft_irq); + + if (entry->preempt_count) + trace_seq_printf(s, "%x", entry->preempt_count); + else + trace_seq_putc(s, '.'); + ++ if (entry->preempt_lazy_count) ++ trace_seq_printf(s, "%x", entry->preempt_lazy_count); ++ else ++ trace_seq_putc(s, '.'); ++ ++ if (entry->migrate_disable) ++ trace_seq_printf(s, "%x", entry->migrate_disable); ++ else ++ trace_seq_putc(s, '.'); ++ + return !trace_seq_has_overflowed(s); + } + +diff --git a/kernel/watchdog.c b/kernel/watchdog.c +index bbc4940f21af..defd493ba967 100644 +--- a/kernel/watchdog.c ++++ b/kernel/watchdog.c +@@ -483,7 +483,7 @@ static void watchdog_enable(unsigned int cpu) + * Start the timer first to prevent the NMI watchdog triggering + * before the timer has a chance to fire. + */ +- hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD); + hrtimer->function = watchdog_timer_fn; + hrtimer_start(hrtimer, ns_to_ktime(sample_period), + HRTIMER_MODE_REL_PINNED); +diff --git a/kernel/watchdog_hld.c b/kernel/watchdog_hld.c +index 71381168dede..685443375dc0 100644 +--- a/kernel/watchdog_hld.c ++++ b/kernel/watchdog_hld.c +@@ -24,6 +24,8 @@ static DEFINE_PER_CPU(bool, hard_watchdog_warn); + static DEFINE_PER_CPU(bool, watchdog_nmi_touch); + static DEFINE_PER_CPU(struct perf_event *, watchdog_ev); + static DEFINE_PER_CPU(struct perf_event *, dead_event); ++static DEFINE_RAW_SPINLOCK(watchdog_output_lock); ++ + static struct cpumask dead_events_mask; + + static unsigned long hardlockup_allcpu_dumped; +@@ -134,6 +136,13 @@ static void watchdog_overflow_callback(struct perf_event *event, + /* only print hardlockups once */ + if (__this_cpu_read(hard_watchdog_warn) == true) + return; ++ /* ++ * If early-printk is enabled then make sure we do not ++ * lock up in printk() and kill console logging: ++ */ ++ printk_kill(); ++ ++ raw_spin_lock(&watchdog_output_lock); + + pr_emerg("Watchdog detected hard LOCKUP on cpu %d", this_cpu); + print_modules(); +@@ -151,6 +160,7 @@ static void watchdog_overflow_callback(struct perf_event *event, + !test_and_set_bit(0, &hardlockup_allcpu_dumped)) + trigger_allbutself_cpu_backtrace(); + ++ raw_spin_unlock(&watchdog_output_lock); + if (hardlockup_panic) + nmi_panic(regs, "Hard LOCKUP"); + +diff --git a/kernel/workqueue.c b/kernel/workqueue.c +index cd8b61bded78..12137825bf5a 100644 +--- a/kernel/workqueue.c ++++ b/kernel/workqueue.c +@@ -49,6 +49,8 @@ + #include + #include + #include ++#include ++#include + + #include "workqueue_internal.h" + +@@ -123,11 +125,16 @@ enum { + * cpu or grabbing pool->lock is enough for read access. If + * POOL_DISASSOCIATED is set, it's identical to L. + * ++ * On RT we need the extra protection via rt_lock_idle_list() for ++ * the list manipulations against read access from ++ * wq_worker_sleeping(). All other places are nicely serialized via ++ * pool->lock. ++ * + * A: wq_pool_attach_mutex protected. + * + * PL: wq_pool_mutex protected. + * +- * PR: wq_pool_mutex protected for writes. Sched-RCU protected for reads. ++ * PR: wq_pool_mutex protected for writes. RCU protected for reads. + * + * PW: wq_pool_mutex and wq->mutex protected for writes. Either for reads. + * +@@ -136,7 +143,7 @@ enum { + * + * WQ: wq->mutex protected. + * +- * WR: wq->mutex protected for writes. Sched-RCU protected for reads. ++ * WR: wq->mutex protected for writes. RCU protected for reads. + * + * MD: wq_mayday_lock protected. + */ +@@ -183,7 +190,7 @@ struct worker_pool { + atomic_t nr_running ____cacheline_aligned_in_smp; + + /* +- * Destruction of pool is sched-RCU protected to allow dereferences ++ * Destruction of pool is RCU protected to allow dereferences + * from get_work_pool(). + */ + struct rcu_head rcu; +@@ -212,7 +219,7 @@ struct pool_workqueue { + /* + * Release of unbound pwq is punted to system_wq. See put_pwq() + * and pwq_unbound_release_workfn() for details. pool_workqueue +- * itself is also sched-RCU protected so that the first pwq can be ++ * itself is also RCU protected so that the first pwq can be + * determined without grabbing wq->mutex. + */ + struct work_struct unbound_release_work; +@@ -350,6 +357,8 @@ EXPORT_SYMBOL_GPL(system_power_efficient_wq); + struct workqueue_struct *system_freezable_power_efficient_wq __read_mostly; + EXPORT_SYMBOL_GPL(system_freezable_power_efficient_wq); + ++static DEFINE_LOCAL_IRQ_LOCK(pendingb_lock); ++ + static int worker_thread(void *__worker); + static void workqueue_sysfs_unregister(struct workqueue_struct *wq); + +@@ -357,20 +366,20 @@ static void workqueue_sysfs_unregister(struct workqueue_struct *wq); + #include + + #define assert_rcu_or_pool_mutex() \ +- RCU_LOCKDEP_WARN(!rcu_read_lock_sched_held() && \ ++ RCU_LOCKDEP_WARN(!rcu_read_lock_held() && \ + !lockdep_is_held(&wq_pool_mutex), \ +- "sched RCU or wq_pool_mutex should be held") ++ "RCU or wq_pool_mutex should be held") + + #define assert_rcu_or_wq_mutex(wq) \ +- RCU_LOCKDEP_WARN(!rcu_read_lock_sched_held() && \ ++ RCU_LOCKDEP_WARN(!rcu_read_lock_held() && \ + !lockdep_is_held(&wq->mutex), \ +- "sched RCU or wq->mutex should be held") ++ "RCU or wq->mutex should be held") + + #define assert_rcu_or_wq_mutex_or_pool_mutex(wq) \ +- RCU_LOCKDEP_WARN(!rcu_read_lock_sched_held() && \ ++ RCU_LOCKDEP_WARN(!rcu_read_lock_held() && \ + !lockdep_is_held(&wq->mutex) && \ + !lockdep_is_held(&wq_pool_mutex), \ +- "sched RCU, wq->mutex or wq_pool_mutex should be held") ++ "RCU, wq->mutex or wq_pool_mutex should be held") + + #define for_each_cpu_worker_pool(pool, cpu) \ + for ((pool) = &per_cpu(cpu_worker_pools, cpu)[0]; \ +@@ -382,7 +391,7 @@ static void workqueue_sysfs_unregister(struct workqueue_struct *wq); + * @pool: iteration cursor + * @pi: integer used for iteration + * +- * This must be called either with wq_pool_mutex held or sched RCU read ++ * This must be called either with wq_pool_mutex held or RCU read + * locked. If the pool needs to be used beyond the locking in effect, the + * caller is responsible for guaranteeing that the pool stays online. + * +@@ -414,7 +423,7 @@ static void workqueue_sysfs_unregister(struct workqueue_struct *wq); + * @pwq: iteration cursor + * @wq: the target workqueue + * +- * This must be called either with wq->mutex held or sched RCU read locked. ++ * This must be called either with wq->mutex held or RCU read locked. + * If the pwq needs to be used beyond the locking in effect, the caller is + * responsible for guaranteeing that the pwq stays online. + * +@@ -426,6 +435,31 @@ static void workqueue_sysfs_unregister(struct workqueue_struct *wq); + if (({ assert_rcu_or_wq_mutex(wq); false; })) { } \ + else + ++#ifdef CONFIG_PREEMPT_RT_BASE ++static inline void rt_lock_idle_list(struct worker_pool *pool) ++{ ++ preempt_disable(); ++} ++static inline void rt_unlock_idle_list(struct worker_pool *pool) ++{ ++ preempt_enable(); ++} ++static inline void sched_lock_idle_list(struct worker_pool *pool) { } ++static inline void sched_unlock_idle_list(struct worker_pool *pool) { } ++#else ++static inline void rt_lock_idle_list(struct worker_pool *pool) { } ++static inline void rt_unlock_idle_list(struct worker_pool *pool) { } ++static inline void sched_lock_idle_list(struct worker_pool *pool) ++{ ++ spin_lock_irq(&pool->lock); ++} ++static inline void sched_unlock_idle_list(struct worker_pool *pool) ++{ ++ spin_unlock_irq(&pool->lock); ++} ++#endif ++ ++ + #ifdef CONFIG_DEBUG_OBJECTS_WORK + + static struct debug_obj_descr work_debug_descr; +@@ -550,7 +584,7 @@ static int worker_pool_assign_id(struct worker_pool *pool) + * @wq: the target workqueue + * @node: the node ID + * +- * This must be called with any of wq_pool_mutex, wq->mutex or sched RCU ++ * This must be called with any of wq_pool_mutex, wq->mutex or RCU + * read locked. + * If the pwq needs to be used beyond the locking in effect, the caller is + * responsible for guaranteeing that the pwq stays online. +@@ -694,8 +728,8 @@ static struct pool_workqueue *get_work_pwq(struct work_struct *work) + * @work: the work item of interest + * + * Pools are created and destroyed under wq_pool_mutex, and allows read +- * access under sched-RCU read lock. As such, this function should be +- * called under wq_pool_mutex or with preemption disabled. ++ * access under RCU read lock. As such, this function should be ++ * called under wq_pool_mutex or inside of a rcu_read_lock() region. + * + * All fields of the returned pool are accessible as long as the above + * mentioned locking is in effect. If the returned pool needs to be used +@@ -832,50 +866,45 @@ static struct worker *first_idle_worker(struct worker_pool *pool) + */ + static void wake_up_worker(struct worker_pool *pool) + { +- struct worker *worker = first_idle_worker(pool); ++ struct worker *worker; ++ ++ rt_lock_idle_list(pool); ++ ++ worker = first_idle_worker(pool); + + if (likely(worker)) + wake_up_process(worker->task); ++ ++ rt_unlock_idle_list(pool); + } + + /** +- * wq_worker_waking_up - a worker is waking up ++ * wq_worker_running - a worker is running again + * @task: task waking up +- * @cpu: CPU @task is waking up to + * +- * This function is called during try_to_wake_up() when a worker is +- * being awoken. +- * +- * CONTEXT: +- * spin_lock_irq(rq->lock) ++ * This function is called when a worker returns from schedule() + */ +-void wq_worker_waking_up(struct task_struct *task, int cpu) ++void wq_worker_running(struct task_struct *task) + { + struct worker *worker = kthread_data(task); + +- if (!(worker->flags & WORKER_NOT_RUNNING)) { +- WARN_ON_ONCE(worker->pool->cpu != cpu); ++ if (!worker->sleeping) ++ return; ++ if (!(worker->flags & WORKER_NOT_RUNNING)) + atomic_inc(&worker->pool->nr_running); +- } ++ worker->sleeping = 0; + } + + /** + * wq_worker_sleeping - a worker is going to sleep + * @task: task going to sleep + * +- * This function is called during schedule() when a busy worker is +- * going to sleep. Worker on the same cpu can be woken up by +- * returning pointer to its task. +- * +- * CONTEXT: +- * spin_lock_irq(rq->lock) +- * +- * Return: +- * Worker task on @cpu to wake up, %NULL if none. ++ * This function is called from schedule() when a busy worker is ++ * going to sleep. + */ +-struct task_struct *wq_worker_sleeping(struct task_struct *task) ++void wq_worker_sleeping(struct task_struct *task) + { +- struct worker *worker = kthread_data(task), *to_wakeup = NULL; ++ struct worker *worker = kthread_data(task); + struct worker_pool *pool; + + /* +@@ -884,29 +913,26 @@ struct task_struct *wq_worker_sleeping(struct task_struct *task) + * checking NOT_RUNNING. + */ + if (worker->flags & WORKER_NOT_RUNNING) +- return NULL; ++ return; + + pool = worker->pool; + +- /* this can only happen on the local cpu */ +- if (WARN_ON_ONCE(pool->cpu != raw_smp_processor_id())) +- return NULL; ++ if (WARN_ON_ONCE(worker->sleeping)) ++ return; ++ ++ worker->sleeping = 1; + + /* + * The counterpart of the following dec_and_test, implied mb, + * worklist not empty test sequence is in insert_work(). + * Please read comment there. +- * +- * NOT_RUNNING is clear. This means that we're bound to and +- * running on the local cpu w/ rq lock held and preemption +- * disabled, which in turn means that none else could be +- * manipulating idle_list, so dereferencing idle_list without pool +- * lock is safe. + */ + if (atomic_dec_and_test(&pool->nr_running) && +- !list_empty(&pool->worklist)) +- to_wakeup = first_idle_worker(pool); +- return to_wakeup ? to_wakeup->task : NULL; ++ !list_empty(&pool->worklist)) { ++ sched_lock_idle_list(pool); ++ wake_up_worker(pool); ++ sched_unlock_idle_list(pool); ++ } + } + + /** +@@ -1100,12 +1126,14 @@ static void put_pwq_unlocked(struct pool_workqueue *pwq) + { + if (pwq) { + /* +- * As both pwqs and pools are sched-RCU protected, the ++ * As both pwqs and pools are RCU protected, the + * following lock operations are safe. + */ +- spin_lock_irq(&pwq->pool->lock); ++ rcu_read_lock(); ++ local_spin_lock_irq(pendingb_lock, &pwq->pool->lock); + put_pwq(pwq); +- spin_unlock_irq(&pwq->pool->lock); ++ local_spin_unlock_irq(pendingb_lock, &pwq->pool->lock); ++ rcu_read_unlock(); + } + } + +@@ -1209,7 +1237,7 @@ static int try_to_grab_pending(struct work_struct *work, bool is_dwork, + struct worker_pool *pool; + struct pool_workqueue *pwq; + +- local_irq_save(*flags); ++ local_lock_irqsave(pendingb_lock, *flags); + + /* try to steal the timer if it exists */ + if (is_dwork) { +@@ -1228,6 +1256,7 @@ static int try_to_grab_pending(struct work_struct *work, bool is_dwork, + if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) + return 0; + ++ rcu_read_lock(); + /* + * The queueing is in progress, or it is already queued. Try to + * steal it from ->worklist without clearing WORK_STRUCT_PENDING. +@@ -1266,14 +1295,16 @@ static int try_to_grab_pending(struct work_struct *work, bool is_dwork, + set_work_pool_and_keep_pending(work, pool->id); + + spin_unlock(&pool->lock); ++ rcu_read_unlock(); + return 1; + } + spin_unlock(&pool->lock); + fail: +- local_irq_restore(*flags); ++ rcu_read_unlock(); ++ local_unlock_irqrestore(pendingb_lock, *flags); + if (work_is_canceling(work)) + return -ENOENT; +- cpu_relax(); ++ cpu_chill(); + return -EAGAIN; + } + +@@ -1375,7 +1406,13 @@ static void __queue_work(int cpu, struct workqueue_struct *wq, + * queued or lose PENDING. Grabbing PENDING and queueing should + * happen with IRQ disabled. + */ ++#ifndef CONFIG_PREEMPT_RT_FULL ++ /* ++ * nort: On RT the "interrupts-disabled" rule has been replaced with ++ * pendingb_lock. ++ */ + lockdep_assert_irqs_disabled(); ++#endif + + debug_work_activate(work); + +@@ -1383,6 +1420,7 @@ static void __queue_work(int cpu, struct workqueue_struct *wq, + if (unlikely(wq->flags & __WQ_DRAINING) && + WARN_ON_ONCE(!is_chained_work(wq))) + return; ++ rcu_read_lock(); + retry: + if (req_cpu == WORK_CPU_UNBOUND) + cpu = wq_select_unbound_cpu(raw_smp_processor_id()); +@@ -1439,10 +1477,8 @@ static void __queue_work(int cpu, struct workqueue_struct *wq, + /* pwq determined, queue */ + trace_workqueue_queue_work(req_cpu, pwq, work); + +- if (WARN_ON(!list_empty(&work->entry))) { +- spin_unlock(&pwq->pool->lock); +- return; +- } ++ if (WARN_ON(!list_empty(&work->entry))) ++ goto out; + + pwq->nr_in_flight[pwq->work_color]++; + work_flags = work_color_to_flags(pwq->work_color); +@@ -1460,7 +1496,9 @@ static void __queue_work(int cpu, struct workqueue_struct *wq, + + insert_work(pwq, work, worklist, work_flags); + ++out: + spin_unlock(&pwq->pool->lock); ++ rcu_read_unlock(); + } + + /** +@@ -1480,14 +1518,14 @@ bool queue_work_on(int cpu, struct workqueue_struct *wq, + bool ret = false; + unsigned long flags; + +- local_irq_save(flags); ++ local_lock_irqsave(pendingb_lock,flags); + + if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) { + __queue_work(cpu, wq, work); + ret = true; + } + +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + return ret; + } + EXPORT_SYMBOL(queue_work_on); +@@ -1496,8 +1534,11 @@ void delayed_work_timer_fn(struct timer_list *t) + { + struct delayed_work *dwork = from_timer(dwork, t, timer); + ++ /* XXX */ ++ /* local_lock(pendingb_lock); */ + /* should have been called from irqsafe timer with irq already off */ + __queue_work(dwork->cpu, dwork->wq, &dwork->work); ++ /* local_unlock(pendingb_lock); */ + } + EXPORT_SYMBOL(delayed_work_timer_fn); + +@@ -1552,14 +1593,14 @@ bool queue_delayed_work_on(int cpu, struct workqueue_struct *wq, + unsigned long flags; + + /* read the comment in __queue_work() */ +- local_irq_save(flags); ++ local_lock_irqsave(pendingb_lock, flags); + + if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) { + __queue_delayed_work(cpu, wq, dwork, delay); + ret = true; + } + +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + return ret; + } + EXPORT_SYMBOL(queue_delayed_work_on); +@@ -1594,7 +1635,7 @@ bool mod_delayed_work_on(int cpu, struct workqueue_struct *wq, + + if (likely(ret >= 0)) { + __queue_delayed_work(cpu, wq, dwork, delay); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + } + + /* -ENOENT from try_to_grab_pending() becomes %true */ +@@ -1605,11 +1646,12 @@ EXPORT_SYMBOL_GPL(mod_delayed_work_on); + static void rcu_work_rcufn(struct rcu_head *rcu) + { + struct rcu_work *rwork = container_of(rcu, struct rcu_work, rcu); ++ unsigned long flags; + + /* read the comment in __queue_work() */ +- local_irq_disable(); ++ local_lock_irqsave(pendingb_lock, flags); + __queue_work(WORK_CPU_UNBOUND, rwork->wq, &rwork->work); +- local_irq_enable(); ++ local_unlock_irqrestore(pendingb_lock, flags); + } + + /** +@@ -1661,7 +1703,9 @@ static void worker_enter_idle(struct worker *worker) + worker->last_active = jiffies; + + /* idle_list is LIFO */ ++ rt_lock_idle_list(pool); + list_add(&worker->entry, &pool->idle_list); ++ rt_unlock_idle_list(pool); + + if (too_many_workers(pool) && !timer_pending(&pool->idle_timer)) + mod_timer(&pool->idle_timer, jiffies + IDLE_WORKER_TIMEOUT); +@@ -1694,7 +1738,9 @@ static void worker_leave_idle(struct worker *worker) + return; + worker_clr_flags(worker, WORKER_IDLE); + pool->nr_idle--; ++ rt_lock_idle_list(pool); + list_del_init(&worker->entry); ++ rt_unlock_idle_list(pool); + } + + static struct worker *alloc_worker(int node) +@@ -1862,7 +1908,9 @@ static void destroy_worker(struct worker *worker) + pool->nr_workers--; + pool->nr_idle--; + ++ rt_lock_idle_list(pool); + list_del_init(&worker->entry); ++ rt_unlock_idle_list(pool); + worker->flags |= WORKER_DIE; + wake_up_process(worker->task); + } +@@ -2855,14 +2903,14 @@ static bool start_flush_work(struct work_struct *work, struct wq_barrier *barr, + + might_sleep(); + +- local_irq_disable(); ++ rcu_read_lock(); + pool = get_work_pool(work); + if (!pool) { +- local_irq_enable(); ++ rcu_read_unlock(); + return false; + } + +- spin_lock(&pool->lock); ++ spin_lock_irq(&pool->lock); + /* see the comment in try_to_grab_pending() with the same code */ + pwq = get_work_pwq(work); + if (pwq) { +@@ -2894,10 +2942,11 @@ static bool start_flush_work(struct work_struct *work, struct wq_barrier *barr, + lock_map_acquire(&pwq->wq->lockdep_map); + lock_map_release(&pwq->wq->lockdep_map); + } +- ++ rcu_read_unlock(); + return true; + already_gone: + spin_unlock_irq(&pool->lock); ++ rcu_read_unlock(); + return false; + } + +@@ -2997,7 +3046,7 @@ static bool __cancel_work_timer(struct work_struct *work, bool is_dwork) + + /* tell other tasks trying to grab @work to back off */ + mark_work_canceling(work); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + + /* + * This allows canceling during early boot. We know that @work +@@ -3058,10 +3107,10 @@ EXPORT_SYMBOL_GPL(cancel_work_sync); + */ + bool flush_delayed_work(struct delayed_work *dwork) + { +- local_irq_disable(); ++ local_lock_irq(pendingb_lock); + if (del_timer_sync(&dwork->timer)) + __queue_work(dwork->cpu, dwork->wq, &dwork->work); +- local_irq_enable(); ++ local_unlock_irq(pendingb_lock); + return flush_work(&dwork->work); + } + EXPORT_SYMBOL(flush_delayed_work); +@@ -3099,7 +3148,7 @@ static bool __cancel_work(struct work_struct *work, bool is_dwork) + return false; + + set_work_pool_and_clear_pending(work, get_work_pool_id(work)); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + return ret; + } + +@@ -3344,7 +3393,7 @@ static void rcu_free_pool(struct rcu_head *rcu) + * put_unbound_pool - put a worker_pool + * @pool: worker_pool to put + * +- * Put @pool. If its refcnt reaches zero, it gets destroyed in sched-RCU ++ * Put @pool. If its refcnt reaches zero, it gets destroyed in RCU + * safe manner. get_unbound_pool() calls this function on its failure path + * and this function should be able to release pools which went through, + * successfully or not, init_worker_pool(). +@@ -3398,8 +3447,8 @@ static void put_unbound_pool(struct worker_pool *pool) + del_timer_sync(&pool->idle_timer); + del_timer_sync(&pool->mayday_timer); + +- /* sched-RCU protected to allow dereferences from get_work_pool() */ +- call_rcu_sched(&pool->rcu, rcu_free_pool); ++ /* RCU protected to allow dereferences from get_work_pool() */ ++ call_rcu(&pool->rcu, rcu_free_pool); + } + + /** +@@ -3506,14 +3555,14 @@ static void pwq_unbound_release_workfn(struct work_struct *work) + put_unbound_pool(pool); + mutex_unlock(&wq_pool_mutex); + +- call_rcu_sched(&pwq->rcu, rcu_free_pwq); ++ call_rcu(&pwq->rcu, rcu_free_pwq); + + /* + * If we're the last pwq going away, @wq is already dead and no one + * is gonna access it anymore. Schedule RCU free. + */ + if (is_last) +- call_rcu_sched(&wq->rcu, rcu_free_wq); ++ call_rcu(&wq->rcu, rcu_free_wq); + } + + /** +@@ -4198,7 +4247,7 @@ void destroy_workqueue(struct workqueue_struct *wq) + * The base ref is never dropped on per-cpu pwqs. Directly + * schedule RCU free. + */ +- call_rcu_sched(&wq->rcu, rcu_free_wq); ++ call_rcu(&wq->rcu, rcu_free_wq); + } else { + /* + * We're the sole accessor of @wq at this point. Directly +@@ -4308,7 +4357,8 @@ bool workqueue_congested(int cpu, struct workqueue_struct *wq) + struct pool_workqueue *pwq; + bool ret; + +- rcu_read_lock_sched(); ++ rcu_read_lock(); ++ preempt_disable(); + + if (cpu == WORK_CPU_UNBOUND) + cpu = smp_processor_id(); +@@ -4319,7 +4369,8 @@ bool workqueue_congested(int cpu, struct workqueue_struct *wq) + pwq = unbound_pwq_by_node(wq, cpu_to_node(cpu)); + + ret = !list_empty(&pwq->delayed_works); +- rcu_read_unlock_sched(); ++ preempt_enable(); ++ rcu_read_unlock(); + + return ret; + } +@@ -4345,15 +4396,15 @@ unsigned int work_busy(struct work_struct *work) + if (work_pending(work)) + ret |= WORK_BUSY_PENDING; + +- local_irq_save(flags); ++ rcu_read_lock(); + pool = get_work_pool(work); + if (pool) { +- spin_lock(&pool->lock); ++ spin_lock_irqsave(&pool->lock, flags); + if (find_worker_executing_work(pool, work)) + ret |= WORK_BUSY_RUNNING; +- spin_unlock(&pool->lock); ++ spin_unlock_irqrestore(&pool->lock, flags); + } +- local_irq_restore(flags); ++ rcu_read_unlock(); + + return ret; + } +@@ -4537,7 +4588,7 @@ void show_workqueue_state(void) + unsigned long flags; + int pi; + +- rcu_read_lock_sched(); ++ rcu_read_lock(); + + pr_info("Showing busy workqueues and worker pools:\n"); + +@@ -4602,7 +4653,7 @@ void show_workqueue_state(void) + touch_nmi_watchdog(); + } + +- rcu_read_unlock_sched(); ++ rcu_read_unlock(); + } + + /* used to show worker information through /proc/PID/{comm,stat,status} */ +@@ -4989,16 +5040,16 @@ bool freeze_workqueues_busy(void) + * nr_active is monotonically decreasing. It's safe + * to peek without lock. + */ +- rcu_read_lock_sched(); ++ rcu_read_lock(); + for_each_pwq(pwq, wq) { + WARN_ON_ONCE(pwq->nr_active < 0); + if (pwq->nr_active) { + busy = true; +- rcu_read_unlock_sched(); ++ rcu_read_unlock(); + goto out_unlock; + } + } +- rcu_read_unlock_sched(); ++ rcu_read_unlock(); + } + out_unlock: + mutex_unlock(&wq_pool_mutex); +@@ -5193,7 +5244,8 @@ static ssize_t wq_pool_ids_show(struct device *dev, + const char *delim = ""; + int node, written = 0; + +- rcu_read_lock_sched(); ++ get_online_cpus(); ++ rcu_read_lock(); + for_each_node(node) { + written += scnprintf(buf + written, PAGE_SIZE - written, + "%s%d:%d", delim, node, +@@ -5201,7 +5253,8 @@ static ssize_t wq_pool_ids_show(struct device *dev, + delim = " "; + } + written += scnprintf(buf + written, PAGE_SIZE - written, "\n"); +- rcu_read_unlock_sched(); ++ rcu_read_unlock(); ++ put_online_cpus(); + + return written; + } +diff --git a/kernel/workqueue_internal.h b/kernel/workqueue_internal.h +index 66fbb5a9e633..30cfed226b39 100644 +--- a/kernel/workqueue_internal.h ++++ b/kernel/workqueue_internal.h +@@ -44,6 +44,7 @@ struct worker { + unsigned long last_active; /* L: last active timestamp */ + unsigned int flags; /* X: flags */ + int id; /* I: worker id */ ++ int sleeping; /* None */ + + /* + * Opaque string set with work_set_desc(). Printed out with task +@@ -69,7 +70,7 @@ static inline struct worker *current_wq_worker(void) + * Scheduler hooks for concurrency managed workqueue. Only to be used from + * sched/core.c and workqueue.c. + */ +-void wq_worker_waking_up(struct task_struct *task, int cpu); +-struct task_struct *wq_worker_sleeping(struct task_struct *task); ++void wq_worker_running(struct task_struct *task); ++void wq_worker_sleeping(struct task_struct *task); + + #endif /* _KERNEL_WORKQUEUE_INTERNAL_H */ +diff --git a/lib/Kconfig b/lib/Kconfig +index a3928d4438b5..a50b2158f7cd 100644 +--- a/lib/Kconfig ++++ b/lib/Kconfig +@@ -441,6 +441,7 @@ config CHECK_SIGNATURE + + config CPUMASK_OFFSTACK + bool "Force CPU masks off stack" if DEBUG_PER_CPU_MAPS ++ depends on !PREEMPT_RT_FULL + help + Use dynamic allocation for cpumask_var_t, instead of putting + them on the stack. This is a bit more expensive, but avoids +diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug +index 3dea52f7be9c..1504e6aa8418 100644 +--- a/lib/Kconfig.debug ++++ b/lib/Kconfig.debug +@@ -1207,7 +1207,7 @@ config DEBUG_ATOMIC_SLEEP + + config DEBUG_LOCKING_API_SELFTESTS + bool "Locking API boot-time self-tests" +- depends on DEBUG_KERNEL ++ depends on DEBUG_KERNEL && !PREEMPT_RT_FULL + help + Say Y here if you want the kernel to run a short self-test during + bootup. The self-test checks whether common types of locking bugs +diff --git a/lib/debugobjects.c b/lib/debugobjects.c +index 14afeeb7d6ef..e28481c402ae 100644 +--- a/lib/debugobjects.c ++++ b/lib/debugobjects.c +@@ -376,7 +376,10 @@ __debug_object_init(void *addr, struct debug_obj_descr *descr, int onstack) + struct debug_obj *obj; + unsigned long flags; + +- fill_pool(); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (preempt_count() == 0 && !irqs_disabled()) ++#endif ++ fill_pool(); + + db = get_bucket((unsigned long) addr); + +diff --git a/lib/irq_poll.c b/lib/irq_poll.c +index 86a709954f5a..9c069ef83d6d 100644 +--- a/lib/irq_poll.c ++++ b/lib/irq_poll.c +@@ -37,6 +37,7 @@ void irq_poll_sched(struct irq_poll *iop) + list_add_tail(&iop->list, this_cpu_ptr(&blk_cpu_iopoll)); + __raise_softirq_irqoff(IRQ_POLL_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(irq_poll_sched); + +@@ -72,6 +73,7 @@ void irq_poll_complete(struct irq_poll *iop) + local_irq_save(flags); + __irq_poll_complete(iop); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(irq_poll_complete); + +@@ -96,6 +98,7 @@ static void __latent_entropy irq_poll_softirq(struct softirq_action *h) + } + + local_irq_enable(); ++ preempt_check_resched_rt(); + + /* Even though interrupts have been re-enabled, this + * access is safe because interrupts can only add new +@@ -133,6 +136,7 @@ static void __latent_entropy irq_poll_softirq(struct softirq_action *h) + __raise_softirq_irqoff(IRQ_POLL_SOFTIRQ); + + local_irq_enable(); ++ preempt_check_resched_rt(); + } + + /** +@@ -196,6 +200,7 @@ static int irq_poll_cpu_dead(unsigned int cpu) + this_cpu_ptr(&blk_cpu_iopoll)); + __raise_softirq_irqoff(IRQ_POLL_SOFTIRQ); + local_irq_enable(); ++ preempt_check_resched_rt(); + + return 0; + } +diff --git a/lib/locking-selftest.c b/lib/locking-selftest.c +index 1e1bbf171eca..32db9532ddd4 100644 +--- a/lib/locking-selftest.c ++++ b/lib/locking-selftest.c +@@ -742,6 +742,8 @@ GENERATE_TESTCASE(init_held_rtmutex); + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_hard_rlock) + +@@ -757,9 +759,12 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_soft_rlock) + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Enabling hardirqs with a softirq-safe lock held: + */ +@@ -792,6 +797,8 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2A_rlock) + #undef E1 + #undef E2 + ++#endif ++ + /* + * Enabling irqs with an irq-safe lock held: + */ +@@ -815,6 +822,8 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2A_rlock) + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_hard_rlock) + +@@ -830,6 +839,8 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_soft_rlock) + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + +@@ -861,6 +872,8 @@ GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_soft_wlock) + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_hard_rlock) + +@@ -876,6 +889,8 @@ GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_soft_rlock) + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + #undef E3 +@@ -909,6 +924,8 @@ GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_soft_wlock) + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_hard_rlock) + +@@ -924,10 +941,14 @@ GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_soft_rlock) + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + #undef E3 + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + /* + * read-lock / write-lock irq inversion. + * +@@ -990,6 +1011,10 @@ GENERATE_PERMUTATIONS_3_EVENTS(irq_inversion_soft_wlock) + #undef E2 + #undef E3 + ++#endif ++ ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + /* + * read-lock / write-lock recursion that is actually safe. + */ +@@ -1028,6 +1053,8 @@ GENERATE_PERMUTATIONS_3_EVENTS(irq_read_recursion_soft) + #undef E2 + #undef E3 + ++#endif ++ + /* + * read-lock / write-lock recursion that is unsafe. + */ +@@ -2057,6 +2084,7 @@ void locking_selftest(void) + + printk(" --------------------------------------------------------------------------\n"); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * irq-context testcases: + */ +@@ -2069,6 +2097,28 @@ void locking_selftest(void) + + DO_TESTCASE_6x2("irq read-recursion", irq_read_recursion); + // DO_TESTCASE_6x2B("irq read-recursion #2", irq_read_recursion2); ++#else ++ /* On -rt, we only do hardirq context test for raw spinlock */ ++ DO_TESTCASE_1B("hard-irqs-on + irq-safe-A", irqsafe1_hard_spin, 12); ++ DO_TESTCASE_1B("hard-irqs-on + irq-safe-A", irqsafe1_hard_spin, 21); ++ ++ DO_TESTCASE_1B("hard-safe-A + irqs-on", irqsafe2B_hard_spin, 12); ++ DO_TESTCASE_1B("hard-safe-A + irqs-on", irqsafe2B_hard_spin, 21); ++ ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 123); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 132); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 213); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 231); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 312); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 321); ++ ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 123); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 132); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 213); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 231); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 312); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 321); ++#endif + + ww_tests(); + +diff --git a/lib/radix-tree.c b/lib/radix-tree.c +index bc03ecc4dfd2..44257463f683 100644 +--- a/lib/radix-tree.c ++++ b/lib/radix-tree.c +@@ -38,7 +38,7 @@ + #include + #include + #include +- ++#include + + /* Number of nodes in fully populated tree of given height */ + static unsigned long height_to_maxnodes[RADIX_TREE_MAX_PATH + 1] __read_mostly; +@@ -87,6 +87,7 @@ struct radix_tree_preload { + struct radix_tree_node *nodes; + }; + static DEFINE_PER_CPU(struct radix_tree_preload, radix_tree_preloads) = { 0, }; ++static DEFINE_LOCAL_IRQ_LOCK(radix_tree_preloads_lock); + + static inline struct radix_tree_node *entry_to_node(void *ptr) + { +@@ -405,12 +406,13 @@ radix_tree_node_alloc(gfp_t gfp_mask, struct radix_tree_node *parent, + * succeed in getting a node here (and never reach + * kmem_cache_alloc) + */ +- rtp = this_cpu_ptr(&radix_tree_preloads); ++ rtp = &get_locked_var(radix_tree_preloads_lock, radix_tree_preloads); + if (rtp->nr) { + ret = rtp->nodes; + rtp->nodes = ret->parent; + rtp->nr--; + } ++ put_locked_var(radix_tree_preloads_lock, radix_tree_preloads); + /* + * Update the allocation stack trace as this is more useful + * for debugging. +@@ -476,14 +478,14 @@ static __must_check int __radix_tree_preload(gfp_t gfp_mask, unsigned nr) + */ + gfp_mask &= ~__GFP_ACCOUNT; + +- preempt_disable(); ++ local_lock(radix_tree_preloads_lock); + rtp = this_cpu_ptr(&radix_tree_preloads); + while (rtp->nr < nr) { +- preempt_enable(); ++ local_unlock(radix_tree_preloads_lock); + node = kmem_cache_alloc(radix_tree_node_cachep, gfp_mask); + if (node == NULL) + goto out; +- preempt_disable(); ++ local_lock(radix_tree_preloads_lock); + rtp = this_cpu_ptr(&radix_tree_preloads); + if (rtp->nr < nr) { + node->parent = rtp->nodes; +@@ -525,7 +527,7 @@ int radix_tree_maybe_preload(gfp_t gfp_mask) + if (gfpflags_allow_blocking(gfp_mask)) + return __radix_tree_preload(gfp_mask, RADIX_TREE_PRELOAD_SIZE); + /* Preloading doesn't help anything with this gfp mask, skip it */ +- preempt_disable(); ++ local_lock(radix_tree_preloads_lock); + return 0; + } + EXPORT_SYMBOL(radix_tree_maybe_preload); +@@ -563,7 +565,7 @@ int radix_tree_maybe_preload_order(gfp_t gfp_mask, int order) + + /* Preloading doesn't help anything with this gfp mask, skip it */ + if (!gfpflags_allow_blocking(gfp_mask)) { +- preempt_disable(); ++ local_lock(radix_tree_preloads_lock); + return 0; + } + +@@ -597,6 +599,12 @@ int radix_tree_maybe_preload_order(gfp_t gfp_mask, int order) + return __radix_tree_preload(gfp_mask, nr_nodes); + } + ++void radix_tree_preload_end(void) ++{ ++ local_unlock(radix_tree_preloads_lock); ++} ++EXPORT_SYMBOL(radix_tree_preload_end); ++ + static unsigned radix_tree_load_root(const struct radix_tree_root *root, + struct radix_tree_node **nodep, unsigned long *maxindex) + { +@@ -2102,10 +2110,16 @@ EXPORT_SYMBOL(radix_tree_tagged); + void idr_preload(gfp_t gfp_mask) + { + if (__radix_tree_preload(gfp_mask, IDR_PRELOAD_SIZE)) +- preempt_disable(); ++ local_lock(radix_tree_preloads_lock); + } + EXPORT_SYMBOL(idr_preload); + ++void idr_preload_end(void) ++{ ++ local_unlock(radix_tree_preloads_lock); ++} ++EXPORT_SYMBOL(idr_preload_end); ++ + int ida_pre_get(struct ida *ida, gfp_t gfp) + { + /* +@@ -2114,7 +2128,7 @@ int ida_pre_get(struct ida *ida, gfp_t gfp) + * to return to the ida_pre_get() step. + */ + if (!__radix_tree_preload(gfp, IDA_PRELOAD_SIZE)) +- preempt_enable(); ++ local_unlock(radix_tree_preloads_lock); + + if (!this_cpu_read(ida_bitmap)) { + struct ida_bitmap *bitmap = kzalloc(sizeof(*bitmap), gfp); +diff --git a/lib/scatterlist.c b/lib/scatterlist.c +index 7c6096a71704..5c2c68962709 100644 +--- a/lib/scatterlist.c ++++ b/lib/scatterlist.c +@@ -776,7 +776,7 @@ void sg_miter_stop(struct sg_mapping_iter *miter) + flush_kernel_dcache_page(miter->page); + + if (miter->__flags & SG_MITER_ATOMIC) { +- WARN_ON_ONCE(preemptible()); ++ WARN_ON_ONCE(!pagefault_disabled()); + kunmap_atomic(miter->addr); + } else + kunmap(miter->page); +diff --git a/lib/smp_processor_id.c b/lib/smp_processor_id.c +index 85925aaa4fff..fb35c45b9421 100644 +--- a/lib/smp_processor_id.c ++++ b/lib/smp_processor_id.c +@@ -22,7 +22,7 @@ notrace static unsigned int check_preemption_disabled(const char *what1, + * Kernel threads bound to a single CPU can safely use + * smp_processor_id(): + */ +- if (cpumask_equal(¤t->cpus_allowed, cpumask_of(this_cpu))) ++ if (cpumask_equal(current->cpus_ptr, cpumask_of(this_cpu))) + goto out; + + /* +diff --git a/localversion-rt b/localversion-rt +new file mode 100644 +index 000000000000..b2111a212663 +--- /dev/null ++++ b/localversion-rt +@@ -0,0 +1 @@ ++-rt24 +diff --git a/mm/Kconfig b/mm/Kconfig +index b457e94ae618..0dddbb2a3282 100644 +--- a/mm/Kconfig ++++ b/mm/Kconfig +@@ -377,7 +377,7 @@ config NOMMU_INITIAL_TRIM_EXCESS + + config TRANSPARENT_HUGEPAGE + bool "Transparent Hugepage Support" +- depends on HAVE_ARCH_TRANSPARENT_HUGEPAGE ++ depends on HAVE_ARCH_TRANSPARENT_HUGEPAGE && !PREEMPT_RT_FULL + select COMPACTION + select RADIX_TREE_MULTIORDER + help +diff --git a/mm/compaction.c b/mm/compaction.c +index faca45ebe62d..f8ccb9d9daa3 100644 +--- a/mm/compaction.c ++++ b/mm/compaction.c +@@ -1657,10 +1657,12 @@ static enum compact_result compact_zone(struct zone *zone, struct compact_contro + block_start_pfn(cc->migrate_pfn, cc->order); + + if (cc->last_migrated_pfn < current_block_start) { +- cpu = get_cpu(); ++ cpu = get_cpu_light(); ++ local_lock_irq(swapvec_lock); + lru_add_drain_cpu(cpu); ++ local_unlock_irq(swapvec_lock); + drain_local_pages(zone); +- put_cpu(); ++ put_cpu_light(); + /* No more flushing until we migrate again */ + cc->last_migrated_pfn = 0; + } +diff --git a/mm/highmem.c b/mm/highmem.c +index 59db3223a5d6..22aa3ddbd87b 100644 +--- a/mm/highmem.c ++++ b/mm/highmem.c +@@ -30,10 +30,11 @@ + #include + #include + +- ++#ifndef CONFIG_PREEMPT_RT_FULL + #if defined(CONFIG_HIGHMEM) || defined(CONFIG_X86_32) + DEFINE_PER_CPU(int, __kmap_atomic_idx); + #endif ++#endif + + /* + * Virtual_count is not a pure "count". +@@ -108,8 +109,9 @@ static inline wait_queue_head_t *get_pkmap_wait_queue_head(unsigned int color) + unsigned long totalhigh_pages __read_mostly; + EXPORT_SYMBOL(totalhigh_pages); + +- ++#ifndef CONFIG_PREEMPT_RT_FULL + EXPORT_PER_CPU_SYMBOL(__kmap_atomic_idx); ++#endif + + unsigned int nr_free_highpages (void) + { +diff --git a/mm/kasan/quarantine.c b/mm/kasan/quarantine.c +index 3a8ddf8baf7d..b209dbaefde8 100644 +--- a/mm/kasan/quarantine.c ++++ b/mm/kasan/quarantine.c +@@ -103,7 +103,7 @@ static int quarantine_head; + static int quarantine_tail; + /* Total size of all objects in global_quarantine across all batches. */ + static unsigned long quarantine_size; +-static DEFINE_SPINLOCK(quarantine_lock); ++static DEFINE_RAW_SPINLOCK(quarantine_lock); + DEFINE_STATIC_SRCU(remove_cache_srcu); + + /* Maximum size of the global queue. */ +@@ -190,7 +190,7 @@ void quarantine_put(struct kasan_free_meta *info, struct kmem_cache *cache) + if (unlikely(q->bytes > QUARANTINE_PERCPU_SIZE)) { + qlist_move_all(q, &temp); + +- spin_lock(&quarantine_lock); ++ raw_spin_lock(&quarantine_lock); + WRITE_ONCE(quarantine_size, quarantine_size + temp.bytes); + qlist_move_all(&temp, &global_quarantine[quarantine_tail]); + if (global_quarantine[quarantine_tail].bytes >= +@@ -203,7 +203,7 @@ void quarantine_put(struct kasan_free_meta *info, struct kmem_cache *cache) + if (new_tail != quarantine_head) + quarantine_tail = new_tail; + } +- spin_unlock(&quarantine_lock); ++ raw_spin_unlock(&quarantine_lock); + } + + local_irq_restore(flags); +@@ -230,7 +230,7 @@ void quarantine_reduce(void) + * expected case). + */ + srcu_idx = srcu_read_lock(&remove_cache_srcu); +- spin_lock_irqsave(&quarantine_lock, flags); ++ raw_spin_lock_irqsave(&quarantine_lock, flags); + + /* + * Update quarantine size in case of hotplug. Allocate a fraction of +@@ -254,7 +254,7 @@ void quarantine_reduce(void) + quarantine_head = 0; + } + +- spin_unlock_irqrestore(&quarantine_lock, flags); ++ raw_spin_unlock_irqrestore(&quarantine_lock, flags); + + qlist_free_all(&to_free, NULL); + srcu_read_unlock(&remove_cache_srcu, srcu_idx); +@@ -310,17 +310,17 @@ void quarantine_remove_cache(struct kmem_cache *cache) + */ + on_each_cpu(per_cpu_remove_cache, cache, 1); + +- spin_lock_irqsave(&quarantine_lock, flags); ++ raw_spin_lock_irqsave(&quarantine_lock, flags); + for (i = 0; i < QUARANTINE_BATCHES; i++) { + if (qlist_empty(&global_quarantine[i])) + continue; + qlist_move_cache(&global_quarantine[i], &to_free, cache); + /* Scanning whole quarantine can take a while. */ +- spin_unlock_irqrestore(&quarantine_lock, flags); ++ raw_spin_unlock_irqrestore(&quarantine_lock, flags); + cond_resched(); +- spin_lock_irqsave(&quarantine_lock, flags); ++ raw_spin_lock_irqsave(&quarantine_lock, flags); + } +- spin_unlock_irqrestore(&quarantine_lock, flags); ++ raw_spin_unlock_irqrestore(&quarantine_lock, flags); + + qlist_free_all(&to_free, cache); + +diff --git a/mm/kmemleak.c b/mm/kmemleak.c +index 72e3fb3bb037..0ed549045074 100644 +--- a/mm/kmemleak.c ++++ b/mm/kmemleak.c +@@ -26,7 +26,7 @@ + * + * The following locks and mutexes are used by kmemleak: + * +- * - kmemleak_lock (rwlock): protects the object_list modifications and ++ * - kmemleak_lock (raw spinlock): protects the object_list modifications and + * accesses to the object_tree_root. The object_list is the main list + * holding the metadata (struct kmemleak_object) for the allocated memory + * blocks. The object_tree_root is a red black tree used to look-up +@@ -197,7 +197,7 @@ static LIST_HEAD(gray_list); + /* search tree for object boundaries */ + static struct rb_root object_tree_root = RB_ROOT; + /* rw_lock protecting the access to object_list and object_tree_root */ +-static DEFINE_RWLOCK(kmemleak_lock); ++static DEFINE_RAW_SPINLOCK(kmemleak_lock); + + /* allocation caches for kmemleak internal data */ + static struct kmem_cache *object_cache; +@@ -491,9 +491,9 @@ static struct kmemleak_object *find_and_get_object(unsigned long ptr, int alias) + struct kmemleak_object *object; + + rcu_read_lock(); +- read_lock_irqsave(&kmemleak_lock, flags); ++ raw_spin_lock_irqsave(&kmemleak_lock, flags); + object = lookup_object(ptr, alias); +- read_unlock_irqrestore(&kmemleak_lock, flags); ++ raw_spin_unlock_irqrestore(&kmemleak_lock, flags); + + /* check whether the object is still available */ + if (object && !get_object(object)) +@@ -513,13 +513,13 @@ static struct kmemleak_object *find_and_remove_object(unsigned long ptr, int ali + unsigned long flags; + struct kmemleak_object *object; + +- write_lock_irqsave(&kmemleak_lock, flags); ++ raw_spin_lock_irqsave(&kmemleak_lock, flags); + object = lookup_object(ptr, alias); + if (object) { + rb_erase(&object->rb_node, &object_tree_root); + list_del_rcu(&object->object_list); + } +- write_unlock_irqrestore(&kmemleak_lock, flags); ++ raw_spin_unlock_irqrestore(&kmemleak_lock, flags); + + return object; + } +@@ -593,7 +593,7 @@ static struct kmemleak_object *create_object(unsigned long ptr, size_t size, + /* kernel backtrace */ + object->trace_len = __save_stack_trace(object->trace); + +- write_lock_irqsave(&kmemleak_lock, flags); ++ raw_spin_lock_irqsave(&kmemleak_lock, flags); + + min_addr = min(min_addr, ptr); + max_addr = max(max_addr, ptr + size); +@@ -624,7 +624,7 @@ static struct kmemleak_object *create_object(unsigned long ptr, size_t size, + + list_add_tail_rcu(&object->object_list, &object_list); + out: +- write_unlock_irqrestore(&kmemleak_lock, flags); ++ raw_spin_unlock_irqrestore(&kmemleak_lock, flags); + return object; + } + +@@ -1310,7 +1310,7 @@ static void scan_block(void *_start, void *_end, + unsigned long *end = _end - (BYTES_PER_POINTER - 1); + unsigned long flags; + +- read_lock_irqsave(&kmemleak_lock, flags); ++ raw_spin_lock_irqsave(&kmemleak_lock, flags); + for (ptr = start; ptr < end; ptr++) { + struct kmemleak_object *object; + unsigned long pointer; +@@ -1367,7 +1367,7 @@ static void scan_block(void *_start, void *_end, + spin_unlock(&object->lock); + } + } +- read_unlock_irqrestore(&kmemleak_lock, flags); ++ raw_spin_unlock_irqrestore(&kmemleak_lock, flags); + } + + /* +diff --git a/mm/memcontrol.c b/mm/memcontrol.c +index 7e7cc0cd89fe..d0f245d80f93 100644 +--- a/mm/memcontrol.c ++++ b/mm/memcontrol.c +@@ -69,6 +69,7 @@ + #include + #include + #include "slab.h" ++#include + + #include + +@@ -94,6 +95,8 @@ int do_swap_account __read_mostly; + #define do_swap_account 0 + #endif + ++static DEFINE_LOCAL_IRQ_LOCK(event_lock); ++ + /* Whether legacy memory+swap accounting is active */ + static bool do_memsw_account(void) + { +@@ -2063,7 +2066,7 @@ static void drain_all_stock(struct mem_cgroup *root_memcg) + * as well as workers from this path always operate on the local + * per-cpu data. CPU up doesn't touch memcg_stock at all. + */ +- curcpu = get_cpu(); ++ curcpu = get_cpu_light(); + for_each_online_cpu(cpu) { + struct memcg_stock_pcp *stock = &per_cpu(memcg_stock, cpu); + struct mem_cgroup *memcg; +@@ -2083,7 +2086,7 @@ static void drain_all_stock(struct mem_cgroup *root_memcg) + } + css_put(&memcg->css); + } +- put_cpu(); ++ put_cpu_light(); + mutex_unlock(&percpu_charge_mutex); + } + +@@ -4884,12 +4887,12 @@ static int mem_cgroup_move_account(struct page *page, + + ret = 0; + +- local_irq_disable(); ++ local_lock_irq(event_lock); + mem_cgroup_charge_statistics(to, page, compound, nr_pages); + memcg_check_events(to, page); + mem_cgroup_charge_statistics(from, page, compound, -nr_pages); + memcg_check_events(from, page); +- local_irq_enable(); ++ local_unlock_irq(event_lock); + out_unlock: + unlock_page(page); + out: +@@ -6008,10 +6011,10 @@ void mem_cgroup_commit_charge(struct page *page, struct mem_cgroup *memcg, + + commit_charge(page, memcg, lrucare); + +- local_irq_disable(); ++ local_lock_irq(event_lock); + mem_cgroup_charge_statistics(memcg, page, compound, nr_pages); + memcg_check_events(memcg, page); +- local_irq_enable(); ++ local_unlock_irq(event_lock); + + if (do_memsw_account() && PageSwapCache(page)) { + swp_entry_t entry = { .val = page_private(page) }; +@@ -6080,7 +6083,7 @@ static void uncharge_batch(const struct uncharge_gather *ug) + memcg_oom_recover(ug->memcg); + } + +- local_irq_save(flags); ++ local_lock_irqsave(event_lock, flags); + __mod_memcg_state(ug->memcg, MEMCG_RSS, -ug->nr_anon); + __mod_memcg_state(ug->memcg, MEMCG_CACHE, -ug->nr_file); + __mod_memcg_state(ug->memcg, MEMCG_RSS_HUGE, -ug->nr_huge); +@@ -6088,7 +6091,7 @@ static void uncharge_batch(const struct uncharge_gather *ug) + __count_memcg_events(ug->memcg, PGPGOUT, ug->pgpgout); + __this_cpu_add(ug->memcg->stat_cpu->nr_page_events, nr_pages); + memcg_check_events(ug->memcg, ug->dummy_page); +- local_irq_restore(flags); ++ local_unlock_irqrestore(event_lock, flags); + + if (!mem_cgroup_is_root(ug->memcg)) + css_put_many(&ug->memcg->css, nr_pages); +@@ -6251,10 +6254,10 @@ void mem_cgroup_migrate(struct page *oldpage, struct page *newpage) + + commit_charge(newpage, memcg, false); + +- local_irq_save(flags); ++ local_lock_irqsave(event_lock, flags); + mem_cgroup_charge_statistics(memcg, newpage, compound, nr_pages); + memcg_check_events(memcg, newpage); +- local_irq_restore(flags); ++ local_unlock_irqrestore(event_lock, flags); + } + + DEFINE_STATIC_KEY_FALSE(memcg_sockets_enabled_key); +@@ -6446,6 +6449,7 @@ void mem_cgroup_swapout(struct page *page, swp_entry_t entry) + struct mem_cgroup *memcg, *swap_memcg; + unsigned int nr_entries; + unsigned short oldid; ++ unsigned long flags; + + VM_BUG_ON_PAGE(PageLRU(page), page); + VM_BUG_ON_PAGE(page_count(page), page); +@@ -6491,13 +6495,17 @@ void mem_cgroup_swapout(struct page *page, swp_entry_t entry) + * important here to have the interrupts disabled because it is the + * only synchronisation we have for updating the per-CPU variables. + */ ++ local_lock_irqsave(event_lock, flags); ++#ifndef CONFIG_PREEMPT_RT_BASE + VM_BUG_ON(!irqs_disabled()); ++#endif + mem_cgroup_charge_statistics(memcg, page, PageTransHuge(page), + -nr_entries); + memcg_check_events(memcg, page); + + if (!mem_cgroup_is_root(memcg)) + css_put_many(&memcg->css, nr_entries); ++ local_unlock_irqrestore(event_lock, flags); + } + + /** +diff --git a/mm/mmu_context.c b/mm/mmu_context.c +index 3e612ae748e9..d0ccc070979f 100644 +--- a/mm/mmu_context.c ++++ b/mm/mmu_context.c +@@ -25,6 +25,7 @@ void use_mm(struct mm_struct *mm) + struct task_struct *tsk = current; + + task_lock(tsk); ++ preempt_disable_rt(); + active_mm = tsk->active_mm; + if (active_mm != mm) { + mmgrab(mm); +@@ -32,6 +33,7 @@ void use_mm(struct mm_struct *mm) + } + tsk->mm = mm; + switch_mm(active_mm, mm, tsk); ++ preempt_enable_rt(); + task_unlock(tsk); + #ifdef finish_arch_post_lock_switch + finish_arch_post_lock_switch(); +diff --git a/mm/page_alloc.c b/mm/page_alloc.c +index 2d04bd2e1ced..1679f5883307 100644 +--- a/mm/page_alloc.c ++++ b/mm/page_alloc.c +@@ -60,6 +60,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -291,6 +292,18 @@ EXPORT_SYMBOL(nr_node_ids); + EXPORT_SYMBOL(nr_online_nodes); + #endif + ++static DEFINE_LOCAL_IRQ_LOCK(pa_lock); ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++# define cpu_lock_irqsave(cpu, flags) \ ++ local_lock_irqsave_on(pa_lock, flags, cpu) ++# define cpu_unlock_irqrestore(cpu, flags) \ ++ local_unlock_irqrestore_on(pa_lock, flags, cpu) ++#else ++# define cpu_lock_irqsave(cpu, flags) local_irq_save(flags) ++# define cpu_unlock_irqrestore(cpu, flags) local_irq_restore(flags) ++#endif ++ + int page_group_by_mobility_disabled __read_mostly; + + #ifdef CONFIG_DEFERRED_STRUCT_PAGE_INIT +@@ -1095,7 +1108,7 @@ static inline void prefetch_buddy(struct page *page) + } + + /* +- * Frees a number of pages from the PCP lists ++ * Frees a number of pages which have been collected from the pcp lists. + * Assumes all pages on list are in same zone, and of same order. + * count is the number of pages to free. + * +@@ -1105,15 +1118,57 @@ static inline void prefetch_buddy(struct page *page) + * And clear the zone's pages_scanned counter, to hold off the "all pages are + * pinned" detection logic. + */ +-static void free_pcppages_bulk(struct zone *zone, int count, +- struct per_cpu_pages *pcp) ++static void free_pcppages_bulk(struct zone *zone, struct list_head *head, ++ bool zone_retry) ++{ ++ bool isolated_pageblocks; ++ struct page *page, *tmp; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&zone->lock, flags); ++ isolated_pageblocks = has_isolate_pageblock(zone); ++ ++ /* ++ * Use safe version since after __free_one_page(), ++ * page->lru.next will not point to original list. ++ */ ++ list_for_each_entry_safe(page, tmp, head, lru) { ++ int mt = get_pcppage_migratetype(page); ++ ++ if (page_zone(page) != zone) { ++ /* ++ * free_unref_page_list() sorts pages by zone. If we end ++ * up with pages from a different NUMA nodes belonging ++ * to the same ZONE index then we need to redo with the ++ * correct ZONE pointer. Skip the page for now, redo it ++ * on the next iteration. ++ */ ++ WARN_ON_ONCE(zone_retry == false); ++ if (zone_retry) ++ continue; ++ } ++ ++ /* MIGRATE_ISOLATE page should not go to pcplists */ ++ VM_BUG_ON_PAGE(is_migrate_isolate(mt), page); ++ /* Pageblock could have been isolated meanwhile */ ++ if (unlikely(isolated_pageblocks)) ++ mt = get_pageblock_migratetype(page); ++ ++ list_del(&page->lru); ++ __free_one_page(page, page_to_pfn(page), zone, 0, mt); ++ trace_mm_page_pcpu_drain(page, 0, mt); ++ } ++ spin_unlock_irqrestore(&zone->lock, flags); ++} ++ ++static void isolate_pcp_pages(int count, struct per_cpu_pages *pcp, ++ struct list_head *dst) ++ + { + int migratetype = 0; + int batch_free = 0; + int prefetch_nr = 0; +- bool isolated_pageblocks; +- struct page *page, *tmp; +- LIST_HEAD(head); ++ struct page *page; + + while (count) { + struct list_head *list; +@@ -1145,7 +1200,7 @@ static void free_pcppages_bulk(struct zone *zone, int count, + if (bulkfree_pcp_prepare(page)) + continue; + +- list_add_tail(&page->lru, &head); ++ list_add_tail(&page->lru, dst); + + /* + * We are going to put the page back to the global +@@ -1160,26 +1215,6 @@ static void free_pcppages_bulk(struct zone *zone, int count, + prefetch_buddy(page); + } while (--count && --batch_free && !list_empty(list)); + } +- +- spin_lock(&zone->lock); +- isolated_pageblocks = has_isolate_pageblock(zone); +- +- /* +- * Use safe version since after __free_one_page(), +- * page->lru.next will not point to original list. +- */ +- list_for_each_entry_safe(page, tmp, &head, lru) { +- int mt = get_pcppage_migratetype(page); +- /* MIGRATE_ISOLATE page should not go to pcplists */ +- VM_BUG_ON_PAGE(is_migrate_isolate(mt), page); +- /* Pageblock could have been isolated meanwhile */ +- if (unlikely(isolated_pageblocks)) +- mt = get_pageblock_migratetype(page); +- +- __free_one_page(page, page_to_pfn(page), zone, 0, mt); +- trace_mm_page_pcpu_drain(page, 0, mt); +- } +- spin_unlock(&zone->lock); + } + + static void free_one_page(struct zone *zone, +@@ -1274,10 +1309,10 @@ static void __free_pages_ok(struct page *page, unsigned int order) + return; + + migratetype = get_pfnblock_migratetype(page, pfn); +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + __count_vm_events(PGFREE, 1 << order); + free_one_page(page_zone(page), page, pfn, order, migratetype); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + } + + static void __init __free_pages_boot_core(struct page *page, unsigned int order) +@@ -2536,13 +2571,18 @@ void drain_zone_pages(struct zone *zone, struct per_cpu_pages *pcp) + { + unsigned long flags; + int to_drain, batch; ++ LIST_HEAD(dst); + +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + batch = READ_ONCE(pcp->batch); + to_drain = min(pcp->count, batch); + if (to_drain > 0) +- free_pcppages_bulk(zone, to_drain, pcp); +- local_irq_restore(flags); ++ isolate_pcp_pages(to_drain, pcp, &dst); ++ ++ local_unlock_irqrestore(pa_lock, flags); ++ ++ if (to_drain > 0) ++ free_pcppages_bulk(zone, &dst, false); + } + #endif + +@@ -2558,14 +2598,21 @@ static void drain_pages_zone(unsigned int cpu, struct zone *zone) + unsigned long flags; + struct per_cpu_pageset *pset; + struct per_cpu_pages *pcp; ++ LIST_HEAD(dst); ++ int count; + +- local_irq_save(flags); ++ cpu_lock_irqsave(cpu, flags); + pset = per_cpu_ptr(zone->pageset, cpu); + + pcp = &pset->pcp; +- if (pcp->count) +- free_pcppages_bulk(zone, pcp->count, pcp); +- local_irq_restore(flags); ++ count = pcp->count; ++ if (count) ++ isolate_pcp_pages(count, pcp, &dst); ++ ++ cpu_unlock_irqrestore(cpu, flags); ++ ++ if (count) ++ free_pcppages_bulk(zone, &dst, false); + } + + /* +@@ -2600,6 +2647,7 @@ void drain_local_pages(struct zone *zone) + drain_pages(cpu); + } + ++#ifndef CONFIG_PREEMPT_RT_BASE + static void drain_local_pages_wq(struct work_struct *work) + { + /* +@@ -2613,6 +2661,7 @@ static void drain_local_pages_wq(struct work_struct *work) + drain_local_pages(NULL); + preempt_enable(); + } ++#endif + + /* + * Spill all the per-cpu pages from all CPUs back into the buddy allocator. +@@ -2679,7 +2728,14 @@ void drain_all_pages(struct zone *zone) + else + cpumask_clear_cpu(cpu, &cpus_with_pcps); + } +- ++#ifdef CONFIG_PREEMPT_RT_BASE ++ for_each_cpu(cpu, &cpus_with_pcps) { ++ if (zone) ++ drain_pages_zone(cpu, zone); ++ else ++ drain_pages(cpu); ++ } ++#else + for_each_cpu(cpu, &cpus_with_pcps) { + struct work_struct *work = per_cpu_ptr(&pcpu_drain, cpu); + INIT_WORK(work, drain_local_pages_wq); +@@ -2687,6 +2743,7 @@ void drain_all_pages(struct zone *zone) + } + for_each_cpu(cpu, &cpus_with_pcps) + flush_work(per_cpu_ptr(&pcpu_drain, cpu)); ++#endif + + mutex_unlock(&pcpu_drain_mutex); + } +@@ -2758,7 +2815,8 @@ static bool free_unref_page_prepare(struct page *page, unsigned long pfn) + return true; + } + +-static void free_unref_page_commit(struct page *page, unsigned long pfn) ++static void free_unref_page_commit(struct page *page, unsigned long pfn, ++ struct list_head *dst) + { + struct zone *zone = page_zone(page); + struct per_cpu_pages *pcp; +@@ -2787,7 +2845,8 @@ static void free_unref_page_commit(struct page *page, unsigned long pfn) + pcp->count++; + if (pcp->count >= pcp->high) { + unsigned long batch = READ_ONCE(pcp->batch); +- free_pcppages_bulk(zone, batch, pcp); ++ ++ isolate_pcp_pages(batch, pcp, dst); + } + } + +@@ -2798,13 +2857,17 @@ void free_unref_page(struct page *page) + { + unsigned long flags; + unsigned long pfn = page_to_pfn(page); ++ struct zone *zone = page_zone(page); ++ LIST_HEAD(dst); + + if (!free_unref_page_prepare(page, pfn)) + return; + +- local_irq_save(flags); +- free_unref_page_commit(page, pfn); +- local_irq_restore(flags); ++ local_lock_irqsave(pa_lock, flags); ++ free_unref_page_commit(page, pfn, &dst); ++ local_unlock_irqrestore(pa_lock, flags); ++ if (!list_empty(&dst)) ++ free_pcppages_bulk(zone, &dst, false); + } + + /* +@@ -2815,6 +2878,11 @@ void free_unref_page_list(struct list_head *list) + struct page *page, *next; + unsigned long flags, pfn; + int batch_count = 0; ++ struct list_head dsts[__MAX_NR_ZONES]; ++ int i; ++ ++ for (i = 0; i < __MAX_NR_ZONES; i++) ++ INIT_LIST_HEAD(&dsts[i]); + + /* Prepare pages for freeing */ + list_for_each_entry_safe(page, next, list, lru) { +@@ -2824,25 +2892,42 @@ void free_unref_page_list(struct list_head *list) + set_page_private(page, pfn); + } + +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + list_for_each_entry_safe(page, next, list, lru) { + unsigned long pfn = page_private(page); ++ enum zone_type type; + + set_page_private(page, 0); + trace_mm_page_free_batched(page); +- free_unref_page_commit(page, pfn); ++ type = page_zonenum(page); ++ free_unref_page_commit(page, pfn, &dsts[type]); + + /* + * Guard against excessive IRQ disabled times when we get + * a large list of pages to free. + */ + if (++batch_count == SWAP_CLUSTER_MAX) { +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + batch_count = 0; +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + } + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); ++ ++ for (i = 0; i < __MAX_NR_ZONES; ) { ++ struct page *page; ++ struct zone *zone; ++ ++ if (list_empty(&dsts[i])) { ++ i++; ++ continue; ++ } ++ ++ page = list_first_entry(&dsts[i], struct page, lru); ++ zone = page_zone(page); ++ ++ free_pcppages_bulk(zone, &dsts[i], true); ++ } + } + + /* +@@ -2976,7 +3061,7 @@ static struct page *rmqueue_pcplist(struct zone *preferred_zone, + struct page *page; + unsigned long flags; + +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + pcp = &this_cpu_ptr(zone->pageset)->pcp; + list = &pcp->lists[migratetype]; + page = __rmqueue_pcplist(zone, migratetype, pcp, list); +@@ -2984,7 +3069,7 @@ static struct page *rmqueue_pcplist(struct zone *preferred_zone, + __count_zid_vm_events(PGALLOC, page_zonenum(page), 1 << order); + zone_statistics(preferred_zone, zone); + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + return page; + } + +@@ -3011,7 +3096,7 @@ struct page *rmqueue(struct zone *preferred_zone, + * allocate greater than order-1 page units with __GFP_NOFAIL. + */ + WARN_ON_ONCE((gfp_flags & __GFP_NOFAIL) && (order > 1)); +- spin_lock_irqsave(&zone->lock, flags); ++ local_spin_lock_irqsave(pa_lock, &zone->lock, flags); + + do { + page = NULL; +@@ -3031,14 +3116,14 @@ struct page *rmqueue(struct zone *preferred_zone, + + __count_zid_vm_events(PGALLOC, page_zonenum(page), 1 << order); + zone_statistics(preferred_zone, zone); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + + out: + VM_BUG_ON_PAGE(page && bad_range(zone, page), page); + return page; + + failed: +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + return NULL; + } + +@@ -7122,8 +7207,9 @@ void __init free_area_init(unsigned long *zones_size) + + static int page_alloc_cpu_dead(unsigned int cpu) + { +- ++ local_lock_irq_on(swapvec_lock, cpu); + lru_add_drain_cpu(cpu); ++ local_unlock_irq_on(swapvec_lock, cpu); + drain_pages(cpu); + + /* +@@ -8034,7 +8120,7 @@ void zone_pcp_reset(struct zone *zone) + struct per_cpu_pageset *pset; + + /* avoid races with drain_pages() */ +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + if (zone->pageset != &boot_pageset) { + for_each_online_cpu(cpu) { + pset = per_cpu_ptr(zone->pageset, cpu); +@@ -8043,7 +8129,7 @@ void zone_pcp_reset(struct zone *zone) + free_percpu(zone->pageset); + zone->pageset = &boot_pageset; + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + } + + #ifdef CONFIG_MEMORY_HOTREMOVE +diff --git a/mm/slab.c b/mm/slab.c +index 46f21e73db2f..38f6609343b3 100644 +--- a/mm/slab.c ++++ b/mm/slab.c +@@ -233,7 +233,7 @@ static void kmem_cache_node_init(struct kmem_cache_node *parent) + parent->shared = NULL; + parent->alien = NULL; + parent->colour_next = 0; +- spin_lock_init(&parent->list_lock); ++ raw_spin_lock_init(&parent->list_lock); + parent->free_objects = 0; + parent->free_touched = 0; + } +@@ -600,9 +600,9 @@ static noinline void cache_free_pfmemalloc(struct kmem_cache *cachep, + page_node = page_to_nid(page); + n = get_node(cachep, page_node); + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + free_block(cachep, &objp, 1, page_node, &list); +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + slabs_destroy(cachep, &list); + } +@@ -731,7 +731,7 @@ static void __drain_alien_cache(struct kmem_cache *cachep, + struct kmem_cache_node *n = get_node(cachep, node); + + if (ac->avail) { +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + /* + * Stuff objects into the remote nodes shared array first. + * That way we could avoid the overhead of putting the objects +@@ -742,7 +742,7 @@ static void __drain_alien_cache(struct kmem_cache *cachep, + + free_block(cachep, ac->entry, ac->avail, node, list); + ac->avail = 0; +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + } + } + +@@ -815,9 +815,9 @@ static int __cache_free_alien(struct kmem_cache *cachep, void *objp, + slabs_destroy(cachep, &list); + } else { + n = get_node(cachep, page_node); +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + free_block(cachep, &objp, 1, page_node, &list); +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + slabs_destroy(cachep, &list); + } + return 1; +@@ -858,10 +858,10 @@ static int init_cache_node(struct kmem_cache *cachep, int node, gfp_t gfp) + */ + n = get_node(cachep, node); + if (n) { +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + n->free_limit = (1 + nr_cpus_node(node)) * cachep->batchcount + + cachep->num; +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + return 0; + } +@@ -940,7 +940,7 @@ static int setup_kmem_cache_node(struct kmem_cache *cachep, + goto fail; + + n = get_node(cachep, node); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + if (n->shared && force_change) { + free_block(cachep, n->shared->entry, + n->shared->avail, node, &list); +@@ -958,7 +958,7 @@ static int setup_kmem_cache_node(struct kmem_cache *cachep, + new_alien = NULL; + } + +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + slabs_destroy(cachep, &list); + + /* +@@ -997,7 +997,7 @@ static void cpuup_canceled(long cpu) + if (!n) + continue; + +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + + /* Free limit for this kmem_cache_node */ + n->free_limit -= cachep->batchcount; +@@ -1010,7 +1010,7 @@ static void cpuup_canceled(long cpu) + } + + if (!cpumask_empty(mask)) { +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + goto free_slab; + } + +@@ -1024,7 +1024,7 @@ static void cpuup_canceled(long cpu) + alien = n->alien; + n->alien = NULL; + +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + kfree(shared); + if (alien) { +@@ -1208,7 +1208,7 @@ static void __init init_list(struct kmem_cache *cachep, struct kmem_cache_node * + /* + * Do not assume that spinlocks can be initialized via memcpy: + */ +- spin_lock_init(&ptr->list_lock); ++ raw_spin_lock_init(&ptr->list_lock); + + MAKE_ALL_LISTS(cachep, ptr, nodeid); + cachep->node[nodeid] = ptr; +@@ -1379,11 +1379,11 @@ slab_out_of_memory(struct kmem_cache *cachep, gfp_t gfpflags, int nodeid) + for_each_kmem_cache_node(cachep, node, n) { + unsigned long total_slabs, free_slabs, free_objs; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + total_slabs = n->total_slabs; + free_slabs = n->free_slabs; + free_objs = n->free_objects; +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + + pr_warn(" node %d: slabs: %ld/%ld, objs: %ld/%ld\n", + node, total_slabs - free_slabs, total_slabs, +@@ -2178,7 +2178,7 @@ static void check_spinlock_acquired(struct kmem_cache *cachep) + { + #ifdef CONFIG_SMP + check_irq_off(); +- assert_spin_locked(&get_node(cachep, numa_mem_id())->list_lock); ++ assert_raw_spin_locked(&get_node(cachep, numa_mem_id())->list_lock); + #endif + } + +@@ -2186,7 +2186,7 @@ static void check_spinlock_acquired_node(struct kmem_cache *cachep, int node) + { + #ifdef CONFIG_SMP + check_irq_off(); +- assert_spin_locked(&get_node(cachep, node)->list_lock); ++ assert_raw_spin_locked(&get_node(cachep, node)->list_lock); + #endif + } + +@@ -2226,9 +2226,9 @@ static void do_drain(void *arg) + check_irq_off(); + ac = cpu_cache_get(cachep); + n = get_node(cachep, node); +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + free_block(cachep, ac->entry, ac->avail, node, &list); +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + slabs_destroy(cachep, &list); + ac->avail = 0; + } +@@ -2246,9 +2246,9 @@ static void drain_cpu_caches(struct kmem_cache *cachep) + drain_alien_cache(cachep, n->alien); + + for_each_kmem_cache_node(cachep, node, n) { +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + drain_array_locked(cachep, n->shared, node, true, &list); +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + slabs_destroy(cachep, &list); + } +@@ -2270,10 +2270,10 @@ static int drain_freelist(struct kmem_cache *cache, + nr_freed = 0; + while (nr_freed < tofree && !list_empty(&n->slabs_free)) { + +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + p = n->slabs_free.prev; + if (p == &n->slabs_free) { +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + goto out; + } + +@@ -2286,7 +2286,7 @@ static int drain_freelist(struct kmem_cache *cache, + * to the cache. + */ + n->free_objects -= cache->num; +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + slab_destroy(cache, page); + nr_freed++; + } +@@ -2734,7 +2734,7 @@ static void cache_grow_end(struct kmem_cache *cachep, struct page *page) + INIT_LIST_HEAD(&page->lru); + n = get_node(cachep, page_to_nid(page)); + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + n->total_slabs++; + if (!page->active) { + list_add_tail(&page->lru, &(n->slabs_free)); +@@ -2744,7 +2744,7 @@ static void cache_grow_end(struct kmem_cache *cachep, struct page *page) + + STATS_INC_GROWN(cachep); + n->free_objects += cachep->num - page->active; +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + fixup_objfreelist_debug(cachep, &list); + } +@@ -2912,7 +2912,7 @@ static struct page *get_first_slab(struct kmem_cache_node *n, bool pfmemalloc) + { + struct page *page; + +- assert_spin_locked(&n->list_lock); ++ assert_raw_spin_locked(&n->list_lock); + page = list_first_entry_or_null(&n->slabs_partial, struct page, lru); + if (!page) { + n->free_touched = 1; +@@ -2938,10 +2938,10 @@ static noinline void *cache_alloc_pfmemalloc(struct kmem_cache *cachep, + if (!gfp_pfmemalloc_allowed(flags)) + return NULL; + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + page = get_first_slab(n, true); + if (!page) { +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + return NULL; + } + +@@ -2950,7 +2950,7 @@ static noinline void *cache_alloc_pfmemalloc(struct kmem_cache *cachep, + + fixup_slab_list(cachep, n, page, &list); + +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + fixup_objfreelist_debug(cachep, &list); + + return obj; +@@ -3009,7 +3009,7 @@ static void *cache_alloc_refill(struct kmem_cache *cachep, gfp_t flags) + if (!n->free_objects && (!shared || !shared->avail)) + goto direct_grow; + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + shared = READ_ONCE(n->shared); + + /* See if we can refill from the shared array */ +@@ -3033,7 +3033,7 @@ static void *cache_alloc_refill(struct kmem_cache *cachep, gfp_t flags) + must_grow: + n->free_objects -= ac->avail; + alloc_done: +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + fixup_objfreelist_debug(cachep, &list); + + direct_grow: +@@ -3258,7 +3258,7 @@ static void *____cache_alloc_node(struct kmem_cache *cachep, gfp_t flags, + BUG_ON(!n); + + check_irq_off(); +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + page = get_first_slab(n, false); + if (!page) + goto must_grow; +@@ -3276,12 +3276,12 @@ static void *____cache_alloc_node(struct kmem_cache *cachep, gfp_t flags, + + fixup_slab_list(cachep, n, page, &list); + +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + fixup_objfreelist_debug(cachep, &list); + return obj; + + must_grow: +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + page = cache_grow_begin(cachep, gfp_exact_node(flags), nodeid); + if (page) { + /* This slab isn't counted yet so don't update free_objects */ +@@ -3457,7 +3457,7 @@ static void cache_flusharray(struct kmem_cache *cachep, struct array_cache *ac) + + check_irq_off(); + n = get_node(cachep, node); +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + if (n->shared) { + struct array_cache *shared_array = n->shared; + int max = shared_array->limit - shared_array->avail; +@@ -3486,7 +3486,7 @@ static void cache_flusharray(struct kmem_cache *cachep, struct array_cache *ac) + STATS_SET_FREEABLE(cachep, i); + } + #endif +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + slabs_destroy(cachep, &list); + ac->avail -= batchcount; + memmove(ac->entry, &(ac->entry[batchcount]), sizeof(void *)*ac->avail); +@@ -3896,9 +3896,9 @@ static int __do_tune_cpucache(struct kmem_cache *cachep, int limit, + + node = cpu_to_mem(cpu); + n = get_node(cachep, node); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + free_block(cachep, ac->entry, ac->avail, node, &list); +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + slabs_destroy(cachep, &list); + } + free_percpu(prev); +@@ -4023,9 +4023,9 @@ static void drain_array(struct kmem_cache *cachep, struct kmem_cache_node *n, + return; + } + +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + drain_array_locked(cachep, ac, node, false, &list); +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + slabs_destroy(cachep, &list); + } +@@ -4109,7 +4109,7 @@ void get_slabinfo(struct kmem_cache *cachep, struct slabinfo *sinfo) + + for_each_kmem_cache_node(cachep, node, n) { + check_irq_on(); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + + total_slabs += n->total_slabs; + free_slabs += n->free_slabs; +@@ -4118,7 +4118,7 @@ void get_slabinfo(struct kmem_cache *cachep, struct slabinfo *sinfo) + if (n->shared) + shared_avail += n->shared->avail; + +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + } + num_objs = total_slabs * cachep->num; + active_slabs = total_slabs - free_slabs; +@@ -4338,13 +4338,13 @@ static int leaks_show(struct seq_file *m, void *p) + for_each_kmem_cache_node(cachep, node, n) { + + check_irq_on(); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + + list_for_each_entry(page, &n->slabs_full, lru) + handle_slab(x, cachep, page); + list_for_each_entry(page, &n->slabs_partial, lru) + handle_slab(x, cachep, page); +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + } + } while (!is_store_user_clean(cachep)); + +diff --git a/mm/slab.h b/mm/slab.h +index 9632772e14be..d6b01d61f768 100644 +--- a/mm/slab.h ++++ b/mm/slab.h +@@ -454,7 +454,7 @@ static inline void slab_post_alloc_hook(struct kmem_cache *s, gfp_t flags, + * The slab lists for all objects. + */ + struct kmem_cache_node { +- spinlock_t list_lock; ++ raw_spinlock_t list_lock; + + #ifdef CONFIG_SLAB + struct list_head slabs_partial; /* partial list first, better asm code */ +diff --git a/mm/slub.c b/mm/slub.c +index 09c0e24a06d8..2240b51a0549 100644 +--- a/mm/slub.c ++++ b/mm/slub.c +@@ -1167,7 +1167,7 @@ static noinline int free_debug_processing( + unsigned long uninitialized_var(flags); + int ret = 0; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + slab_lock(page); + + if (s->flags & SLAB_CONSISTENCY_CHECKS) { +@@ -1202,7 +1202,7 @@ static noinline int free_debug_processing( + bulk_cnt, cnt); + + slab_unlock(page); +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + if (!ret) + slab_fix(s, "Object at 0x%p not freed", object); + return ret; +@@ -1330,6 +1330,12 @@ static inline void dec_slabs_node(struct kmem_cache *s, int node, + + #endif /* CONFIG_SLUB_DEBUG */ + ++struct slub_free_list { ++ raw_spinlock_t lock; ++ struct list_head list; ++}; ++static DEFINE_PER_CPU(struct slub_free_list, slub_free_list); ++ + /* + * Hooks for other subsystems that check memory allocations. In a typical + * production configuration these hooks all should produce no code at all. +@@ -1564,10 +1570,17 @@ static struct page *allocate_slab(struct kmem_cache *s, gfp_t flags, int node) + void *start, *p; + int idx, order; + bool shuffle; ++ bool enableirqs = false; + + flags &= gfp_allowed_mask; + + if (gfpflags_allow_blocking(flags)) ++ enableirqs = true; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (system_state > SYSTEM_BOOTING) ++ enableirqs = true; ++#endif ++ if (enableirqs) + local_irq_enable(); + + flags |= s->allocflags; +@@ -1626,7 +1639,7 @@ static struct page *allocate_slab(struct kmem_cache *s, gfp_t flags, int node) + page->frozen = 1; + + out: +- if (gfpflags_allow_blocking(flags)) ++ if (enableirqs) + local_irq_disable(); + if (!page) + return NULL; +@@ -1684,6 +1697,16 @@ static void __free_slab(struct kmem_cache *s, struct page *page) + __free_pages(page, order); + } + ++static void free_delayed(struct list_head *h) ++{ ++ while (!list_empty(h)) { ++ struct page *page = list_first_entry(h, struct page, lru); ++ ++ list_del(&page->lru); ++ __free_slab(page->slab_cache, page); ++ } ++} ++ + static void rcu_free_slab(struct rcu_head *h) + { + struct page *page = container_of(h, struct page, rcu_head); +@@ -1695,6 +1718,12 @@ static void free_slab(struct kmem_cache *s, struct page *page) + { + if (unlikely(s->flags & SLAB_TYPESAFE_BY_RCU)) { + call_rcu(&page->rcu_head, rcu_free_slab); ++ } else if (irqs_disabled()) { ++ struct slub_free_list *f = this_cpu_ptr(&slub_free_list); ++ ++ raw_spin_lock(&f->lock); ++ list_add(&page->lru, &f->list); ++ raw_spin_unlock(&f->lock); + } else + __free_slab(s, page); + } +@@ -1802,7 +1831,7 @@ static void *get_partial_node(struct kmem_cache *s, struct kmem_cache_node *n, + if (!n || !n->nr_partial) + return NULL; + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + list_for_each_entry_safe(page, page2, &n->partial, lru) { + void *t; + +@@ -1827,7 +1856,7 @@ static void *get_partial_node(struct kmem_cache *s, struct kmem_cache_node *n, + break; + + } +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + return object; + } + +@@ -2073,7 +2102,7 @@ static void deactivate_slab(struct kmem_cache *s, struct page *page, + * that acquire_slab() will see a slab page that + * is frozen + */ +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + } else { + m = M_FULL; +@@ -2084,7 +2113,7 @@ static void deactivate_slab(struct kmem_cache *s, struct page *page, + * slabs from diagnostic functions will not see + * any frozen slabs. + */ +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + } + +@@ -2119,7 +2148,7 @@ static void deactivate_slab(struct kmem_cache *s, struct page *page, + goto redo; + + if (lock) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + if (m == M_FREE) { + stat(s, DEACTIVATE_EMPTY); +@@ -2154,10 +2183,10 @@ static void unfreeze_partials(struct kmem_cache *s, + n2 = get_node(s, page_to_nid(page)); + if (n != n2) { + if (n) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + n = n2; +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + + do { +@@ -2186,7 +2215,7 @@ static void unfreeze_partials(struct kmem_cache *s, + } + + if (n) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + while (discard_page) { + page = discard_page; +@@ -2223,14 +2252,21 @@ static void put_cpu_partial(struct kmem_cache *s, struct page *page, int drain) + pobjects = oldpage->pobjects; + pages = oldpage->pages; + if (drain && pobjects > s->cpu_partial) { ++ struct slub_free_list *f; + unsigned long flags; ++ LIST_HEAD(tofree); + /* + * partial array is full. Move the existing + * set to the per node partial list. + */ + local_irq_save(flags); + unfreeze_partials(s, this_cpu_ptr(s->cpu_slab)); ++ f = this_cpu_ptr(&slub_free_list); ++ raw_spin_lock(&f->lock); ++ list_splice_init(&f->list, &tofree); ++ raw_spin_unlock(&f->lock); + local_irq_restore(flags); ++ free_delayed(&tofree); + oldpage = NULL; + pobjects = 0; + pages = 0; +@@ -2300,7 +2336,22 @@ static bool has_cpu_slab(int cpu, void *info) + + static void flush_all(struct kmem_cache *s) + { ++ LIST_HEAD(tofree); ++ int cpu; ++ + on_each_cpu_cond(has_cpu_slab, flush_cpu_slab, s, 1, GFP_ATOMIC); ++ for_each_online_cpu(cpu) { ++ struct slub_free_list *f; ++ ++ if (!has_cpu_slab(cpu, s)) ++ continue; ++ ++ f = &per_cpu(slub_free_list, cpu); ++ raw_spin_lock_irq(&f->lock); ++ list_splice_init(&f->list, &tofree); ++ raw_spin_unlock_irq(&f->lock); ++ free_delayed(&tofree); ++ } + } + + /* +@@ -2355,10 +2406,10 @@ static unsigned long count_partial(struct kmem_cache_node *n, + unsigned long x = 0; + struct page *page; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + list_for_each_entry(page, &n->partial, lru) + x += get_count(page); +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return x; + } + #endif /* CONFIG_SLUB_DEBUG || CONFIG_SYSFS */ +@@ -2498,8 +2549,10 @@ static inline void *get_freelist(struct kmem_cache *s, struct page *page) + * already disabled (which is the case for bulk allocation). + */ + static void *___slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, +- unsigned long addr, struct kmem_cache_cpu *c) ++ unsigned long addr, struct kmem_cache_cpu *c, ++ struct list_head *to_free) + { ++ struct slub_free_list *f; + void *freelist; + struct page *page; + +@@ -2555,6 +2608,13 @@ static void *___slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + VM_BUG_ON(!c->page->frozen); + c->freelist = get_freepointer(s, freelist); + c->tid = next_tid(c->tid); ++ ++out: ++ f = this_cpu_ptr(&slub_free_list); ++ raw_spin_lock(&f->lock); ++ list_splice_init(&f->list, to_free); ++ raw_spin_unlock(&f->lock); ++ + return freelist; + + new_slab: +@@ -2570,7 +2630,7 @@ static void *___slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + + if (unlikely(!freelist)) { + slab_out_of_memory(s, gfpflags, node); +- return NULL; ++ goto out; + } + + page = c->page; +@@ -2583,7 +2643,7 @@ static void *___slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + goto new_slab; /* Slab failed checks. Next slab needed */ + + deactivate_slab(s, page, get_freepointer(s, freelist), c); +- return freelist; ++ goto out; + } + + /* +@@ -2595,6 +2655,7 @@ static void *__slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + { + void *p; + unsigned long flags; ++ LIST_HEAD(tofree); + + local_irq_save(flags); + #ifdef CONFIG_PREEMPT +@@ -2606,8 +2667,9 @@ static void *__slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + c = this_cpu_ptr(s->cpu_slab); + #endif + +- p = ___slab_alloc(s, gfpflags, node, addr, c); ++ p = ___slab_alloc(s, gfpflags, node, addr, c, &tofree); + local_irq_restore(flags); ++ free_delayed(&tofree); + return p; + } + +@@ -2793,7 +2855,7 @@ static void __slab_free(struct kmem_cache *s, struct page *page, + + do { + if (unlikely(n)) { +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + n = NULL; + } + prior = page->freelist; +@@ -2825,7 +2887,7 @@ static void __slab_free(struct kmem_cache *s, struct page *page, + * Otherwise the list_lock will synchronize with + * other processors updating the list of slabs. + */ +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + } + } +@@ -2867,7 +2929,7 @@ static void __slab_free(struct kmem_cache *s, struct page *page, + add_partial(n, page, DEACTIVATE_TO_TAIL); + stat(s, FREE_ADD_PARTIAL); + } +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return; + + slab_empty: +@@ -2882,7 +2944,7 @@ static void __slab_free(struct kmem_cache *s, struct page *page, + remove_full(s, n, page); + } + +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + stat(s, FREE_SLAB); + discard_slab(s, page); + } +@@ -3085,6 +3147,7 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, + void **p) + { + struct kmem_cache_cpu *c; ++ LIST_HEAD(to_free); + int i; + + /* memcg and kmem_cache debug support */ +@@ -3108,7 +3171,7 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, + * of re-populating per CPU c->freelist + */ + p[i] = ___slab_alloc(s, flags, NUMA_NO_NODE, +- _RET_IP_, c); ++ _RET_IP_, c, &to_free); + if (unlikely(!p[i])) + goto error; + +@@ -3120,6 +3183,7 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, + } + c->tid = next_tid(c->tid); + local_irq_enable(); ++ free_delayed(&to_free); + + /* Clear memory outside IRQ disabled fastpath loop */ + if (unlikely(flags & __GFP_ZERO)) { +@@ -3134,6 +3198,7 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, + return i; + error: + local_irq_enable(); ++ free_delayed(&to_free); + slab_post_alloc_hook(s, flags, i, p); + __kmem_cache_free_bulk(s, i, p); + return 0; +@@ -3269,7 +3334,7 @@ static void + init_kmem_cache_node(struct kmem_cache_node *n) + { + n->nr_partial = 0; +- spin_lock_init(&n->list_lock); ++ raw_spin_lock_init(&n->list_lock); + INIT_LIST_HEAD(&n->partial); + #ifdef CONFIG_SLUB_DEBUG + atomic_long_set(&n->nr_slabs, 0); +@@ -3622,6 +3687,11 @@ static void list_slab_objects(struct kmem_cache *s, struct page *page, + const char *text) + { + #ifdef CONFIG_SLUB_DEBUG ++#ifdef CONFIG_PREEMPT_RT_BASE ++ /* XXX move out of irq-off section */ ++ slab_err(s, page, text, s->name); ++#else ++ + void *addr = page_address(page); + void *p; + unsigned long *map = kcalloc(BITS_TO_LONGS(page->objects), +@@ -3643,6 +3713,7 @@ static void list_slab_objects(struct kmem_cache *s, struct page *page, + slab_unlock(page); + kfree(map); + #endif ++#endif + } + + /* +@@ -3656,7 +3727,7 @@ static void free_partial(struct kmem_cache *s, struct kmem_cache_node *n) + struct page *page, *h; + + BUG_ON(irqs_disabled()); +- spin_lock_irq(&n->list_lock); ++ raw_spin_lock_irq(&n->list_lock); + list_for_each_entry_safe(page, h, &n->partial, lru) { + if (!page->inuse) { + remove_partial(n, page); +@@ -3666,7 +3737,7 @@ static void free_partial(struct kmem_cache *s, struct kmem_cache_node *n) + "Objects remaining in %s on __kmem_cache_shutdown()"); + } + } +- spin_unlock_irq(&n->list_lock); ++ raw_spin_unlock_irq(&n->list_lock); + + list_for_each_entry_safe(page, h, &discard, lru) + discard_slab(s, page); +@@ -3939,7 +4010,7 @@ int __kmem_cache_shrink(struct kmem_cache *s) + for (i = 0; i < SHRINK_PROMOTE_MAX; i++) + INIT_LIST_HEAD(promote + i); + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + /* + * Build lists of slabs to discard or promote. +@@ -3970,7 +4041,7 @@ int __kmem_cache_shrink(struct kmem_cache *s) + for (i = SHRINK_PROMOTE_MAX - 1; i >= 0; i--) + list_splice(promote + i, &n->partial); + +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + + /* Release empty slabs */ + list_for_each_entry_safe(page, t, &discard, lru) +@@ -4183,6 +4254,12 @@ void __init kmem_cache_init(void) + { + static __initdata struct kmem_cache boot_kmem_cache, + boot_kmem_cache_node; ++ int cpu; ++ ++ for_each_possible_cpu(cpu) { ++ raw_spin_lock_init(&per_cpu(slub_free_list, cpu).lock); ++ INIT_LIST_HEAD(&per_cpu(slub_free_list, cpu).list); ++ } + + if (debug_guardpage_minorder()) + slub_max_order = 0; +@@ -4384,7 +4461,7 @@ static int validate_slab_node(struct kmem_cache *s, + struct page *page; + unsigned long flags; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + list_for_each_entry(page, &n->partial, lru) { + validate_slab_slab(s, page, map); +@@ -4406,7 +4483,7 @@ static int validate_slab_node(struct kmem_cache *s, + s->name, count, atomic_long_read(&n->nr_slabs)); + + out: +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return count; + } + +@@ -4596,12 +4673,12 @@ static int list_locations(struct kmem_cache *s, char *buf, + if (!atomic_long_read(&n->nr_slabs)) + continue; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + list_for_each_entry(page, &n->partial, lru) + process_slab(&t, s, page, alloc, map); + list_for_each_entry(page, &n->full, lru) + process_slab(&t, s, page, alloc, map); +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + } + + for (i = 0; i < t.count; i++) { +diff --git a/mm/swap.c b/mm/swap.c +index a3fc028e338e..0457927d3f0c 100644 +--- a/mm/swap.c ++++ b/mm/swap.c +@@ -33,6 +33,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -51,6 +52,8 @@ static DEFINE_PER_CPU(struct pagevec, lru_lazyfree_pvecs); + #ifdef CONFIG_SMP + static DEFINE_PER_CPU(struct pagevec, activate_page_pvecs); + #endif ++static DEFINE_LOCAL_IRQ_LOCK(rotate_lock); ++DEFINE_LOCAL_IRQ_LOCK(swapvec_lock); + + /* + * This path almost never happens for VM activity - pages are normally +@@ -253,11 +256,11 @@ void rotate_reclaimable_page(struct page *page) + unsigned long flags; + + get_page(page); +- local_irq_save(flags); ++ local_lock_irqsave(rotate_lock, flags); + pvec = this_cpu_ptr(&lru_rotate_pvecs); + if (!pagevec_add(pvec, page) || PageCompound(page)) + pagevec_move_tail(pvec); +- local_irq_restore(flags); ++ local_unlock_irqrestore(rotate_lock, flags); + } + } + +@@ -307,12 +310,13 @@ void activate_page(struct page *page) + { + page = compound_head(page); + if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) { +- struct pagevec *pvec = &get_cpu_var(activate_page_pvecs); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, ++ activate_page_pvecs); + + get_page(page); + if (!pagevec_add(pvec, page) || PageCompound(page)) + pagevec_lru_move_fn(pvec, __activate_page, NULL); +- put_cpu_var(activate_page_pvecs); ++ put_locked_var(swapvec_lock, activate_page_pvecs); + } + } + +@@ -334,7 +338,7 @@ void activate_page(struct page *page) + + static void __lru_cache_activate_page(struct page *page) + { +- struct pagevec *pvec = &get_cpu_var(lru_add_pvec); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, lru_add_pvec); + int i; + + /* +@@ -356,7 +360,7 @@ static void __lru_cache_activate_page(struct page *page) + } + } + +- put_cpu_var(lru_add_pvec); ++ put_locked_var(swapvec_lock, lru_add_pvec); + } + + /* +@@ -398,12 +402,12 @@ EXPORT_SYMBOL(mark_page_accessed); + + static void __lru_cache_add(struct page *page) + { +- struct pagevec *pvec = &get_cpu_var(lru_add_pvec); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, lru_add_pvec); + + get_page(page); + if (!pagevec_add(pvec, page) || PageCompound(page)) + __pagevec_lru_add(pvec); +- put_cpu_var(lru_add_pvec); ++ put_locked_var(swapvec_lock, lru_add_pvec); + } + + /** +@@ -581,9 +585,15 @@ void lru_add_drain_cpu(int cpu) + unsigned long flags; + + /* No harm done if a racing interrupt already did this */ +- local_irq_save(flags); ++#ifdef CONFIG_PREEMPT_RT_BASE ++ local_lock_irqsave_on(rotate_lock, flags, cpu); + pagevec_move_tail(pvec); +- local_irq_restore(flags); ++ local_unlock_irqrestore_on(rotate_lock, flags, cpu); ++#else ++ local_lock_irqsave(rotate_lock, flags); ++ pagevec_move_tail(pvec); ++ local_unlock_irqrestore(rotate_lock, flags); ++#endif + } + + pvec = &per_cpu(lru_deactivate_file_pvecs, cpu); +@@ -615,11 +625,12 @@ void deactivate_file_page(struct page *page) + return; + + if (likely(get_page_unless_zero(page))) { +- struct pagevec *pvec = &get_cpu_var(lru_deactivate_file_pvecs); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, ++ lru_deactivate_file_pvecs); + + if (!pagevec_add(pvec, page) || PageCompound(page)) + pagevec_lru_move_fn(pvec, lru_deactivate_file_fn, NULL); +- put_cpu_var(lru_deactivate_file_pvecs); ++ put_locked_var(swapvec_lock, lru_deactivate_file_pvecs); + } + } + +@@ -634,23 +645,34 @@ void mark_page_lazyfree(struct page *page) + { + if (PageLRU(page) && PageAnon(page) && PageSwapBacked(page) && + !PageSwapCache(page) && !PageUnevictable(page)) { +- struct pagevec *pvec = &get_cpu_var(lru_lazyfree_pvecs); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, ++ lru_lazyfree_pvecs); + + get_page(page); + if (!pagevec_add(pvec, page) || PageCompound(page)) + pagevec_lru_move_fn(pvec, lru_lazyfree_fn, NULL); +- put_cpu_var(lru_lazyfree_pvecs); ++ put_locked_var(swapvec_lock, lru_lazyfree_pvecs); + } + } + + void lru_add_drain(void) + { +- lru_add_drain_cpu(get_cpu()); +- put_cpu(); ++ lru_add_drain_cpu(local_lock_cpu(swapvec_lock)); ++ local_unlock_cpu(swapvec_lock); + } + + #ifdef CONFIG_SMP + ++#ifdef CONFIG_PREEMPT_RT_BASE ++static inline void remote_lru_add_drain(int cpu, struct cpumask *has_work) ++{ ++ local_lock_on(swapvec_lock, cpu); ++ lru_add_drain_cpu(cpu); ++ local_unlock_on(swapvec_lock, cpu); ++} ++ ++#else ++ + static DEFINE_PER_CPU(struct work_struct, lru_add_drain_work); + + static void lru_add_drain_per_cpu(struct work_struct *dummy) +@@ -658,6 +680,16 @@ static void lru_add_drain_per_cpu(struct work_struct *dummy) + lru_add_drain(); + } + ++static inline void remote_lru_add_drain(int cpu, struct cpumask *has_work) ++{ ++ struct work_struct *work = &per_cpu(lru_add_drain_work, cpu); ++ ++ INIT_WORK(work, lru_add_drain_per_cpu); ++ queue_work_on(cpu, mm_percpu_wq, work); ++ cpumask_set_cpu(cpu, has_work); ++} ++#endif ++ + /* + * Doesn't need any cpu hotplug locking because we do rely on per-cpu + * kworkers being shut down before our page_alloc_cpu_dead callback is +@@ -682,21 +714,19 @@ void lru_add_drain_all(void) + cpumask_clear(&has_work); + + for_each_online_cpu(cpu) { +- struct work_struct *work = &per_cpu(lru_add_drain_work, cpu); + + if (pagevec_count(&per_cpu(lru_add_pvec, cpu)) || + pagevec_count(&per_cpu(lru_rotate_pvecs, cpu)) || + pagevec_count(&per_cpu(lru_deactivate_file_pvecs, cpu)) || + pagevec_count(&per_cpu(lru_lazyfree_pvecs, cpu)) || +- need_activate_page_drain(cpu)) { +- INIT_WORK(work, lru_add_drain_per_cpu); +- queue_work_on(cpu, mm_percpu_wq, work); +- cpumask_set_cpu(cpu, &has_work); +- } ++ need_activate_page_drain(cpu)) ++ remote_lru_add_drain(cpu, &has_work); + } + ++#ifndef CONFIG_PREEMPT_RT_BASE + for_each_cpu(cpu, &has_work) + flush_work(&per_cpu(lru_add_drain_work, cpu)); ++#endif + + mutex_unlock(&lock); + } +diff --git a/mm/vmalloc.c b/mm/vmalloc.c +index a46ec261a44e..5c6939cc28b7 100644 +--- a/mm/vmalloc.c ++++ b/mm/vmalloc.c +@@ -852,7 +852,7 @@ static void *new_vmap_block(unsigned int order, gfp_t gfp_mask) + struct vmap_block *vb; + struct vmap_area *va; + unsigned long vb_idx; +- int node, err; ++ int node, err, cpu; + void *vaddr; + + node = numa_node_id(); +@@ -895,11 +895,12 @@ static void *new_vmap_block(unsigned int order, gfp_t gfp_mask) + BUG_ON(err); + radix_tree_preload_end(); + +- vbq = &get_cpu_var(vmap_block_queue); ++ cpu = get_cpu_light(); ++ vbq = this_cpu_ptr(&vmap_block_queue); + spin_lock(&vbq->lock); + list_add_tail_rcu(&vb->free_list, &vbq->free); + spin_unlock(&vbq->lock); +- put_cpu_var(vmap_block_queue); ++ put_cpu_light(); + + return vaddr; + } +@@ -968,6 +969,7 @@ static void *vb_alloc(unsigned long size, gfp_t gfp_mask) + struct vmap_block *vb; + void *vaddr = NULL; + unsigned int order; ++ int cpu; + + BUG_ON(offset_in_page(size)); + BUG_ON(size > PAGE_SIZE*VMAP_MAX_ALLOC); +@@ -982,7 +984,8 @@ static void *vb_alloc(unsigned long size, gfp_t gfp_mask) + order = get_order(size); + + rcu_read_lock(); +- vbq = &get_cpu_var(vmap_block_queue); ++ cpu = get_cpu_light(); ++ vbq = this_cpu_ptr(&vmap_block_queue); + list_for_each_entry_rcu(vb, &vbq->free, free_list) { + unsigned long pages_off; + +@@ -1005,7 +1008,7 @@ static void *vb_alloc(unsigned long size, gfp_t gfp_mask) + break; + } + +- put_cpu_var(vmap_block_queue); ++ put_cpu_light(); + rcu_read_unlock(); + + /* Allocate new block if nothing was found */ +diff --git a/mm/vmstat.c b/mm/vmstat.c +index 4a387937f9f5..0cd11c5e3999 100644 +--- a/mm/vmstat.c ++++ b/mm/vmstat.c +@@ -320,6 +320,7 @@ void __mod_zone_page_state(struct zone *zone, enum zone_stat_item item, + long x; + long t; + ++ preempt_disable_rt(); + x = delta + __this_cpu_read(*p); + + t = __this_cpu_read(pcp->stat_threshold); +@@ -329,6 +330,7 @@ void __mod_zone_page_state(struct zone *zone, enum zone_stat_item item, + x = 0; + } + __this_cpu_write(*p, x); ++ preempt_enable_rt(); + } + EXPORT_SYMBOL(__mod_zone_page_state); + +@@ -340,6 +342,7 @@ void __mod_node_page_state(struct pglist_data *pgdat, enum node_stat_item item, + long x; + long t; + ++ preempt_disable_rt(); + x = delta + __this_cpu_read(*p); + + t = __this_cpu_read(pcp->stat_threshold); +@@ -349,6 +352,7 @@ void __mod_node_page_state(struct pglist_data *pgdat, enum node_stat_item item, + x = 0; + } + __this_cpu_write(*p, x); ++ preempt_enable_rt(); + } + EXPORT_SYMBOL(__mod_node_page_state); + +@@ -381,6 +385,7 @@ void __inc_zone_state(struct zone *zone, enum zone_stat_item item) + s8 __percpu *p = pcp->vm_stat_diff + item; + s8 v, t; + ++ preempt_disable_rt(); + v = __this_cpu_inc_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v > t)) { +@@ -389,6 +394,7 @@ void __inc_zone_state(struct zone *zone, enum zone_stat_item item) + zone_page_state_add(v + overstep, zone, item); + __this_cpu_write(*p, -overstep); + } ++ preempt_enable_rt(); + } + + void __inc_node_state(struct pglist_data *pgdat, enum node_stat_item item) +@@ -397,6 +403,7 @@ void __inc_node_state(struct pglist_data *pgdat, enum node_stat_item item) + s8 __percpu *p = pcp->vm_node_stat_diff + item; + s8 v, t; + ++ preempt_disable_rt(); + v = __this_cpu_inc_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v > t)) { +@@ -405,6 +412,7 @@ void __inc_node_state(struct pglist_data *pgdat, enum node_stat_item item) + node_page_state_add(v + overstep, pgdat, item); + __this_cpu_write(*p, -overstep); + } ++ preempt_enable_rt(); + } + + void __inc_zone_page_state(struct page *page, enum zone_stat_item item) +@@ -425,6 +433,7 @@ void __dec_zone_state(struct zone *zone, enum zone_stat_item item) + s8 __percpu *p = pcp->vm_stat_diff + item; + s8 v, t; + ++ preempt_disable_rt(); + v = __this_cpu_dec_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v < - t)) { +@@ -433,6 +442,7 @@ void __dec_zone_state(struct zone *zone, enum zone_stat_item item) + zone_page_state_add(v - overstep, zone, item); + __this_cpu_write(*p, overstep); + } ++ preempt_enable_rt(); + } + + void __dec_node_state(struct pglist_data *pgdat, enum node_stat_item item) +@@ -441,6 +451,7 @@ void __dec_node_state(struct pglist_data *pgdat, enum node_stat_item item) + s8 __percpu *p = pcp->vm_node_stat_diff + item; + s8 v, t; + ++ preempt_disable_rt(); + v = __this_cpu_dec_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v < - t)) { +@@ -449,6 +460,7 @@ void __dec_node_state(struct pglist_data *pgdat, enum node_stat_item item) + node_page_state_add(v - overstep, pgdat, item); + __this_cpu_write(*p, overstep); + } ++ preempt_enable_rt(); + } + + void __dec_zone_page_state(struct page *page, enum zone_stat_item item) +diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c +index 9da65552e7ca..63c193c1ff96 100644 +--- a/mm/zsmalloc.c ++++ b/mm/zsmalloc.c +@@ -55,6 +55,7 @@ + #include + #include + #include ++#include + + #define ZSPAGE_MAGIC 0x58 + +@@ -72,9 +73,22 @@ + */ + #define ZS_MAX_ZSPAGE_ORDER 2 + #define ZS_MAX_PAGES_PER_ZSPAGE (_AC(1, UL) << ZS_MAX_ZSPAGE_ORDER) +- + #define ZS_HANDLE_SIZE (sizeof(unsigned long)) + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++struct zsmalloc_handle { ++ unsigned long addr; ++ struct mutex lock; ++}; ++ ++#define ZS_HANDLE_ALLOC_SIZE (sizeof(struct zsmalloc_handle)) ++ ++#else ++ ++#define ZS_HANDLE_ALLOC_SIZE (sizeof(unsigned long)) ++#endif ++ + /* + * Object location (, ) is encoded as + * as single (unsigned long) handle value. +@@ -320,7 +334,7 @@ static void SetZsPageMovable(struct zs_pool *pool, struct zspage *zspage) {} + + static int create_cache(struct zs_pool *pool) + { +- pool->handle_cachep = kmem_cache_create("zs_handle", ZS_HANDLE_SIZE, ++ pool->handle_cachep = kmem_cache_create("zs_handle", ZS_HANDLE_ALLOC_SIZE, + 0, 0, NULL); + if (!pool->handle_cachep) + return 1; +@@ -344,10 +358,27 @@ static void destroy_cache(struct zs_pool *pool) + + static unsigned long cache_alloc_handle(struct zs_pool *pool, gfp_t gfp) + { +- return (unsigned long)kmem_cache_alloc(pool->handle_cachep, +- gfp & ~(__GFP_HIGHMEM|__GFP_MOVABLE)); ++ void *p; ++ ++ p = kmem_cache_alloc(pool->handle_cachep, ++ gfp & ~(__GFP_HIGHMEM|__GFP_MOVABLE)); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (p) { ++ struct zsmalloc_handle *zh = p; ++ ++ mutex_init(&zh->lock); ++ } ++#endif ++ return (unsigned long)p; + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static struct zsmalloc_handle *zs_get_pure_handle(unsigned long handle) ++{ ++ return (void *)(handle &~((1 << OBJ_TAG_BITS) - 1)); ++} ++#endif ++ + static void cache_free_handle(struct zs_pool *pool, unsigned long handle) + { + kmem_cache_free(pool->handle_cachep, (void *)handle); +@@ -366,12 +397,18 @@ static void cache_free_zspage(struct zs_pool *pool, struct zspage *zspage) + + static void record_obj(unsigned long handle, unsigned long obj) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ WRITE_ONCE(zh->addr, obj); ++#else + /* + * lsb of @obj represents handle lock while other bits + * represent object value the handle is pointing so + * updating shouldn't do store tearing. + */ + WRITE_ONCE(*(unsigned long *)handle, obj); ++#endif + } + + /* zpool driver */ +@@ -453,6 +490,7 @@ MODULE_ALIAS("zpool-zsmalloc"); + + /* per-cpu VM mapping areas for zspage accesses that cross page boundaries */ + static DEFINE_PER_CPU(struct mapping_area, zs_map_area); ++static DEFINE_LOCAL_IRQ_LOCK(zs_map_area_lock); + + static bool is_zspage_isolated(struct zspage *zspage) + { +@@ -882,7 +920,13 @@ static unsigned long location_to_obj(struct page *page, unsigned int obj_idx) + + static unsigned long handle_to_obj(unsigned long handle) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return zh->addr; ++#else + return *(unsigned long *)handle; ++#endif + } + + static unsigned long obj_to_head(struct page *page, void *obj) +@@ -896,22 +940,46 @@ static unsigned long obj_to_head(struct page *page, void *obj) + + static inline int testpin_tag(unsigned long handle) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return mutex_is_locked(&zh->lock); ++#else + return bit_spin_is_locked(HANDLE_PIN_BIT, (unsigned long *)handle); ++#endif + } + + static inline int trypin_tag(unsigned long handle) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return mutex_trylock(&zh->lock); ++#else + return bit_spin_trylock(HANDLE_PIN_BIT, (unsigned long *)handle); ++#endif + } + + static void pin_tag(unsigned long handle) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return mutex_lock(&zh->lock); ++#else + bit_spin_lock(HANDLE_PIN_BIT, (unsigned long *)handle); ++#endif + } + + static void unpin_tag(unsigned long handle) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ struct zsmalloc_handle *zh = zs_get_pure_handle(handle); ++ ++ return mutex_unlock(&zh->lock); ++#else + bit_spin_unlock(HANDLE_PIN_BIT, (unsigned long *)handle); ++#endif + } + + static void reset_page(struct page *page) +@@ -1337,7 +1405,7 @@ void *zs_map_object(struct zs_pool *pool, unsigned long handle, + class = pool->size_class[class_idx]; + off = (class->size * obj_idx) & ~PAGE_MASK; + +- area = &get_cpu_var(zs_map_area); ++ area = &get_locked_var(zs_map_area_lock, zs_map_area); + area->vm_mm = mm; + if (off + class->size <= PAGE_SIZE) { + /* this object is contained entirely within a page */ +@@ -1391,7 +1459,7 @@ void zs_unmap_object(struct zs_pool *pool, unsigned long handle) + + __zs_unmap_object(area, pages, off, class->size); + } +- put_cpu_var(zs_map_area); ++ put_locked_var(zs_map_area_lock, zs_map_area); + + migrate_read_unlock(zspage); + unpin_tag(handle); +diff --git a/mm/zswap.c b/mm/zswap.c +index cd91fd9d96b8..420225d3ff0b 100644 +--- a/mm/zswap.c ++++ b/mm/zswap.c +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -990,6 +991,8 @@ static void zswap_fill_page(void *ptr, unsigned long value) + memset_l(page, value, PAGE_SIZE / sizeof(unsigned long)); + } + ++/* protect zswap_dstmem from concurrency */ ++static DEFINE_LOCAL_IRQ_LOCK(zswap_dstmem_lock); + /********************************* + * frontswap hooks + **********************************/ +@@ -1066,12 +1069,11 @@ static int zswap_frontswap_store(unsigned type, pgoff_t offset, + } + + /* compress */ +- dst = get_cpu_var(zswap_dstmem); +- tfm = *get_cpu_ptr(entry->pool->tfm); ++ dst = get_locked_var(zswap_dstmem_lock, zswap_dstmem); ++ tfm = *this_cpu_ptr(entry->pool->tfm); + src = kmap_atomic(page); + ret = crypto_comp_compress(tfm, src, PAGE_SIZE, dst, &dlen); + kunmap_atomic(src); +- put_cpu_ptr(entry->pool->tfm); + if (ret) { + ret = -EINVAL; + goto put_dstmem; +@@ -1094,7 +1096,7 @@ static int zswap_frontswap_store(unsigned type, pgoff_t offset, + memcpy(buf, &zhdr, hlen); + memcpy(buf + hlen, dst, dlen); + zpool_unmap_handle(entry->pool->zpool, handle); +- put_cpu_var(zswap_dstmem); ++ put_locked_var(zswap_dstmem_lock, zswap_dstmem); + + /* populate entry */ + entry->offset = offset; +@@ -1122,7 +1124,7 @@ static int zswap_frontswap_store(unsigned type, pgoff_t offset, + return 0; + + put_dstmem: +- put_cpu_var(zswap_dstmem); ++ put_locked_var(zswap_dstmem_lock, zswap_dstmem); + zswap_pool_put(entry->pool); + freepage: + zswap_entry_cache_free(entry); +diff --git a/net/Kconfig b/net/Kconfig +index 1cd370a8fad1..a93c7c307728 100644 +--- a/net/Kconfig ++++ b/net/Kconfig +@@ -275,7 +275,7 @@ config CGROUP_NET_CLASSID + + config NET_RX_BUSY_POLL + bool +- default y ++ default y if !PREEMPT_RT_FULL + + config BQL + bool +diff --git a/net/core/dev.c b/net/core/dev.c +index 138951d28643..63b3058dd172 100644 +--- a/net/core/dev.c ++++ b/net/core/dev.c +@@ -195,6 +195,7 @@ static unsigned int napi_gen_id = NR_CPUS; + static DEFINE_READ_MOSTLY_HASHTABLE(napi_hash, 8); + + static seqcount_t devnet_rename_seq; ++static DEFINE_MUTEX(devnet_rename_mutex); + + static inline void dev_base_seq_inc(struct net *net) + { +@@ -217,14 +218,14 @@ static inline struct hlist_head *dev_index_hash(struct net *net, int ifindex) + static inline void rps_lock(struct softnet_data *sd) + { + #ifdef CONFIG_RPS +- spin_lock(&sd->input_pkt_queue.lock); ++ raw_spin_lock(&sd->input_pkt_queue.raw_lock); + #endif + } + + static inline void rps_unlock(struct softnet_data *sd) + { + #ifdef CONFIG_RPS +- spin_unlock(&sd->input_pkt_queue.lock); ++ raw_spin_unlock(&sd->input_pkt_queue.raw_lock); + #endif + } + +@@ -920,7 +921,8 @@ int netdev_get_name(struct net *net, char *name, int ifindex) + strcpy(name, dev->name); + rcu_read_unlock(); + if (read_seqcount_retry(&devnet_rename_seq, seq)) { +- cond_resched(); ++ mutex_lock(&devnet_rename_mutex); ++ mutex_unlock(&devnet_rename_mutex); + goto retry; + } + +@@ -1197,20 +1199,17 @@ int dev_change_name(struct net_device *dev, const char *newname) + likely(!(dev->priv_flags & IFF_LIVE_RENAME_OK))) + return -EBUSY; + +- write_seqcount_begin(&devnet_rename_seq); ++ mutex_lock(&devnet_rename_mutex); ++ __raw_write_seqcount_begin(&devnet_rename_seq); + +- if (strncmp(newname, dev->name, IFNAMSIZ) == 0) { +- write_seqcount_end(&devnet_rename_seq); +- return 0; +- } ++ if (strncmp(newname, dev->name, IFNAMSIZ) == 0) ++ goto outunlock; + + memcpy(oldname, dev->name, IFNAMSIZ); + + err = dev_get_valid_name(net, dev, newname); +- if (err < 0) { +- write_seqcount_end(&devnet_rename_seq); +- return err; +- } ++ if (err < 0) ++ goto outunlock; + + if (oldname[0] && !strchr(oldname, '%')) + netdev_info(dev, "renamed from %s\n", oldname); +@@ -1223,11 +1222,12 @@ int dev_change_name(struct net_device *dev, const char *newname) + if (ret) { + memcpy(dev->name, oldname, IFNAMSIZ); + dev->name_assign_type = old_assign_type; +- write_seqcount_end(&devnet_rename_seq); +- return ret; ++ err = ret; ++ goto outunlock; + } + +- write_seqcount_end(&devnet_rename_seq); ++ __raw_write_seqcount_end(&devnet_rename_seq); ++ mutex_unlock(&devnet_rename_mutex); + + netdev_adjacent_rename_links(dev, oldname); + +@@ -1248,7 +1248,8 @@ int dev_change_name(struct net_device *dev, const char *newname) + /* err >= 0 after dev_alloc_name() or stores the first errno */ + if (err >= 0) { + err = ret; +- write_seqcount_begin(&devnet_rename_seq); ++ mutex_lock(&devnet_rename_mutex); ++ __raw_write_seqcount_begin(&devnet_rename_seq); + memcpy(dev->name, oldname, IFNAMSIZ); + memcpy(oldname, newname, IFNAMSIZ); + dev->name_assign_type = old_assign_type; +@@ -1261,6 +1262,11 @@ int dev_change_name(struct net_device *dev, const char *newname) + } + + return err; ++ ++outunlock: ++ __raw_write_seqcount_end(&devnet_rename_seq); ++ mutex_unlock(&devnet_rename_mutex); ++ return err; + } + + /** +@@ -2726,6 +2732,7 @@ static void __netif_reschedule(struct Qdisc *q) + sd->output_queue_tailp = &q->next_sched; + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + + void __netif_schedule(struct Qdisc *q) +@@ -2788,6 +2795,7 @@ void __dev_kfree_skb_irq(struct sk_buff *skb, enum skb_free_reason reason) + __this_cpu_write(softnet_data.completion_queue, skb); + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(__dev_kfree_skb_irq); + +@@ -3463,7 +3471,11 @@ static inline int __dev_xmit_skb(struct sk_buff *skb, struct Qdisc *q, + * This permits qdisc->running owner to get the lock more + * often and dequeue packets faster. + */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ contended = true; ++#else + contended = qdisc_is_running(q); ++#endif + if (unlikely(contended)) + spin_lock(&q->busylock); + +@@ -3535,8 +3547,10 @@ static void skb_update_prio(struct sk_buff *skb) + #define skb_update_prio(skb) + #endif + ++#ifndef CONFIG_PREEMPT_RT_FULL + DEFINE_PER_CPU(int, xmit_recursion); + EXPORT_SYMBOL(xmit_recursion); ++#endif + + /** + * dev_loopback_xmit - loop back @skb +@@ -3827,9 +3841,12 @@ static int __dev_queue_xmit(struct sk_buff *skb, struct net_device *sb_dev) + if (dev->flags & IFF_UP) { + int cpu = smp_processor_id(); /* ok because BHs are off */ + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (txq->xmit_lock_owner != current) { ++#else + if (txq->xmit_lock_owner != cpu) { +- if (unlikely(__this_cpu_read(xmit_recursion) > +- XMIT_RECURSION_LIMIT)) ++#endif ++ if (unlikely(xmit_rec_read() > XMIT_RECURSION_LIMIT)) + goto recursion_alert; + + skb = validate_xmit_skb(skb, dev, &again); +@@ -3839,9 +3856,9 @@ static int __dev_queue_xmit(struct sk_buff *skb, struct net_device *sb_dev) + HARD_TX_LOCK(dev, txq, cpu); + + if (!netif_xmit_stopped(txq)) { +- __this_cpu_inc(xmit_recursion); ++ xmit_rec_inc(); + skb = dev_hard_start_xmit(skb, dev, txq, &rc); +- __this_cpu_dec(xmit_recursion); ++ xmit_rec_dec(); + if (dev_xmit_complete(rc)) { + HARD_TX_UNLOCK(dev, txq); + goto out; +@@ -4260,6 +4277,7 @@ static int enqueue_to_backlog(struct sk_buff *skb, int cpu, + rps_unlock(sd); + + local_irq_restore(flags); ++ preempt_check_resched_rt(); + + atomic_long_inc(&skb->dev->rx_dropped); + kfree_skb(skb); +@@ -4472,7 +4490,7 @@ static int netif_rx_internal(struct sk_buff *skb) + struct rps_dev_flow voidflow, *rflow = &voidflow; + int cpu; + +- preempt_disable(); ++ migrate_disable(); + rcu_read_lock(); + + cpu = get_rps_cpu(skb->dev, skb, &rflow); +@@ -4482,14 +4500,14 @@ static int netif_rx_internal(struct sk_buff *skb) + ret = enqueue_to_backlog(skb, cpu, &rflow->last_qtail); + + rcu_read_unlock(); +- preempt_enable(); ++ migrate_enable(); + } else + #endif + { + unsigned int qtail; + +- ret = enqueue_to_backlog(skb, get_cpu(), &qtail); +- put_cpu(); ++ ret = enqueue_to_backlog(skb, get_cpu_light(), &qtail); ++ put_cpu_light(); + } + return ret; + } +@@ -4523,11 +4541,9 @@ int netif_rx_ni(struct sk_buff *skb) + + trace_netif_rx_ni_entry(skb); + +- preempt_disable(); ++ local_bh_disable(); + err = netif_rx_internal(skb); +- if (local_softirq_pending()) +- do_softirq(); +- preempt_enable(); ++ local_bh_enable(); + + return err; + } +@@ -5259,7 +5275,7 @@ static void flush_backlog(struct work_struct *work) + skb_queue_walk_safe(&sd->input_pkt_queue, skb, tmp) { + if (skb->dev->reg_state == NETREG_UNREGISTERING) { + __skb_unlink(skb, &sd->input_pkt_queue); +- kfree_skb(skb); ++ __skb_queue_tail(&sd->tofree_queue, skb); + input_queue_head_incr(sd); + } + } +@@ -5269,11 +5285,14 @@ static void flush_backlog(struct work_struct *work) + skb_queue_walk_safe(&sd->process_queue, skb, tmp) { + if (skb->dev->reg_state == NETREG_UNREGISTERING) { + __skb_unlink(skb, &sd->process_queue); +- kfree_skb(skb); ++ __skb_queue_tail(&sd->tofree_queue, skb); + input_queue_head_incr(sd); + } + } ++ if (!skb_queue_empty(&sd->tofree_queue)) ++ raise_softirq_irqoff(NET_RX_SOFTIRQ); + local_bh_enable(); ++ + } + + static void flush_all_backlogs(void) +@@ -5815,12 +5834,14 @@ static void net_rps_action_and_irq_enable(struct softnet_data *sd) + sd->rps_ipi_list = NULL; + + local_irq_enable(); ++ preempt_check_resched_rt(); + + /* Send pending IPI's to kick RPS processing on remote cpus. */ + net_rps_send_ipi(remsd); + } else + #endif + local_irq_enable(); ++ preempt_check_resched_rt(); + } + + static bool sd_has_rps_ipi_waiting(struct softnet_data *sd) +@@ -5850,7 +5871,9 @@ static int process_backlog(struct napi_struct *napi, int quota) + while (again) { + struct sk_buff *skb; + ++ local_irq_disable(); + while ((skb = __skb_dequeue(&sd->process_queue))) { ++ local_irq_enable(); + rcu_read_lock(); + __netif_receive_skb(skb); + rcu_read_unlock(); +@@ -5858,9 +5881,9 @@ static int process_backlog(struct napi_struct *napi, int quota) + if (++work >= quota) + return work; + ++ local_irq_disable(); + } + +- local_irq_disable(); + rps_lock(sd); + if (skb_queue_empty(&sd->input_pkt_queue)) { + /* +@@ -5898,6 +5921,7 @@ void __napi_schedule(struct napi_struct *n) + local_irq_save(flags); + ____napi_schedule(this_cpu_ptr(&softnet_data), n); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(__napi_schedule); + +@@ -5934,6 +5958,7 @@ bool napi_schedule_prep(struct napi_struct *n) + } + EXPORT_SYMBOL(napi_schedule_prep); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /** + * __napi_schedule_irqoff - schedule for receive + * @n: entry to schedule +@@ -5945,6 +5970,7 @@ void __napi_schedule_irqoff(struct napi_struct *n) + ____napi_schedule(this_cpu_ptr(&softnet_data), n); + } + EXPORT_SYMBOL(__napi_schedule_irqoff); ++#endif + + bool napi_complete_done(struct napi_struct *n, int work_done) + { +@@ -6324,13 +6350,21 @@ static __latent_entropy void net_rx_action(struct softirq_action *h) + unsigned long time_limit = jiffies + + usecs_to_jiffies(netdev_budget_usecs); + int budget = netdev_budget; ++ struct sk_buff_head tofree_q; ++ struct sk_buff *skb; + LIST_HEAD(list); + LIST_HEAD(repoll); + ++ __skb_queue_head_init(&tofree_q); ++ + local_irq_disable(); ++ skb_queue_splice_init(&sd->tofree_queue, &tofree_q); + list_splice_init(&sd->poll_list, &list); + local_irq_enable(); + ++ while ((skb = __skb_dequeue(&tofree_q))) ++ kfree_skb(skb); ++ + for (;;) { + struct napi_struct *n; + +@@ -6360,7 +6394,7 @@ static __latent_entropy void net_rx_action(struct softirq_action *h) + list_splice_tail(&repoll, &list); + list_splice(&list, &sd->poll_list); + if (!list_empty(&sd->poll_list)) +- __raise_softirq_irqoff(NET_RX_SOFTIRQ); ++ __raise_softirq_irqoff_ksoft(NET_RX_SOFTIRQ); + + net_rps_action_and_irq_enable(sd); + out: +@@ -8371,7 +8405,7 @@ static void netdev_init_one_queue(struct net_device *dev, + /* Initialize queue lock */ + spin_lock_init(&queue->_xmit_lock); + netdev_set_xmit_lockdep_class(&queue->_xmit_lock, dev->type); +- queue->xmit_lock_owner = -1; ++ netdev_queue_clear_owner(queue); + netdev_queue_numa_node_write(queue, NUMA_NO_NODE); + queue->dev = dev; + #ifdef CONFIG_BQL +@@ -9305,6 +9339,7 @@ static int dev_cpu_dead(unsigned int oldcpu) + + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_enable(); ++ preempt_check_resched_rt(); + + #ifdef CONFIG_RPS + remsd = oldsd->rps_ipi_list; +@@ -9318,10 +9353,13 @@ static int dev_cpu_dead(unsigned int oldcpu) + netif_rx_ni(skb); + input_queue_head_incr(oldsd); + } +- while ((skb = skb_dequeue(&oldsd->input_pkt_queue))) { ++ while ((skb = __skb_dequeue(&oldsd->input_pkt_queue))) { + netif_rx_ni(skb); + input_queue_head_incr(oldsd); + } ++ while ((skb = __skb_dequeue(&oldsd->tofree_queue))) { ++ kfree_skb(skb); ++ } + + return 0; + } +@@ -9630,8 +9668,9 @@ static int __init net_dev_init(void) + + INIT_WORK(flush, flush_backlog); + +- skb_queue_head_init(&sd->input_pkt_queue); +- skb_queue_head_init(&sd->process_queue); ++ skb_queue_head_init_raw(&sd->input_pkt_queue); ++ skb_queue_head_init_raw(&sd->process_queue); ++ skb_queue_head_init_raw(&sd->tofree_queue); + #ifdef CONFIG_XFRM_OFFLOAD + skb_queue_head_init(&sd->xfrm_backlog); + #endif +diff --git a/net/core/filter.c b/net/core/filter.c +index 34ec9324737b..03925960fb5c 100644 +--- a/net/core/filter.c ++++ b/net/core/filter.c +@@ -2000,7 +2000,7 @@ static inline int __bpf_tx_skb(struct net_device *dev, struct sk_buff *skb) + { + int ret; + +- if (unlikely(__this_cpu_read(xmit_recursion) > XMIT_RECURSION_LIMIT)) { ++ if (unlikely(xmit_rec_read() > XMIT_RECURSION_LIMIT)) { + net_crit_ratelimited("bpf: recursion limit reached on datapath, buggy bpf program?\n"); + kfree_skb(skb); + return -ENETDOWN; +@@ -2008,9 +2008,9 @@ static inline int __bpf_tx_skb(struct net_device *dev, struct sk_buff *skb) + + skb->dev = dev; + +- __this_cpu_inc(xmit_recursion); ++ xmit_rec_inc(); + ret = dev_queue_xmit(skb); +- __this_cpu_dec(xmit_recursion); ++ xmit_rec_dec(); + + return ret; + } +diff --git a/net/core/gen_estimator.c b/net/core/gen_estimator.c +index e4e442d70c2d..c8fa906733fb 100644 +--- a/net/core/gen_estimator.c ++++ b/net/core/gen_estimator.c +@@ -46,7 +46,7 @@ + struct net_rate_estimator { + struct gnet_stats_basic_packed *bstats; + spinlock_t *stats_lock; +- seqcount_t *running; ++ net_seqlock_t *running; + struct gnet_stats_basic_cpu __percpu *cpu_bstats; + u8 ewma_log; + u8 intvl_log; /* period : (250ms << intvl_log) */ +@@ -129,7 +129,7 @@ int gen_new_estimator(struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu_bstats, + struct net_rate_estimator __rcu **rate_est, + spinlock_t *lock, +- seqcount_t *running, ++ net_seqlock_t *running, + struct nlattr *opt) + { + struct gnet_estimator *parm = nla_data(opt); +@@ -227,7 +227,7 @@ int gen_replace_estimator(struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu_bstats, + struct net_rate_estimator __rcu **rate_est, + spinlock_t *lock, +- seqcount_t *running, struct nlattr *opt) ++ net_seqlock_t *running, struct nlattr *opt) + { + return gen_new_estimator(bstats, cpu_bstats, rate_est, + lock, running, opt); +diff --git a/net/core/gen_stats.c b/net/core/gen_stats.c +index e2fd8baec65f..8bab88738691 100644 +--- a/net/core/gen_stats.c ++++ b/net/core/gen_stats.c +@@ -142,7 +142,7 @@ __gnet_stats_copy_basic_cpu(struct gnet_stats_basic_packed *bstats, + } + + void +-__gnet_stats_copy_basic(const seqcount_t *running, ++__gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_stats_basic_packed *bstats, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b) +@@ -155,10 +155,10 @@ __gnet_stats_copy_basic(const seqcount_t *running, + } + do { + if (running) +- seq = read_seqcount_begin(running); ++ seq = net_seq_begin(running); + bstats->bytes = b->bytes; + bstats->packets = b->packets; +- } while (running && read_seqcount_retry(running, seq)); ++ } while (running && net_seq_retry(running, seq)); + } + EXPORT_SYMBOL(__gnet_stats_copy_basic); + +@@ -176,7 +176,7 @@ EXPORT_SYMBOL(__gnet_stats_copy_basic); + * if the room in the socket buffer was not sufficient. + */ + int +-gnet_stats_copy_basic(const seqcount_t *running, ++gnet_stats_copy_basic(net_seqlock_t *running, + struct gnet_dump *d, + struct gnet_stats_basic_cpu __percpu *cpu, + struct gnet_stats_basic_packed *b) +diff --git a/net/core/pktgen.c b/net/core/pktgen.c +index 092fa3d75b32..9d472d626aaa 100644 +--- a/net/core/pktgen.c ++++ b/net/core/pktgen.c +@@ -2160,7 +2160,8 @@ static void spin(struct pktgen_dev *pkt_dev, ktime_t spin_until) + s64 remaining; + struct hrtimer_sleeper t; + +- hrtimer_init_on_stack(&t.timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); ++ hrtimer_init_sleeper_on_stack(&t, CLOCK_MONOTONIC, HRTIMER_MODE_ABS, ++ current); + hrtimer_set_expires(&t.timer, spin_until); + + remaining = ktime_to_ns(hrtimer_expires_remaining(&t.timer)); +@@ -2175,7 +2176,6 @@ static void spin(struct pktgen_dev *pkt_dev, ktime_t spin_until) + } while (ktime_compare(end_time, spin_until) < 0); + } else { + /* see do_nanosleep */ +- hrtimer_init_sleeper(&t, current); + do { + set_current_state(TASK_INTERRUPTIBLE); + hrtimer_start_expires(&t.timer, HRTIMER_MODE_ABS); +diff --git a/net/core/skbuff.c b/net/core/skbuff.c +index 2b338df66944..d3fbc4b9451a 100644 +--- a/net/core/skbuff.c ++++ b/net/core/skbuff.c +@@ -63,6 +63,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -330,6 +331,8 @@ struct napi_alloc_cache { + + static DEFINE_PER_CPU(struct page_frag_cache, netdev_alloc_cache); + static DEFINE_PER_CPU(struct napi_alloc_cache, napi_alloc_cache); ++static DEFINE_LOCAL_IRQ_LOCK(netdev_alloc_lock); ++static DEFINE_LOCAL_IRQ_LOCK(napi_alloc_cache_lock); + + static void *__netdev_alloc_frag(unsigned int fragsz, gfp_t gfp_mask) + { +@@ -337,10 +340,10 @@ static void *__netdev_alloc_frag(unsigned int fragsz, gfp_t gfp_mask) + unsigned long flags; + void *data; + +- local_irq_save(flags); ++ local_lock_irqsave(netdev_alloc_lock, flags); + nc = this_cpu_ptr(&netdev_alloc_cache); + data = page_frag_alloc(nc, fragsz, gfp_mask); +- local_irq_restore(flags); ++ local_unlock_irqrestore(netdev_alloc_lock, flags); + return data; + } + +@@ -361,9 +364,13 @@ EXPORT_SYMBOL(netdev_alloc_frag); + + static void *__napi_alloc_frag(unsigned int fragsz, gfp_t gfp_mask) + { +- struct napi_alloc_cache *nc = this_cpu_ptr(&napi_alloc_cache); ++ struct napi_alloc_cache *nc; ++ void *data; + +- return page_frag_alloc(&nc->page, fragsz, gfp_mask); ++ nc = &get_locked_var(napi_alloc_cache_lock, napi_alloc_cache); ++ data = page_frag_alloc(&nc->page, fragsz, gfp_mask); ++ put_locked_var(napi_alloc_cache_lock, napi_alloc_cache); ++ return data; + } + + void *napi_alloc_frag(unsigned int fragsz) +@@ -412,13 +419,13 @@ struct sk_buff *__netdev_alloc_skb(struct net_device *dev, unsigned int len, + if (sk_memalloc_socks()) + gfp_mask |= __GFP_MEMALLOC; + +- local_irq_save(flags); ++ local_lock_irqsave(netdev_alloc_lock, flags); + + nc = this_cpu_ptr(&netdev_alloc_cache); + data = page_frag_alloc(nc, len, gfp_mask); + pfmemalloc = nc->pfmemalloc; + +- local_irq_restore(flags); ++ local_unlock_irqrestore(netdev_alloc_lock, flags); + + if (unlikely(!data)) + return NULL; +@@ -459,9 +466,10 @@ EXPORT_SYMBOL(__netdev_alloc_skb); + struct sk_buff *__napi_alloc_skb(struct napi_struct *napi, unsigned int len, + gfp_t gfp_mask) + { +- struct napi_alloc_cache *nc = this_cpu_ptr(&napi_alloc_cache); ++ struct napi_alloc_cache *nc; + struct sk_buff *skb; + void *data; ++ bool pfmemalloc; + + len += NET_SKB_PAD + NET_IP_ALIGN; + +@@ -479,7 +487,10 @@ struct sk_buff *__napi_alloc_skb(struct napi_struct *napi, unsigned int len, + if (sk_memalloc_socks()) + gfp_mask |= __GFP_MEMALLOC; + ++ nc = &get_locked_var(napi_alloc_cache_lock, napi_alloc_cache); + data = page_frag_alloc(&nc->page, len, gfp_mask); ++ pfmemalloc = nc->page.pfmemalloc; ++ put_locked_var(napi_alloc_cache_lock, napi_alloc_cache); + if (unlikely(!data)) + return NULL; + +@@ -490,7 +501,7 @@ struct sk_buff *__napi_alloc_skb(struct napi_struct *napi, unsigned int len, + } + + /* use OR instead of assignment to avoid clearing of bits in mask */ +- if (nc->page.pfmemalloc) ++ if (pfmemalloc) + skb->pfmemalloc = 1; + skb->head_frag = 1; + +@@ -722,23 +733,26 @@ void __consume_stateless_skb(struct sk_buff *skb) + + void __kfree_skb_flush(void) + { +- struct napi_alloc_cache *nc = this_cpu_ptr(&napi_alloc_cache); ++ struct napi_alloc_cache *nc; + ++ nc = &get_locked_var(napi_alloc_cache_lock, napi_alloc_cache); + /* flush skb_cache if containing objects */ + if (nc->skb_count) { + kmem_cache_free_bulk(skbuff_head_cache, nc->skb_count, + nc->skb_cache); + nc->skb_count = 0; + } ++ put_locked_var(napi_alloc_cache_lock, napi_alloc_cache); + } + + static inline void _kfree_skb_defer(struct sk_buff *skb) + { +- struct napi_alloc_cache *nc = this_cpu_ptr(&napi_alloc_cache); ++ struct napi_alloc_cache *nc; + + /* drop skb->head and call any destructors for packet */ + skb_release_all(skb); + ++ nc = &get_locked_var(napi_alloc_cache_lock, napi_alloc_cache); + /* record skb to CPU local list */ + nc->skb_cache[nc->skb_count++] = skb; + +@@ -753,6 +767,7 @@ static inline void _kfree_skb_defer(struct sk_buff *skb) + nc->skb_cache); + nc->skb_count = 0; + } ++ put_locked_var(napi_alloc_cache_lock, napi_alloc_cache); + } + void __kfree_skb_defer(struct sk_buff *skb) + { +diff --git a/net/ipv4/icmp.c b/net/ipv4/icmp.c +index ad75c468ecfb..1770ff1638bc 100644 +--- a/net/ipv4/icmp.c ++++ b/net/ipv4/icmp.c +@@ -77,6 +77,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -204,6 +205,8 @@ static const struct icmp_control icmp_pointers[NR_ICMP_TYPES+1]; + * + * On SMP we have one ICMP socket per-cpu. + */ ++static DEFINE_LOCAL_IRQ_LOCK(icmp_sk_lock); ++ + static struct sock *icmp_sk(struct net *net) + { + return *this_cpu_ptr(net->ipv4.icmp_sk); +@@ -214,12 +217,16 @@ static inline struct sock *icmp_xmit_lock(struct net *net) + { + struct sock *sk; + ++ if (!local_trylock(icmp_sk_lock)) ++ return NULL; ++ + sk = icmp_sk(net); + + if (unlikely(!spin_trylock(&sk->sk_lock.slock))) { + /* This can happen if the output path signals a + * dst_link_failure() for an outgoing ICMP packet. + */ ++ local_unlock(icmp_sk_lock); + return NULL; + } + return sk; +@@ -228,6 +235,7 @@ static inline struct sock *icmp_xmit_lock(struct net *net) + static inline void icmp_xmit_unlock(struct sock *sk) + { + spin_unlock(&sk->sk_lock.slock); ++ local_unlock(icmp_sk_lock); + } + + int sysctl_icmp_msgs_per_sec __read_mostly = 1000; +diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c +index b76cf96d5cfe..51358c73dada 100644 +--- a/net/ipv4/tcp_ipv4.c ++++ b/net/ipv4/tcp_ipv4.c +@@ -62,6 +62,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -634,6 +635,7 @@ void tcp_v4_send_check(struct sock *sk, struct sk_buff *skb) + } + EXPORT_SYMBOL(tcp_v4_send_check); + ++static DEFINE_LOCAL_IRQ_LOCK(tcp_sk_lock); + /* + * This routine will send an RST to the other tcp. + * +@@ -768,6 +770,7 @@ static void tcp_v4_send_reset(const struct sock *sk, struct sk_buff *skb) + arg.tos = ip_hdr(skb)->tos; + arg.uid = sock_net_uid(net, sk && sk_fullsock(sk) ? sk : NULL); + local_bh_disable(); ++ local_lock(tcp_sk_lock); + ctl_sk = *this_cpu_ptr(net->ipv4.tcp_sk); + if (sk) + ctl_sk->sk_mark = (sk->sk_state == TCP_TIME_WAIT) ? +@@ -780,6 +783,7 @@ static void tcp_v4_send_reset(const struct sock *sk, struct sk_buff *skb) + ctl_sk->sk_mark = 0; + __TCP_INC_STATS(net, TCP_MIB_OUTSEGS); + __TCP_INC_STATS(net, TCP_MIB_OUTRSTS); ++ local_unlock(tcp_sk_lock); + local_bh_enable(); + + #ifdef CONFIG_TCP_MD5SIG +@@ -860,6 +864,7 @@ static void tcp_v4_send_ack(const struct sock *sk, + arg.tos = tos; + arg.uid = sock_net_uid(net, sk_fullsock(sk) ? sk : NULL); + local_bh_disable(); ++ local_lock(tcp_sk_lock); + ctl_sk = *this_cpu_ptr(net->ipv4.tcp_sk); + if (sk) + ctl_sk->sk_mark = (sk->sk_state == TCP_TIME_WAIT) ? +@@ -871,6 +876,7 @@ static void tcp_v4_send_ack(const struct sock *sk, + + ctl_sk->sk_mark = 0; + __TCP_INC_STATS(net, TCP_MIB_OUTSEGS); ++ local_unlock(tcp_sk_lock); + local_bh_enable(); + } + +diff --git a/net/netfilter/core.c b/net/netfilter/core.c +index 93aaec3a54ec..b364cf8e5776 100644 +--- a/net/netfilter/core.c ++++ b/net/netfilter/core.c +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -27,6 +28,11 @@ + + #include "nf_internals.h" + ++#ifdef CONFIG_PREEMPT_RT_BASE ++DEFINE_LOCAL_IRQ_LOCK(xt_write_lock); ++EXPORT_PER_CPU_SYMBOL(xt_write_lock); ++#endif ++ + const struct nf_ipv6_ops __rcu *nf_ipv6_ops __read_mostly; + EXPORT_SYMBOL_GPL(nf_ipv6_ops); + +diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c +index fffeba1ba631..3502cba9c46e 100644 +--- a/net/packet/af_packet.c ++++ b/net/packet/af_packet.c +@@ -63,6 +63,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -667,7 +668,7 @@ static void prb_retire_rx_blk_timer_expired(struct timer_list *t) + if (BLOCK_NUM_PKTS(pbd)) { + while (atomic_read(&pkc->blk_fill_in_prog)) { + /* Waiting for skb_copy_bits to finish... */ +- cpu_relax(); ++ cpu_chill(); + } + } + +@@ -929,7 +930,7 @@ static void prb_retire_current_block(struct tpacket_kbdq_core *pkc, + if (!(status & TP_STATUS_BLK_TMO)) { + while (atomic_read(&pkc->blk_fill_in_prog)) { + /* Waiting for skb_copy_bits to finish... */ +- cpu_relax(); ++ cpu_chill(); + } + } + prb_close_block(pkc, pbd, po, status); +diff --git a/net/rds/ib_rdma.c b/net/rds/ib_rdma.c +index 0b347f46b2f4..f395f06031bc 100644 +--- a/net/rds/ib_rdma.c ++++ b/net/rds/ib_rdma.c +@@ -34,6 +34,7 @@ + #include + #include + #include ++#include + + #include "rds_single_path.h" + #include "ib_mr.h" +@@ -222,7 +223,7 @@ static inline void wait_clean_list_grace(void) + for_each_online_cpu(cpu) { + flag = &per_cpu(clean_list_grace, cpu); + while (test_bit(CLEAN_LIST_BUSY_BIT, flag)) +- cpu_relax(); ++ cpu_chill(); + } + } + +diff --git a/net/sched/sch_api.c b/net/sched/sch_api.c +index be7cd140b2a3..5b8f90de0615 100644 +--- a/net/sched/sch_api.c ++++ b/net/sched/sch_api.c +@@ -1166,7 +1166,7 @@ static struct Qdisc *qdisc_create(struct net_device *dev, + rcu_assign_pointer(sch->stab, stab); + } + if (tca[TCA_RATE]) { +- seqcount_t *running; ++ net_seqlock_t *running; + + err = -EOPNOTSUPP; + if (sch->flags & TCQ_F_MQROOT) { +diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c +index 77b289da7763..b0cc57ff96e3 100644 +--- a/net/sched/sch_generic.c ++++ b/net/sched/sch_generic.c +@@ -570,7 +570,11 @@ struct Qdisc noop_qdisc = { + .ops = &noop_qdisc_ops, + .q.lock = __SPIN_LOCK_UNLOCKED(noop_qdisc.q.lock), + .dev_queue = &noop_netdev_queue, ++#ifdef CONFIG_PREEMPT_RT_BASE ++ .running = __SEQLOCK_UNLOCKED(noop_qdisc.running), ++#else + .running = SEQCNT_ZERO(noop_qdisc.running), ++#endif + .busylock = __SPIN_LOCK_UNLOCKED(noop_qdisc.busylock), + }; + EXPORT_SYMBOL(noop_qdisc); +@@ -859,9 +863,17 @@ struct Qdisc *qdisc_alloc(struct netdev_queue *dev_queue, + lockdep_set_class(&sch->busylock, + dev->qdisc_tx_busylock ?: &qdisc_tx_busylock); + ++#ifdef CONFIG_PREEMPT_RT_BASE ++ seqlock_init(&sch->running); ++ lockdep_set_class(&sch->running.seqcount, ++ dev->qdisc_running_key ?: &qdisc_running_key); ++ lockdep_set_class(&sch->running.lock, ++ dev->qdisc_running_key ?: &qdisc_running_key); ++#else + seqcount_init(&sch->running); + lockdep_set_class(&sch->running, + dev->qdisc_running_key ?: &qdisc_running_key); ++#endif + + sch->ops = ops; + sch->flags = ops->static_flags; +@@ -1183,7 +1195,7 @@ void dev_deactivate_many(struct list_head *head) + /* Wait for outstanding qdisc_run calls. */ + list_for_each_entry(dev, head, close_list) { + while (some_qdisc_is_busy(dev)) +- yield(); ++ msleep(1); + /* The new qdisc is assigned at this point so we can safely + * unwind stale skb lists and qdisc statistics + */ +diff --git a/net/sunrpc/svc_xprt.c b/net/sunrpc/svc_xprt.c +index 6cf0fd37cbf0..48c0a0b90946 100644 +--- a/net/sunrpc/svc_xprt.c ++++ b/net/sunrpc/svc_xprt.c +@@ -393,7 +393,7 @@ void svc_xprt_do_enqueue(struct svc_xprt *xprt) + if (test_and_set_bit(XPT_BUSY, &xprt->xpt_flags)) + return; + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + pool = svc_pool_for_cpu(xprt->xpt_server, cpu); + + atomic_long_inc(&pool->sp_stats.packets); +@@ -417,7 +417,7 @@ void svc_xprt_do_enqueue(struct svc_xprt *xprt) + rqstp = NULL; + out_unlock: + rcu_read_unlock(); +- put_cpu(); ++ put_cpu_light(); + trace_svc_xprt_do_enqueue(xprt, rqstp); + } + EXPORT_SYMBOL_GPL(svc_xprt_do_enqueue); +diff --git a/samples/trace_events/trace-events-sample.c b/samples/trace_events/trace-events-sample.c +index 5522692100ba..8b4be8e1802a 100644 +--- a/samples/trace_events/trace-events-sample.c ++++ b/samples/trace_events/trace-events-sample.c +@@ -33,7 +33,7 @@ static void simple_thread_func(int cnt) + + /* Silly tracepoints */ + trace_foo_bar("hello", cnt, array, random_strings[len], +- ¤t->cpus_allowed); ++ current->cpus_ptr); + + trace_foo_with_template_simple("HELLO", cnt); + +diff --git a/scripts/mkcompile_h b/scripts/mkcompile_h +index 87f1fc9801d7..f67b15236936 100755 +--- a/scripts/mkcompile_h ++++ b/scripts/mkcompile_h +@@ -5,7 +5,8 @@ TARGET=$1 + ARCH=$2 + SMP=$3 + PREEMPT=$4 +-CC=$5 ++RT=$5 ++CC=$6 + + vecho() { [ "${quiet}" = "silent_" ] || echo "$@" ; } + +@@ -53,6 +54,7 @@ UTS_VERSION="#$VERSION" + CONFIG_FLAGS="" + if [ -n "$SMP" ] ; then CONFIG_FLAGS="SMP"; fi + if [ -n "$PREEMPT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS PREEMPT"; fi ++if [ -n "$RT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS RT"; fi + UTS_VERSION="$UTS_VERSION $CONFIG_FLAGS $TIMESTAMP" + + # Truncate to maximum length +diff --git a/security/apparmor/include/path.h b/security/apparmor/include/path.h +index b6380c5f0097..12abfddb19c9 100644 +--- a/security/apparmor/include/path.h ++++ b/security/apparmor/include/path.h +@@ -40,8 +40,10 @@ struct aa_buffers { + + #include + #include ++#include + + DECLARE_PER_CPU(struct aa_buffers, aa_buffers); ++DECLARE_LOCAL_IRQ_LOCK(aa_buffers_lock); + + #define ASSIGN(FN, A, X, N) ((X) = FN(A, N)) + #define EVAL1(FN, A, X) ASSIGN(FN, A, X, 0) /*X = FN(0)*/ +@@ -51,7 +53,17 @@ DECLARE_PER_CPU(struct aa_buffers, aa_buffers); + + #define for_each_cpu_buffer(I) for ((I) = 0; (I) < MAX_PATH_BUFFERS; (I)++) + +-#ifdef CONFIG_DEBUG_PREEMPT ++#ifdef CONFIG_PREEMPT_RT_BASE ++static inline void AA_BUG_PREEMPT_ENABLED(const char *s) ++{ ++ struct local_irq_lock *lv; ++ ++ lv = this_cpu_ptr(&aa_buffers_lock); ++ WARN_ONCE(lv->owner != current, ++ "__get_buffer without aa_buffers_lock\n"); ++} ++ ++#elif defined(CONFIG_DEBUG_PREEMPT) + #define AA_BUG_PREEMPT_ENABLED(X) AA_BUG(preempt_count() <= 0, X) + #else + #define AA_BUG_PREEMPT_ENABLED(X) /* nop */ +@@ -67,14 +79,15 @@ DECLARE_PER_CPU(struct aa_buffers, aa_buffers); + + #define get_buffers(X...) \ + do { \ +- struct aa_buffers *__cpu_var = get_cpu_ptr(&aa_buffers); \ ++ struct aa_buffers *__cpu_var; \ ++ __cpu_var = get_locked_ptr(aa_buffers_lock, &aa_buffers); \ + __get_buffers(__cpu_var, X); \ + } while (0) + + #define put_buffers(X, Y...) \ + do { \ + __put_buffers(X, Y); \ +- put_cpu_ptr(&aa_buffers); \ ++ put_locked_ptr(aa_buffers_lock, &aa_buffers); \ + } while (0) + + #endif /* __AA_PATH_H */ +diff --git a/security/apparmor/lsm.c b/security/apparmor/lsm.c +index 8b8b70620bbe..8330ef57a784 100644 +--- a/security/apparmor/lsm.c ++++ b/security/apparmor/lsm.c +@@ -45,7 +45,7 @@ + int apparmor_initialized; + + DEFINE_PER_CPU(struct aa_buffers, aa_buffers); +- ++DEFINE_LOCAL_IRQ_LOCK(aa_buffers_lock); + + /* + * LSM hook functions +diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c +index 02bac8abd206..d36802fe2825 100644 +--- a/virt/kvm/arm/arm.c ++++ b/virt/kvm/arm/arm.c +@@ -712,7 +712,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) + * involves poking the GIC, which must be done in a + * non-preemptible context. + */ +- preempt_disable(); ++ migrate_disable(); + + kvm_pmu_flush_hwstate(vcpu); + +@@ -761,7 +761,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) + kvm_timer_sync_hwstate(vcpu); + kvm_vgic_sync_hwstate(vcpu); + local_irq_enable(); +- preempt_enable(); ++ migrate_enable(); + continue; + } + +@@ -839,7 +839,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) + /* Exit types that need handling before we can be preempted */ + handle_exit_early(vcpu, run, ret); + +- preempt_enable(); ++ migrate_enable(); + + ret = handle_exit(vcpu, run, ret); + } +-- +2.22.0 + diff --git a/recipes-kernel/linux/linux-iot2050-rt_4.19.59-rt24+.bb b/recipes-kernel/linux/linux-iot2050-rt_4.19.59-rt24+.bb new file mode 100644 index 000000000..aa23483e2 --- /dev/null +++ b/recipes-kernel/linux/linux-iot2050-rt_4.19.59-rt24+.bb @@ -0,0 +1,12 @@ +# +# Copyright (c) Siemens AG, 2018 +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +require linux-iot2050_4.19.59+.bb + +SRC_URI += "file://rt-0001-rt-patch-for-IOT2050-kernel.patch" + +KERNEL_DEFCONFIG = "iot2050_defconfig_base-rt" diff --git a/recipes-kernel/linux/linux-iot2050_4.19.59+.bb b/recipes-kernel/linux/linux-iot2050_4.19.59+.bb new file mode 100644 index 000000000..49cfe22ed --- /dev/null +++ b/recipes-kernel/linux/linux-iot2050_4.19.59+.bb @@ -0,0 +1,44 @@ +# +# Copyright (c) Siemens AG, 2018 +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +require recipes-kernel/linux/linux-custom.inc + +SRC_URI += "git://git.ti.com/processor-sdk/processor-sdk-linux.git;branch=${KERNEL_BRANCH};rev=${KERNEL_REV}" + +SRC_URI += "file://${KERNEL_DEFCONFIG}" +SRC_URI += "file://${KERNEL_DEFCONFIG_EXTRA}" + +SRC_URI += "file://0001-iot2050-add-iot2050-platform-support.patch \ + file://0002-Add-support-for-U9300C-TD-LTE-module.patch \ + file://0003-feat-Add-CP210x-driver-support-to-software-flow-cont.patch \ + file://0004-fix-disable-usb-lpm-to-fix-usb-device-reset.patch \ + file://0005-Fix-DP-maybe-not-display-problem.patch \ + file://0006-fix-fix-the-hardware-flow-function-of-cp2102n24.patch \ + file://0007-serial-8250-8250_omap-Fix-DMA-teardown-sequence-duri.patch \ + file://0008-serial-8250-8250_omap-Remove-redundant-call-to-omap_.patch \ + file://0009-feat-add-io-expander-pcal9535-support.patch \ + file://0010-feat-modify-kernel-to-load-fw-from-MTD-for-pru-rtu.patch \ + file://0011-setting-the-RJ45-port-led-behavior.patch \ + file://0012-fix-clear-the-cycle-buffer-of-serial.patch \ + file://0013-fix-4169461-fixed-eth-link-down-when-autoneg-off.patch \ + file://0014-refactor-move-ioexpander-node-to-mcu-i2c0-for-LM5.patch \ + file://0015-fix-rproc-r5-0-set_config-failed-in-linux.patch \ + file://0016-feat-extend-led-panic-indicator-on-and-off.patch \ + file://0017-fix-can-not-auto-negotiate-to-100M-with-4-wire.patch \ + file://0018-change-OSPI-clock-id-to-support-sysfw-19.12.patch \ + file://0019-feat-set-sdhci0-clock-frequency-to-142.86MHz.patch \ + file://0020-feat-change-mmc-order-using-alias-in-dts.patch \ + file://0021-fix-PLL4_DCO-freq-over-range-cause-DP-not-display.patch \ + file://0022-iot2050-Roll-back-basic-dtb-to-V01.00.00.1-release.patch \ + file://0023-iot2050-Roll-back-advanced-dtb-to-V01.00.00.1-releas.patch" + +KERNEL_BRANCH = "processor-sdk-linux-4.19.y" +KERNEL_REV = "5f8c1c6121da785bbe7ecc5896877a2537b5d6eb" +KERNEL_DEFCONFIG = "iot2050_defconfig_base" +KERNEL_DEFCONFIG_EXTRA = "iot2050_defconfig_extra.cfg" + +S = "${WORKDIR}/git" diff --git a/recipes-security/openssl/openssl/0001-make-bnrand_range-reliable-with-deterministic-run-ti.patch b/recipes-security/openssl/openssl/0001-make-bnrand_range-reliable-with-deterministic-run-ti.patch new file mode 100644 index 000000000..366ee52ab --- /dev/null +++ b/recipes-security/openssl/openssl/0001-make-bnrand_range-reliable-with-deterministic-run-ti.patch @@ -0,0 +1,108 @@ +From 8c17c622d4eba6cfda935a1de7ff85dc99f4b2e7 Mon Sep 17 00:00:00 2001 +From: Markus Heintel +Date: Fri, 20 Dec 2019 10:35:30 +0100 +Subject: [PATCH] make bnrand_range() reliable with deterministic run time + +This reworks bnrand_range() to the recommendation of BSI TR-02102-1 as +well as FIPS 186-4 B.1.1, using a Lemire algorithm with bounded +runtime. +--- + crypto/bn/bn_rand.c | 69 ++++++++++++++++++++++++----------------------------- + 1 file changed, 31 insertions(+), 38 deletions(-) + +diff --git a/crypto/bn/bn_rand.c b/crypto/bn/bn_rand.c +index 6b4b50a068..c3715a24e1 100644 +--- a/crypto/bn/bn_rand.c ++++ b/crypto/bn/bn_rand.c +@@ -14,6 +14,8 @@ + #include + #include + ++#define BN_RAND_RANGE_BSI_TR_02102_1_EXTRA_BITS 64 ++ + typedef enum bnrand_flag_e { + NORMAL, TESTING, PRIVATE + } BNRAND_FLAG; +@@ -124,50 +126,41 @@ static int bnrand_range(BNRAND_FLAG flag, BIGNUM *r, const BIGNUM *range) + + /* BN_is_bit_set(range, n - 1) always holds */ + +- if (n == 1) ++ if (n == 1) { + BN_zero(r); +- else if (!BN_is_bit_set(range, n - 2) && !BN_is_bit_set(range, n - 3)) { ++ } else { + /* +- * range = 100..._2, so 3*range (= 11..._2) is exactly one bit longer +- * than range ++ * Bounded random number according to Method 2 in Table B4 on p. 70 ++ * of the BSI document "BSI - Technical Guideline, Cryptographic ++ * Mechanisms: Recommendations and Key Lengths, BSI TR-02102-1, ++ * Version 2018-02, May 29, 2018" ++ * ++ * Instead of a modulo reduction a mapping according to Lemire is ++ * used to convert from 0 < r < 2^n to 0 < r < range. + */ +- do { +- if (!bnrand(flag, r, n + 1, BN_RAND_TOP_ANY, BN_RAND_BOTTOM_ANY)) +- return 0; +- +- /* +- * If r < 3*range, use r := r MOD range (which is either r, r - +- * range, or r - 2*range). Otherwise, iterate once more. Since +- * 3*range = 11..._2, each iteration succeeds with probability >= +- * .75. +- */ +- if (BN_cmp(r, range) >= 0) { +- if (!BN_sub(r, r, range)) +- return 0; +- if (BN_cmp(r, range) >= 0) +- if (!BN_sub(r, r, range)) +- return 0; +- } +- +- if (!--count) { +- BNerr(BN_F_BNRAND_RANGE, BN_R_TOO_MANY_ITERATIONS); +- return 0; +- } ++ BIGNUM *rl = NULL; ++ BN_CTX *rctx = NULL; + ++ if ((rl = BN_new()) == NULL) { ++ return 0; + } +- while (BN_cmp(r, range) >= 0); +- } else { +- do { +- /* range = 11..._2 or range = 101..._2 */ +- if (!bnrand(flag, r, n, BN_RAND_TOP_ANY, BN_RAND_BOTTOM_ANY)) +- return 0; +- +- if (!--count) { +- BNerr(BN_F_BNRAND_RANGE, BN_R_TOO_MANY_ITERATIONS); +- return 0; +- } ++ if (!bnrand(flag, rl, n + BN_RAND_RANGE_BSI_TR_02102_1_EXTRA_BITS, ++ BN_RAND_TOP_ANY, BN_RAND_BOTTOM_ANY)) { ++ BN_free(rl); ++ return 0; + } +- while (BN_cmp(r, range) >= 0); ++ if (((rctx = BN_CTX_new()) == NULL) ++ || !BN_mul(rl, rl, range, rctx) ++ || !BN_rshift(rl, rl, ++ n + BN_RAND_RANGE_BSI_TR_02102_1_EXTRA_BITS) ++ || (BN_copy(r, rl) == NULL)) { ++ BN_free(rl); ++ BN_CTX_free(rctx); ++ return 0; ++ } ++ ++ BN_free(rl); ++ BN_CTX_free(rctx); + } + + bn_check_top(r); +-- +2.16.4 + diff --git a/recipes-security/openssl/openssl_1.1.1d.bb b/recipes-security/openssl/openssl_1.1.1d.bb new file mode 100644 index 000000000..64c6dcbbf --- /dev/null +++ b/recipes-security/openssl/openssl_1.1.1d.bb @@ -0,0 +1,29 @@ +# +# Copyright (c) Siemens AG, 2020 +# +# Authors: +# Jan Kiszka +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +inherit dpkg + +SRC_URI = " \ + apt://${PN} \ + file://0001-make-bnrand_range-reliable-with-deterministic-run-ti.patch;apply=no \ + " +CHANGELOG_V="+iot2050" + +do_prepare_build() { + deb_add_changelog + + cd ${S} + quilt import ${WORKDIR}/*.patch + quilt push -a +} + +dpkg_runbuild_prepend() { + export DEB_BUILD_OPTIONS="nocheck" +} diff --git a/wic/iot2050.wks b/wic/iot2050.wks new file mode 100644 index 000000000..408ef3918 --- /dev/null +++ b/wic/iot2050.wks @@ -0,0 +1,13 @@ +# +# Copyright (c) Siemens AG, 2019 +# +# Authors: +# Le Jin +# +# This file is subject to the terms and conditions of the MIT License. See +# COPYING.MIT file in the top-level directory. +# + +part / --source rootfs-u-boot --sourceparams="no_initrd=yes,script_prepend=setenv fdtfile siemens/iot2050-basic.dtb; run fdt_select" --fstype ext4 --label rootfs --align 1024 --use-uuid + +bootloader --ptable gpt --append "console=ttyS3,115200n8 earlycon=ns16550a,mmio32,0x02810000 mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),64k(pru0-fw),64k(pru1-fw),64k(rtu0-fw),64k(rtu1-fw),-@8m(ospi.rootfs) rw rootwait"