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Not an issue, but what is the purpose of Invert Inputs on NAND, AND, NOR and OR gates? I've been doing this a while and I am confused of the purpose. In principle, I could see inverting one input to eliminate an inverter, but not really sure of all. I've disabled it on my local version and replaced it with DeMorgan's Symbol option.
Attached text file shows a NAND with and without Invert Inputs selected. If you mouse over Invert Inputs NAND, it says it is a NAND, but logically with inverted inputs, it is an OR. A tad confusing and I'm not sure how it can be used.
Is this a partial implementation of DeMorgan's gates?
I have the logic worked out for DeMorgan's gates (version 3.1.1). Interested?
There are some schematics which show a NAND with inverted inputs in place of an OR gate (for example) so I wanted to make it possible to represent those in the simulator. Rather than have an alternate symbol for the OR gate, I decided to make inverted inputs an option. It seemed easier to explain, maybe.
Not an issue, but what is the purpose of Invert Inputs on NAND, AND, NOR and OR gates? I've been doing this a while and I am confused of the purpose. In principle, I could see inverting one input to eliminate an inverter, but not really sure of all. I've disabled it on my local version and replaced it with DeMorgan's Symbol option.
Attached text file shows a NAND with and without Invert Inputs selected. If you mouse over Invert Inputs NAND, it says it is a NAND, but logically with inverted inputs, it is an OR. A tad confusing and I'm not sure how it can be used.
Is this a partial implementation of DeMorgan's gates?
I have the logic worked out for DeMorgan's gates (version 3.1.1). Interested?
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