A curated list of awesome projects using or building on the Amaranth project.
Please submit a PR if you have any suggestions!
- amaranth-soc Amaranth System-on-a-Chip Framework.
- amaranth-stdio Amaranth stream based standard input and output components.
- RFCs Process for Amaranth feature addition.
- template-fpga Template repository for getting started with general Amaranth FPGA projects
- Minerva is a CPU core that implements the RISC-V RV32IMZicsr instruction set built by the maintainer of Amaranth SoC.
- Coreblocks is an experimental, modular out-of-order RISC-V core generator implemented in Amaranth.
- Glasgow Glasgow Interface Explorer is a tool for exploring digital interfaces
- LUNA is a toolkit for working with USB using FPGA technology, providing gateware and software to enable USB applications.
- Lambdalib Lambdalib is a collection of cores, helpers and tools for Amaranth created and maintained by LambdaConcept.
- ORBTrace Orbtrace is a lightweight, cost effective, USB2-HS Debug and Trace interface for ARM CORTEX-M processors.
- Tiliqua Tiliqua is a powerful, open hardware FPGA-based audio multitool for Eurorack.
- amaranth-exercises Graded exercises for Amaranth HDL
- amaranth-lib-bl0x A collection of (useful) modules written in Amaranth-HDL.
- amaranth-orchard Existing open source cores combined with wrappers and glue to enable Amaranth support.
- amaranth-stubs Type stubs for Amaranth
- hexastorm Hexastorm is a full toolkit for working with polygon lasers scanners using FPGA technology; and provides hardware, gateware, and software to enable laser scanning applications.
- ili9341spi Driver for ILI9341 LCD display. Proving ground for niar.
- learn-fpga-amaranth This repository contains code to follow the excellent learn-fpga tutorial by Bruno Levy from blinker to RISC-V using Amaranth HDL
- mtkCPU mtkCPU is a simple, clear, hackable and very inefficient implementation of RiscV ISA in Amaranth HDL.
- niar A small framework for building projects with Amaranth. Provides support for using CXXRTL, optionally with Zig and zxxrtl.
- pytest-amaranth-sim Fixture to automate running Amaranth simulations.
- sae RV32I softcore
- sentinel Sentinel is a small RISC-V CPU (RV32I_Zicsr) written in Amaranth. It implements the Machine Mode privileged spec, and is designed to fit into ~1000 4-input LUTs or less on an FPGA.
- smolarith Small arithmetic soft-cores for smol FPGAs.
- ChipFlow Custom ASIC platform
- LambdaConcept On-demand software development and hardware programming for a wide range of embedded systems.
Projects that have seen no updates for >6 months. There have been many changes in Amaranth in that time period.
Here be dragons, YMMV.
- https://github.com/icebreaker-fpga/icebreaker-amaranth-examples
- https://github.com/GuzTech/misato - Misato is a RISC-V CPU that supports the RV32I instruction set.
- https://github.com/kivikakk/sh1107 - SH1107 driver
- https://github.com/lambdaconcept/amaranth-to-litex Use amaranth-to-litex to simply import Amaranth code into a Litex project.
- https://github.com/weshu/Amaranth_LFSR - a re-write of Alexforencich's verilog-lfsr, with Amaranth HDL. (Note: there is now a RFC to add and LFSR generator to Amaranth core) amaranth-lang/rfcs#72)
- https://github.com/sporniket/amaranth-stuff Amaranth stuff by Sporniket is my collection of essential code written using the Amaranth hdl.