Releases: riscv/riscv-isa-manual
Release riscv-isa-release-b508ca0-2024-07-11
This release was created by: aswaterman
Release of RISC-V ISA, built from commit b508ca0, is now available.
What's Changed
- Remove the color from wavedrom files (first batch) by @kersten1 in #1521
- Consolidates Zbkb, Zbkc, and Zbkx into he Bitmanip chapter. by @wmat in #1522
Full Changelog: riscv-isa-release-7d9f0ac-2024-07-11...riscv-isa-release-b508ca0-2024-07-11
Release riscv-isa-release-7d9f0ac-2024-07-11
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 7d9f0ac, is now available.
What's Changed
- Move non-normative note to more logical position by @aswaterman in #1519
Full Changelog: riscv-isa-release-14a3c79-2024-07-10...riscv-isa-release-7d9f0ac-2024-07-11
Release riscv-isa-release-58fb684-2024-07-11
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 58fb684, is now available.
What's Changed
- Remove the color from wavedrom files (first batch) by @kersten1 in #1521
- Consolidates Zbkb, Zbkc, and Zbkx into he Bitmanip chapter. by @wmat in #1522
Full Changelog: riscv-isa-release-7d9f0ac-2024-07-11...riscv-isa-release-58fb684-2024-07-11
Release riscv-isa-release-14a3c79-2024-07-10
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 14a3c79, is now available.
What's Changed
- Fix C.NOP hint condition by @bgasiorzewski in #1504
- Fix funct7 codes in integer register-register inst wavedrom by @ved-rivos in #1507
- Add SDT bit in mstatus wavedrom files by @ved-rivos in #1506
- Clarify henvcfg/senvcfg.sse are read-only zero when menvcfg.sse is 0 by @ved-rivos in #1511
- Clarify RNMI and Smdbltrp/Ssdbltrp interaction by @ved-rivos in #1513
- Add LCOFIE and LCOFIP to mie and mip diagrams. by @wmat in #1516
Full Changelog: riscv-isa-release-bd0524f-2024-07-03...riscv-isa-release-14a3c79-2024-07-10
Smrnmi v1.0
Merge pull request #1492 from riscv/smrnmi-ratified Smrnmi is ratified
Release riscv-isa-release-ebf2e3a-2024-07-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit ebf2e3a, is now available.
What's Changed
- Mark Zabha status as Ratfied by @ved-rivos in #1499
- Update Zicfiss Zicfilp to ratified state by @ved-rivos in #1497
- Relax behavior of some HINTs when MXLEN > XLEN by @aswaterman in #1494
- Update Svvptc extension status to ratified by @aswaterman in #1500
Full Changelog: riscv-isa-release-077e627-2024-07-03...riscv-isa-release-ebf2e3a-2024-07-03
Release riscv-isa-release-bd0524f-2024-07-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit bd0524f, is now available.
What's Changed
- Mark Zabha status as Ratfied by @ved-rivos in #1499
- Update Zicfiss Zicfilp to ratified state by @ved-rivos in #1497
- Relax behavior of some HINTs when MXLEN > XLEN by @aswaterman in #1494
- Update Svvptc extension status to ratified by @aswaterman in #1500
Full Changelog: riscv-isa-release-077e627-2024-07-03...riscv-isa-release-bd0524f-2024-07-03
Release riscv-isa-release-5ba4a13-2024-07-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 5ba4a13, is now available.
What's Changed
- Fix parallel builds by @aswaterman in #1491
Full Changelog: riscv-isa-release-ef6024b-2024-07-02...riscv-isa-release-5ba4a13-2024-07-03
Release riscv-isa-release-35eb394-2024-07-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 35eb394, is now available.
What's Changed
- Clarify htimedelta is mandatory if time exists by @aswaterman in #1495
Full Changelog: smrnmi-1.0...riscv-isa-release-35eb394-2024-07-03
Release riscv-isa-release-30f2e7b-2024-07-03
This release was created by: aswaterman
Release of RISC-V ISA, built from commit 30f2e7b, is now available.
What's Changed
- Clarify that timer/cofi interrupts may arrive delayed in xip by @aswaterman in #1493
Full Changelog: riscv-isa-release-5ba4a13-2024-07-03...riscv-isa-release-30f2e7b-2024-07-03