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If the hart encounters an exception while executing in M-mode with the mnstatus.NMIE bit clear, the actions taken are the same as if the exception had occurred while mnstatus.NMIE were set, except that the program counter is set to the RNMI exception trap handler address (rather than the address specified by mtvec).
Given mnstatus.NMIE=0:
If the hart encounters a delegated exception in S-mode, which is supposed to trap to S-mode. What should the program counter be set to?
address specified by stvec
RNMI exception trap handler address (handle in M-mode)
RNMI exception trap handler address (handle in S-mode)
The text was updated successfully, but these errors were encountered:
Right - but the question is: what happens if Smode, delegated, NMIE=0.
There really should be a spec table with all 8 (or 12) variations, which
would make this obvious - Sail needs the equivalent anyway.
Given
mnstatus.NMIE=0
:If the hart encounters a delegated exception in S-mode, which is supposed to trap to S-mode. What should the program counter be set to?
stvec
The text was updated successfully, but these errors were encountered: