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add the all(or half)-inclusive air bridges on the routed CPW lines
add indium bump, which can connect the Q_chip and C_chip, in the flip chip design.
What are use cases for this feature?
Used in the flip chip design.
The air bridge is required to isolate the CPW wires from the qubits.
And if we can have the 3D indium bump connecting the 2 chips, the simulation will be more precise, just like the wire-bonding in the 2D simulation.
The text was updated successfully, but these errors were encountered:
What is the feature being requested?
What are use cases for this feature?
Used in the flip chip design.
The air bridge is required to isolate the CPW wires from the qubits.
And if we can have the 3D indium bump connecting the 2 chips, the simulation will be more precise, just like the wire-bonding in the 2D simulation.
The text was updated successfully, but these errors were encountered: