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fpga: Removed hyperbus for this PR
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docs/tg/xilinx.md

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@@ -8,8 +8,10 @@ Additionally, for on-chip debugging you need:
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We currently provide working setups for:
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- Xilinx VCU128 with Vivado `>= 2020.2`
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- Xilinx VCU118 with Vivado `>= 2020.2`
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- Xilinx VCU128 with Vivado `== 2020.2`
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- Xilinx VCU118 with Vivado `== 2020.2`
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**Note: Certain version of Vivado might cause issue, until these issues are resolved it is safer to use 2020.2**
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We are working on support for more boards in the future.
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@@ -25,6 +27,16 @@ design flow to link Carfield with external IPs. This flow is less human readable
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integrating more complex IPs as Xilinx Ethernet. *Note that this may require you to own the
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respective licenses.*
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## For impatient readers
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The recommended command to build a bitstream (for VCU128) is
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```bash
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make car-xil-all XILINX_FLAVOR=bd VIVADO="vitis-2020.2 vivado" VIVADO_MODE=gui XILINX_BOARD=vcu128 GEN_NO_HYPERBUS=1 GEN_EXT_JTAG=1 CARFIELD_CONFIG=carfield_l2dual_spatz_periph
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```
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Please find below more explanations.
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## Building the vanilla bistream (VCU128 only)
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Due to the structure of the Makefile flow. All the following commands are to be executed at the root

target/xilinx/flavor_bd/constraints/vcu118_hyperbus.xdc

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target/xilinx/flavor_bd/constraints/vcu128_hyperbus.xdc

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target/xilinx/flavor_bd/scripts/carfield_bd_hyperbus.tcl

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target/xilinx/flavor_bd/scripts/run.tcl

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@@ -32,12 +32,6 @@ if {[info exists ::env(GEN_EXT_JTAG)] && ($::env(GEN_EXT_JTAG)==1)} {
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import_files -fileset constrs_1 -norecurse constraints/$::env(XILINX_BOARD)_ext_jtag.xdc
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}
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# Add the hyperbus pins to block design
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if {![info exists ::env(GEN_NO_HYPERBUS)] || ($::env(GEN_NO_HYPERBUS)==0)} {
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source scripts/carfield_bd_hyperbus.tcl
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import_files -fileset constrs_1 -norecurse constraints/$::env(XILINX_BOARD)_hyperbus.xdc
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}
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make_wrapper -files [get_files $project/$project.srcs/sources_1/bd/design_1/design_1.bd] -top
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add_files -norecurse $project/$project.gen/sources_1/bd/design_1/hdl/design_1_wrapper.v
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target/xilinx/flavor_vanilla/constraints/vcu128_hyperbus.xdc

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target/xilinx/flavor_vanilla/flavor_vanilla.mk

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@@ -46,6 +46,7 @@ $(CAR_XIL_DIR)/flavor_vanilla/scripts/add_sources.tcl: Bender.yml
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# Compile bitstream
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$(CAR_XIL_DIR)/flavor_vanilla/out/%.bit: $(xilinx_ips_paths_vanilla) $(CAR_XIL_DIR)/flavor_vanilla/scripts/add_sources.tcl
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@if [ "$(GEN_NO_HYPERBUS)" != "1" ]; then echo "Hyperbus not supported yet in this branch"; fi;
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@mkdir -p $(CAR_XIL_DIR)/flavor_vanilla/out
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cd $(CAR_XIL_DIR)/flavor_vanilla && $(vivado_env) $(VIVADO) $(VIVADO_FLAGS) -source scripts/run.tcl
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find $(CAR_XIL_DIR)/flavor_vanilla/carfield* -name "*.ltx" -o -name "*.bit" -o -name "*routed.rpt" | xargs -I {} cp {} $(CAR_XIL_DIR)/flavor_vanilla/out

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