[RV64_DYNAREC] Added, fixed, and optimized opcodes (#2059)

* [RV64_DYNAREC] Added 66 0F 38 37 PCMPGTQ opcode * [RV64_DYNAREC] Added 66 0F 17 MOVHPD opcode * [RV64_DYNAREC] Added 66 0F 38 15 PBLENDVPD opcode * [RV64_DYNAREC] Optimized vector SSE packed compare * [RV64_DYNAREC] Optimized vector MMX MOVD Gm, Ed * [RV64_DYNAREC] Optimized vector SSE PMADDWD opcode * [RV64_DYNAREC] Added vector PCMPGTQ opcode * [RV64_DYNAREC] Added vector 66 0F 17 MOVHPD opcode * [RV64_DYNAREC] Optimized vector 66 0F 16 MOVHPD opcode * [RV64_DYNAREC] Added vector PBLENDVPD opcode * [RV64_DYNAREC] Optimized vector PMADDUBSW opcode * [RV64_DYNAREC] Optimized vector SSE logical shifts with Ex * [RV64_DYNAREC] Optimized vector SSE unpack * [RV64_DYNAREC] Added F0 F6 /2 LOCK NOT opcode * [RV64_DYNAREC] Fixed vector packed logical shift
ptitSeb · Nov 24, 2024 · 3bde222 · 3bde222
1 parent d0af86d
commit 3bde222
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Showing 5 changed files with 188 additions and 119 deletions.
diff --git a/src/dynarec/rv64/dynarec_rv64_0f_vector.c b/src/dynarec/rv64/dynarec_rv64_0f_vector.c
@@ -659,7 +659,9 @@ uintptr_t dynarec64_0F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip,
             } else {
                 SET_ELEMENT_WIDTH(x3, VECTOR_SEW32, 1);
             }
-            VXOR_VV(v0, v0, v0, VECTOR_UNMASKED);
+            if (!rv64_xtheadvector) {
+                VXOR_VV(v0, v0, v0, VECTOR_UNMASKED);
+            }
             VMV_S_X(v0, ed);
             break;
         case 0x6F:
@@ -850,15 +852,16 @@ uintptr_t dynarec64_0F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip,
             nextop = F8;
             q0 = fpu_get_scratch(dyn);
             GETGM_vector(v0);
-            SET_ELEMENT_WIDTH(x1, u8, 1);
             if (MODREG) {
                 v1 = mmx_get_reg_vector(dyn, ninst, x1, x2, x3, (nextop & 7));
+                SET_ELEMENT_WIDTH(x1, VECTOR_SEW64, 1);
                 VMV_X_S(x4, v1);
             } else {
                 SMREAD();
                 addr = geted(dyn, addr, ninst, nextop, &wback, v1, x3, &fixedaddress, rex, NULL, 1, 0);
                 LD(x4, wback, fixedaddress);
             }
+            SET_ELEMENT_WIDTH(x1, u8, 1);
             SLTIU(x3, x4, i32);
             SUB(x3, xZR, x3);
             NOT(x3, x3); // mask
@@ -1034,15 +1037,16 @@ uintptr_t dynarec64_0F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip,
             nextop = F8;
             q0 = fpu_get_scratch(dyn);
             GETGM_vector(v0);
-            SET_ELEMENT_WIDTH(x1, u8, 1);
             if (MODREG) {
                 v1 = mmx_get_reg_vector(dyn, ninst, x1, x2, x3, (nextop & 7));
+                SET_ELEMENT_WIDTH(x1, VECTOR_SEW64, 1);
                 VMV_X_S(x4, v1);
             } else {
                 SMREAD();
                 addr = geted(dyn, addr, ninst, nextop, &wback, v1, x3, &fixedaddress, rex, NULL, 1, 0);
                 LD(x4, wback, fixedaddress);
             }
+            SET_ELEMENT_WIDTH(x1, u8, 1);
             SLTIU(x3, x4, i32);
             SUB(x3, xZR, x3);
             NOT(x3, x3); // mask

diff --git a/src/dynarec/rv64/dynarec_rv64_660f.c b/src/dynarec/rv64/dynarec_rv64_660f.c
@@ -131,6 +131,20 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
             LD(x3, wback, fixedaddress);
             SD(x3, gback, gdoffset + 8);
             break;
+        case 0x17:
+            INST_NAME("MOVHPD Eq, Gx");
+            nextop = F8;
+            GETGX();
+            if (MODREG) {
+                // access register instead of memory is bad opcode!
+                DEFAULT;
+                return addr;
+            }
+            SMREAD();
+            addr = geted(dyn, addr, ninst, nextop, &wback, x2, x3, &fixedaddress, rex, NULL, 1, 0);
+            LD(x3, gback, gdoffset + 8);
+            SD(x3, wback, fixedaddress);
+            break;
         case 0x1F:
             INST_NAME("NOP (multibyte)");
             nextop = F8;

diff --git a/src/dynarec/rv64/dynarec_rv64_660f38.c b/src/dynarec/rv64/dynarec_rv64_660f38.c
@@ -326,6 +326,18 @@ uintptr_t dynarec64_660F38(dynarec_rv64_t* dyn, uintptr_t addr, uint8_t opcode,
                         SW(x3, gback, gdoffset + i * 4);
                     }
                     break;
+                case 0x15:
+                    INST_NAME("PBLENDVPD Gx,Ex");
+                    nextop = F8;
+                    GETGX();
+                    GETEX(x2, 0, 8);
+                    for (int i = 0; i < 2; ++i) {
+                        LD(x3, xEmu, offsetof(x64emu_t, xmm[0]) + i * 8);
+                        BGE(x3, xZR, 4 + 4 * 2);
+                        LD(x3, wback, fixedaddress + i * 8);
+                        SD(x3, gback, gdoffset + i * 8);
+                    }
+                    break;
                 case 0x17:
                     INST_NAME("PTEST Gx, Ex");
                     nextop = F8;
@@ -580,7 +592,13 @@ uintptr_t dynarec64_660F38(dynarec_rv64_t* dyn, uintptr_t addr, uint8_t opcode,
                         SD(x3, gback, gdoffset + i * 8);
                     }
                     break;
-
+                case 0x37:
+                    INST_NAME("PCMPGTQ Gx, Ex"); // SSE4 opcode!
+                    nextop = F8;
+                    GETGX();
+                    GETEX(x2, 0, 8);
+                    SSE_LOOP_Q(x3, x4, SLT(x4, x4, x3); NEG(x3, x4));
+                    break;
                 case 0x38:
                     INST_NAME("PMINSB Gx, Ex"); // SSE4 opcode!
                     nextop = F8;