From f68577ab9c9a80b9d24a34c63e7166508dbdde5d Mon Sep 17 00:00:00 2001 From: Stefan Mach Date: Fri, 31 May 2019 15:48:53 +0200 Subject: [PATCH] :bug: [cast] Fix internal pipeline bypassing --- docs/CHANGELOG.md | 5 +++++ src/fpnew_cast_multi.sv | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/docs/CHANGELOG.md b/docs/CHANGELOG.md index 68ea1dbb..2275a387 100644 --- a/docs/CHANGELOG.md +++ b/docs/CHANGELOG.md @@ -12,6 +12,11 @@ In this sense, we interpret the "Public API" of a hardware module as its port/pa ### Changed ### Fixed +## [0.5.1] - 2019-05-31 + +### Fixed +- Internal pipeline bypass in cast unit + ## [0.5.1] - 2019-05-27 ### Fixed diff --git a/src/fpnew_cast_multi.sv b/src/fpnew_cast_multi.sv index 131087a4..6ad2c353 100644 --- a/src/fpnew_cast_multi.sv +++ b/src/fpnew_cast_multi.sv @@ -363,7 +363,7 @@ module fpnew_cast_multi #( assign in_ready_inside = in_ready_output; assign input_sign_q = input_sign; assign input_exp_q = input_exp; - assign destination_exp_d = destination_exp_d; + assign destination_exp_q = destination_exp_d; assign input_mant_q = input_mant; assign src_is_int_q = src_is_int; assign dst_is_int_q = dst_is_int;