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How to bring printf support in simulation environment ? #2426
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Indeed this feature is highly requested. But as you know it is not supported. The solution would be to support pk which provides the print feature. If someone is ready to work on it, we can provide recommendations. |
Yes, please share a plan (or an outline) for the required functionality. That would be helpful in assessing whether someone (e.g. myself) can take up the task. |
@valentinThomazic the floor is yours to explain how to proceed ;-) |
Hey sorry for the delay, the riscv proxy kernel used to be supported in this repo (I can give some directions if needed). |
Is there an existing CVA6 bug for this?
Bug Description
Hi,
I found that there has been recent discussion (May 2024 - July 2024) regarding printf statement support in CVA6 simulations (see #2103 #2184 #2220 ). It seems that CVA6 simulation environment, in its current form (e.g. with Verilator), doesn't support this.
For example, Dhrystone C files [1] have debug_print statements in them. To a newcomer, this would give an initial impression that these prints should be visible somewhere in the logfiles or console output. However, a closer inspection reveals that the implementation of debug_print() function is empty. In development stage, it is common in bare-metal environments to disable print statements, so that other parts of the test can pass through.
That being said, printf statements are useful in debugging, especially when the target under debug is a CPU itself. (I only speak for myself, based on my experience with RTL verification of ARM CPUs, and some RISC-V CPUs as well).
Please advise on this :
Thanks,
Isaar
Code reference :
[1] Dhrystone source files (dhrystone_main.c and dhrystone.c) : Fetched by install-riscv-tests.sh
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