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KimmoVaisanen-AlifSemiKimmoVaisanen-AlifSemi
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Update to cmsis-toolbox 2.6.1
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lines changed

‎.alif/M55_HE_cfg.json‎

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{
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"DEVICE": {
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"disabled" : false,
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"binary": "app-device-config.json",
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"version" : "0.5.00",
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"signed": true
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},
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"USER_APP": {
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"binary": "alif-img.bin",
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"mramAddress": "0x80000000",

‎.alif/M55_HP_cfg.json‎

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{
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"DEVICE": {
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"disabled" : false,
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"binary": "app-device-config.json",
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"version" : "0.5.00",
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"signed": true
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},
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"USER_APP": {
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"binary": "alif-img.bin",
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"mramAddress": "0x80000000",
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"mramAddress": "0x80200000",
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"version": "1.0.0",
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"cpu_id": "M55_HP",
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"flags": ["boot"],

‎.gitignore‎

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tmp/
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out/
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RTE/
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*.yml
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!alif.cbuild-pack.yml
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*.cprj
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*.clangd

‎alif.cbuild-pack.yml‎

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cbuild-pack:
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resolved-packs:
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- resolved-pack: ARM::[email protected]
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selected-by-pack:
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- ARM::CMSIS@>=5.9.0
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- resolved-pack: ARM::[email protected]
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selected-by-pack:
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- ARM::CMSIS-FreeRTOS@>=10.5.1
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- resolved-pack: AlifSemiconductor::[email protected]
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selected-by-pack:
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- AlifSemiconductor::[email protected]
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- resolved-pack: AlifSemiconductor::[email protected]
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selected-by-pack:
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- AlifSemiconductor::[email protected]
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- resolved-pack: AlifSemiconductor::[email protected]
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selected-by-pack:
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- AlifSemiconductor::[email protected]
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- resolved-pack: LVGL::[email protected]
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selected-by-pack:
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- LVGL::[email protected]

‎alif.csolution.yaml‎

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# yaml-language-server: $schema=https://raw.githubusercontent.com/Open-CMSIS-Pack/devtools/tools/projmgr/2.3.0/tools/projmgr/schemas/csolution.schema.json
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# yaml-language-server: $schema=https://raw.githubusercontent.com/Open-CMSIS-Pack/devtools/tools/projmgr/2.6.0/tools/projmgr/schemas/csolution.schema.json
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solution:
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created-for: cmsis-toolbox@2.3.0
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created-for: cmsis-toolbox@2.6.0
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cdefault:
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# List of tested compilers that can be selected
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select-compiler:
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- compiler: GCC
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# Select used compiler
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compiler: GCC
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packs:
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- pack: AlifSemiconductor::[email protected]
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- pack: ARM::CMSIS@>=5.9.0

‎app/RTE/Device/AE722F80F55D5LS_M55_HE/M55_HE_Config.h‎

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/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* [email protected], or visit: https://alifsemi.com/license
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*
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*/
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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#ifndef __M55_HE_CONFIG_H
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#define __M55_HE_CONFIG_H
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// <o> Map Global to Local address of TCM Alias
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// <0=> DISABLE
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// <1=> ENABLE
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// <i> Defines Enable this to return aliased address in GlobalToLocal function
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// <i> Default: 0
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#define CONFIG_MAP_GLOBAL_TO_LOCAL_TCM_ALIAS 0
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// <e> Prefetch Control
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// <i> Prefetch Control values for Performance Improvement
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// <o> Maximum Outstanding Line-fills <1-6>
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// <i> Defines Maximum Outstanding line-fills issued on AXI
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// <i> Default: 3
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#define MEMSYSCTL_PFCR_MAX_OS_DEFAULT_VALUE 3
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// <o> Maximum Look Ahead Distance <0-6>
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// <i> Defines Maximum Look Ahead distance
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// <i> Default: 6
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#define MEMSYSCTL_PFCR_MAX_LA_DEFAULT_VALUE 6
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// <o> Minimum Look Ahead Distance <0-6>
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// <i> Defines Minimum Look Ahead distance
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// <i> Default: 2
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#define MEMSYSCTL_PFCR_MIN_LA_DEFAULT_VALUE 2
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// </e> Prefetch Control
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#endif /* __M55_HE_CONFIG_H */

‎app/RTE/Device/AE722F80F55D5LS_M55_HE/[email protected]‎

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/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* [email protected], or visit: https://alifsemi.com/license
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*
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*/
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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#ifndef __M55_HE_CONFIG_H
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#define __M55_HE_CONFIG_H
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// <o> Map Global to Local address of TCM Alias
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// <0=> DISABLE
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// <1=> ENABLE
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// <i> Defines Enable this to return aliased address in GlobalToLocal function
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// <i> Default: 0
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#define CONFIG_MAP_GLOBAL_TO_LOCAL_TCM_ALIAS 0
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// <e> Prefetch Control
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// <i> Prefetch Control values for Performance Improvement
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// <o> Maximum Outstanding Line-fills <1-6>
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// <i> Defines Maximum Outstanding line-fills issued on AXI
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// <i> Default: 3
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#define MEMSYSCTL_PFCR_MAX_OS_DEFAULT_VALUE 3
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// <o> Maximum Look Ahead Distance <0-6>
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// <i> Defines Maximum Look Ahead distance
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// <i> Default: 6
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#define MEMSYSCTL_PFCR_MAX_LA_DEFAULT_VALUE 6
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// <o> Minimum Look Ahead Distance <0-6>
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// <i> Defines Minimum Look Ahead distance
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// <i> Default: 2
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#define MEMSYSCTL_PFCR_MIN_LA_DEFAULT_VALUE 2
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// </e> Prefetch Control
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#endif /* __M55_HE_CONFIG_H */

‎app/RTE/Device/AE722F80F55D5LS_M55_HE/M55_HE_map.h‎

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/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* [email protected], or visit: https://alifsemi.com/license
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*
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*/
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#ifndef M55_HE_MAP_H
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#define M55_HE_MAP_H
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#include "global_map.h"
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/******************************************************************************/
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/* Local memory map */
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/******************************************************************************/
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#define ITCM_BASE (0x00000000UL)
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#define ITCM_ALIAS_BIT (0x01000000UL)
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#define ITCM_REGION_SIZE (0x02000000UL)
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#define ITCM_SIZE (SRAM4_SIZE) /* 256K */
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#define ITCM_GLOBAL_BASE (SRAM4_BASE)
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#define DTCM_BASE (0x20000000UL)
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#define DTCM_ALIAS_BIT (0x01000000UL)
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#define DTCM_REGION_SIZE (0x02000000UL)
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#define DTCM_SIZE (SRAM5_SIZE) /* 256K */
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#define DTCM_GLOBAL_BASE (SRAM5_BASE)
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#define MHU_A32_M55HE_0_RX_BASE 0x40000000UL
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#define MHU_M55HE_A32_0_TX_BASE 0x40010000UL
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#define MHU_A32_M55HE_1_RX_BASE 0x40020000UL
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#define MHU_M55HE_A32_1_TX_BASE 0x40030000UL
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#define MHU_SECPU_M55HE_0_RX_BASE 0x40040000UL
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#define MHU_M55HE_SECPU_0_TX_BASE 0x40050000UL
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#define MHU_SECPU_M55HE_1_RX_BASE 0x40060000UL
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#define MHU_M55HE_SECPU_1_TX_BASE 0x40070000UL
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#define MHU_M55HP_M55HE_0_RX_BASE 0x40080000UL
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#define MHU_M55HE_M55HP_0_TX_BASE 0x40090000UL
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#define MHU_M55HP_M55HE_1_RX_BASE 0x400A0000UL
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#define MHU_M55HE_M55HP_1_TX_BASE 0x400B0000UL
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#define MHU_APSS_S_RX_BASE MHU_A32_M55HE_0_RX_BASE
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#define MHU_APSS_S_TX_BASE MHU_M55HE_A32_0_TX_BASE
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#define MHU_APSS_NS_RX_BASE MHU_A32_M55HE_1_RX_BASE
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#define MHU_APSS_NS_TX_BASE MHU_M55HE_A32_1_TX_BASE
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#define MHU_SESS_S_RX_BASE MHU_SECPU_M55HE_0_RX_BASE
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#define MHU_SESS_S_TX_BASE MHU_M55HE_SECPU_0_TX_BASE
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#define MHU_SESS_NS_RX_BASE MHU_SECPU_M55HE_1_RX_BASE
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#define MHU_SESS_NS_TX_BASE MHU_M55HE_SECPU_1_TX_BASE
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#define MHU_RTSS_S_RX_BASE MHU_M55HP_M55HE_0_RX_BASE
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#define MHU_RTSS_S_TX_BASE MHU_M55HE_M55HP_0_TX_BASE
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#define MHU_RTSS_NS_RX_BASE MHU_M55HP_M55HE_1_RX_BASE
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#define MHU_RTSS_NS_TX_BASE MHU_M55HE_M55HP_1_TX_BASE
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#define DMA2_SEC_BASE 0x400C0000UL
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#define DMA2_NS_BASE 0x400E0000UL
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#define DMALOCAL_SEC_BASE DMA2_SEC_BASE
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#define DMALOCAL_NS_BASE DMA2_NS_BASE
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#define NPU_HE_BASE 0x400E1000UL
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#define LOCAL_NPU_BASE NPU_HE_BASE
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#define EVTRTR2_BASE 0x400E2000UL
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#define EVTRTRLOCAL_BASE EVTRTR2_BASE
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#define WDT_HE_CTRL_BASE 0x40100000UL
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#define WDT_HE_REFRESH_BASE 0x40101000UL
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#define LOCAL_WDT_CTRL_BASE WDT_HE_CTRL_BASE
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#define LOCAL_WDT_REFRESH_BASE WDT_HE_REFRESH_BASE
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#endif /* M55_HE_MAP_H */

‎app/RTE/Device/AE722F80F55D5LS_M55_HE/[email protected]‎

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/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* [email protected], or visit: https://alifsemi.com/license
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*
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*/
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#ifndef M55_HE_MAP_H
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#define M55_HE_MAP_H
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#include "global_map.h"
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/******************************************************************************/
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/* Local memory map */
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/******************************************************************************/
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#define ITCM_BASE (0x00000000UL)
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#define ITCM_ALIAS_BIT (0x01000000UL)
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#define ITCM_REGION_SIZE (0x02000000UL)
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#define ITCM_SIZE (SRAM4_SIZE) /* 256K */
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#define ITCM_GLOBAL_BASE (SRAM4_BASE)
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#define DTCM_BASE (0x20000000UL)
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#define DTCM_ALIAS_BIT (0x01000000UL)
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#define DTCM_REGION_SIZE (0x02000000UL)
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#define DTCM_SIZE (SRAM5_SIZE) /* 256K */
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#define DTCM_GLOBAL_BASE (SRAM5_BASE)
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#define MHU_A32_M55HE_0_RX_BASE 0x40000000UL
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#define MHU_M55HE_A32_0_TX_BASE 0x40010000UL
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#define MHU_A32_M55HE_1_RX_BASE 0x40020000UL
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#define MHU_M55HE_A32_1_TX_BASE 0x40030000UL
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#define MHU_SECPU_M55HE_0_RX_BASE 0x40040000UL
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#define MHU_M55HE_SECPU_0_TX_BASE 0x40050000UL
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#define MHU_SECPU_M55HE_1_RX_BASE 0x40060000UL
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#define MHU_M55HE_SECPU_1_TX_BASE 0x40070000UL
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#define MHU_M55HP_M55HE_0_RX_BASE 0x40080000UL
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#define MHU_M55HE_M55HP_0_TX_BASE 0x40090000UL
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#define MHU_M55HP_M55HE_1_RX_BASE 0x400A0000UL
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#define MHU_M55HE_M55HP_1_TX_BASE 0x400B0000UL
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#define MHU_APSS_S_RX_BASE MHU_A32_M55HE_0_RX_BASE
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#define MHU_APSS_S_TX_BASE MHU_M55HE_A32_0_TX_BASE
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#define MHU_APSS_NS_RX_BASE MHU_A32_M55HE_1_RX_BASE
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#define MHU_APSS_NS_TX_BASE MHU_M55HE_A32_1_TX_BASE
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#define MHU_SESS_S_RX_BASE MHU_SECPU_M55HE_0_RX_BASE
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#define MHU_SESS_S_TX_BASE MHU_M55HE_SECPU_0_TX_BASE
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#define MHU_SESS_NS_RX_BASE MHU_SECPU_M55HE_1_RX_BASE
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#define MHU_SESS_NS_TX_BASE MHU_M55HE_SECPU_1_TX_BASE
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#define MHU_RTSS_S_RX_BASE MHU_M55HP_M55HE_0_RX_BASE
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#define MHU_RTSS_S_TX_BASE MHU_M55HE_M55HP_0_TX_BASE
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#define MHU_RTSS_NS_RX_BASE MHU_M55HP_M55HE_1_RX_BASE
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#define MHU_RTSS_NS_TX_BASE MHU_M55HE_M55HP_1_TX_BASE
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#define DMA2_SEC_BASE 0x400C0000UL
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#define DMA2_NS_BASE 0x400E0000UL
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#define DMALOCAL_SEC_BASE DMA2_SEC_BASE
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#define DMALOCAL_NS_BASE DMA2_NS_BASE
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#define NPU_HE_BASE 0x400E1000UL
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#define LOCAL_NPU_BASE NPU_HE_BASE
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#define EVTRTR2_BASE 0x400E2000UL
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#define EVTRTRLOCAL_BASE EVTRTR2_BASE
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#define WDT_HE_CTRL_BASE 0x40100000UL
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#define WDT_HE_REFRESH_BASE 0x40101000UL
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#define LOCAL_WDT_CTRL_BASE WDT_HE_CTRL_BASE
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#define LOCAL_WDT_REFRESH_BASE WDT_HE_REFRESH_BASE
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#endif /* M55_HE_MAP_H */

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