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base repository: pheaver/netlist-verilog
base: master
head repository: ku-fpg/netlist
compare: master
Commits on Feb 6, 2011
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Commits on May 8, 2011
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Adding MemAssign and MemDecl initializations.
Andrew Gill committedMay 8, 2011 Configuration menu - View commit details
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And fixing a bad merge with the Async recoding.
Andrew Gill committedMay 8, 2011 Configuration menu - View commit details
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Merge remote-tracking branch 'csdl/master'
Conflicts: netlist-to-vhdl/Language/Netlist/GenVHDL.hs netlist/Language/Netlist/AST.hs netlist/Language/Netlist/Examples.hs
Andrew Gill committedMay 8, 2011 Configuration menu - View commit details
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Andrew Gill committed
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Fixing (again, finally) the merge problems.
Andrew Gill committedMay 8, 2011 Configuration menu - View commit details
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Commits on Oct 22, 2011
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Commits on Oct 24, 2011
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Commits on Oct 28, 2011
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Commits on Jun 28, 2013
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1. GenVerilog.hs: Temporarily removed support for ProcessDecl
2. netlist-to-verilog/netlist-to-verilog.cabal: Changed version numbers of dependencies 3. Expression.hs: Added the (Show a) constraint as it is no longer (ghc7.6.3) implied by (Integral a)
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Commits on Aug 19, 2013
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Added "Show" constraint (no longer implied by Num).
Neil Sculthorpe committedAug 19, 2013 Configuration menu - View commit details
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Commits on Feb 8, 2014
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In cases where VHDL syntax requires semicolons *after* lines, not *be…
…tween* them, don't emit a semicolon for empty lists
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Commits on Feb 23, 2014
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Merge pull request #3 from gergoerdi/master
Fix for pretty-printing of Modules with no internal signals
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Commits on Oct 22, 2014
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Commits on Oct 24, 2014
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Commits on Feb 8, 2015
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Commits on Feb 16, 2015
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Travis integration, fix GHC 7.10 warnings
RyanGlScott committedFeb 16, 2015 Configuration menu - View commit details
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RyanGlScott committed
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Commits on Apr 16, 2015
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RyanGlScott committed
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Commits on Jul 29, 2015
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Commits on Aug 5, 2017
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Commits on Aug 22, 2017
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Merge pull request #4 from capn-freako/master
Added support for Verilog floating point type.
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Commits on Apr 6, 2018
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Commits on Aug 3, 2018
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