Releases: intel/mpi-benchmarks
Releases · intel/mpi-benchmarks
Intel(R) MPI Benchmarks 2019 Update 4
What's New
- Bug fixes.
Intel(R) MPI Benchmarks 2019 Update 3
What's New
- Added the warm_up option that enabled additional cycles before running benchmark(for all size.)
- Bug fixes.
Intel(R) MPI Benchmarks 2019 Update 2
What's New
- New IMB-P2P benchmarks.
- Added the Reduce_local benchmark for IMB-MPI1.
- Deleted the alignment option (-alignment).
- Bug fixes.
- Code cleanup.
Intel(R) MPI Benchmarks 2019 Update 1
What's New
- Added the Reduce_scatter_block benchmark for IMB-MPI1.
- Added the aggregate_mode option that specifies the mode for IMB-IO, IMB-EXT and IMB-RMA.
- Added the alignment option that controls buffer alignment.
- Updated the following options:
- -data_type now supports double.
- -red_data_type now supports double.
Intel(R) MPI Benchmarks 2019
What's New:
- New IMB-MT benchmarks. The benchmarks implement the multithreaded version of some of the IMB-MPI1 benchmarks using the OpenMP* paradigm.
- New benchmarks infrastructure implemented in C++. The IMB-MPI1, IMB-RMA and IMB-MT implementation is now based on the new C++ infrastructure (IMB-NBC, IMB-EXT and IMB-IO still use the legacy one). The legacy infrastructure is preserved in src_c subdirectory.
- Changes in syntax for the -include and -exclude options. Benchmarks to include and exclude now must be separated by a comma rather than a space. Benchmarks to launch can be separated by a comma or a space.
- Iteration policy can no longer be set with the -iter option. Use -iter_policy instead.
- Added a new option -noheader for IMB-MT to disable printing of benchmark headers.
- Added a new benchmark BarrierMT for IMB-MT.
Intel(R) MPI Benchmarks 2018 Update 1
What's New:
- Support for the Microsoft* Visual Studio* 2017. Microsoft* Visual Studio* 2012 support is removed.
Intel(R) MPI Benchmarks 2018
What's New:
- Product documentation is now available online only at:
https://software.intel.com/en-us/imb-user-guide - Removed support of the Intel(R) Xeon Phi(TM) coprocessors (formerly code named
Knights Corner).