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Description
Checklist
- Checked the issue tracker for similar issues to ensure this is not a duplicate
- Read the documentation to confirm the issue is not addressed there and your configuration is set correctly
- Tested with the latest version to ensure the issue hasn't been fixed
How often does this bug occurs?
always
Expected behavior
On the ESP32-S3, GPIO_OUT should be user register 12.
Actual behavior (suspected bug)
GPIO_OUT should be user register 0 on ESP32-S2 and 12 on ESP32-S3.
Error logs or terminal output
Steps to reproduce the behavior
LLVM translates GPIO_OUT to user register 0 on both ESP32-S2 (correct) and S3 (incorrect). I've verified this by compiling a small function containing inline assembly, and disassembled the generated code with ghidra:
#[inline(never)]
fn write_gpio_out() {
let value: u8 = 0;
unsafe { core::arch::asm!("wur.gpio_out {0}", in(reg) value) }
} **************************************************************
* DWARF original prototype: void write_gpio_out(void) *
**************************************************************
void __rustcall write_gpio_out(void)
void <VOID> <RETURN>
_ZN4gpio5tests15dedicated_gpios14write_gpio_ou
gpio::gpio::tests::dedicated_gpios::write_gpio
420210b0 36 41 00 entry a1,0x20
420210b3 0c 08 movi.n a8,0x0
420210b5 80 00 f3 wur a8,LBEG
420210b8 1d f0 retw.n
Disregard the LBEG label, it seems to be a ghidra issue. The correct encoding of the wur.gpio_out a8 instruction would be 80 0c f3.
Project release version
whichever version the rust compiler is based on, but the source of master looks to have the issue still
System architecture
Intel/AMD 64-bit (modern PC, older Mac)
Operating system
Linux
Operating system version
Windows 11
Shell
PowerShell
Additional context
Register definition: https://github.com/espressif/llvm-project/blob/6e296b40d1d4b754522c6c3733a17b242a25f1fa/llvm/lib/Target/Xtensa/XtensaRegisterInfo.td#L261C5-L261C13