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("``0b1``", "Manual operation (CS handled by User, direct recopy of ``sel``), useful for Bulk transfers.")
One would assume that one could now simply set CS to low manually and then do mosi_write. However, it does nothing. I am still forced to use the SPI control register:
However, does this not defeat the whole purpose, why not directly use SPI controlled transfers? Obviously it is slower, hence I am really curious what a Bulk transfer implementation looks like. Spi_master.py seems to suggest that the "Manual operation" flag is meaningless. Can you please elaborate?
The text was updated successfully, but these errors were encountered:
Bulk transfers are where CS is asserted, then more than one byte is transferred, then CS is de-assarted.
Some usages of spimaster have cs asserted and de-assarted for every byte, or deasserted when not busy (if a fifo underruns for example).
The following code: litex/litex/soc/cores/spi
/spi_master.py
Contains:
("``0b1``", "Manual operation (CS handled by User, direct recopy of ``sel``), useful for Bulk transfers.")
One would assume that one could now simply set CS to low manually and then do mosi_write. However, it does nothing. I am still forced to use the SPI control register:
However, does this not defeat the whole purpose, why not directly use SPI controlled transfers? Obviously it is slower, hence I am really curious what a Bulk transfer implementation looks like. Spi_master.py seems to suggest that the "Manual operation" flag is meaningless. Can you please elaborate?
The text was updated successfully, but these errors were encountered: