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Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, fixes, cleanups Features: SR-IOV emulation for pci virtio-mem-pci support for s390 interleave support for cxl big endian support for vdpa svq new QAPI events for vhost-user Also vIOMMU reset order fixups are in. Fixes, cleanups all over the place. Signed-off-by: Michael S. Tsirkin <[email protected]> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAme4b8sPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpHKcIAKPJsVqPdda2dJ7b7FdyRT0Q+uwezXqaGHd4 # 7Lzih1wsxYNkwIAyPtEb76/21qiS7BluqlUCfCB66R9xWjP5/KfvAFj4/r4AEduE # fxAgYzotNpv55zcRbcflMyvQ42WGiZZHC+o5Lp7vDXUP3pIyHrl0Ydh5WmcD+hwS # BjXvda58TirQpPJ7rUL+sSfLih17zQkkDcfv5/AgorDy1wK09RBKwMx/gq7wG8yJ # twy8eBY2CmfmFD7eTM+EKqBD2T0kwLEeLfS/F/tl5Fyg6lAiYgYtCbGLpAmWErsg # XZvfZmwqL7CNzWexGvPFnnLyqwC33WUP0k0kT88Y5wh3/h98blw= # =tej8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 21 Feb 2025 20:21:31 HKT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "[email protected]" # gpg: Good signature from "Michael S. Tsirkin <[email protected]>" [full] # gpg: aka "Michael S. Tsirkin <[email protected]>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (41 commits) docs/devel/reset: Document reset expectations for DMA and IOMMU hw/vfio/common: Add a trace point in vfio_reset_handler hw/arm/smmuv3: Move reset to exit phase hw/i386/intel-iommu: Migrate to 3-phase reset hw/virtio/virtio-iommu: Migrate to 3-phase reset vhost-user-snd: correct the calculation of config_size net: vhost-user: add QAPI events to report connection state hw/virtio/virtio-nsm: Respond with correct length vdpa: Fix endian bugs in shadow virtqueue MAINTAINERS: add more files to `vhost` cryptodev/vhost: allocate CryptoDevBackendVhost using g_mem0() vhost-iova-tree: Update documentation vhost-iova-tree, svq: Implement GPA->IOVA & partial IOVA->HVA trees vhost-iova-tree: Implement an IOVA-only tree amd_iommu: Use correct bitmask to set capability BAR amd_iommu: Use correct DTE field for interrupt passthrough hw/virtio: reset virtio balloon stats on machine reset mem/cxl_type3: support 3, 6, 12 and 16 interleave ways hw/mem/cxl_type3: Ensure errp is set on realization failure hw/mem/cxl_type3: Fix special_ops memory leak on msix_init_exclusive_bar() failure ... Signed-off-by: Stefan Hajnoczi <[email protected]>
2 parents f41af4c + dd6d545 commit b69801d

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‎MAINTAINERS‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2221,12 +2221,16 @@ M: Michael S. Tsirkin <[email protected]>
22212221
R: Stefano Garzarella <[email protected]>
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S: Supported
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F: hw/*/*vhost*
2224-
F: docs/interop/vhost-user.json
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F: docs/interop/vhost-user.rst
2224+
F: docs/interop/vhost-user*
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F: docs/system/devices/vhost-user*
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F: contrib/vhost-user-*/
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F: backends/vhost-user.c
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F: backends/*vhost*
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F: include/system/vhost-user-backend.h
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F: include/hw/virtio/vhost*
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F: include/*/vhost*
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F: subprojects/libvhost-user/
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F: block/export/vhost-user*
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F: util/vhost-user-server.c
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vhost-shadow-virtqueue
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R: Eugenio Pérez <[email protected]>
@@ -2255,6 +2259,7 @@ F: include/hw/virtio/virtio-balloon.h
22552259
F: system/balloon.c
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F: include/system/balloon.h
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F: tests/qtest/virtio-balloon-test.c
2262+
F: tests/functional/test_virtio_balloon.py
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virtio-9p
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M: Christian Schoenebeck <[email protected]>

‎backends/cryptodev-vhost.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ cryptodev_vhost_init(
5353
CryptoDevBackendVhost *crypto;
5454
Error *local_err = NULL;
5555

56-
crypto = g_new(CryptoDevBackendVhost, 1);
56+
crypto = g_new0(CryptoDevBackendVhost, 1);
5757
crypto->dev.max_queues = 1;
5858
crypto->dev.nvqs = 1;
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crypto->dev.vqs = crypto->vqs;

‎docs/about/deprecated.rst‎

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Original file line numberDiff line numberDiff line change
@@ -277,13 +277,6 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name
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better reflects the way this property affects all random data within
278278
the device tree blob, not just the ``kaslr-seed`` node.
279279

280-
``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1)
281-
''''''''''''''''''''''''''''''''''''''''''''''''''''''
282-
283-
These old machine types are quite neglected nowadays and thus might have
284-
various pitfalls with regards to live migration. Use a newer machine type
285-
instead.
286-
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PPC 405 ``ref405ep`` machine (since 9.1)
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''''''''''''''''''''''''''''''''''''''''
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‎docs/about/removed-features.rst‎

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -972,6 +972,11 @@ from Linux in 2021, and is not supported anymore by QEMU either.
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System emulator machines
973973
------------------------
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975+
Note: Versioned machine types that have been introduced in a QEMU version
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that has initially been released more than 6 years before are considered
977+
obsolete and will be removed without further notice in this document.
978+
Please use newer machine types instead.
979+
975980
``s390-virtio`` (removed in 2.6)
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''''''''''''''''''''''''''''''''
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@@ -1006,12 +1011,6 @@ mips ``fulong2e`` machine alias (removed in 6.0)
10061011

10071012
This machine has been renamed ``fuloong2e``.
10081013

1009-
``pc-0.10`` up to ``pc-i440fx-2.3`` (removed in 4.0 up to 9.0)
1010-
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
1011-
1012-
These machine types were very old and likely could not be used for live
1013-
migration from old QEMU versions anymore. Use a newer machine type instead.
1014-
10151014
Raspberry Pi ``raspi2`` and ``raspi3`` machines (removed in 6.2)
10161015
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
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‎docs/devel/reset.rst‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -143,6 +143,11 @@ The *exit* phase is executed only when the last reset operation ends. Therefore
143143
the object does not need to care how many of reset controllers it has and how
144144
many of them have started a reset.
145145

146+
DMA capable devices are expected to cancel all outstanding DMA operations
147+
during either 'enter' or 'hold' phases. IOMMUs are expected to reset during
148+
the 'exit' phase and this sequencing makes sure no outstanding DMA request
149+
will fault.
150+
146151

147152
Handling reset in a resettable object
148153
-------------------------------------

‎docs/pcie_sriov.txt‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -52,9 +52,11 @@ setting up a BAR for a VF.
5252
...
5353

5454
/* Add and initialize the SR/IOV capability */
55-
pcie_sriov_pf_init(d, 0x200, "your_virtual_dev",
56-
vf_devid, initial_vfs, total_vfs,
57-
fun_offset, stride);
55+
if (!pcie_sriov_pf_init(d, 0x200, "your_virtual_dev",
56+
vf_devid, initial_vfs, total_vfs,
57+
fun_offset, stride, errp)) {
58+
return;
59+
}
5860

5961
/* Set up individual VF BARs (parameters as for normal BARs) */
6062
pcie_sriov_pf_init_vf_bar( ... )

‎hw/arm/smmu-common.c‎

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Original file line numberDiff line numberDiff line change
@@ -924,7 +924,12 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
924924
}
925925
}
926926

927-
static void smmu_base_reset_hold(Object *obj, ResetType type)
927+
/*
928+
* Make sure the IOMMU is reset in 'exit' phase after
929+
* all outstanding DMA requests have been quiesced during
930+
* the 'enter' or 'hold' reset phases
931+
*/
932+
static void smmu_base_reset_exit(Object *obj, ResetType type)
928933
{
929934
SMMUState *s = ARM_SMMU(obj);
930935

@@ -949,7 +954,7 @@ static void smmu_base_class_init(ObjectClass *klass, void *data)
949954
device_class_set_props(dc, smmu_dev_properties);
950955
device_class_set_parent_realize(dc, smmu_base_realize,
951956
&sbc->parent_realize);
952-
rc->phases.hold = smmu_base_reset_hold;
957+
rc->phases.exit = smmu_base_reset_exit;
953958
}
954959

955960
static const TypeInfo smmu_base_info = {

‎hw/arm/smmuv3.c‎

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Original file line numberDiff line numberDiff line change
@@ -1870,13 +1870,19 @@ static void smmu_init_irq(SMMUv3State *s, SysBusDevice *dev)
18701870
}
18711871
}
18721872

1873-
static void smmu_reset_hold(Object *obj, ResetType type)
1873+
/*
1874+
* Make sure the IOMMU is reset in 'exit' phase after
1875+
* all outstanding DMA requests have been quiesced during
1876+
* the 'enter' or 'hold' reset phases
1877+
*/
1878+
static void smmu_reset_exit(Object *obj, ResetType type)
18741879
{
18751880
SMMUv3State *s = ARM_SMMUV3(obj);
18761881
SMMUv3Class *c = ARM_SMMUV3_GET_CLASS(s);
18771882

1878-
if (c->parent_phases.hold) {
1879-
c->parent_phases.hold(obj, type);
1883+
trace_smmu_reset_exit();
1884+
if (c->parent_phases.exit) {
1885+
c->parent_phases.exit(obj, type);
18801886
}
18811887

18821888
smmuv3_init_regs(s);
@@ -1999,7 +2005,7 @@ static void smmuv3_class_init(ObjectClass *klass, void *data)
19992005
SMMUv3Class *c = ARM_SMMUV3_CLASS(klass);
20002006

20012007
dc->vmsd = &vmstate_smmuv3;
2002-
resettable_class_set_parent_phases(rc, NULL, smmu_reset_hold, NULL,
2008+
resettable_class_set_parent_phases(rc, NULL, NULL, smmu_reset_exit,
20032009
&c->parent_phases);
20042010
device_class_set_parent_realize(dc, smmu_realize,
20052011
&c->parent_realize);

‎hw/arm/trace-events‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@ smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid=0x%x"
5656
smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s"
5757
smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s"
5858
smmuv3_inv_notifiers_iova(const char *name, int asid, int vmid, uint64_t iova, uint8_t tg, uint64_t num_pages, int stage) "iommu mr=%s asid=%d vmid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64" stage=%d"
59+
smmu_reset_exit(void) ""
5960

6061
# strongarm.c
6162
strongarm_uart_update_parameters(const char *label, int speed, char parity, int data_bits, int stop_bits) "%s speed=%d parity=%c data=%d stop=%d"

‎hw/cxl/cxl-component-utils.c‎

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -243,8 +243,13 @@ static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk,
243243
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, INTERLEAVE_4K, 1);
244244
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY,
245245
POISON_ON_ERR_CAP, 0);
246-
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, 3_6_12_WAY, 0);
247-
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, 16_WAY, 0);
246+
if (type == CXL2_TYPE3_DEVICE) {
247+
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, 3_6_12_WAY, 1);
248+
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, 16_WAY, 1);
249+
} else {
250+
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, 3_6_12_WAY, 0);
251+
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, 16_WAY, 0);
252+
}
248253
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, UIO, 0);
249254
ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY,
250255
UIO_DECODER_COUNT, 0);

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