From 07e12c7aaacc22d6f48927168be195a6aad4e9dc Mon Sep 17 00:00:00 2001 From: Walter Bright Date: Tue, 26 Mar 2024 14:45:32 -0700 Subject: [PATCH] versions: add D_REG64, remove D_X32, document X32 --- spec/version.dd | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/spec/version.dd b/spec/version.dd index 385f0d1707..f4ea2699c3 100644 --- a/spec/version.dd +++ b/spec/version.dd @@ -264,6 +264,7 @@ $(H3 $(LEGACY_LNAME2 PredefinedVersions, predefined-versions, Predefined Version $(TROW $(ARGS $(D CppRuntime_Sun)) , $(ARGS Sun Cpp runtime)) $(TROW $(ARGS $(D X86)) , $(ARGS Intel and AMD 32-bit processors)) $(TROW $(ARGS $(D X86_64)) , $(ARGS Intel and AMD 64-bit processors)) + $(TROW $(ARGS $(D X32)) , $(ARGS Set when D_LP64 is not set and X86_64 is not set. Do not use.)) $(TROW $(ARGS $(D ARM)) , $(ARGS The ARM architecture (32-bit) (AArch32 et al))) $(TROW $(ARGS $(D ARM_Thumb)) , $(ARGS ARM in any Thumb mode)) $(TROW $(ARGS $(D ARM_SoftFloat)) , $(ARGS The ARM $(D soft) floating point ABI)) @@ -327,7 +328,7 @@ $(H3 $(LEGACY_LNAME2 PredefinedVersions, predefined-versions, Predefined Version $(TROW $(ARGS $(D D_InlineAsm_X86_64)) , $(ARGS $(DDLINK spec/iasm, Inline Assembler, Inline assembler) for X86-64 is implemented)) $(TROW $(ARGS $(D D_LP64)) , $(ARGS $(B Pointers) are 64 bits (command line switch $(DDSUBLINK dmd, switch-m64, $(TT -m64))). (Do not confuse this with C's LP64 model))) - $(TROW $(ARGS $(D D_X32)) , $(ARGS Pointers are 32 bits, but words are still 64 bits (x32 ABI) (This can be defined in parallel to $(D X86_64)))) + $(TROW $(ARGS $(D D_REG64)) , $(ARGS Set when the CPU has 64 bit integer registers but pointers are 32 bit)) $(TROW $(ARGS $(D D_HardFloat)) , $(ARGS The target hardware has a floating-point unit)) $(TROW $(ARGS $(D D_SoftFloat)) , $(ARGS The target hardware does not have a floating-point unit)) $(TROW $(ARGS $(D D_PIC)) , $(ARGS Position Independent Code