stm32F205RC.icf

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__   = 0x0803FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__   = 0x2001FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x2000;
define symbol __ICFEDIT_size_heap__   = 0x2000;
/**** End of ICF editor section. ###ICF###*/

//RPM 205RC HAS 256K FLASH 0x08000000 TO 0x0803FFFF
//RPM 205RC HAS 128K SRAM NO CCM
//112K 0x20000000 TO 0x2001BFFF
//16K  0x2001C000 TO 0x2001FFFF
//AND 4K BBR

define symbol __region_SRAM1_start__ = 0x20000000;
define symbol __region_SRAM1_end__   = 0x2001BFFF;
define symbol __region_SRAM2_start__ = 0x2001C000;
define symbol __region_SRAM2_end__   = 0x2001FFFF;

define memory mem with size = 4G;
define region ROM_region         = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region SRAM1_112K_region  = mem:[from __region_SRAM1_start__   to __region_SRAM1_end__];
define region SRAM2_12K_region   = mem:[from __region_SRAM2_start__   to __region_SRAM2_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

//initialize by copy { section .noinint }; // , readwrite

//do not initialize  { readwrite, section .sram_1rst_dict_stdio_bufs, section .sram_2nd_intvecs_unint }; // , readwrite
do not initialize  { readwrite, section .sram_1rst_dict_stdio_bufs, section .sram_2nd_intvecs_unint, section .tcm_pref_stacks_and_vars }; // , readwrite

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

place in ROM_region   { readonly };

place in SRAM1_112K_region { section .sram_1rst_dict_stdio_bufs };
place at end of SRAM1_112K_region { section .tcm_pref_stacks_and_vars };
place in SRAM2_12K_region { section .sram_2nd_intvecs_unint };
place at end of SRAM2_12K_region  { block CSTACK, block HEAP };