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I have not the same result with a native CPU and MIASM (miasm==0.1.5.dev47) for the following instructions (X2 = 0x00000000000000; X5 = 0x000000000003F4)
The program should go in 0x14B9B0 and not in 0x14BB30 (according the native CPU), From my understanding, Like x2 is not highter than 0x60, the NZCV should be set to 2 (ie cf = 1). I think the problem its because the ccmp intruction not set correctly flag ... (miasm/arch/aarch64/sem.py)
Hello,
I have not the same result with a native CPU and MIASM (miasm==0.1.5.dev47) for the following instructions (X2 = 0x00000000000000; X5 = 0x000000000003F4)
The program should go in 0x14B9B0 and not in 0x14BB30 (according the native CPU),
From my understanding, Like x2 is not highter than 0x60, the NZCV should be set to 2 (ie cf = 1). I think the problem its because the ccmp intruction not set correctly flag ... (miasm/arch/aarch64/sem.py)
Attached the snipped code to reproduce the bug
I would be very grateful if anyone could correct the problem inside this file
https://developer.arm.com/documentation/dui0801/g/A64-General-Instructions/CCMP--register-
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