[X86] Missing ACCESS mode in the last register operand in instruction shld

[Mar3yZhang]

Work environment

Questions	Answers
OS/arch/bits	x86_64 Ubuntu 20.04
Architecture	x86_64
Source of Capstone	git clone, default on next branch.
Version/git commit	v6.0.0, e46838

Instruction bytes giving faulty results

0x0f 0xa5 0xc0

Expected results

It should be:

$ ./cstool -d x64 0fa5c0
 0  0f a5 c0                                         shld       eax, eax, cl
        ID: 684 (shld)
        Prefix:0x00 0x00 0x00 0x00 
        Opcode:0x0f 0xa5 0x00 0x00 
        rex: 0x0
        addr_size: 8
        modrm: 0xc0
        disp: 0x0
        sib: 0x0
        op_count: 3
                operands[0].type: REG = eax
                operands[0].size: 4
                operands[0].access: READ | WRITE
                operands[1].type: REG = eax
                operands[1].size: 4
                operands[1].access: READ
                operands[2].type: REG = cl
                operands[2].size: 1
*****           operands[2].access: READ          ***** MISSING LINE *****
        Registers read: cl eax
        Registers modified: rflags eax
        EFLAGS: MOD_CF MOD_SF MOD_ZF MOD_PF UNDEF_OF UNDEF_AF

Steps to get the wrong result

With cstool:

$ ./cstool -d x64 0fa5c0
 0  0f a5 c0                                         shld       eax, eax, cl
        ID: 684 (shld)
        Prefix:0x00 0x00 0x00 0x00 
        Opcode:0x0f 0xa5 0x00 0x00 
        rex: 0x0
        addr_size: 8
        modrm: 0xc0
        disp: 0x0
        sib: 0x0
        op_count: 3
                operands[0].type: REG = eax
                operands[0].size: 4
                operands[0].access: READ | WRITE
                operands[1].type: REG = eax
                operands[1].size: 4
                operands[1].access: READ
                operands[2].type: REG = cl
                operands[2].size: 1
        Registers read: cl eax
        Registers modified: rflags eax
        EFLAGS: MOD_CF MOD_SF MOD_ZF MOD_PF UNDEF_OF UNDEF_AF

Additional Logs, screenshots, source code, configuration dump, ...

• cl register stores the number of bits to shift. So it should be read.
• This issue is detected with a fully automatic decoder testing tool based on my research. Please add a Bug tag to this page if you verify it's a problem. It means a lot to me and my research. Thank you for your consideration 😊!