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Xilinx's PYNQ is trying to achieve a similar thing but has had more thought put into it. However it doesn't try to target simulations, or non-zynq chips. It'd be nice to steal some of the their ideas and incorporate them into axilent.
The text was updated successfully, but these errors were encountered:
Xilinx's PYNQ is trying to achieve a similar thing but has had more thought put into it. However it doesn't try to target simulations, or non-zynq chips. It'd be nice to steal some of the their ideas and incorporate them into axilent.
The text was updated successfully, but these errors were encountered: