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x4exrx4exr
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feat(encoding) Added map vector decoding.
1 parent 8bc3142 commit f2aedb0

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3 files changed

+58
-65
lines changed

3 files changed

+58
-65
lines changed

‎src/instruction.rs

+4-9
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ pub mod encoding;
66

77
use crate::instruction::address::Address;
88
use crate::instruction::flag::Flag;
9-
use crate::instruction::vector::{VectorComponentFlags, VectorComponentMapping};
9+
use crate::instruction::vector::{ComponentMapping};
1010
use crate::num::{MaskedU8};
1111

1212
pub type SegmentCode = MaskedU8<0x3>;
@@ -20,7 +20,6 @@ pub enum Format {
2020
LoadImmediate,
2121
LoadVectorComponents,
2222
ExtractVectorComponents,
23-
FlagVectorComponents,
2423
MapVector,
2524
Branch,
2625

@@ -53,21 +52,17 @@ pub enum Instruction {
5352
/// Having [None] means that the component corresponding to the index should not be extracted into a register.
5453
destinations: [Option<RegisterCode>; vector::SIZE]
5554
},
56-
FlagVectorComponents {
57-
flags: [VectorComponentFlags; vector::SIZE],
58-
temporary: bool
59-
},
6055
/// Only supports 2 operands due to the size constrain of an instruction.
6156
MapVector {
62-
mappings: [VectorComponentMapping; 2],
63-
temporary: bool
57+
temporary: bool,
58+
operand: OperandCode,
59+
mappings: [vector::ComponentCode; vector::SIZE]
6460
},
6561
Branch {
6662
condition: Flag,
6763
hint: Option<bool>,
6864
address: Address
6965
},
70-
7166
DualSource {
7267
operation: operation::DualSource,
7368
sources: [RegisterCode; 2]

‎src/instruction/encoding.rs

+52-41
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
1-
use crate::instruction::{Format, Instruction, operation, RegisterCode, SegmentCode, vector};
1+
use crate::instruction::{Format, Instruction, OperandCode, operation, RegisterCode, SegmentCode, vector};
2+
use crate::instruction::vector::ComponentCode;
23
use crate::num::MaskedU32;
34

45
pub const OPERATION_MASK: u32 = 0x0000007F;
@@ -7,58 +8,69 @@ pub const LOAD_IMMEDIATE_DESTINATION_FIELD : u32 = 0b0_00000000
78
pub const LOAD_IMMEDIATE_SEGMENT_FIELD : (u32, u32) = (4, 0b0_00000000_00000000_00110000);
89
pub const LOAD_IMMEDIATE_IMMEDIATE_FIELD : (u32, u32) = (6, 0b0_00111111_11111111_11000000);
910
pub const DECODE_VECTOR_DESTINATION_FIELD : u32 = 0b0_00000000_00000000_00001111;
10-
pub const DECODE_VECTOR_COMPONENT_ENABLE_0_FIELD: (u32, u32) = (4, 0b0_00000000_00000000_00010000);
11-
pub const DECODE_VECTOR_COMPONENT_ENABLE_1_FIELD: (u32, u32) = (5, 0b0_00000000_00000000_00100000);
12-
pub const DECODE_VECTOR_COMPONENT_ENABLE_2_FIELD: (u32, u32) = (6, 0b0_00000000_00000000_01000000);
13-
pub const DECODE_VECTOR_COMPONENT_ENABLE_3_FIELD: (u32, u32) = (7, 0b0_00000000_00000000_10000000);
11+
pub const ENABLE_0_FIELD: (u32, u32) = (4, 0b0_00000000_00000000_00010000);
12+
pub const ENABLE_1_FIELD: (u32, u32) = (5, 0b0_00000000_00000000_00100000);
13+
pub const ENABLE_2_FIELD: (u32, u32) = (6, 0b0_00000000_00000000_01000000);
14+
pub const ENABLE_3_FIELD: (u32, u32) = (7, 0b0_00000000_00000000_10000000);
1415
pub const DECODE_VECTOR_COMPONENT_0_FIELD : (u32, u32) = (8, 0b0_00000000_00001111_00000000);
1516
pub const DECODE_VECTOR_COMPONENT_1_FIELD : (u32, u32) = (12, 0b0_00000000_11110000_00000000);
1617
pub const DECODE_VECTOR_COMPONENT_2_FIELD : (u32, u32) = (16, 0b0_00001111_00000000_00000000);
1718
pub const DECODE_VECTOR_COMPONENT_3_FIELD : (u32, u32) = (20, 0b0_11110000_00000000_00000000);
18-
pub const FLAG_VECTOR_TEMPORARY_FIELD : u32 = 0b0_00000000_00000000_00000001;
19-
pub const FLAG_VECTOR_OPERAND_0_FIELD : (u32, u32) = (1, 0b0_00000000_00000000_00000110);
20-
pub const FLAG_VECTOR_OPERAND_1_FIELD : (u32, u32) = (3, 0b0_00000000_00000000_00011000);
21-
pub const FLAG_VECTOR_OPERAND_2_FIELD : (u32, u32) = (5, 0b0_00000000_00000000_01100000);
22-
pub const FLAG_VECTOR_OPERAND_3_FIELD : (u32, u32) = (7, 0b0_00000000_00000001_10000000);
23-
pub const FLAG_VECTOR_OPERAND_0_NEGATE_FIELD : (u32, u32) = (9, 0b0_00000000_00000010_00000000);
24-
pub const FLAG_VECTOR_OPERAND_1_NEGATE_FIELD : (u32, u32) = (10, 0b0_00000000_00000100_00000000);
25-
pub const FLAG_VECTOR_OPERAND_2_NEGATE_FIELD : (u32, u32) = (11, 0b0_00000000_00001000_00000000);
26-
pub const FLAG_VECTOR_OPERAND_3_NEGATE_FIELD : (u32, u32) = (12, 0b0_00000000_00010000_00000000);
27-
pub const FLAG_VECTOR_OPERAND_0_ZERO_FIELD : (u32, u32) = (13, 0b0_00000000_00100000_00000000);
28-
pub const FLAG_VECTOR_OPERAND_1_ZERO_FIELD : (u32, u32) = (14, 0b0_00000000_01000000_00000000);
29-
pub const FLAG_VECTOR_OPERAND_2_ZERO_FIELD : (u32, u32) = (15, 0b0_00000000_10000000_00000000);
30-
pub const FLAG_VECTOR_OPERAND_3_ZERO_FIELD : (u32, u32) = (16, 0b0_00000001_00000000_00000000);
31-
32-
pub type EncodedOperands = MaskedU32<0x1FFFFFF>;
19+
pub const MAP_VECTOR_TEMPORARY_FIELD : u32 = 0b0_00000000_00000000_00000001;
20+
pub const MAP_VECTOR_OPERAND_FIELD : (u32, u32) = (1, 0b0_00000000_00000000_00000110);
21+
pub const MAP_VECTOR_COMPONENT_0_FIELD : (u32, u32) = (3, 0b0_00000000_00000000_00011000);
22+
pub const MAP_VECTOR_COMPONENT_1_FIELD : (u32, u32) = (5, 0b0_00000000_00000000_01100000);
23+
pub const MAP_VECTOR_COMPONENT_2_FIELD : (u32, u32) = (7, 0b0_00000000_00000001_10000000);
24+
pub const MAP_VECTOR_COMPONENT_3_FIELD : (u32, u32) = (9, 0b0_00000000_00000110_00000000);
3325

3426
impl Instruction {
35-
const fn decode_load_immediate(operands: EncodedOperands) -> (RegisterCode, SegmentCode, u16) {
36-
let operands = operands.get();
27+
const fn decode_load_immediate_instruction_operands(operands: u32) -> (RegisterCode, SegmentCode, u16) {
3728
let destination = RegisterCode::new((operands & LOAD_IMMEDIATE_DESTINATION_FIELD) as u8);
3829
let segment = SegmentCode::new(((operands & LOAD_IMMEDIATE_SEGMENT_FIELD.1) >> LOAD_IMMEDIATE_SEGMENT_FIELD.0) as u8);
3930
let immediate = ((operands & LOAD_IMMEDIATE_IMMEDIATE_FIELD.1) >> LOAD_IMMEDIATE_IMMEDIATE_FIELD.0) as u16;
4031
(destination, segment, immediate)
4132
}
33+
34+
fn decode_enable_fields(operands: u32) -> [bool; 4] {
35+
let enable_0 = ((operands & ENABLE_0_FIELD.1) >> ENABLE_0_FIELD.0) > 0;
36+
let enable_1 = ((operands & ENABLE_1_FIELD.1) >> ENABLE_1_FIELD.0) > 0;
37+
let enable_2 = ((operands & ENABLE_2_FIELD.1) >> ENABLE_2_FIELD.0) > 0;
38+
let enable_3 = ((operands & ENABLE_3_FIELD.1) >> ENABLE_3_FIELD.0) > 0;
39+
[enable_0, enable_1, enable_2, enable_3]
40+
}
4241

43-
fn decode_vector_components(operands: EncodedOperands) -> (RegisterCode, [Option<RegisterCode>; vector::SIZE]) {
44-
let operands = operands.get();
42+
fn decode_vector_components_instruction_operands(operands: u32) -> (RegisterCode, [Option<RegisterCode>; vector::SIZE]) {
4543
let primary = RegisterCode::new((operands & DECODE_VECTOR_DESTINATION_FIELD) as u8);
4644

47-
let enable_0 = ((operands & DECODE_VECTOR_COMPONENT_ENABLE_0_FIELD.1) >> DECODE_VECTOR_COMPONENT_ENABLE_0_FIELD.0) > 0;
48-
let enable_1 = ((operands & DECODE_VECTOR_COMPONENT_ENABLE_1_FIELD.1) >> DECODE_VECTOR_COMPONENT_ENABLE_1_FIELD.0) > 0;
49-
let enable_2 = ((operands & DECODE_VECTOR_COMPONENT_ENABLE_2_FIELD.1) >> DECODE_VECTOR_COMPONENT_ENABLE_2_FIELD.0) > 0;
50-
let enable_3 = ((operands & DECODE_VECTOR_COMPONENT_ENABLE_3_FIELD.1) >> DECODE_VECTOR_COMPONENT_ENABLE_3_FIELD.0) > 0;
51-
5245
let component_1 = RegisterCode::new(((operands & DECODE_VECTOR_COMPONENT_1_FIELD.1) >> DECODE_VECTOR_COMPONENT_1_FIELD.0) as u8);
5346
let component_2 = RegisterCode::new(((operands & DECODE_VECTOR_COMPONENT_2_FIELD.1) >> DECODE_VECTOR_COMPONENT_2_FIELD.0) as u8);
5447
let component_3 = RegisterCode::new(((operands & DECODE_VECTOR_COMPONENT_3_FIELD.1) >> DECODE_VECTOR_COMPONENT_3_FIELD.0) as u8);
5548
let component_0 = RegisterCode::new(((operands & DECODE_VECTOR_COMPONENT_0_FIELD.1) >> DECODE_VECTOR_COMPONENT_0_FIELD.0) as u8);
5649

50+
let enable = Self::decode_enable_fields(operands);
51+
5752
(primary, [
58-
enable_0.then_some(component_0),
59-
enable_1.then_some(component_1),
60-
enable_2.then_some(component_2),
61-
enable_3.then_some(component_3)
53+
enable[0].then_some(component_0),
54+
enable[1].then_some(component_1),
55+
enable[2].then_some(component_2),
56+
enable[3].then_some(component_3)
57+
])
58+
}
59+
60+
fn decode_map_vector_instruction_operands(operands: u32) -> (bool, OperandCode, [ComponentCode; vector::SIZE]) {
61+
let temporary = operands & MAP_VECTOR_TEMPORARY_FIELD > 0;
62+
let operand = OperandCode::new(((operands & MAP_VECTOR_OPERAND_FIELD.1) >> MAP_VECTOR_OPERAND_FIELD.0) as u8);
63+
64+
let component_0 = ComponentCode::new(((operands & MAP_VECTOR_COMPONENT_0_FIELD.1) >> MAP_VECTOR_COMPONENT_0_FIELD.0) as u8);
65+
let component_1 = ComponentCode::new(((operands & MAP_VECTOR_COMPONENT_1_FIELD.1) >> MAP_VECTOR_COMPONENT_1_FIELD.0) as u8);
66+
let component_2 = ComponentCode::new(((operands & MAP_VECTOR_COMPONENT_2_FIELD.1) >> MAP_VECTOR_COMPONENT_2_FIELD.0) as u8);
67+
let component_3 = ComponentCode::new(((operands & MAP_VECTOR_COMPONENT_3_FIELD.1) >> MAP_VECTOR_COMPONENT_3_FIELD.0) as u8);
68+
69+
(temporary, operand, [
70+
component_0,
71+
component_1,
72+
component_2,
73+
component_3
6274
])
6375
}
6476

@@ -70,27 +82,26 @@ impl Instruction {
7082
.unwrap_or(&operation::MAPPINGS[0])
7183
.format;
7284

73-
let operands = EncodedOperands::new((encoded & !OPERATION_MASK) >> 7);
85+
let operands = (encoded & !OPERATION_MASK) >> 7;
7486

7587
match format {
7688
Format::WaitForInterrupt => Self::WaitForInterrupt,
7789
Format::LoadImmediate => {
78-
let (destination, segment, immediate) = Self::decode_load_immediate(operands);
90+
let (destination, segment, immediate) = Self::decode_load_immediate_instruction_operands(operands);
7991
Self::LoadImmediate { destination, segment, immediate }
8092
},
8193
Format::LoadVectorComponents => {
82-
let (destination, components) = Self::decode_vector_components(operands);
94+
let (destination, components) = Self::decode_vector_components_instruction_operands(operands);
8395
Self::LoadVectorComponents {destination, components}
8496
},
8597
Format::ExtractVectorComponents => {
86-
let (source, destinations) = Self::decode_vector_components(operands);
98+
let (source, destinations) = Self::decode_vector_components_instruction_operands(operands);
8799
Self::ExtractVectorComponents { source, destinations }
88100
},
89-
Format::FlagVectorComponents => {
90-
let operand_0 =
91-
todo!()
101+
Format::MapVector => {
102+
let (temporary, operand, components) = Self::decode_map_vector_instruction_operands(operands);
103+
Self::MapVector { temporary, operand, mappings: components, }
92104
},
93-
Format::MapVector => todo!(),
94105
Format::Branch => todo!(),
95106
Format::DualSource => todo!(),
96107
Format::Destination => todo!(),

‎src/instruction/vector.rs

+2-15
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,5 @@
1-
use crate::instruction::{OperandCode};
1+
use crate::instruction::OperandCode;
22
use crate::num::MaskedU8;
33

44
pub type ComponentCode = MaskedU8<0x3>;
5-
pub const SIZE: usize = 4;
6-
7-
#[derive(Debug, Clone, Copy, PartialEq)]
8-
pub struct VectorComponentMapping {
9-
operand: OperandCode,
10-
components: [ComponentCode; 2]
11-
}
12-
13-
#[derive(Debug, Clone, Copy, PartialEq)]
14-
pub struct VectorComponentFlags {
15-
operand: OperandCode,
16-
negate: bool,
17-
zero: bool
18-
}
5+
pub const SIZE: usize = 4;

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