fix(instruction) Invalid enum matches become default.

Author: x4exr

src/instruction.rs

@@ -13,8 +13,33 @@ bitfield! {
     struct Format(pub u32): Debug, FromRaw, IntoRaw { operation: u8 @ 0..=4 }
 }
 
-#[derive(Debug, Clone, Copy, PartialEq, ConvRaw)]
-pub enum Scale { X8, X16, X32, X64 }
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
+#[repr(u8)]
+pub enum Scale { 
+    #[default]
+    X8, 
+    X16, 
+    X32, 
+    X64
+}
+
+impl From<u8> for Scale {
+    fn from(code: u8) -> Self {
+        match code {
+            0 => Self::X8,
+            1 => Self::X16,
+            2 => Self::X32,
+            3 => Self::X64,
+            _ => Self::default()
+        }
+    }
+}
+
+impl From<Scale> for u8 {
+    fn from(scale: Scale) -> Self {
+        scale as Self
+    }
+}
 
 #[derive(Debug, Clone, Copy, PartialEq)]
 #[repr(u8)]

src/instruction/binary.rs

@@ -1,6 +1,6 @@
-use proc_bitfield::{bitfield, ConvRaw};
+use proc_bitfield::{bitfield};
 
-#[derive(Debug, Clone, Copy, PartialEq, Default, ConvRaw)]
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
 #[repr(u8)]
 pub enum Mode {
     #[default]
@@ -18,6 +18,32 @@ pub enum Mode {
     ShiftRight
 }
 
+impl From<u8> for Mode {
+    fn from(code: u8) -> Self {
+        match code {
+            0 => Self::And,
+            1 => Self::Nand,
+            2 => Self::Or,
+            3 => Self::Nor,
+            4 => Self::Xor,
+            5 => Self::XNor,
+            6 => Self::Add,
+            7 => Self::Subtract,
+            8 => Self::Multiply,
+            9 => Self::Divide,
+            10 => Self::ShiftLeft,
+            11 => Self::ShiftRight,
+            _ => Self::default()
+        }
+    }
+}
+
+impl From<Mode> for u8 {
+    fn from(mode: Mode) -> Self {
+        mode as Self
+    }
+}
+
 bitfield! {
     #[derive(Clone, Copy, PartialEq, Eq)]
     pub struct Operation(pub u32): Debug, FromRaw, IntoRaw {
@@ -33,13 +59,29 @@ bitfield! {
     }
 }
 
-#[derive(Debug, Clone, Copy, PartialEq, ConvRaw)]
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
 #[repr(u8)]
 pub enum RegroupingBinaryMode {
+    #[default]
     Add,
     Subtract
 }
 
+impl From<bool> for RegroupingBinaryMode {
+    fn from(flag: bool) -> Self {
+        match flag {
+            false => Self::Add,
+            true => Self::Subtract,
+        }
+    }
+}
+
+impl From<RegroupingBinaryMode> for bool {
+    fn from(mode: RegroupingBinaryMode) -> Self {
+        mode as u8 != 0
+    }
+}
+
 bitfield! {
     #[derive(Clone, Copy, PartialEq, Eq)]
     pub struct RegroupingBinaryOperation(pub u32): Debug, FromRaw, IntoRaw {
@@ -51,13 +93,29 @@ bitfield! {
     }
 }
 
-#[derive(Debug, Clone, Copy, PartialEq, ConvRaw)]
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
 #[repr(u8)]
 pub enum RegroupingQuaternaryMode {
+    #[default]
     Multiply,
     Divide
 }
 
+impl From<bool> for RegroupingQuaternaryMode {
+    fn from(flag: bool) -> Self {
+        match flag {
+            false => Self::Multiply,
+            true => Self::Divide,
+        }
+    }
+}
+
+impl From<RegroupingQuaternaryMode> for bool {
+    fn from(mode: RegroupingQuaternaryMode) -> Self {
+        mode as u8 != 0
+    }
+}
+
 bitfield! {
     #[derive(Clone, Copy, PartialEq, Eq)]
     pub struct RegroupingQuaternaryOperation(pub u32): Debug, FromRaw, IntoRaw {

src/instruction/memory.rs

@@ -1,4 +1,4 @@
-use proc_bitfield::{bitfield, ConvRaw};
+use proc_bitfield::{bitfield};
 use crate::instruction::Scale;
 
 bitfield! {
@@ -51,7 +51,7 @@ bitfield! {
     }
 }
 
-#[derive(Debug, Clone, Copy, PartialEq, Default, ConvRaw)]
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
 #[repr(u8)]
 pub enum BranchMode {
     #[default]
@@ -60,7 +60,24 @@ pub enum BranchMode {
     Demote
 }
 
-#[derive(Debug, Clone, Copy, PartialEq, Default, ConvRaw)]
+impl From<u8> for BranchMode {
+    fn from(code: u8) -> Self {
+        match code {
+            0 => Self::Basic,
+            1 => Self::CallStack,
+            2 => Self::Demote,
+            _ => Self::default()
+        }
+    }
+}
+
+impl From<BranchMode> for u8 {
+    fn from(mode: BranchMode) -> Self {
+        mode as Self
+    }
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
 #[repr(u8)]
 pub enum BranchCondition {
     #[default]
@@ -71,6 +88,25 @@ pub enum BranchCondition {
     Overflow
 }
 
+impl From<u8> for BranchCondition {
+    fn from(code: u8) -> Self {
+        match code {
+            0 => Self::Zero,
+            1 => Self::Negative,
+            2 => Self::Parity,
+            3 => Self::Regrouping,
+            4 => Self::Overflow,
+            _ => Self::default(), // Default case for invalid values
+        }
+    }
+}
+
+impl From<BranchCondition> for u8 {
+    fn from(condition: BranchCondition) -> Self {
+        condition as Self
+    }
+}
+
 #[derive(Debug, Clone, Copy, PartialEq, Default)]
 pub struct BranchHint(pub Option<bool>);
 

src/instruction/mnemonic.rs

@@ -1,11 +1,11 @@
-use proc_bitfield::{bitfield, ConvRaw};
+use proc_bitfield::{bitfield};
 
 bitfield! {
     #[derive(Clone, Copy, PartialEq, Eq)]
     pub struct Format(pub u32): Debug, FromRaw, IntoRaw { pub operation: u8 [unsafe! Operation] @ 5..=8 }
 }
 
-#[derive(Debug, Clone, Copy, PartialEq, Default, ConvRaw)]
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
 #[repr(u8)]
 pub enum Operation {
     #[default]
@@ -21,6 +21,30 @@ pub enum Operation {
     UnStackRegisters
 }
 
+impl From<u8> for Operation {
+    fn from(code: u8) -> Self {
+        match code {
+            0 => Self::Wait,
+            1 => Self::Interrupt,
+            2 => Self::End,
+            3 => Self::EndInterrupt,
+            4 => Self::Unlock,
+            5 => Self::Yield,
+            6 => Self::UnYield,
+            7 => Self::ClearRegisters,
+            8 => Self::StackRegisters,
+            9 => Self::UnStackRegisters,
+            _ => Self::default()
+        }
+    }
+}
+
+impl From<Operation> for u8 {
+    fn from(operation: Operation) -> Self {
+        operation as Self
+    }
+}
+
 impl Operation {
     pub const TABLE: [Operation; 10] = [
         Operation::Wait,

src/instruction/register.rs

@@ -1,6 +1,6 @@
-use proc_bitfield::{bitfield, ConvRaw};
+use proc_bitfield::{bitfield};
 
-#[derive(Debug, Clone, Copy, PartialEq, Default, ConvRaw)]
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
 #[repr(u8)]
 pub enum File {
     #[default]
@@ -10,6 +10,24 @@ pub enum File {
     Processor
 }
 
+impl From<u8> for File {
+    fn from(code: u8) -> Self {
+        match code {
+            0 => Self::General,
+            1 => Self::Vector,
+            2 => Self::Interrupt,
+            3 => Self::Processor,
+            _ => Self::default()
+        }
+    }
+}
+
+impl From<File> for u8 {
+    fn from(file: File) -> Self {
+        file as Self
+    }
+}
+
 bitfield! {
     #[derive(Clone, Copy, PartialEq, Eq)]
     pub struct LoadImmediateOperation(pub u32): Debug, FromRaw, IntoRaw { 

src/instruction/unary.rs

@@ -1,7 +1,7 @@
-use proc_bitfield::{bitfield, ConvRaw};
+use proc_bitfield::{bitfield};
 use crate::instruction::Scale;
 
-#[derive(Debug, Clone, Copy, PartialEq, Default, ConvRaw)]
+#[derive(Debug, Clone, Copy, PartialEq, Default)]
 #[repr(u8)]
 pub enum Mode {
     #[default]
@@ -15,6 +15,28 @@ pub enum Mode {
     CountZeros
 }
 
+impl From<u8> for Mode {
+    fn from(code: u8) -> Self {
+        match code {
+            0 => Self::Invert,
+            1 => Self::Increment,
+            2 => Self::Decrement,
+            3 => Self::ShiftLeft,
+            4 => Self::ShiftRight,
+            5 => Self::TrailingZeros,
+            6 => Self::LeadingZeros,
+            7 => Self::CountZeros,
+            _ => Self::default()
+        }
+    }
+}
+
+impl From<Mode> for u8 {
+    fn from(mode: Mode) -> Self {
+        mode as Self
+    }
+}
+
 bitfield! {
     #[derive(Clone, Copy, PartialEq, Eq)]
     pub struct Operation(pub u32): Debug, FromRaw, IntoRaw {