-
Notifications
You must be signed in to change notification settings - Fork 0
/
12-all-riscv+vect-commit
3105 lines (3105 loc) · 303 KB
/
12-all-riscv+vect-commit
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
ef57f7d6b1a0568f58eff04a1b27de4a22a5e07f RISC-V Port: Regenerate gcc/configure
0bd99911eea170dc9c627fd17d55e7c3ab8d4286 RISC-V Port: libgcc
b906c007feeacdeea908ae40bc093ce53dc1ee1b RISC-V Port: libatomic
122e7b4f9d0c2d54d865272463a1d812002d0a5c RISC-V Port: gcc/testsuite
154cc77ea00c46a498f827f8e7d1836313e04afb RISC-V Port: contrib
377ee2e435a6ad525625378597313f5d1b4d86e6 Use two spaces to separate options in the RISC-V docs
7953d566595e759038c4930fe901baa796c66678 Alphebetize RISC-V Options section
a4cf4b647cd239cc57d88ed82f7243e7efdf43f5 re PR tree-optimization/79256 (FAIL: gcc.dg/vect/pr25413a.c execution test)
01726bc97785f6e66d6d882bf2b81077391603c5 [riscv] Fix build due to INT16_MAX issue
f39bad9fd050ea3ba39cb68eb3121915da4936c2 re PR target/78604 (test case gcc.target/powerpc/p8vector-vectorize-1.c fails starting with r242750)
02889d23ee3b02854dff203dd87b9a25e30b61b4 gimplify.c (gimplify_scan_omp_clauses): No special handling for OMP_CLAUSE_TILE.
6a5cdb0e9e1294a72f3be8237f8e48c86c8b8dba re PR middle-end/79454 (c-c++-common/ubsan/overflow-vec-*.c FAILs on some 64-bit BE targets)
da9cd044552cb68f95a0beb2995b17119bb5e962 Fix memory leak in tree-ssa-loop-unswitch.c
ee139af5321d25192e675cc276460d7ab6fcffe9 Properly store 128-bit constant in large model
622f6b642a6c90720becec67d63a7b2f9e40a675 re PR middle-end/79505 (Memory leaks in oacc_loop_discover_walk)
25c99850471c3e5d906712711faeeb3e35c03d7d re PR tree-optimization/79347 (vect_do_peeling is messing up profile)
03108bad95b96d9dad75dc99482d652ea9a749c5 [PR 79579] Avoid segfault on NULL ipa_edge_args_vector
45f7faf0b5bfab05293808a03e76938572475037 re PR tree-optimization/79683 (SLP vectorizer drops gs: prefix)
69a2e8a10b5e80bb696269f7d6365a3efd16c18d re PR tree-optimization/79690 (IVOPTs drops gs: prefix)
57fa080bf6c0ae01bf1643a87e72ca636bde0454 re PR tree-optimization/77536 (Vectorizer not maintaining relationship of relative block frequencies in absence of real profile data)
c7d97b2846c5647a81548caa3264d77c0a595010 re PR tree-optimization/79723 (Another case of dropped gs: prefix)
0f3f4ffeafae6e4ae50bba50fae11ed82ab1b33b re PR tree-optimization/79734 (ICE: verify_gimple failed)
86cd0334f35362b1d8b2f66be156bf34eeadf785 [PR 78140] Reuse same IPA bits and VR info
501815065bca4cc3657f3f7f78f81613277ebeb4 re PR target/79395 (Compile error with -mcpu=power9 and __builtin_vec_vcmpne_p)
eb0e7c34d71173a90a2c48f2acbf4c7995240fa0 re PR middle-end/79756 (ICE in execute_todo, at passes.c:2011)
d36a53d6f20d6f689b4e0cc9485103b8f71fe33f vector.md (vector_ne_<mode>_p): Correct operand numbers.
334b3c4b8400c23382b44c14779a5d789b8cb1d4 mips.c (mips_gen_const_int_vector): Change type of last argument.
522fcdd739e5cc24bd8392f5c00dd5b439804c36 re PR tree-optimization/79824 (Failure to peel for gaps leads to read beyond mapped memory)
a8d25fd0dd7e0feffc395ff1db1f2e9d815fb78a re PR tree-optimization/79887 (ICE in set_uid_loop_bbs, at tree-vectorizer.c:482)
5281a167eaf420235edcd5b47425d54a13ff74af tree-vect-loop-manip.c (slpeel_add_loop_guard): Preserve preheaders.
61fdfd8c51a99f07b59706037cb2946bc793480c re PR tree-optimization/79920 (Incorrect floating point results when compiling with -O3)
91cd87db7e4a053f884f8e10e267e0f8913b988e re PR other/79991 (typo in params.def, PARAM_VECT_MAX_PEELING_FOR_ALIGNMENT)
dce15db61bc8c2dc7a7e1f901903fa966077fa3e riscv.c (riscv_emit_float_compare): Use fallthru attribute rather than comments.
cccfcff414eda67a3c89f57401cfad0fa432cfb8 Use gcc_fallthrough() instead of __attribute__((fallthrough)
778dd3b6277e4a4dda9dd55d1daf9c653c81e2be re PR tree-optimization/80030 (valgrind error in vect_get_slp_defs at tree-vect-slp.c:3360)
34e8234204cb51e65f0e4b325634208a227cc8f3 alias.c (struct alias_set_entry): Pack properly.
a3d514f231af029090ba40ebcdae4226b739433c re PR tree-optimization/71437 (Performance regression after r235817)
d8fe28be762164639c98506f9348f082e5f4b880 re PR target/79951 (ICE in extract_insn, at recog.c:2311 on ppc64le with -mno-cmpb)
3b82a32c3e673743f6bbb911efb8be77a7bb1255 RISC-V documentation cleanups
918112d378787a2227f61225098289a14b1ccd22 Fix *_CST ICEs connected to MPX.
5a05e11d968b8acab584a887d978886bbba4aa1b Add RISC-V Maintainers
3611534e1f90fc05f363cc7b40d45fcd295c26ad Disable test inapplicable to RISC-V
e05a9f8e560a09d920555dec2960497dcb9e9ede Use more conservative fences on RISC-V
801f04e010b85f6f3132476215be3f13e672dd2e RISC-V: Don't prefer FP_REGS for integers
b0ba96c2f1c648533eba004d93a29a11ee51b2f0 re PR target/79963 (vec_eq_any extracts wrong CR bit when compiling with -mcpu=power9)
fe62dd045e7a0c246123792b43a2263fc81fb64e stl_deque.h (deque): Access allocator value_type only if concept checks are enabled.
842392c856b8e15f8105b5fd8c3ed454cfd7c912 p9-options-1.c: New test.
79f512ffebee22885684ff63bc3d66e7e6db9b4b re PR tree-optimization/80170 (SLP vectorization creates aligned access)
a9e4a1a56fb8e99594b65d6640432ba29c705f3e re PR target/80162 (ICE on invalid code (address of register variable))
62f96a79f10e0c6772e5302c076b8c062e42b0d9 Fix calls.c for a _complex type (PR ipa/80104).
3e907b90563ad90752acf1b318bdac33d546c7f7 tree-vect-loop-manip.c (slpeel_add_loop_guard): New param and mark new edge's irreducible flag accordign to it.
9d384e80bda2cf905cd550c8908494210ae11c15 tree-vect-loop.c (optimize_mask_stores): Add bb to the right loop.
de008ec4d69a5f7e9b75b25dc9e1fa937d65ff80 re PR target/80206 (ICE in extract_insn, at recog.c:2327)
6c18efd4e20b8af2e625334c6d58e12decebf62b Fix ICE when expanding MSA constant vectors with replicated values
5764ee3c8491e3ecff855a319f781a66fca2484e Fix numerous typos in comments
4d1a05f13808cc12c09e71e6ca3951e878184bb2 re PR target/79905 (ICE in canonical types differ for identical types __vector(4) int and V4i {aka __vector(4) int})
31a07c8102fa4a7e44118bdacda5f8577ca7218e re PR target/80098 (ICE in curr_insn_transform, at lra-constraints.c:3816 on ppc64le)
067bc855b23fc7351db7030be0c881e3760b7e6f re PR target/57796 (AVX2 gather vectorization: code bloat and reduction of performance)
7fd1a7474a04fdf68e3b1645de16bcfa45a915d0 tree-ssa-loop-ivcanon.c (constant_after_peeling): Do not require sth as strict as a simple_iv but a chrec without symbols and an...
25c28f47f8c909b768cc8aac372f5616fd871e15 Add test-case (PR tree-optimization/66278).
2eb8a34363025d04482a798dec1c885e1e3a3803 re PR target/70799 (STV pass does not convert DImode shifts)
1913c8f63fba23103dff324669f581cb2248d98f re PR target/70799 (STV pass does not convert DImode shifts)
9425300b415916c5474204fa1157c94612d9f8ac Improve tests for vector and deque move-assignment
11775988d5f6db984fb902b7447a5b2817b555b1 [multiple changes]
78f2b7ce3aea49818ea97974cb41029f820d0a99 [multiple changes]
f24745230fe28ddd92d28ff681bd95d10578e3b0 [multiple changes]
119092c17a0c6e947f774692849dedb84acb53f2 tree-vrp.c (assert_info): New struct.
b26f45f0694604745bbb3d269cacecefd28b4faf PR libstdc++/80553 don't allow destroying non-destructible types
c6b9e849c04bfb994b72910346cbe24cf8feabd5 re PR fortran/37131 (inline matmul for small matrix sizes)
815d9cc6641a3eeb6734a98f64ea8b183a495ee5 re PR c++/80038 (Random segfault using local vectors in Cilk function)
49ab46214e9288ee1268f87ddcd64dacfd21c31d tree-vect-data-refs.c (vect_enhance_data_refs_alignment): When all DRs have unknown misaligned do not always peel when...
6fe63fb43f5ff71bbd5ba4b3e6128bfdd5efe37d Canonicalize canonical type hashing
6fe906a33de7ad0679cbc4e070feed5809471462 Use call_summary in ipa-prop and ipa-cp
3862ef76c66219fd7adbbd6e3884bc9c1ba9c606 Cap niter_for_unrolled_loop to upper bound
8acb85754af19a055d7d00248ca869496dd4cda0 re PR target/79038 (Improve PowerPC ISA 3.0 conversion between integers and hardware _Float128)
248710c431b94c250e8356211df6f82c753d7b34 RISC-V: Unify indention in riscv.md
822856928407e34bc10f2aa7d00bc6149b43d7f8 RISC-V: Add -mstrict-align option
0f6ed1211d4e6759a0c35bc8d05fb07e5eab7bea re PR fortran/79930 (Potentially Missed Optimisation for MATMUL / DOT_PRODUCT)
4ca2e6ec7cb634b3f2598026be638b768c926681 vect-50.c: Revert last change.
019bd543a9a7c24396eab29a97e4c30c7931bf4d vect-44.c: Add --param vect-max-peeling-for-alignment=0 and adjust.
43b883a99006138770d42067d385347fbae21334 re PR tree-optimization/80705 (Incorrect code generated for profile counter updates due to SLP+LIM)
1bea0f26630c2c7fc35968a6e646bd67a706bf08 re PR target/80695 (gratuitous use of stxvx to store multiple pointers)
65fdd5e9aca0af40e4cd2d0683149171fb5c7d24 mn10300.c (mn10300_match_ccmode): Fix where we look for cc setter after the compare-elim changes.
a5c9f2b736f0d152289628e2ff14d1888b512244 allow constructing a auto_vec with a preallocation, and a possibly larger actual allocation size
6ce6a84ac6751b38d2200d7ee1f2a0a3aecfab60 re PR fortran/80765 (178.galgel in SPEC CPU 2000 fails to run)
ef6cb4c716b9ceb467282357e5ba0c16fe71c6f6 Add default value for last argument of dump functions.
4fc5ebf12924235c9b88a2c645624bc8b1ea266c re PR tree-optimization/80457 (vectorizable_condition does not update the vectorizer cost model)
1a81741814618bc19d13de0b9e59c0324114cc86 Introduce dump_flags_t type and use it instead of int type.
fd71a9a24da0a52b9a752b4a7d4a6f71d96f5c29 OpenACC 2.5 kernels construct: num_gangs, num_workers, vector_length clauses
3cd211af9989ca33f08c9d9d7c29ba7cb208b645 PR c/80731 - poor -Woverflow warnings
11d6b45d431b0aa30cf5ce3941b01ba4fd342af5 Allow some NOP conversions in (X+CST1)+CST2 in match.pd
f408a6350f28490124ae042207027fa6599af29b re PR tree-optimization/80844 (OpenMP SIMD doesn't know how to efficiently zero a vector (its stores zeros and reloads))
2c8f03adb27b15e9e4665dfe24b04f5516ec2ea4 tree-vect-data-refs.c (compare_tree): Rename and move ...
8d44cf7275527abc86f33e6d6c51fc84fa9c877a tree-vect-data-refs.c (Operator==, [...]): Move from ...
cb4fe4013684c2984b309f799373837af582b24a re PR middle-end/80815 (wrong code because of broken runtime alias check in vectorizer)
f8d0706b24ff84eb0adfa161819e71a80f5a918a tree-vect-loop-manip.c (create_intersect_range_checks_index): Pass in parameter loop, rather than loop_vinfo.
3c9feefc8d6372d0e24070b53b40c2a36026e798 Inline and using namespace representation change.
bbe3927b62ae4318c5319da379642aafbf6d15be re PR fortran/37131 (inline matmul for small matrix sizes)
8d21ff9f66a20e551d52b0759c926660dccb49cd Vector peeling cost model 1/6
71595748a3b193518a6bfb3578e9ff1aa813620f Vector peeling cost model 2/6
1e69cc8f2719f0bca87f29fa03e5a65a944ab659 Vector peeling cost model 3/6
64812d33ac6c0f23a3f4c25bc5497d7bb00e0f24 Vector peeling cost model 4/6
4bfb347c0249384240209d0f414eaef5ac5adc48 Vector peeling cost model 5/6
4d3d23fb7d364ce433cf59b7d36d333567990518 Vector peeling cost model 6/6
1a58f770e487e94227fc75a42eee385d86b7bee9 tree-vectorizer.h (struct _stmt_vec_info): Add reduc_type and reduc_def fields.
c7d7e2227f72d54ce3ec725693a0fac35455c555 tree-data-ref.c (prune_runtime_alias_test_list): Relax minimal segment length for dr_b and compute it in wide_int.
9cbd2d979c5e7095530a6fc290615847d31b549d * tree-vect-loop-manip.c (create_intersect_range_checks_index) (create_intersect_range_checks): Move from ... * tree-data-ref.c (create_intersect_range_checks_index) (create_intersect_range_checks): ... to here. (create_runtime_alias_checks): New function factored from ... * tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): ... here. Call above function. * tree-data-ref.h (create_runtime_alias_checks): New function.
748bbe72024ab2840c6b8ab60cef124c4c83fbeb Alternative check for vector refs with same alignment
046a84762b7954d43d14aa8b7e48bf07b8117270 PR libstdc++/80893 Fix null dereference in vector<bool>
67b8dbacf69243ffc6ac999fd4928af83fbf6c04 Change comment style to one we normally use.
4f14911c80fe5e57068a98bf8f65aef0a27a9494 Fix changelog of previous commit, the correct version is:
052754ea183cd0da87af930ae07355137ca68a81 fold-vec-logical-ors-longlong.c: Update the target to power8-vector.
e7754973ed3f91db45ae9257197966e1030e1e85 tree-vect-loop.c (get_initial_def_for_induction): Inline into ...
643a9684fadd71e0b89bc737e937e22fe621a4e7 tree-vect-loop.c (vect_analyze_loop_operations): Not relevant PHIs are ok.
9186a9d353815352d9625fc765dd0449fb64d8a9 tree-vect-slp.c (vect_detect_hybrid_slp_2): Match up what we consider a relevant use stmt with vect_detect_hybrid_slp_stmts.
e09f2fb0ef4c7a04ea7c1e2270870d1654c79cd2 frame-header-opt.c: Include profile-count.h.
e7baeb396d313ef141f972cdedc19b12ef1b9cfe re PR tree-optimization/80928 (SLP vectorization does not handle induction in outer loop vectorization)
6eb2ac659ce3c958b78ec4f2bbdb78b8170df0ae re PR tree-optimization/80928 (SLP vectorization does not handle induction in outer loop vectorization)
46c821e74577edde97754def189f8aea92ef51ae re PR tree-optimization/80928 (SLP vectorization does not handle induction in outer loop vectorization)
7078979b291419f353804cc32ecfdb22367b6e0d tree-vectorizer.h (vect_build_loop_niters): New parameter.
704c28eeebfa5fc3fb555eb980f149ca76a8b948 tree-vect-loop-manip.c (vect_do_peeling): Don't skip vector loop if versioning is required.
6355150f585e2d746a62df19ae89df7c93e8c3c7 tree-vect-data-refs.c (vect_mark_for_runtime_alias_test): Factor out code checking if runtime alias check is possible to below ...
fb4bc6ff6c08f4e5524fa5e1881b478b0f689155 re PR tree-optimization/80928 (SLP vectorization does not handle induction in outer loop vectorization)
01a8cacc96f2b5c1df5be8af746f758006c11511 re PR tree-optimization/66623 (Unsafe FP math reduction used in strict math mode)
225ab2b07b41d0f373efd574e962f90e8b73d46a Add deduction guides for sequence containers (P0433R2, partial)
bae6eef0095c6fb444a547da7a938a2d35a6e3be tree-vect-loop.c (vect_model_reduction_cost): Do not fail, instead get vector type from stmt_info.
c3684b7b86da9b6b01f6fb274227fc6401df053e PR c++/80560 - warn on undefined memory operations involving non-trivial types
7d594224c2375ae5b067b727a46c42b6ddc86de2 stl_bvector.h (__fill_bvector(_Bit_type*, unsigned int, unsigned int, bool)): Change signature.
6a2dfd9a66a678b26c762d0fc614fea267ea706b Make keyed_classes a vector.
14d8a9121242c03ac9b92d131ecc9c1634e8ce10 PR libstdc++/80893 don't run test for C++98 modes
adb7eaa2bac31047b37cc8b9cb7b4121ca0a8fea tree-ssa-loop-niter.h (estimate_numbers_of_iterations): Take struct function as arg.
16122c22dc009696131c250603745b34340b803a re PR target/79799 (Improve vec_insert of float on Power9)
a1aa2599dd85d590f39dbe565cc213c8dab65cae re PR target/81121 (ICE: in extract_insn, at recog.c:2311)
d47d743898d2af37ff24bbc6c5b78fb77020bcef pr65947-9.c: Adjust.
dca19fe10daf00bfef714e3f9f98c63ff70c7a64 Improve dup pattern
85d5b033ae83c37ae0b4dbd4210d463dcacc4842 pr65947-14.c: New testcase.
a78f698034a2ab7fabd0d6ca3d35e688670b6d2f pr65947-14.c: Fix missing brace.
0759db190d979bb4adaeaedd19ab0c823c168691 tree-vect-loop.c (vect_model_reduction_cost): Handle COND_REDUCTION and INTEGER_INDUC_COND_REDUCTION without REDUC_MAX_EXPR...
b6d03af0b128d4a1f923f18aff52549f5fad1453 PR libstdc++/81173 fix undefined memset with null pointer
25853b33482749fb6a07336ea3790a45cc1752f7 re PR tree-optimization/80928 (SLP vectorization does not handle induction in outer loop vectorization)
306b0c920fc691999ecd078f4b1efe015923feea tree-vectorizer.h (vect_get_vec_defs): Remove.
883312dc79806f513275b72502231c751c14ff72 Use ucontext_t not struct ucontext in linux-unwind.h files.
62cf73356918189f84ad9fcc83c1ffe8f86d7595 tree-vect-loop.c (vectorizable_reduction): Move special cond reduction IV var creation ...
6cd83bec4b76e19175a425b7e1841d9c5d0d164e re PR tree-optimization/81196 (Number of iterations found for p!=q but not for p<q)
0630a4ecda602a90e978c3285cf1028e92ff5e8b tree-vect-loop.c (vect_analyze_scalar_cycles_1): Do not add reduction chains to LOOP_VINFO_REDUCTIONS.
357067f243611b9e29367b61a50efe2e78f693c9 asan.c (asan_emit_stack_protection): Update.
4812f0b73c076ead7371785770a1736cf4ed1f49 re PR tree-optimization/81249 (ICE: error: incompatible types in PHI argument 0)
bd2f172f0b67c88ad3dd6126e8ee6fd4e87b6787 tree-vect-slp.c (vect_slp_analyze_node_operations): Only analyze the first scalar stmt.
618400bc14b5c52a450e91d59632d5b08ae1a325 ggc.h (empty_string): Delete.
c7be78e9b3932307536faaedc52e4c553eaf7dd6 tree-vect-loop.c (optimize_mask_stores): Use make_single_succ_edge to update profile.
af2bbc51d3879b6e7a03b4dc2d4ab017a98270ba cfg.c (scale_bbs_frequencies): New function.
c34d09274e72031d768e18d3f2365a1532357879 PR81136: ICE from inconsistent DR_MISALIGNMENTs
bc9f4235bcac6304141c472c94ecedeb9dbbff56 Tweak BB analysis for dr_analyze_innermost
c78e36522d21297b555185f5eeedd6e848eda684 tree-vect-loop.c (vect_analyze_loop_operations): Also analyze reduction PHIs.
b6d447f20948b35804fd780f8f1a237c9d36826f tree-vect-loop.c (vect_create_epilog_for_reduction): Revert back to using VIEW_CONVERT_EXPR.
3f5e8a7690d91daba3d8988318895fe51b7749ec Use innermost_loop_behavior for outer loop vectorisation
e054a1852bf903139a80f34c726453d34338e008 Rename DR_ALIGNED_TO to DR_OFFSET_ALIGNMENT
832b4117d4068670cc9ed496a7ab06104a12dc00 Add DR_STEP_ALIGNMENT
bb64297941f34721c7d4e94e754b454086511cf9 Add DR_BASE_ALIGNMENT and DR_BASE_MISALIGNMENT
25f68d908ff41a912a9bacb88afba665dd59c2ff Add a helper for getting the overall alignment of a DR
6b5e165bd8236e1bcd4e7bc3a6fdc0f63ed9410a re PR tree-optimization/60510 (SLP blocks loop vectorization (with reduction))
80be3333236f4fcb03e15811d4b8487a604bf866 Avoid minimum - 1 confusion in vectoriser
10ea26721d314b7dda7677dea57aad1845d5c9dc * tree-vect-loop-manip.c (vect_do_peeling): Fix scaling up.
542e7230c0dd16977671486414207ef1a3bd52e4 cfgloop.h (struct loop): Add comment.
a7a44c07369631201744422c02dbe59655201865 tree-loop-distribution.c (struct partition): New field recording its data reference.
b8506a8ac0a98ad8d3ece50a6e585e9c72d226d3 Remove enum before machine_mode
dcbf81c94423262b09c3f81e5e1fd3c9b999ff2d Force a dependence distance of 1 in gnat.dg/vect17.adb
5d7b8153b4b0a0f037d13bb9fdaae114b321c5c5 builtins-1-p9-runnable.c (dg-ddo run): Add lp64 && p9vector_hw.
1b68a156d636b8a67e13ac721718c1e1f213f969 riscv.c: Remove unnecessary includes.
1234ee19c9a7b175c154f987d3089d669d17501a tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Use profile_proability for scalling.
d2e78d766294a5e548c2eaf92f07a8f768120e1c re PR tree-optimization/81418 (ICE in vect_get_vec_def_for_stmt_copy)
ec15a152077b766a2b61c36f86172af05aa03ab5 Fix PR81362: Vector peeling
b267968e676627af45f63c64f4c8c4a0f1939561 re PR tree-optimization/81410 (-O3 breaks code)
1310ff035d548056ad4a0def038a6c5dedd98b47 Add generic v2 vector mode support for nvptx
b98b34b708e321a292886e2dd368223d32a60e86 Add v2si support for nvptx
3717fbe35e288a02ddf97367355b15530745cecb Add v2di support for nvptx
304a15ec643310a4d18521ca36fea5bfed814768 PR libstdc++/81476 Optimise vector insertion from input iterators
f971b2813d7ddbdba210a63290b790a175777679 slp-43.c: Increase loop count to enable vectorization with V64QImode.
891ad31c7b151704de655a1a2b70568830a65086 re PR tree-optimization/61171 (vectorization fails for a reduction in presence of subtraction)
2953b72fdd6c7d812028a636dfadf1c0e89ca314 re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b right away, to be more efficient for Ryzen and Intel)
1dae21ad9797ae5cb77db3f2d85e854f3ae121f4 re PR tree-optimization/81303 (410.bwaves regression caused by r249919)
9af7f3731b0ddffb3aa75b78a0ede411d36a3b09 re PR tree-optimization/81500 (ICE with -O3 in process_use, at tree-vect-stmts.c:506)
d629ab44961886947b9ba07b8f26240868904457 re PR tree-optimization/81303 (410.bwaves regression caused by r249919)
8c7331c5563e00e63837d0246f1325371157d46a Add AddressSanitizer annotations to std::vector
4a15d84228ee29d55cd011094f82c8d4fa9a5a76 re PR libstdc++/81064 (Inline namespace regression)
3597188b4b1c0cdc363d0d3965b2cd667d6b448d re PR target/80695 (gratuitous use of stxvx to store multiple pointers)
fdd293743d43c5721e75d951d57d73b50af6738d re PR tree-optimization/81303 (410.bwaves regression caused by r249919)
5ea71a5a7c9f25a7539bdc8c5ed7a92bf2e2115c re PR tree-optimization/81510 (ice in operator[], at vec.h:749)
ea0638714cacf83107bb886d9cf87f52a32a7ea4 re PR tree-optimization/81410 (-O3 breaks code)
e294f495894cd2d9e217565e340284b2edda4671 re PR tree-optimization/81529 (ICE in vectorizable_induction, at tree-vect-loop.c:6613)
52645850fc57ff68a8a7704f7611b18f5c853cda extend.texi: Update the built-in documentation file for the existing built-in functions...
6cad8c86b86637e9987a02cf84bddb1e8e397319 P0702R1 - List deduction of vector.
0919ce3efe2a0d6a20cb726feabe26dc3503db43 [Patch (preapproved)] Guard Copy Header pass on
9811e84c99df6269baa406c7f42d479b342087c4 re PR middle-end/81502 (In some cases the data is moved to memory unnecessarily [partial regression])
719488f819ceb7e7185bf324f04aa9030ba9c2ad re PR tree-optimization/81571 (ICE at -O3 in both 32-bit and 64-bit modes (internal compiler error: in as_a, at is-a.h:192))
1f9e09b55416098b04b3071549cdd53ab95ff8b5 Add RTEMS support
92e29a5e86c8adc88ee17a483d7284d7bb9e090c re PR middle-end/81502 (In some cases the data is moved to memory unnecessarily [partial regression])
8de33df2783088696d8c426a8467a8e1d70180a0 pr80815-3.c: Require vect_perm.
7488a79fa3675d18da9dc873933ddd4395822875 use C++ for {make,build}_vector_stat
6cc518c6cb819f9c0c7ad1bebad95fba1213e19f re PR tree-optimization/80925 (vect peeling failures)
ff03930a11f3a996e512ed3613eedc1b50ac5b30 re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b right away, to be more efficient for Ryzen and Intel)
26d476cd52837de43ed783288af5d4d68bd93c19 Remove flag_tree_vectorize
74cc0b2b66126e4598c4412ccbd879caa287ca81 re PR tree-optimization/80925 (vect peeling failures)
8e1863eca8c8914cc5e05369dacdc5266cdca179 re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b right away, to be more efficient for Ryzen and Intel)
636730cadd8be7f6280ea673cf44573bd49c37b0 re PR target/81622 (ICE on invalid altivec code with ppc64{,le})
77eefb7122d544b9e22a7f40a92320742c23e74b re PR tree-optimization/81633 (Incorrect floating point result with tree vectoriser)
04199738b48867d8c1d60e98578340047e3237da tree-vect-stmts.c (vectorizable_store): Perform vector extracts via vectors if supported...
dfbddbeb1ca912c9f9f806d8cff55a6ac2887d89 Handle data dependence relations with different bases
9adee3052156ae36271be28e3ad47dd975c26f42 Use base inequality for some vector alias checks
2c515559f9dbe8bace5f68e2fec7600a9edc7c42 C++-ify vec_info structures
62c8a2cf17cd794241c8f978c8fcfc4682ca4315 Pool alignment information for common bases
08c4c51e365e2957a590db0f4860ad886a6a20e9 re PR target/81593 (Optimize PowerPC vector set from vector extract)
314e6352040016aff26cc2cf0b9eb60c40ca859e trans.c: Include header files.
26d66f28fdb9bea6e05c2c9f9df7870f9d9f76b2 re PR tree-optimization/81723 (fortran build doesn't terminate on 64bit targets)
4261463d962c29bc105f973a8ab4269cf566cd1b re PR middle-end/19706 (Recognize common Fortran usages of copysign.)
b388427bf158402a37a4c966a01cf84eeb60052f vect-xorsign_exec.c: Add --save-temps to the options passed.
47ee1b7c10f2aa90645b0d2a94926fa2a674450c jit: add gcc_jit_type_get_vector
32129a17506ba18a34d07145eb2c1e9f9827034f C/C++: show pertinent open token when missing a close token
adc840379952b3a5649417d1d20d68f0d65e60ba PR81738: Split vect-alias-check-6.c
963aeaad25122bc507f9c72b9af6fc13cbeccde4 PR81815: Invalid conditional reduction
f8c770ddb4b5499780a5e2d58c861a9c903cdd29 Add missing ECF_NOTHROW flags to internal.def
4a89b7e700b9164c2cd9858fd6e1de4d813dfb79 altivec.md (VParity): Remove TARGET_VSX_TIMODE.
953e520dbe6794655602cdecec878d0393404731 jit: fix segfault with autovectorization (PR tree-optimization/46805)
c34960677437197ee2859b243cf185c7f873c83b Move vector_type_mode to tree.c
2be65d9e98a1335e0d948c2de59946e715afcbe5 Add a type_has_mode_precision_p helper function
6e4c6a248b55cad0775c9f47bfcdff79e15b913d Part 3/3 for contributing PPC64LE support for X86 SSE instrisics. This patch includes testsuite/gcc.target tests for the intrinsics in xmmintrin.h. For these tests I added -Wno-psabi to dg-options to suppress warnings associated with the vector ABI change in GCC5.
d876eb057408fa7904dfc28ae9bc199c69b10858 cp-tree.h (lang_type): Replace sorted_fields vector with bindings map.
faa5399be693b2cdea641b976156f0fc89fa10cf tree-vect-slp.c (vect_bb_slp_scalar_cost): Properly confine life to the active subtree.
a844293de1d30da8ddba7384fc22ae59e857709f Set the call nothrow flag more often
9dc3d6a96167b4c84824be5e472fba4956297033 Make expansion of balanced binary trees of switches on tree level.
2ffc0382ff79b23a6f88113d277842934de258ed 20030926-1.c: Add dg-additional-options.
0d4a1197ba24d4f95b5c5f1face695806075a0c6 [1/77] Add an E_ prefix to mode names
4e10a5a74b2571a72ab944195267334d56b9534b [2/77] Add an E_ prefix to case statements
c94843d2422bdf77e2f86fad0329838f36773b43 [4/77] Add FOR_EACH iterators for modes
490d0f6c91c0c4fef57a5ffe438629b0687113de [6/77] Make GET_MODE_WIDER return an opt_mode
b5f2d801b10c25ef32a80c03d6df8668920a593c [9/77] Add SCALAR_FLOAT_TYPE_MODE
fffbab82e7fd15ef695159746a0ce7b9ac906778 [17/77] Add an int_mode_for_size helper function
304b9962830476dce3fe7632713e5f5ce002c050 [18/77] Make int_mode_for_mode return an opt_scalar_int_mode
b4206259f10455603e0c90825566de1ea777c04a [20/77] Replace MODE_INT checks with is_int_mode
45e8e706e295e7770d02c6d9c9798f4bab7ab524 [22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>
7c61657f68cc45bdbbfcfd762dbfd7021f3acb3f [25/77] Use is_a <scalar_int_mode> for bitmask optimisations
6b9c3decc38f6f852adf16951b9b1b043112cd1c [26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications
c7ad039d8d75666f4f188a913033da36206503b8 [35/77] Add uses of as_a <scalar_int_mode>
e3731c52cf1b60d90f27f81ff0d1e2ad164fed07 [42/77] Use scalar_int_mode in simplify_shift_const_1
22527b59dbb10204626aeb8660a8e262377ac354 [47/77] Make subroutines of nonzero_bits operate on scalar_int_mode
3c84109eae52da59c09e8a91bfb5e79bd0527809 [54/77] Add explicit int checks for alternative optab implementations
b397965cae46d88d4c274fb2ecdde9a4714a4e6a [65/77] Add a SCALAR_TYPE_MODE macro
db61b7f923b769142156eab047c94b04bb7adaae [66/77] Use scalar_mode for constant integers
3bd8f4816fe24ef00641cde33dd13155b83db6e1 [68/77] Use scalar_mode for is_int_mode/is_float_mode pairs
16d2200070f49ed71053b81699e37bd539a0ee69 [71/77] Use opt_scalar_mode for mode iterators
18e2a8b889d520fc3598f74e39e1dbf1ef06ebd1 [72/77] Pass scalar_mode to scalar_mode_supported_p
79d22165ea45e89283ccf147d65cbf66548838da [74/77] Various small scalar_mode changes
18a01e8562aa48e978c0326d3e18fc290c1c9ca6 Revert 2017-08-28 Nathan Sidwell <[email protected]> Restore sorted_fields vector.
db69559bac8ab03ccddfe3a42be630e65c277812 PR82045: Avoid passing machine modes through "..."
792ce29f1cfe2b34a9f081d929e57135f36c3374 re PR tree-optimization/70043 (The compiler hangs in a fortran test-case with -Ofast -g -march=haswell)
f939c3e63c5076205c56fb36e9c7cdc064a189a8 Turn HARD_REGNO_MODE_OK into a target hook
99e1629ff116e2e1aa37a14aa0d15b4533068927 Turn MODES_TIEABLE_P into a target hook
11a82e2597c54016345beb99e5339e37851c7d59 re PR c++/82084 (ICE: constructing wstring with -O3)
f4b316470bf7cccab22fbb97d1b6c541fcfc2855 Make more use of int_mode_for_size
ddc203a7b15306287792a3eed6abfe306e3d26ad Add mode_for_int_vector helper functions
9da15d4097fa2fde5c2a5f1681db8fd04488a563 Make mode_for_vector return an opt_mode
3981fbb65a43dff3a81ebc32c94d6f86bb4f9783 Make targetm.get_mask_mode return an opt_mode
f6bd5664755b207d5bbfedd95231dc62ccfaa1ed 20050604-1.c: Adjust to be a better test for correctness of vector lowering.
1887fb461b2c370aeeedaba95b503fde9b2c70f9 name-lookup.c (count_fields): Rename to ...
edcc77dbd9f95301a8be1a2f2b0d774680b46a1a Make-lang.in, [...]: Find runtime source in libgnat/
635c99aaf7250ef13dbd7a6f02141cb735bdcc2f Make HSA resilient to side-effects of split_edge
cff44c10ae1f4d3dc73abed85dfa785b70a553e1 tree-ssa-threadbackward.c (fsm_find_thread_path): Make GC vectors heap vectors.
dee6fc2b43d2fc004ffe65a0e030fc74facb7c64 tree-vect-generic.c (expand_vector_operations_1): Do nothing for operations we cannot scalarize.
e0bd6c9f0aa67d88bbb20019362a4572fc5fac3c Turn SLOW_UNALIGNED_ACCESS into a target hook
c43f427972be6aecd3c85b854cdf601feb816316 Turn HARD_REGNO_NREGS into a target hook
d681026df10348e1fbede89055cbd395dc66cdd8 PR libstdc++/79433 no #error for including TS headers with wrong -std
2af96386a67a2224abc74e7c2144747240ac4ad5 Define std::__to_address helper
f15643d4ea7103ad1bd9ef893f4c211624e1614d Turn SECONDARY_MEMORY_NEEDED into a hook
bce5091aa995e9faea7c6eb5b11b288bd66bcd98 re PR tree-optimization/80925 (vect peeling failures)
83ada6e8e669d0218771edcc99317b9951431df9 Don't xfail gcc.dg/vect/vect-multitypes-12.c on 32-bit SPARC (PR tree-optimization/80996)
9e822269364f5268b2bdc82530fd6c871f47b1bc Store VECTOR_CST_NELTS directly in tree_node
794e31808f1554d51f0f0357c3a74a6365f0a274 Use vec<> in build_vector
908a1a166dccefa24ae8b3606f4ce1da944eecb0 Use vec<> for constant permute masks
e7c45b6600acfdc0930b980a45a364f77844139a Add gimple_build_vector* helpers
dccf43aed37281a7bb91a7984a75470ad62eb0f1 Make more use of gimple-fold.h in tree-vect-loop.c
e8f142e28262a5048c6f40f4bfb6a612d3da55f0 Add a vect_get_num_copies helper routine
ca09abcb399bcb8cddbda68c75e702cc8989a6ca Add a vect_worthwhile_without_simd_p helper routine
a41a6142df74219f596e612d3a7775f68ca6e96f Add LOOP_VINFO_MAX_VECT_FACTOR
0d803030650a6c671b295d3e7d5161e64b59b2f6 Turn CANNOT_CHANGE_MODE_CLASS into a hook
bb149ca2e912038dce733f95ab1c24ff0d1af280 Turn TRULY_NOOP_TRUNCATION into a hook
7b9361409dda228eedb13a3abe547c3cafbe957b invoke.texi: Document -std=c++17 and -std=gnu++17 and document c++1z and gnu++1z as deprecated.
78d459bbbbadcfe8121106d49e1e6ede3c182c31 PR82228: Move ncopies calculation in vectorizable_live_operation
6b1ce94d31733df9b0055b9e1934704d21973d77 re PR tree-optimization/82220 (SPEC CPU2006 482.sphinx3 ~10% performance regression with trunk@250416)
f64b12bd152735aacb948424766b33303bbeb5f8 omp-offload.c (oacc_xform_loop): Enable SIMD vectorization on non-SIMT targets in acc vector loops.
68a0f2ffff4fdb05cfe110b3828124bcbe6d611f Invoke vectorizable_live_operation in a consistent way
dd25e724a475caffa4372f911d15536d09c342c8 Fix vectorizable_live_operation handling of vector booleans
e009b0558e8dd9bd9b17308104834ef5a1536975 Fix type of bitstart in vectorizable_live_operation
7251b0bfbf09fae831bb5d3d2d7a311e9d37b398 Fix vectorizable_mask_load_store handling of invariant masks
b161f2c927bb7fb70dc0c6d4e9ab22cdba29db6d Include phis in SLP unrolling calculation
ac8936b4677fa10b676e5b12aa682b9d2d42c1e5 Fix an SVE failure in the Fortran matmul* tests
8b7e9dba2bc921c24994129bb9231caa176d6da5 Move computation of SLP_TREE_NUMBER_OF_VEC_STMTS
4d6e2f33a437fc6ead8218bf5f0e2cdb3e834d9e graphite-isl-ast-to-gimple.c (graphite_verify): Inline into single caller.
20bdc473ebd7176544e0c8cdf87750adc6f44a97 Add a vect_get_scalar_dr_size helper function
f702e7d43f2aec71640d0db7ecf1543ba75f37c3 Let the target choose a vectorisation alignment
ea44495d106582b951de1e84d9d7849d3783a56d PR82289: Computing peeling costs for irrelevant drs
d362ac6c6d5a9419d9b7a0db84155a065e113434 re PR tree-optimization/82285 (Optimizing error when using enumeration)
579f368704e340c47957d5fb5aca6ecda6624a69 Update interface to TARGET_VECTORIZE_VEC_PERM_CONST_OK
f39b92e2c485be81ec154d2986495305d5926688 Change permute index type to unsigned short
58e17cf84636d72e3620b5af50b0336d9364ddd0 Turn CONSTANT_ALIGNMENT into a hook
7ba950d31d0cbf135d5fab8da26a37fb580df86e pr65947-9.c: Requires char to be signed by default.
7d6206fe298f420e2292df78ab3480caa98cd1aa Fix libgomp.oacc-c-c++-common/loop-g-{1,2}.c for non-nvidia devices
db6601d2b6e471598716ec7ab88a780bd4676933 crti-hw.S: Add watchdog vector, FT930 IRQ support.
9c53f040cb3c3bc0b86f702af5bd73d904d6cf0f [BRIGFE] Fix (more) crash with calls with more than 4 args.
a46461133eac42da46efe784b5b596c35ebcdafc Testcases using dg-options require at least -mzarch.
c059a92eccd96d00ffd23801d032eba14ff2a244 New target check: vect_long_mult
30d027da83cdcc174747ce19381525a16c4a4503 New target check for double<->int conversions
4f15b6a282bc4c11ee8b32dac4f05aab10ce3e10 New target check: vect_peeling_profitable
6069fe72870e410c08570e94ce2b141c6bc88219 jit: implement gcc_jit_context_new_rvalue_from_vector
8fe3ed4c10e293c69479042667161c79f0accf3e Fix libgomp.oacc-c-c++-common/{loop-red-g-1,routine-g-1}.c for non-nvidia devices
0322303e26cc317970fa311c032121078dab51dc vect-align-1.c: Fix vect_hw_misalign condition.
592fbfb5fb376972c21d88ac57b0a4a38018e79f slp-perm-9.c: Use vect_sizes_16B_8B.
31bee964798d25ac83e513de6858b69c3a9624be re PR tree-optimization/82436 (465.tonto ICE in vect_get_slp_vect_defs, at tree-vect-slp.c:3410)
d20eac1b41b9a86128a80f374e029d9638d14cba re PR tree-optimization/82397 (qsort comparator non-negative on sorted output: 1 in vect_analyze_data_ref_accesses)
2f3914287d4c1c75394d4f101ad5bd4d9d4b66e8 re PR tree-optimization/82434 (-fstore-merging does not work reliably.)
d155a264dfe562806dd2d44aca7e272594a3e92e Committed on behalf of Sudi Das
18b4306c0a150f144cddaf85ed814893b3b44b81 re PR tree-optimization/82397 (qsort comparator non-negative on sorted output: 1 in vect_analyze_data_ref_accesses)
166b87998a85c8c7d6db923bc7c8370af3665381 tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg): Skip renaming variables in new preheader if it's deleted.
2fe1a1b888e204fd0ccc4e9c96b7065344e879aa tree-vect-loop-manip.c (rename_variables_in_bb): Rename PHI nodes when copying loop nest with only one inner loop.
8e6cdc90d41633e09a3a34bb8c6f71cf246101b2 Require wi::to_wide for trees
69c328ec60f2ff1858387eaf195119f6976fe99c re PR tree-optimization/78558 (Incorrect loop optimization leads to crash)
1be043a140d516e16930bbc357f5ccb7b98c1db5 re PR libstdc++/82558 (V8 JavaScript engine segfaults since r249235)
cc9fe6bbd78a0b1740c5c1c5713d36e3da6e7165 target.h (enum vect_cost_for_stmt): Add vec_gather_load and vec_scatter_store
ef30ab837c42b9555b3fc290454a5c02cb65487a asan.c (create_cond_insert_point): Do not update edge count.
c274eebe4ebaea9ee9e3dd7e1c0a8a4fb3108472 re PR target/82370 (AVX512 can use a memory operand for immediate-count vpsrlw, but gcc doesn't.)
42a764f76f14ce2718d30459dc140d1410ef118e re PR target/82370 (AVX512 can use a memory operand for immediate-count vpsrlw, but gcc doesn't.)
1031b5772a3f2daee0bf01d7d155955833d05c1b re PR tree-optimization/82603 (ICE in ifcvt_local_dce w/ -O2 -ftree-loop-vectorize)
51e28fffbec42be94bd281b0234a38774bdf6c21 re PR tree-optimization/82473 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1524)
8f8f531f0def95af2eb35265a3e7b6c3aa43ad7c sem_dim.adb (Analyze_Dimension_Binary_Op): Accept with a warning to compare a dimensioned expression with a literal.
f6fd8f2bd4e9a91b4683e2cbb144631ff201f587 pr79683.c: Disable costmodel.
a85cf8e99049f4db8b5868b5df5ef201a9a7b2cb Use scalar_mode in expand_shift_1
3ec43c5e312e368cca5cf0b9727bcbd71f13a704 Use SCALAR_TYPE_MODE in vect_create_epilog_for_reduction
2a31c3216c53ffaeb21ec76e4491611bb40792b4 Convert STARTING_FRAME_OFFSET to a hook
6ab5a6f30f2a3a9db37604195ff4b802779f83bc re PR target/82460 (AVX512: choose between vpermi2d and vpermt2d to save mov instructions. Also, fails to optimize away shifts before shuffle)
8468bfe8cb065d4d7b17a39a756fed8cb66e3a7a libstdc++.exp (check_v3_target_normal_mode): Add c++config.h include.
bc1a75dda26988781847f00cfc5283eb13418106 re PR libstdc++/81706 (std::sin vectorization bug)
a596f4970ededd424328f7789b4a304e5b3a7338 re PR tree-optimization/82436 (465.tonto ICE in vect_get_slp_vect_defs, at tree-vect-slp.c:3410)
0b661358bcd72a70bbf4b903db1f0f8de98a6bbd RISC-V: Add Sign/Zero extend patterns for PIC loads
c3ef5fda143585ca19dff5a977b6aa87b7a17566 vect-dot-qi.h: New.
c5a92111082b32711635a61a602f1495effe65ff vect-multitypes-1.c: Correct target selector.
957f5feacf2f4c7916e0137ad95d2d9559e06fa4 Deduction guides for associative containers, debug mode deduction guide fixes.
76ff5c2403e918519f441b073a8b7c1053d62217 re PR target/82703 (Wrong addition of std::array components with -O2 -ftree-loop-vectorize -ftree-slp-vectorize (works fine with -O2))
f44d7b243a43db45cedc52ea3bd3f385b8f06f0d RISC-V: Correct and improve the "-mabi" documentation
daff6cdf8ea49dd3a9fbb9120f4b5ef39fe78a9a Part 2/2 for contributing PPC64LE support for X86 SSE2 instrisics. This patch includes testsuite/gcc.target tests for the intrinsics in emmintrin.h. For these tests I added -Wno-psabi to dg-options to suppress warnings associated with the vector ABI change in GCC5.
c7432e76039d2c4fb7a00f0fbd261eec2238d42b GCOV: std::vector refactoring.
4695d816a37abffa3fae55cbb1c874ec1e62446d GCOV: Vector refactoring II
8a3f457f148b7114dfa37927b73410eecc986a33 GCOV: std::vector refactoring III
59d06c050373919ed36a13b37103b6e069d8ebd3 Add gen_(const_)vec_duplicate helpers
9b1de7e2e8e99eabf2b8d1ef74eb57fbd41bc730 Add more vec_duplicate simplifications
06ec586d2c384ba016c784de3279f3770d9f399d Allow vector CONSTs
ef339d6e2e846ba7ff544def1d79f10762da223d Add a VEC_SERIES rtl code
7aaba298fe122dfd40bb612623df89db08499f8b Add an is_narrower_int_mode helper function
cb8e3dda35164dcb85056556779daa673b40166a Use (CONST_VECTOR|GET_MODE)_NUNITS in simplify-rtx.c
d4b51b8ba058a79d9ef64cd03a3bc88d2c7fc6c6 RISC-V: Document the medlow and medany code models
42fc5a70c3d203c85dd09a40e53b3da24faf78e6 RISC-V: Use "@minus{}2 GB" instead of "-2 GB" in invoke.texi
13e4f305e040097de34481a72756dbe0ebd06dbc RISC-V: Handle non-legitimate address in riscv_legitimize_move
e7a740068ed3cc5961101f07012314d940a97ae5 asan.c (create_cond_insert_point): Maintain profile.
ecc82a8d0551e02afc9bb4d9dff450f6f0098b4e RISC-V: Set SLOW_BYTE_ACCESS=1
caf1c1cd1253a847644744e3d6df3f98051ef024 RISC-V: If -m[no-]strict-align is not passed, assume its value from -mtune
0791ac186bdddf4c52a59ee240ad9c3c9d7f197a RISC-V: Emit "i" suffix for instructions with immediate operands
19520957ad27c591e888a82d8dd30cb5fccb3896 Fix test-suite fallout of default -Wreturn-type.
454f8b2b0c6f9645b3df6be98efe2ca520f2ce82 Fix -Wreturn-type fallout.
962b96688689a73ddf5fb97d9c63514f98b49d27 [gcc]
4d30a85ecee179acc22a213653f4c03028994a6b RISC-V: Define MUSL_DYNAMIC_LINKER
6ed01e6b282fa9eb5d19ab8bc829d821f624103e RISC-V: Implement movmemsi
6432f025b4fccaaca8564e0c2518cdba869c4bf5 Simplify vec_merge of vec_duplicate with const_vector
40757a25d45d47ddc50819bfd32dd6aac595abc2 vec_merge + vec_duplicate + vec_concat simplification
fb5621b1841b56a88f66fb1e08dd87db0009c57b RISC-V: Fix build error
136ca74eb91c225ff18a7b08e0e7fd027b88517c GCOV: support multiple functions per a line (PR gcov-profile/48463)
1eae67f812a0b7b6b7132d0375e662bc6200d68a Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS_PER_WORD
9b4473b6c4a706cd5d38a50d10a83c549d676ca3 Be stricter about CONST_VECTOR operands
b9680369c3b870031120cda2a92511393e936538 Consistently use asm volatile ("" ::: "memory") in vect tests
a826c5019e1439181a822c2b5079fec22654e37b Add VECTOR_BITS to tree-vect.h
d574e624a9d156600731554133db68dc6868e7b5 Add available_vector_sizes to target-supports.exp
83f15782dde23b068a806b3f7e0c253c49d148a2 Don't assume vect_multiple_sizes means 2 sizes
8b26c5492bf1d4c7acab18eff1e78a239af779a1 Add vect_perm3_* target selectors
4d83db5d73ce3e355f9ac166e04d72ce41decfb5 Add a vect_element_align_preferred target selector
b8353767564e8042ce75d6879e813ce313a0a050 Add a vect_unaligned_possible target selector
32c7bafd50e6553f2f79858cf365907979d5eb2a Add a vect_variable_length target selector
331e1a56adf1a81c3544a8034d9e0a413ea35435 Add a vect_align_stack_vars target selector
c48a8e71c8b5d3e6bdffaec85b1e3b111814cee0 Add a vect_masked_store target selector
4d99a8487287e94b9bd42807cbe864991a0d1d3b Moving parameter manipulation into its own file
2041a23a2ed58c7115bc8a942ee40efda0b72324 [riscv] Wrap ASM_OUTPUT_LABELREF in do {} while (0)
211bea6b40bfa457a9e8619cf653227206736e76 GCOV: introduce global vector of functions
4464b9772d6f2fe927a47f3a3e120ce5938fbfdf GCOV: introduce vector for function_info::counts.
f804ba3e12e03dc1d0130b0ab7e9a792b4892d24 RISC-V: Add Jim Wilson as a maintainer
3ef9e1ec4bcd859fca2e8b80739ec5d98618bb23 altivec.h (vec_xst_be): New #define.
00fa28d1b471a3aca9994a21363ce3f58b6bd2f2 tree-vect-loop-manip.c (vect_do_peeling): Do not use scale_bbs_frequencies_int.
efeee67f4c9fd021d2594e0271c84b7e90e63d3d Set default to -fomit-frame-pointer
c261ba2c8b4244128528f964192ca4f4edf1eef5 Tweak vector::_M_realloc_insert for code size
3d7f09de5a5a4e74fdc25d8f7e2756410383d149 Add nds32 vector modes.
19a30b7123aa90caf7de3e9ec588266e218f8028 vec.h (debug_helper): New function.
f370e36dc9aba0a5cafa4e6fac893b49acbfb6e8 re PR c++/82781 (Vector extension operators return wrong result in constexpr)
ee1c213355f0f9d33568c5118f318f22057d1454 RISC-V: Implement __umulsidi3, umul_ppmm and __muluw3
1af4ebf5985ef2aaac13862654044d84a3cd7ae4 New POINTER_DIFF_EXPR
866e4d3853ccc0bc61e3764911d2a0f69c281f0c PR libstdc++/48101 improve errors for invalid container specializations
a76ef9c5a8447bf3e90ed832ef1286cda205e115 PR83004: Accidental change to pr81136.c for VECTOR_BITS==128
16d24520af1ad5ff832d243f177d88f08a1ba012 Replace REDUC_*_EXPRs with internal functions.
ce95abc41e998c8d1e1b2112a634d5a6cdd9ede0 C/C++: fix quoting of "aka" typedef information (PR 62170)
15b6695ac534148a10dd5a5f266bf2e49316dc32 re PR tree-optimization/82402 (error: SSA_NAME_OCCURS_IN_ABNORMAL_PHI should be set)
5e9d6aa4c2fd245837ec26de1d01ee8eb7786af3 Remove Cilk Plus support.
f7300fff74becf365cdadd23c9447521da852e84 re PR tree-optimization/83202 (Try joining operations on consecutive array elements during tree vectorization)
08539f3e949c37dcfe6e128d78c527db47cc609d Riscv patterns to optimize away some redundant zero/sign extends.
a52206ae28ed3e55d601118bedd52739456401ab re PR tree-optimization/83202 (Try joining operations on consecutive array elements during tree vectorization)
fb0e72c8c06acbc30759e707d807c35758c6961c Cleanup riscv option docs.
fb607032b8009d141409b8dc3c5e4df42c93a231 re PR tree-optimization/83232 (fma3d spec2000 regression on zen with -Ofast (generic tuning) after r255268 by missed SLP oppurtunity)
e034c5c895722e0092d2239cd8c2991db77d6d39 re PR target/78643 (ICE in convert_move, at expr.c:230)
f3abed16a01153c7a72d5795076c392cdb19c9dd Fix typos in riscv register save/restore.
fbdec14e80e9399cd301ed30340268bdc5b5c2eb re PR tree-optimization/81303 (410.bwaves regression caused by r249919)
734914b6e230b78eb6c34fbd5a2d93b1a919d36a New VECTOR_CST layout
5ebaa4774fb6de458422c660ae11f1c3b7d96262 Use tree_vector_builder instead of build_vector
059c18abcb9c88bb5a85eb3ce468ffa7252da230 Use tree_vector_builder::new_unary_operation for folding
b3def403fa7ae89679468b8f986cab7361c1034d Use tree_vector_builder::new_binary_operation for folding
abe73c3d32b68809628eaa3266bf98cb7352851c Make gimple_build_vector take a tree_vector_builder
44e1aae4dbd8198a26ab0ec5958e073e2c9cc772 Make build_vector static
63570af0b58a3c354723bc78b75d76dbb0750f47 Make more use of VECTOR_CST_ENCODED_ELT
6cb0725cdbef47a7486629b7933f51a29a591781 Add srodata section support to riscv port.
8da4c8d83b7a21127cbe464aa54c5f3e7c034feb re PR tree-optimization/81303 (410.bwaves regression caused by r249919)
becb7a366039fe2738d56017cfe9eac74a5512fd re PR tree-optimization/81303 (410.bwaves regression caused by r249919)
3a4c600f389e8c5aa6dcbd6cd14bd0c546af0bb2 Add .type and .size directives to riscv libgcc functions.
0eb952ea5eab6a299283635625cef497e831dae4 re PR lto/83338 (SPEC CPU2017 510.parest_r ICE)
4ded4b230da2408bc6752ca4e4551204bebe806b altivec.h (vec_extract_fp32_from_shorth, [...]): Add #defines.
0242c7f0aac22e47b73046b2d60bb5de68057d6a altivec-12.c (main): Add tests for vec_avg.
36f52e8f0812546e6cb533b384b29f56570624ff [SFN] boilerplate changes in preparation to introduce nonbind markers
12c667b5b449a9c86c763438fb96e6e029533fb7 re PR tree-optimization/80631 (Compiling with -O3 -mavx2 gives wrong code)
555758de9007461daa2638c1c5d5ac35ae3dd234 re PR tree-optimization/83359 (ICE in expand_LOOP_DIST_ALIAS, at internal-fn.c:2362)
c5060cadf030f6517a1552bf0fc263cb03eb96c4 [Patch combine] Don't create vector mode ZERO_EXTEND from subregs
95e5bea0012664d225a40a219f98a9cc1f7f1579 re PR target/83332 (new test case gfortran.dg/vect/pr81303.f fails (r255499))
b8d7e076ed0cf5fde5f5d875e4145d63317a6180 Use C version of multi3 for RVE support.
b72805798ac456709eef4a761b84dd1c4a5780e6 re PR middle-end/83415 (ICE during gimplification of assignment to read-only vector)
be4c1d4a42c5c7dc8bffbc5c9e3250f02be0d922 Add VEC_DUPLICATE_EXPR and associated optab
9adab579d59ea50eeb6877df2292d9d5c7b20e3e Add VEC_SERIES_EXPR and associated optab
8fcc61f8964aa9aa2e6fc08cb961f9dc2a5add77 poly_int: IN_TARGET_CODE
b4d43553e9353de4fefb3a1fde1277eeb1bad7be poly_int: mode query functions
d43568222a4564e22a6ffd370481e11ba031b318 PR tree-optimization/83239 - False positive from -Wstringop-overflow
bcfaa720a25d9f3bc760a993ee1d949f68e777ef re PR ipa/81877 (Incorrect results with lto and -fipa-cp and -fipa-cp-clone)
58cc7d798875aee798ba6a5b07c9324717160a2c re PR c++/83300 (Segmentation fault with template and __attribute__((vector_size (sizeof(int) * N)));)
497742efce59a3296461199c16bbc520154d0e2e re PR tree-optimization/80631 (Compiling with -O3 -mavx2 gives wrong code)
36fd64086542ed734aded849304723218fa4d6fd poly_int: tree constants
74c74aa05ee8757210dfb16f6198024e6dc445d5 poly_int: DWARF locations
fc60a41612bad379060969b6ed3a78eb160aae8a poly_int: extract_bit_field bitrange
91914e56a5e952cc87468bdd6d006e51eaa54294 poly_int: SUBREG_BYTE
f37fac2b74df114c5b3e9c8a3be2cad9acd3f4ca poly_int: get_inner_reference & co.
e7301f5fcbfa649beb05da1e3508db7fc7c4d26b poly_int: bit_field_size/offset
aca52e6f8d29064f4712e5f3f4429a36f918f099 poly_int: MEM_REF offsets
a696bc4fec986318a1765c31ac9ee2db3849934a poly_int: loop versioning threshold
8944b5b36e04894f7a0768440e3253400c3c7857 poly_int: compute_data_ref_alignment
af2e447568c939acf8c55eea529b2ac85c5753a7 Use valid_for_const_vector_p instead of CONSTANT_P
d235d09b7c86a2955bebdcb1991cd21758bcc21b re PR middle-end/83623 (ICE: in convert_move, at expr.c:248 with -march=knl and 16bit vector bswap/rotate)
1bfb3b8bfadf6e4972db74562da5718f014a15a0 re PR tree-optimization/83581 (ICE in expand_LOOP_VECTORIZED, at internal-fn.c:2397)
4aae3cb3559802faee3b5cb58d9315dcc5000bc8 Pass vec_perm_indices by reference
7ac7e2868d450dfb9080166ddc4abcc21b86fab3 Split can_vec_perm_p into can_vec_perm_{var,const}_p
279b805713fd498afb7986698a2e3406bc947d87 Refactor expand_vec_perm
f151c9e1414c00e300c9385bc9512c3d9a481296 Remove vec_perm_const optab
6da64f1b329f57c07f22ec034bc7bc4b0dc9e87b Check whether a vector of QIs can store all indices
e3342de49cbee48957acc749b9566eee230860be Make vec_perm_indices use new vector encoding
736d0f28783f12fa042892bc186866dd5101088f Add a vec_perm_indices_to_tree helper function
d980067b1e9394b2b8482b3fc888ac5e8e3ebe59 Use explicit encodings for simple permutes
1a1c441dbe5933ebf9180831236aa5be7d70a434 Rework VEC_PERM_EXPR folding
d3867483044ae00bac6daaeac6274e95254fb991 Use vec_perm_builder::series_p in shift_amt_for_vec_perm_mask
b00cb3bfa50c5477347082a9450b4a63e4fee263 Use ssizetype selectors for autovectorised VEC_PERM_EXPRs
8eff75e0d2a3495c5bc182324644a080d47205ac Use CONST_VECTOR_ELT instead of XVECEXP
3877c560656f4961cc50952c3bba3c40812c36c3 New CONST_VECTOR layout
3d8ca53dd9b4c42b07ef974f92c3c4553cce3a79 Make more use of rtx_vector_builder
cd5ff7bc323a8fa6eafc4513bc814e4e7fa24120 Make CONST_VECTOR_ELT handle implicitly-encoded elements
f1bdc63a898f2fa164e79528c03e96a21a779e82 RISC-V: Fix for icache flush issue on multicore processors.
0f26839a0a779caa6c81d9fb3c31699f6ca86790 Add an alternative vector loop iv mechanism
d9f21f6acb3aa615834e855e16b6311cd18c5668 poly_int: vectoriser vf and uf
4b6068eadcf9801b9ef4e5f1b7b6354947c27ca8 poly_int: SLP max_units
c5126ce8cae4f14194414e266be91fdc4b756807 poly_int: vect_nunits_for_cost
9d2f08ab97bea3c299cce96a0760904501e002dd poly_int: omp_max_vf
87133c45a06aa9c04cb6bc13b3b0733ec43efcec poly_int: get_mask_mode
86e3672871beff63eebb195642566224c9f80891 poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECTOR_SIZES
9031b367ac87550552318f6516487c70f3ce9a99 poly_int: vector_alignment_reachable_p
e54dd6d3a791536543d4769aa09508b89d882f37 poly_int: vectorizable_reduction
9fb9293aca4ddbe4d11a334befaa7847b279ed39 poly_int: vectorizable_induction
fa780794692994d63febf4fb187567e245cdd4ee poly_int: vectorizable_live_operation
4d694b27c3697f7eef16a17eb926076bf836575a poly_int: vectorizable_load/store
c7bda0f40e1ddd9fc2c347fafeab93350be036f8 poly_int: vectorizable_call
cf1b2ba4ea9ee4b27e341c3f704416dc77d7172f poly_int: vectorizable_simd_clone_call
062d5ccc1180aa6bca717309d26408a029af1fd7 poly_int: vectorizable_conversion
a23644f23da672210ea6a443cefb7cd17111b160 poly_int: vect_get_constant_vectors
dad55d7014374121fd75112014ccadcfb9653182 poly_int: two-operation SLP
b064d4f9d6cb163da32d19cb172cbc4a5fffb39a poly_int: vect_no_alias_p
22afc2b31b75fa61b9558a9be8c8dbb7d4193b8a poly_int: tree-vect-generic.c
e112bba2fced713f1fa6c7f41c6925ee4573f215 poly_int: brig vector elements
d8f860ef70b33d0c49f31114c433b6c654c5a588 poly_int: omp-simd-clone.c
fece509bf196d58d9b31e04d816bb4ecd3f73e89 poly_int: fold_indirect_ref_1
d34457c138d06e989c871e7b295c06a8b9873703 poly_int: folding BIT_FIELD_REFs on vectors
07626e49a0ad431f8e69fcc472400780f3d98044 poly_int: expand_vector_ubsan_overflow
95fe7b4862dd3250e4d6b3e2c592b440b79613df poly_int: load_register_parameters
6b0630fbe8c34255f2739f63a8d3e5b636020bf4 poly_int: vec_perm_indices element type
0ecc2b7db7480fa33d31d95a114b024809cb6883 poly_int: vector_builder element count
16c78b665aa4ce64af71b6ac7ebaa96c9807be4c Directly operate on CONST_VECTOR encoding
b660eccf9b32ee3b962a77cf5565fa2771792c35 Add a fixed_size_mode_pod class
7b777afa955ad765500dfd53d6da990c84067197 poly_int: GET_MODE_NUNITS
edab8e10e3cc127335ae4fa7a5935a28acfae0a9 poly_int: vect_permute_load/store_chain
928686b1c6d0a8b791ec08b2588a5fb8118d191c poly_int: TYPE_VECTOR_SUBPARTS
73a699ae37a7fe98ad0b8c50ac95f5a882fd97da poly_int: GET_MODE_BITSIZE
cf098191e47535b89373dccb9a2d3cc4a4ebaef7 poly_int: GET_MODE_SIZE
5c0caeb37ff72cfd9153e164e9fd9eec7d56e969 Add support for MODE_VECTOR_BOOL
6ce12f6a1647ec2831f3c5908ecf9c23ae191d02 Allow targets to pick a vector prefix other than "V"
c6561a1af68d6439cedde6dc79d19eda9981a4be Add support for adjusting the number of units in a mode
6a3c127cc4e198bd20ae32c37c93cdf7defb0871 Improve vectorization COND_EXPR <bool op bool, ...>
799d6b901de53dcb43cea2fc10ebde9423d09c52 Improve spilling for variable-width slots
b194a722446f51ffa11ea49affe6893a6361cfac Use extract_bit_field_as_subreg for vectors
e251d3ec013bc46d58470988fc45566051a9030b Move code that stubs out IFN_MASK_LOADs
9ce4345afba69ff793ff4df992fc57ec29a92d93 Make vect_model_store_cost take a vec_load_store_type
aaeefd88f464de0a78fa66c8b5e2755babf0d47f Split mask checking out of vectorizable_mask_load_store
3133c3b628da0e39a3ae9cdbd4973de04b214589 Split rhs checking out of vectorizable_{,mask_load_}store
bc9587eb19f6407f5815d46d68325890e29f076a Split out gather load mask building
c48d2d35a122798c047ca7a0f7e0d64293023c44 Split gather load handling out of vectorizable_{mask_load_store,load}
c3a8f964ab330d8e64bb4d33c462c64f4fa35aeb Make vectorizable_load/store handle IFN_MASK_LOAD/STORE
517d489618b115219cdf8e2dc83085176a55eb7b vect-opt-info-1.c: Moved to ...
da374b5b5bb998311935ef989ed41fed1c16366e PR83675: Restore TARGET_VIS2 check for SPARC vec_perm_const
88654ce63de73fc51a47e7d54070c2c0b6b2f34b Allow VEC_PERM_EXPR folding to fail
ccf206491752abc05c608c8475bd925d3969adde Revert DECL_USER_ALIGN part of r241959
8fec4d222f0a35925bfdc4641612120b06d51c59 re PR rtl-optimization/83682 (ICE in simplify_subreg, at simplify-rtx.c:6296)
9ea52d27eca0c56c88a3941b413ef56950d9f5c3 re PR middle-end/83699 (Many 64-bit SPARC gcc.dg/vect tests FAIL)
3e1b80ff33f3a854e757fad185ee86dc30fb3e6f re PR tree-optimization/83580 (Wrong code caused by vectorization)
647c61f1c4623ec9591cb4f10dd94cff5a7b4fa8 PR target/83663 - Revert r255946
a25811c8858901fe414333c836e622257d1506c0 re PR target/83677 (PPC: The xxpermr instruction is not generated correctly)
c8a0c7b660a96081f320c8155f135a46b2202968 RISC-V: Fix -msave-restore bug with sibcalls.
7ad429a4de1197b4b032da0981a2c91ac5d0dd06 Fix permute handling when vectorising scatters
2072a319569067b9b99154e8d1bbec894034652f Mostly revert r254296
f6aa5171a1a0091bcc3741b1ffff9e8a962e728c re PR target/81616 (Update -mtune=generic for the current Intel and AMD processors)
6737facbb3c53a1f0158b05e4116c161ed9bc319 Don't use permutes for single-element accesses (PR83753)
2025a48d089d09011b60c1f5eb981ef71c79be4e re PR target/83399 (Power8 ICE During LRA with 2-op rtl pattern for lvx instruction)
8cad5b143e23668e4b59596972b2249ce2d2d637 RISC-V: Add naked function support.
1ad6e904d4fbad716bc65ac4d0bbdeecf3f552bc re PR target/83203 (Inefficient int to avx2 vector conversion)
c803b2a92822c57abf5464deaf5be5c31d8a4692 re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b right away, to be more efficient for Ryzen and Intel)
b27b31dc2d160453e7b05168f1dd195e73cb176b Fix --enable-gather-detailed-mem-stats build.
825010bb37db90c97c9409d3407c8538e3246577 Allow variable-sized temporary variables in gimplify.c
cf736b092afeabe90680443794eb384a9f930cd5 Handle poly_int vector sizes in get_vec_alignment_for_array_type
c0a465457beb663430257375ba529af74b0e4e56 Handle polynomial DR_INIT
646e47bcd15483fcafcc695efefd7a0ddeb4c716 Extra subreg fold for variable-length CONST_VECTORs
11e0322aead708df5f572f5d3c50d27103f8c9a8 Mark SLP failures for vect_variable_length
779fed5fdb6098e67213a82dfd27f5b326a75e88 Fix folding of vector mask EQ/NE expressions
695da53448dcc40e1e5db83bcf14d16217ffbd4a Give the target more control over ARRAY_TYPE modes
7e11fc7f5cecffe650b672ac1af212d4bd9f1335 Add support for masked load/store_lanes
3ea518f6f63e66e48f2d41cfa41e1efae653a484 Protect against min_profitable_iters going negative
018b2744fc7a4fe6fea1a078eae69c5465585668 Handle more SLP constant and extern definitions for variable VF
f1739b4829105fa95d6ff6244632d5977169277f SLP reductions with variable-length vectors
898f07b0458a48a87df334301ada3414ff08d3de Add support for bitwise reductions
7cfb4d93595da03abb4e6414758dc98eb7532b34 Add support for fully-predicated loops
0972596e6d2573a2c7e922c66b017974ed03ad89 Add support for reductions in fully-masked loops
c2700f7466bac153def05a0e070aa78cd2ffc0ae Allow the number of iterations to be smaller than VF
535e7c114a7ad2ad7a6a0def88cf9448fcd5f029 Handle peeling for alignment with masking
76a34e3f8565e36d164006e62f7380bfe6057154 Add an empty_mask_is_expensive hook
bfe1bb57ba4dfd78f8c1ac7d46cf27e8e7408676 Add support for vectorising live-out values using SVE LASTB
bb6c2b68d6961dfe98bece34e4418d7287ce7089 Add support for conditional reductions using SVE CLASTB
4aa157e8d2aec2e4f9e97dcee86068135e0dcb2f Allow single-element interleaving for non-power-of-2 strides
d1d20a49a788bdb82f09ada6377d932ceac07934 Use single-iteration epilogues when peeling for gaps
b781a135a06fc1805c072778d7513df09a32171d Add support for in-order addition reduction using SVE FADDA
bfaa08b7ba1b00bbcc00bb76735c6b3547f5830f Add support for SVE gather loads
ab2fc782509f934ef0cc22c31d743fcb63063c1b Use gather loads for strided accesses
429ef523f74bb85c20ba60b0f83ab7e73f82d74d Allow gather loads to be used for grouped accesses
f307441ac4d58d5a1690081f95b63b70b3e90b48 Add support for SVE scatter stores
a57776a11369621f9e9e8a8a3db6cb406c8bf27b Support for aliasing with variable strides
fc58f4ae9a4051ba6dabe08f3a243a2d97e0e80a Missing vect_double in gcc.dg/vect/pr79920.c (PR83836)
ff3cc569b2d3ba49fe6e2dc07ad761b5d9431c8a RISC-V: Increase mult/div cost if not implemented in hardware.
453ec1ad7aec7e8b9dfab8678330cc1b277f7c64 re PR testsuite/82132 (FAIL: gcc.dg/vect/vect-tail-nomask-1.c (test for excess errors) due to missing posix_memalign)
82279a515eae2b655eaba39e42e7dded25da5e2c Don't group gather loads (PR83847)
e57d9a82996838e73cc5470a1f3367e9c616b947 re PR tree-optimization/83867 (ICE: Segmentation fault in nested_in_vect_loop_p)
fb2f98bb6c5e016514bc3b93f8f1550e39e7d28f Two fixes for live-out SLP inductions (PR 83857)
84e777839cc458da2c24bda8e7be1665be1f709c vsx.md (define_expand xl_len_r, [...]): Add match_dup argument.
e423d5bc0481ee889c3fa251337978675848b0f4 RISC-V: Mark fsX as call clobbered when soft-float.
271134dd4894140542e38a4dcd8b4a07093d823a Avoid ICE for nested inductions (PR 83914)
09a7858b2c53eccf28f780f5f3e4f2764f440eb1 Check whether any statements need masking (PR 83922)
218e2a54e00f70950f441ded237cba8b07466816 re PR target/80870 (ICE building 7.1.0 sh-elf crosscompiler on macOS)
0d918596ace1f32716143a12fd2738bb0e9b2e20 fold-vec-abs-short-fwrap.c: Add xxspltib to scan-asembler valid instructions list.
97e52238b292ca744368f66980533c578838e94c Disable some patterns for fold-left reductions (PR 83965)
ef57eeb23260872cb601a848493488c24cb309c1 Fix vect_float markup for a couple of tests (PR 83888)
0ce42fe12b8e909f30bd57ab24e739d7d6218650 RISC-V: Add -mpreferred-stack-boundary option.
556d3a2433a6e2207c6f36fe292d89d81f46f924 Remove explicit dg-do runs from gcc.dg/vect (PR 83889)
b254c1a2322532451b419c8ce850ab7347f51469 Fix vect-reduc-or_[12].c changes in r257022
73598b3330377a9970f4489f5c5d517f62b51386 PR84033, powerpc64le -moptimize-swaps bad code with vec_vbpermq
5b55e6e333c97aaefc1db6c9d8411de578d05614 re PR tree-optimization/81082 (Failure to vectorise after reassociating index computation)
ee61fae2b1e8315f016384ab5b76dee796d880cd RISC-V: Add --specs=nosys.specs support.
d3f952c5e03e5eb0382e8b24fe8339728a66b922 RISC-V: Allow register pairs for 64-bit target.
7672aa9bc19e2444c3effa2f12274d60022f7d3c re PR bootstrap/80867 (gnat bootstrap broken on powerpc64le-linux-gnu with -O3)
85bb2f9a302acc28dbae6c368d63680aacb15eb1 re PR target/83008 ([performance] Is it better to avoid extra instructions in data passing between loops?)
31b6733b1628a861de4c545bff40acc97850dbbf re PR tree-optimization/81661 (ICE in gimplify_modify_expr, at gimplify.c:5638)
3ae129323d150621d216fbbcdeebf033ef82416f Use range info in split_constant_offset (PR 81635)
17855935101772b79dea35abb696f205f0215e22 fold-vec-abs-int.p9.c: Add powerpc_p9vector_ok requirement.
24fa220cffc9e6bda80d59fff6270a0d71af4ef8 vec-cmpne-long.c: Add p8vector_hw require to dg-do run stanza.
b210f45f527eb017810af815bbb97a8f6939385f re PR tree-optimization/84037 (Speed regression of polyhedron benchmark since r256644)
4253435ecaf28bfc387407dd5a2fb4f4283ed203 re PR target/84154 (PowerPC GCC 7 and 8 have regression in converting fp to short/char and returning it)
3b263f5af20f4ebb92fad0b8797fe59e3cebf828 slp-pr56812.cc: Allow either basic-block or loop vectorization to happen.
414fef4e668856edb8ca885525679c5d5e691fd1 re PR target/84278 (claims initv4sfv2sf is available but inits through stack)
fff2290073cc2d57dcade125227b74cd27c48066 Use nonzero bits to refine range in split_constant_offset (PR 81635)
b5ec4de777870e2d4ff2a5de604eafd1bf0e50df Another fix for single-element permutes (PR 84265)
ebe4bf41d2b96a6b2f1de6a184eb0a7f5c2e5d00 re PR c++/83659 (ICE on compilable C++ code: in tree_to_shwi, at tree.c:6821)
c028d589e94a67795a25763bc95b778e1480f106 vsx-vector-6-le.c: Update CPU target.
5ca8e744641e1b03cc6e4cdbc46e7ece0750240d re PR rtl-optimization/84308 (Memory leak in spread_components)
e519d2e8199746e9d2b6ef70de55f7331df5bc47 re PR fortran/84074 (Incorrect indexing of array when actual argument is an array expression and dummy is polymorphic)
b10bc0d6f9d5e281465c6f8d4197f3158e46e093 Add missing intrinsics for _mm_mask[z]_sqrt_round_[sd,ss]
85c5e2f576fd41e1ab5620cde3c63b3ca6673bea re PR tree-optimization/84037 (Speed regression of polyhedron benchmark since r256644)
78604de064490c8c12d2d4efadbd453f7c8c7685 re PR tree-optimization/84037 (Speed regression of polyhedron benchmark since r256644)
848bb6fc0e502345536b25e1a110eb7f01eccbc1 re PR middle-end/84309 (Wrong-code with -ffast-math)
9bc5ecf3bcb25abbf868d52e7db076248e0ef174 RISC-V: define _REENTRANT with -pthread
e4c1b7e32283b3886847f9e14b33bda5e5d5d448 rl78.c (add_vector_labels): New function.
43edc4f5ac0d0a679b87338043f5d6a372750533 rl78.c (rl78_attribute_table): Fix terminator and entry for "vector".
316b2a2d842eca1cf1a2f31afba946d6328c5477 Check array indices in object_address_invariant_in_loop_p (PR 84357)
7c102986d6f8205ebc3952344c64edbcd7018fbc gcc/testsuite/ChangeLog:
10789329789fbb5b87883fca029e745a06ded6a0 RISC-V: Change sp subtracts so prologue stores can compress.
be77ba2a461eefdf4a2676b19025f36ec092c598 re PR tree-optimization/84037 (Speed regression of polyhedron benchmark since r256644)
7d6ce202609bd8bcbd8618507cef32e793b477e4 re PR fortran/84381 (replace non-std 'call abort' by 'stop 1' in gfortran testsuite)
73829f90459f40d7362fc3ac2d883ac98f1670a9 re PR tree-optimization/84452 (ICE in expand_simd_clones at gcc/omp-simd-clone.c:1612)
ef7866a3f1395f16872a0d61e111660e302a674d re PR middle-end/82004 (SPEC CPU2017 628.pop2_s miscompare)
9bd958c5f361337b15958be8641d59ad38bd0a2b Fix incorrect TARGET_MEM_REF alignment (PR 84419)
b613cc2e9120ea002f8a0855d2620ee4ba8fbfe5 re PR go/84484 (libgo configure tests fail to find -latomic)
7874b7c5b59923d8a56eaf41f7518c71b910355e re PR target/81572 (gcc-7 regression: unnecessary vector regmove on compare)
6f11ddd8b7dc020545d0d0e8ae20d34b83265ff6 PR c++/84424 - ICE with constexpr and __builtin_shuffle.
8562191ad25bd094d393ef4e65b96542a14e8fab re PR c++/84556 (C++17, lambda, OpenMP simd: sorry, unimplemented: unexpected AST)
d99dcb77bbbfdaf30c5993ea917001da259f47ba Make fix for PR 83965 handle SLP reduction chains
b1ddb654aba3859e025565c0af35d1a704c8e5d0 re PR tree-optimization/84512 (Missed optimization: should be precalculated in compile-time)
e688c1ddef2462da3b0dc86e0ecdab87c77a6829 re PR target/84534 (several powerpc test cases fail starting with r257915)
962e91fcf043edab3684dd0564efd3df219d3cb1 Use loop->safelen rather than loop->force_vectorize
70088b953b22eb6a9878d272e4e2a8add136ebc8 Avoid &LOOP_VINFO_MASKS for bb vectorisation (PR 84634)
74f8705ebe6ebf42bcfb46cf1c9a26a5ab3bace8 re PR c++/84578 (ICE with flexible array member and constexpr)
b79fa2f609c70a70125c979e363176002d1f9acd re PR tree-optimization/84777 (-Os inhibits all vectorization)
0dbacfcfadec514b5ccd4ae70fe53dc589ae7439 Fix PTA info in IPA ICF (PR ipa/84658).
a7af848991809005fee685e3fe15a39110136f3e RISC-V: Add and document the "-mno-relax" option
9bb45a958d5281b3979f538a05ffa80c6833c4f7 re PR c/84853 (ICE: verify_gimple failed (expand_shift_1))
22534ea5549e970de4466fe492dacc61c2ff471f re PR target/84711 (AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.)
15f0c25f4e9194fd03b2788769b7e1163e5caabd [testsuite] Require vect_int_mult in pr84512.c
ce811fc49bb470856f6c4953c071d5b3db6485bb re PR c/84909 (typo: conversion from %qT to to %qT)
928b965f29f587bb033555f0db646c94afe8e7ef Don't try to vectorise COND_EXPR reduction chains (PR 84913)
8455b50eccdeac648fd0ebd0b7dd60b0e8bbffbb re PR target/84711 (AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.)
c0d3d1b681f7847299b2e8e14c61cf903d6ee8fd RISC-V: Fix bootstrap failure.
df1f46241d8f1869b492023c9f4e1389a12675c4 [testsuite] Add nvptx xfail to pr84512.c
91d014fffae1fcf1eb750d40e622e5b80cd1a4ec re PR target/83789 (__builtin_altivec_lvx fails for powerpc for altivec-4.c)
5a0729f5a4c323aaee60fa93a1b0823c74e32f4e Fix some libstdc++ testsuite failures
aa1c94299c2b81f7728011ada92eb7761144b854 re PR c/84999 (ICE in make_vector_type, at tree.c:9561)
a199d5e74bf37ee4306c70a03c6c58f9935d54c3 Use SCEV information when aligning for vectorisation (PR 84005)
36a4fb13d88960c9950a2a68b05321422245658a re PR testsuite/84004 (gcc.dg/vect/vect-95.c XPASSes)
b36306e9bc664cdbc2f65ecc33867cb7b6e896b3 re PR testsuite/82847 (gcc.dg/vect/slp-perm-9.c fail)
153dba6cbb3b37ad07d23d212890b2bd055ac05f re PR c++/85077 (V[248][SD]F abs not optimized to)
69c94135fc0d62a7ccb017dcc0e0b79c44d3d26e xmmintrin.h (_mm_max_pi16): Use __vector __bool instead of __vector bool.
7be6ee78d62f0fe1ea00fb6c436b535b391f6d92 re PR middle-end/85090 (wrong code with -O2 -fno-tree-dominator-opts -mavx512f -fira-algorithm=priority)
b7ef9225f7f997a37f96a3a9c2eb31533865822b RISC-V: Fix for combine bug with shift and AND operations.
c23ecd7b27ee7bdb458dacbe0a3f826b4efb4953 re PR testsuite/85154 (gcc.dg/vect/vect-95.c fail)
4304d6180adc0b3ef2c9fe2a63e829d5f518a12d re PR target/85169 (wrong code with vector member insert)
8ab30b9778a46cbf0a0853c78cd799b9afca61c5 emmintrin.h (_mm_cvtpd_epi32): Use __vector rather than vector.
f46de383ed507006d6f1d9737856ad0db81ba470 re PR tree-optimization/85191 (gcc.dg/vect/slp-perm-9.c FAILs)
628a15343e494e457c647347e879c69a62016e0c re PR c++/85146 (ICE with __direct_bases for declared but not defined struct)
61f84e25f6cbfb182bfaa4334d44f3c865c4c0b7 re PR c++/80956 (ICE with abstract class vector)
4d47fe5a8f4a7d0275237c2fb45bad8f654467eb RISC-V: Support for FreeBSD.
eda71a9eeaaf1ea16ba56d8cc5a4eb194f6025f7 re PR tree-optimization/85257 (wrong code with -O -fno-tree-ccp and reading zeroed vector member)
f0caea4872076e02cad511db85a2437317c035c1 re PR fortran/83064 (DO CONCURRENT and auto-parallelization)
eb38d071636da1ea2d0f9a068c86c7ceee2634b2 Add missing cases to vect_get_smallest_scalar_type (PR 85286)
2377345dcef913b6f957e1e27a6c82efede47cfa re PR testsuite/85190 (gcc.dg/vect/pr81196.c FAILs)
ef45fd3ba15237b751b530bff1f2691c4988d02b re PR testsuite/85190 (gcc.dg/vect/pr81196.c FAILs)
65739a688542b637b6a9f99aed2de84d9b84460c re PR tree-optimization/82965 (gcc.dg/vect/pr79347.c starts failing after r254379)
2368eaf95dff456f6527f6d82579af0246141553 re PR fortran/81773 ([Coarray] Get with vector index on lhs leads to incorrect caf_get_by_ref() call.)
34722c3669ee87bd6754d4346e12e822641b0cd7 re PR target/85080 (gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c fails starting with r248678)
035fc2add18c0dd06c22bd158a47bf35b8c1c528 RISC-V: Fix 32-bit stack pointer alignment problem.
f53e7e138cf20f1a10fbcef2c14d838f494d4610 re PR tree-optimization/85446 (wrong-code on riscv64)
19986382015e2aa8dc539bf31065af4bdff5ce84 re PR tree-optimization/84737 (20% degradation in CPU2000 172.mgrid starting with r256888)
18108d94e9aff71811a7923fe67db7626378f565 re PR tree-optimization/85467 (ICE: verify_gimple failed: non-trivial conversion at assignment with -O2 -fno-tree-ccp --param=sccvn-max-scc-size=10)
e91eba31fdc49d928090a9b0424247fd6029f044 [nvptx] Fix calls to vector and worker routines
9b922d6aaf143d35ed5f1c116f0a0702df6ae04c RISC-V: Make sure stack is always aligned during adjusting stack.
559fb136c980cd1d52af43202c3a9dc511ea2240 RISC-V: Pass --no-relax to linker if -mno-relax is present.
062c0a7b2f8dc58f8bb7c6d3448866812bfc75c1 re PR tree-optimization/85478 (ICE with single element vector)
c76d9edb09d262a3badc87d5583abcfbc2e94854 tree-vect-data-refs.c (vect_get_data_access_cost): Get prologue cost vector and pass it to vect_get_load_cost.
af1682fc3aaff288f7ac95cf5585971cef15f0ab Microblaze Target: PIC data text relative 2018-04-30 Andrew Sadek <[email protected]>
b94c2dc138c60636e3898b04c1026cbb1b868b26 Add VEC_ORDERED_REMOVE_IF
9e4da9b5d5d3d8e14ab1748fafb08c6b9bfcf629 Tighten early exit in vect_analyze_data_ref_dependence (PR85586)
d6476f90da4bfcb8644da32d3b4c4685a72bc84e re PR tree-optimization/85597 (internal compiler error: in compute_live_loop_exits, at tree-ssa-loop-manip.c:229)
27db01d8039a1a1664bcd1ebd1f66cedcfe72398 deque.tcc (deque<>::_M_assign_aux): Cast to void to ensure overloaded comma not used.
dd17274465724f65c09dc2f654d92f6ba92cd90f bb-reorder.c (sanitize_hot_paths): Release hot_bbs_to_check.
53481a280fa276a7c53e1279e3a58d7e7e736064 vsx-vector-6.h (foo): Add test for vec_max, vec_trunc.
080dc24383a602a5a4095eb05b04100f15ba1ad4 [BRIGFE] phsa-specific optimizations
93249dde869329933da091a355032c95e80daf44 Backport of RISC-V support for libffi
ad088249a266b75343cfa293ae16cc03996f3695 Tighten condition in vect/pr85586.c (PR 85654)
ec332f1b44acfdc8fd08680ea75b9f3c23626cd0 Make std::regex automata use non-debug vector in Debug Mode
90aabc7e9be942324952d8705e753ff02cf631a3 macros.h (__glibcxx_check_valid_range_at): New.
37d57ac9a636f2235f9060e84fb8dd7968abd1dc [PATCH] RISC-V: Use new linker emulations for glibc ABI.
3ba4ff4130903a3ded931d715a2204bd8834fe60 Add clobbers around IFN_LOAD/STORE_LANES
a296d6d3bdd83a617e789641b828ff53f65a4ec6 tree-vect-slp.c (vect_bb_slp_scalar_cost): Fill a cost vector.
f2410266a00a3ebd6db07007aa82333b4f6ee6c2 RISC-V: Add with-multilib-list support.
5a599c460e3846df80aaabd2b4629544337167ba re PR tree-optimization/85692 (Two source permute not used for vector initialization)
b0e01682467a22a00530704669d8c253e6dac522 Remove unused headers from tests
1f3cb66326d724cca10ac6097ab32c53191c53ff Handle vector boolean types when calculating the SLP unroll factor
68435eb293a6b9c161936bccab66e4b1f702372b tree-vectorizer.h (struct stmt_info_for_cost): Add where member.
6747254bbaba5bfdb75c7d24e2d14ffaf7cece3b vsx-vector-6-be.c: Remove file.
110fb19f6c6a4a9dfb9cfe00d3295cccf5b00507 RISC-V: Minor pattern name cleanup.
28a8a768ebef5e31f950013f1b48b14c008b4b3b re PR target/85323 (SSE/AVX/AVX512 shift by 0 not optimized away)
6a03477e85e1b097ed6c0b86c76436de575aef04 re PR target/85323 (SSE/AVX/AVX512 shift by 0 not optimized away)
eb69361d0c5e98423e7ad7a537bc3250e083de4a Allow gimple_build with internal functions
bb4e47476537f6431fbbf29cc804252b1504bbc2 re PR tree-optimization/85793 ([AARCH64] ICE in verify_gimple during GIMPLE pass vect.)
7bbce9b50302959286381d9177818642bceaf301 RISC-V: Optimize switch with sign-extended index.
09baee1ab152afb0466c00ce87f0d681f2a50e21 RISC-V: Add RV32E support.
67e9518e20b8b836bbaa9dc783bd6a4db56c2bcb re PR fortran/85841 ([F2018] reject deleted features)
4515e413cb72d3a71b41d3e85da1be03fa88677d re PR tree-optimization/85863 (ICE in compiling spec2006 fortran test case solib.fppized.f starting with r260283)
927a00917dfdf5585159803211c71910b32da10f re PR fortran/85841 ([F2018] reject deleted features)
aeaa0347e94b1dfa040809b3b098fcc0474d45f7 [Ada] Vectors: spurious error in -gnatwE mode
159440699bf6f97dccc94377d9d69e540a1904dc Fix SLP def type when computing masks (PR85853)
c453ccc2335bf4267a154c9385eb50a8c45235a1 Use canonicalize_math_after_vectorization_p for FMA folds
9d4ac06e0235697c7fa3144b6790b779e6385ea5 Add an "else" argument to IFN_COND_* functions
2c53b149b7476fabd329429b2a6dce090f580ff4 tree-vectorizer.h (STMT_VINFO_GROUP_*, GROUP_*): Remove.
0d2b3bca81acf226e6c10defbc6072de4cf7e75c Fold VEC_COND_EXPRs to IFN_COND_* where possible
8f76f377861b4195487416806c4a0eacabc433c9 Prefer open-coding vector integer division
6c4fd4a9fec0af65249a11e44341b5f3f5b209b3 Add IFN_COND_{MUL,DIV,MOD,RDIV}
8e846c6670b85cd69a5760a604d8f9ce0dbc3730 tree-vect-data-refs.c (vect_find_stmt_data_reference): New function, combining stmt data ref gathering and fatal analysis parts.
b55f342bdd8bec16b727a5889c589dd85c5ca3c3 re PR target/85832 ([AVX512] possible shorter code when comparing with vector of zeros)
27312bf2148af2bea946fcec8f4c2e1231e8d63b tree-ssa-alias.h (refs_may_alias_p): Add tbaa_p bool parameter, defaulted to true.
99dcfb5fc184d4eeb2753ae9475bda4d58266161 Fix test case failures for pdp11 target.
d0ebdd9fce00f5fbfec615d72f1dedf0cd7762a6 RISC-V: Add interrupt attribute support.
70d22cdd77fdd3a11514735a7992b5f07bd50159 re PR target/85918 (Conversions to/from [unsigned] long long are not vectorized for AVX512DQ target)
b29502e735e6eafd451a27422e5c8fe211ad0716 re PR tree-optimization/85934 (ICE: verify_gimple failed (error: type mismatch in vector pack expression))
3b1cffccce40e80eeb5f24893ce4fbd0e242b319 re PR middle-end/85933 (FAIL: gcc.dg/sso/p8.c -O3 -finline-functions (internal compiler error))
f8c0baaf31ac987bd1e85a3ba2fa8a2edeff92a8 tree-vectorizer.h (struct vec_info): Add stmt_vec_infos member.
1bda738bab8193f0fb4551672d3be928d2015cd2 re PR target/85918 (Conversions to/from [unsigned] long long are not vectorized for AVX512DQ target)
e379122d1f078d230514ff862c4f9053c2898af4 tree-cfg.c (verify_gimple_assign_unary): Add checking for VEC_UNPACK_*_EXPR.
fec0bf3084f5d5531fcdc81e13b4813db31a1750 tree-vect-data-refs.c (vect_preserves_scalar_order_p): Make sure to use non-pattern stmts for get_earlier_stmt arguments.
5af3ff21594b92c698fdc43269a0020f95a15c23 RISC-V: Fix a comment typo.
3c5d07ab057a1cbe23ca655d172bfb53581be960 [Ada] Spurious tampering check failure
57c454d29c12a948fee4a0b437fd57af870710b4 tree-vectorizer.h (vect_dr_stmt): New function.
fb289175ff675d90d5ab24e60c177e4e943d0ebe altivec-12.c (main): Fix declaration of ucz to make it consistent with the naming convention in the file.
69311919e2f67b5bcf474700dd2c1127553addcb Commit 260294 on 2018-05-16 by Carl Love was supposed to add the following files.
1fc9aa543f41a1485187c96806950795a7966974 re PR target/85832 ([AVX512] possible shorter code when comparing with vector of zeros)
8566678b9da3db996f7566ecb691be07ff376c8f Fix expand_expr_real_1 handling of BLKmode bitfield references
fd1e52dc252b33f918891458774f784e96fdf47e RISC-V: Don't clobber retval when __builtin_eh_return called.
1b58c736db9d28975f596f5175c9f9470723c166 re PR target/63177 (Powerpc no-vfa-vect-depend-2.c and no-vfa-vect-depend-3.c failures)
ec74725ce3ed5c96783b76992940d99563c82a47 RISC-V: Add interrupt attribute modes.
1ac2bdb45faaa455afcb3b77eb824dde429c27fb Port IPA CP to edge_clone_summaries.
4af78ef8695b08bd9b7061b350631d2ca5682470 Convert dump and optgroup flags to enums
adff928a6d5fba623c579898cb92077abc970443 vsx-vector-6-be.p7.c: Rename this file to vsx-vector-6.p7.c.
a14175560cca5da1f9ff776c5c7309473397d43d Define special members as defaulted
058872eaadac43dcf75839ba6b951619fea14fe1 p8vector-builtin-3.c: Add vec_pack test.
87cbbc45a950f382853e2e4cf494cdfab62f0e5b libgo: add riscv and js/wasm as known targets
8fd966327ae16a820143f589dd48b8c17a6f6ae5 Tighten LRA test for reloading the inner reg of a paradoxical subreg
7b76867b211f2db8df2f98926ef47fb8c9ea29ee tree-vect-patterns.c (vect_recog_vector_vector_shift_pattern): Properly set vector type of the intermediate stmt.
4c1d999a7e937da0d417e8153f54b646603bb210 PR libstdc++/83982 fix exception-safety guarantee of std::vector::resize
fa6852317327d978d4069175952109505204f6ae re PR tree-optimization/86159 (g++ ICE at -O1 and above on valid code: incorrect type of vector CONSTRUCTOR elements)
d1ac60d5759dc63e4f03311d6c85cda8c9d12133 tree-vect-slp.c (vect_slp_bb): Dump MSG_OPTIMIZED_LOCATIONS here, also noting vector size used.
8422c296a8cbe0317fd06aace694ed0c01f67d5b [testsuite] Remove xfail from vect-abs-compile.c
adac3a685da705d6811d4069f57e1bc73a95a957 Introduce DUMP_VECT_SCOPE macro
df0aef6d7e755b5150ddd8fe8fa4209461541cf0 re PR tree-optimization/86179 (ice in get_later_stmt, at tree-vectorizer.h:1108)
5b04d77ed52bb0317f9793bc95a1ec0370571f35 tree-vectorizer.c (try_vectorize_loop_1): Split out of ...
d54a098e48987e7368ff190b703efd72aba9e6d9 [1/n] PR85694: Allow pattern definition statements to be reused
e3947d809d75c6bc47e600ce490c238006c2de2b [2/n] PR85694: Attach a DEF_SEQ only to the original statement
ed7b8123fab1de4d6da98774262c123f6d1226f9 [3/n] PR85694: Fix dummy assignment handling in vectorizable_call
44ae7a002c23ff0ab884350b5f05876ece985387 [4/n] PR85694: Remove redundant calls to types_compatible_p
1f78617090283f22825807fcc0533e27e983dcde [5/n] PR85694: Remove dead WIDEN_SUM handling
259273074e86ec82c73a4420c102912de6baeabd [6/n] PR85694: Add a vect_get_internal_def helper
49d8df1b95ac68fee5420a4ad7a0cab006302e0e [7/n] PR85694: Add a vect_pattern_detected helper
1cbfeccc8d5ddade3a1727e18fe31c1e83e81701 [8/n] PR85694: Make patterns check for target support
5fa234669f3882aa2190c916df497259153412e4 tree-data-ref.c (dr_step_indicator): Handle NULL DR_STEP.
31dd69b7ff60979b615e45229f759613873989e6 Update OpenACC testcases
84ee432143874a776a5597f77615db3f39cb7c58 altivec-7.c: Add qualifiers for counts on AIX versus Linux.
8c9632905d39afc3c431d0ff4d318d15c9250344 tree-vect-data-refs.c (vect_check_gather_scatter): Fail for reverse storage order accesses rather than asserting they cannot...
f2227a6696f136a181a208d291eb44769a7721e0 tree-vect-data-refs.c (vect_find_stmt_data_reference): Modify DR for SIMD lane accesses here and mark DR with (void *)-1 aux.
ca823c85882f5a0ca9779d8cd7adfcec02549d3b tree-vectorizer.h (struct vec_info_shared): New structure with parts split out from struct vec_info and loop_nest from...
3685dcd7fb618b8dc7c7352a76a55efa959aae84 PR libstdc++/86292 fix exception safety of std::vector<InputIterator> constructor
9ae91886f6a59fbcba0559299e170ee82fa592cb re PR tree-optimization/86287 (AddressSanitizer: heap-use-after-free on bootstrap with -O3)
4f5b9c803ac4edc639d8bf4a827ba40e4dab4db0 Introduce dump_location_t
d5e545a7cc2c9d5e5ed4534e8f7901723ded4d89 fold-vec-neg-int.p8.c: Specify powerpc_p8vector_ok requirement for this test.
356d53635faecee4b8abfc6b21208432c72eebff Add test case that was supposed to be added in commit 255556 on 2017-12-11.
c2fd033cdf1876ff4ec91c747c6fc569de19b322 tree-vect-data-refs.c (vect_analyze_data_ref_dependences): Assert compute_all_dependences succeeds.
6475e077a091ea57b7442ed35feaf031728bdeb2 dumpfile.c: add indentation via DUMP_VECT_SCOPE
894dd753ca8a4120078324cc6cf0ba01afff9cab [9a/n] PR85694: Reorder vect_is_simple_use arguments
0f8c840c28c11b13e630b55ad3dc6e0670b4f817 [9b/n] PR85694: Make vect_is_simple_use look through pattern statements
7b98e98a98c95029434200cdfc5ad87e204d79b4 [10/n] PR85694: Split out check for vectorizable associative reductions
41949de9de0c8ebabb7adb2701e775ecd671aa72 [11/n] PR85694: Apply pattern matching to pattern definition statements
003479340f5ae6b7407b5c92e3e1915101552377 [12/n] PR85694: Rework detection of widened operations
3330053ecaafe8bca82cc3845be9b2d01a614eb1 [13/n] PR85694: Try to avoid vectorising casts of invariants
666fdc46bc848984ee7d2906f2dfe10e1ee5d535 RISC-V: Add patterns to convert AND mask to two shifts.
d379ac227de025d1d44d43ae0bf892f63e4a324b Fix typo in vect_recog_widen_shift_pattern
eb153f07b3618de080b778ffff5693d94bf785b4 RISC-V: Fix interrupt support for -g.
30f502eddecac8ecfbec4b86f3a80f1859076b6d tree-vect-stmts.c (vect_is_simple_use): Consolidate dumping, always set *dt.
3239dde94019f11e6c1a8c6ae2b3f7d944689148 Avoid matching the same pattern statement twice
370c2ebe8fa20e0812cd2d533d4ed38ee2d37c85 [14/n] PR85694: Rework overwidening detection
4ef79c960aa0967cf0298dc496a30a40d86ebd3c [15/n] PR85694: Try to split existing casts in widened patterns
0267732baeb06ec100c1d610197bb88aae1c5123 [16/n] PR85694: Add detection of averaging operations
ba9728b0349aa6dbfae020b283ed8ca9f073bf1f Clean up interface to vector pattern recognisers
9c58fb7aa5e719a3ce9acd94740371e139c035be Ensure PATTERN_DEF_SEQ is empty before recognising patterns
776bfceac8ba24bacd1e76fc768e9b2b10c0e81c Pass more vector types to append_pattern_def_seq
25d861fef34b44f720de813410f29096d4406b02 Remove "note: " prefix from some scan-tree-dump directives
315aadc8642b72fc2d7172312a35e18074cca85b stl_algobase.h (__niter_wrap): New.
15333be70addf4eb750d82d5e298cd3ad33b711a re PR tree-optimization/85694 (Generation of vectorized AVG (Average) instruction)
c98446bc37da231419f6524d788dc6a4712458c8 [testsuite] Remove 'note:' from scan-tree-dump directives
d6e5a37a0402177713e9496f0d852e2e1147437f Correct subreg no-op handling for big-endian vec_select.
09cff37bfdcc9407a72262cbdd6fd3350488d934 Replace NO_IMPLICIT_EXTERN_C with SYSTEM_IMPLICIT_EXTERN_C.
edace3e2295db80d32b1a77676a3697c5029d71b RISC-V: Add support for riscv-*-*.
8660e7908fb884b5a0dda37f937ecced3da16070 Require sse for testcase on i686.
6cd6119c421211c989f53f6d4e457d7523bdacf5 Makefile patches from initial RISC-V cross/native build.
7cf2b955893a333c6f6e4c60427832e97dd2bff7 RISC-V: Initial riscv linux Ada port.
962b3564e98b2634a2d001eceb946d8f15f9bfae re PR target/84711 (AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.)
4a669ac35988fa6de5931455fb59c713563bc58b tree-vrp.c (vrp_int_const_binop): Change overflow type to overflow_type.
11fcb8f2a69bfdeeafc4b0594b71b85d4e285242 RISC-V: Finish Ada port.
100291de48d70d56f8ec31e8ba8d9edd1ee95b45 re PR fortran/86421 (OpenMP declare simd linear ref in module causes gfortran to bail out)
6a86928d9882c17b7526d657a38cb314fa0aaba6 Extend tree code folds to IFN_COND_*
b41d1f6ed753bf7ae7e68f745e50c26ee65b5711 Add IFN_COND_FMA functions
0936858f081b77319f8f6e5825dc86d2861d0445 Support fused multiply-adds in fully-masked reductions
2c58d42c3ed599b4c2976fc173eefd8e016ea216 Use conditional internal functions in if-conversion
5249ee4d79855edda91b26bb07c9c8737cdfc96c Implement SLP of internal functions
8528f27bda0fd315eef48827c10a9c488071ceb3 RISC-V: Error if function declared with different interrupt modes.
ac07bbf29aefd11bd0786d954592a424ccf3dfc5 RISC-V: Silence expected Ada testsuite warning.
12af29ab10fb5677cf947bcd7530c5f57c97522e RISC-V: Fix nested function trampolines.
e6de53356769e13178975c18b4ce019a800ea946 Clean up of new format of -falign-FOO.
eb5926451a7873a62de7ef02cba9f671bad14b88 re PR target/86557 (missed vectorization with std::vector compared to icc 18)
ef856020de21b5e66e0aaec2d2b186817ae2829b PR bootstrap/86621 - 'alloca' bound is unknown in tree-vect-slp.c:1437:16
651a79532c8e87ac096419d9852a295f9e284fe4 re PR target/86591 (gcc.target/powerpc/builtins-1.c fails starting with r261904)
ed623edb473d862673fc0bbc6b878074667ca5fb Avoid &LOOP_VINFO_MASKS for bb vectorisation (PR 86618)
e8dce850a7ffcffff4690f62f85e0ed4ede4d82a Fix ceil_log2(0) (PR 86644)
e98edc20cd615f43afce32c5de40d59fa25e40ed optimize std::vector move assignment
2b69e93cd1af407becc58ba5c48252af20d35e44 Remove dg-require-cstdint directive from tests
4cdfee3f206d784f8a502af4f34180a0762df4fe [libgomp, nvptx] Handle per-function max-threads-per-block in default dims
0847049dc7a630e4bfa079767ed42c742ff6276b [01/46] Move special cases out of get_initial_def_for_reduction
ac1359be3a39f4d12342c98c2a2e77bd59a839f4 [02/46] Remove dead vectorizable_reduction code
6e2dd807c2aaaba8906a36766b9f98dfbeddc27d [03/46] Remove unnecessary update of NUM_SLP_USES
83a400d0a57c998508c31389286d6fb427985139 [04/46] Factor out the test for a valid reduction input
79cc8302f73a56dd1e84e87a26d35ed7e5bfea53 [05/46] Fix make_ssa_name call in vectorizable_reduction
4fbeb36361aab0c197c01f6268e442446f2c1fa8 [06/46] Add vec_info::add_stmt
6585ff8f3a55bbfed6a4f2c2addac7a27ed087d3 [07/46] Add vec_info::lookup_stmt
c98d05955ba54fcdbae37f2a9e81b8cca6f1ca59 [08/46] Add vec_info::lookup_def
0d0a4e205bb6da84e9218c483acf7b13453f0698 [09/46] Add vec_info::lookup_single_use
dbe1b846648fad29d105e2e503120a4279a32593 [10/46] Temporarily make stmt_vec_info a class
fef96d8e2a370e826acdf914d51c88aa2657340a [11/46] Pass back a stmt_vec_info from vect_is_simple_use
e1bd72966309ac459a55e2bc64ad355272d402f5 [12/46] Make vect_finish_stmt_generation return a stmt_vec_info
10681ce8cb6227ae5c11cc74ddf48f2fc5e6f87e [13/46] Make STMT_VINFO_RELATED_STMT a stmt_vec_info
1eede195fc02f5198b48d75b3fb7705c4c1493dd [14/46] Make STMT_VINFO_VEC_STMT a stmt_vec_info
16edaeb8a6b1cd72b2eedfe8cac684ac3f4785c2 [15/46] Make SLP_TREE_VEC_STMTS a vec<stmt_vec_info>
542ad08cea053ac4a02729e2f37c67bb50019bc0 [16/46] Make STMT_VINFO_REDUC_DEF a stmt_vec_info
32c91dfcfddc4f3c594aa24e803ee605a259f2a9 [17/46] Make LOOP_VINFO_REDUCTIONS an auto_vec<stmt_vec_info>
b978758186fa187d52d2c4a02cdc8474d361a0dd [18/46] Make SLP_TREE_SCALAR_STMTS a vec<stmt_vec_info>
78e02b3bbb00fc898c550b88161838eb5dd95806 [19/46] Make vect_dr_stmt return a stmt_vec_info
bffb8014d0566af64c3cd5c7afac21c125a14df2 [20/46] Make *FIRST_ELEMENT and *NEXT_ELEMENT stmt_vec_infos
f698fccf099a69415619858062431c9383caf070 [21/46] Make grouped_stores and reduction_chains use stmt_vec_infos
c26228d41bcbb1a8027570cbef7a2c00ed75f2d6 [22/46] Make DR_GROUP_SAME_DR_STMT a stmt_vec_info
7bcbf2d83269394899f27695e19715dca8f098bf [23/46] Make LOOP_VINFO_MAY_MISALIGN_STMTS use stmt_vec_info
211ee39b9d1d7d670dd4885bd1f4f038680a1e90 [24/46] Make stmt_info_for_cost use a stmt_vec_info
95c68311b61f6bbb013d0eb2e4403f01c76bf622 [25/46] Make get_earlier/later_stmt take and return stmt_vec_infos
beb456c375ea71d57e35400e9b7107e09e996965 [26/46] Make more use of dyn_cast in tree-vect*
91987857e694109fa312c9d2d83785aee5fb9c28 [27/46] Remove duplicated stmt_vec_info lookups
86a91c0a7d39103bc26f6a9f6cd0b329c9027161 [28/46] Use stmt_vec_info instead of gimple stmts internally (part 1)
a1824cfdcd12f2c928b2aa00278082c56e818497 [29/46] Use stmt_vec_info instead of gimple stmts internally (part 2)
eca52fdd6c570658e417ab38d25e0874d0c9c044 [30/46] Use stmt_vec_infos rather than gimple stmts for worklists
825702749aee7017548db2075cf225a6ed2e3ca8 [31/46] Use stmt_vec_info in function interfaces (part 1)
32e8e429c685629fc4363138f564f41de47aa7a2 [32/46] Use stmt_vec_info in function interfaces (part 2)
d7609678843a0711cf77b5530149658c3997a906 [33/46] Use stmt_vec_infos instead of vec_info/gimple stmt pairs
e4057a3920490abb69bb22237ebe380ac4fd64f5 [34/46] Alter interface to vect_get_vec_def_for_stmt_copy
cef6cac8bcacc3314760686dfae7b23efdf7db07 [35/46] Alter interfaces within vect_pattern_recog
634e7150449157267db1a1152370b11446acb6d0 [36/46] Add a pattern_stmt_p field to stmt_vec_info
f44fb7aa84e0c1f9c0721a69f7b0f157d6058686 [37/46] dr_aux tweaks
89fa689a9e898ccb81b966477b3ac4e254461b05 [38/46] Use dr_vec_info to represent a data reference
1e5e6ff5e63127a7a6ae4ee64d08a22a41a021c4 [39/46] Change STMT_VINFO_UNALIGNED_DR to a dr_vec_info
f5ae28565e7b0788c6b7a4945c2b67c54f46c45a [40/46] Add vec_info::lookup_dr
b5b56c2a039cd308a9d00fc35baf65c1fb59070b [41/46] Add vec_info::remove_stmt
9d97912b85ac4a86767f4f1b6c47efa1ce0ba6af [42/46] Add vec_info::replace_stmt
458135c0354f19eb2bd032d42c27076def8c31de [43/46] Make free_stmt_vec_info take a stmt_vec_info
6ef709e50228eb23c25d3620ac6eadb6d765d40d [44/46] Remove global vinfo_for_stmt-related routines
dddecc5c01a0cdeb06704ed98eac881ead550664 [45/46] Remove vect_stmt_in_region_p
ddf98a96d0112377361258068a167ba7e51ed345 [46/46] Turn stmt_vec_info back into a typedef
047fba343dc9fba211a10058bc423c6373cc57f8 Fix over-widening handling of COND_EXPRs (PR 86749)
99615cf595266cdbe27fb3caf201fa38bd1f8d8b [01/11] Schedule SLP earlier
8fe1bd30e6e1319cde10ed417abbfe87d3511edc [02/11] Remove vect_schedule_slp return value
b0b45e582f31b496ea37a76a20b1f79b25165635 [03/11] Remove vect_transform_stmt grouped_store argument
211cd1e2358d52d3863f727b650c65650dd5ce89 [04/11] Add a vect_orig_stmt helper function
6e6b18e5fbe6be62334c9007a58224fb3700d43a [05/11] Add a vect_stmt_to_vectorize helper function
2d4bca81bd7dceb0701e5cd87132d8e3892c22ba [06/11] Handle VMAT_INVARIANT separately
beeb6ce8631cd0e23160dbbafd5f43d16a749e02 [07/11] Use single basic block array in loop_vec_info
41b6b80e1a70f3731a45d991a83c5bc4a7f73ea4 Fix remove_stmt in vectorizable_simd_clone_call (PR 86758)
a19f98d5defb7a173725e89b1fed532c66561f61 Fold pointer range checks with equal spans
ca9a1314ec5f2b58921e24abdcebae1482c0e2c6 xcoff.c (struct xcoff_line, [...]): Remove.
0246112a9d59b22cc06165b6586b8dc0d76b72a1 Handle SLP of call pattern statements
1ae45251d9fb6b68046cbe1c6f942e1aacdeaf0a [Ada] Partially revert "Makefile patches from initial RISC-V cross/native build."
4c9291262affd31e66dec1c8af607e07a8ce2904 Fix gcc.dg/vect/no-section-anchors-vect-69.c on SPARC etc. (PR tree-optimization/80925)
4beb66421fe0e19d3310c75af3502018119423c6 Fix invalid assumption in vect_transform_stmt (PR 86871)
3dec9a89d480616a4c11454f4ef4030d15a49773 Restore flow_bb_inside_loop_p tests (PR 86858)
b8d5e148f669d56ccfd294dc396daba607237cdb Allow inner-loop reductions with variable-length vectors
1fc9d0b0e4657b29ff140fa03dca1711aa5a1198 Define aliases for containers using polymorphic_allocator
68d235936bff881b22b6f9a8ab4446c225064454 backport: ffi.c (ffi_call_go, [...]): New functions.
b8eac4d06438eb3dfe3c7d88b4b5b16ee0f9816b Fix experimental::pmr typedefs and add tests
c0c1235622280db4a55cd86daa176b08b72f1210 Merge Ignore and Deprecated in .opt files.
6f795a9239f6029072ac83357e8966c56cd572e0 Formatted printing for dump_* in the middle-end
3ad3b3ac8c3eae606897ceba5811760f030fdac1 Only test STMT_VINFO_STRIDED_P for the first statement in a group
203942b8af64926d787b4a545184866f9572978d Make the vectoriser drop to strided accesses for stores with gaps
3a4da26602da1bd30c4ff2793fed480f180248c1 [1/2] Fix bogus double reduction (PR 86725)
18bc19a7aa4cd08d45d64f6741b8b1e0f48f262b [2/2] Fix bogus inner induction (PR 86725)
e9afbed0d65d7546b05cce3d5b5229b0046933ed re PR libstdc++/68222 (_Safe_iterator provides operators the wrapped iterator can't actually support)
af55b3af33f0a35fecd2117a43ee93468925e98c PR libstdc++/78448 limit vector::max_size and deque::max_size
f73a5316b6f76fa62979c29f4ec3620bf821dca0 Fix tests that fail in C++98 mode
568d5ee44d1d6897a9b7750a3934d4539e1a7ded Define debug mode function for C++98
429ca5b4809f0109ccd84984477b436cd35b677c tree-vect-data-refs.c (vect_grouped_store_supported): Fix typo "permutaion".
ab7e60cec1a6f4185b0428f3a2b3e71df0bae533 Handle SLP permutations for variable-length vectors
8c2f568c9a8375927efede4bfc83d6553da7f9a2 Avoid is_constant calls in vectorizable_bswap
f5cd4f8ceb89596be02801cd11e8dbf78fb10014 Define vect_perm for variable-length SVE
9ca2ac699ab2eee4ef6a2904426fa38f58af5a0b Forward declare debug containers so std::pmr aliases work
acf6214eacc97d0779e73c7ab6539ecb3dd1d524 diagnostics: tweaks to line-spans vs line numbering (PR 87091)
e7289cb45d094d9c538dc978c3fc0ae18e4752bd re PR rtl-optimization/87065 (combine causes ICE in trunc_int_for_mode)
df308f8160051f72679981d45ccbabe6b3f25396 diagnostics: show an extra line of context in line-insertion fix-it hints (PR 87091)
85204e23e2fed09fc07159ab5607e0b760269561 Less verbose fix-it hints for missing header files (PR 87091)
efc3a1a101184a73718bcb034e530e57cd65a543 re PR tree-optimization/86927 (Gcc miscompiles at -O3 on valid code)
463a9e0d31351d1b97f98da03cacb0b1867edad5 Add target selectors to slp-37.c (PR87078)
efc601240c12628df7ec467ac07a322306f80b71 Rewrite pic.md to improve medany and pic code size.
9d36bd3b1763035447bf201542545e8b5dcf962d altivec.md (altivec_eq<mode>): Remove star.
7efe0dd0b43db1ac5070908290a3febfcfb73513 Fix vector::_Temporary_value::_M_ptr
888157af3ef730e1e66c5e84ade11036a09d2205 re PR bootstrap/87225 (tree-vect-stmts.c:3748 error: converting to 'bool' from 'std::nullptr_t' requires direct-initialization [-fpermissive])
3c2a8ed0d9a56a45a67f87c5fa3a093c6852e62b dump_printf: use %T and %G throughout
508a909eca536f7f6a60af9bd7ecea761bd2e8f1 Add missing alignment checks in epilogue loop vectorisation (PR 86877)
2d2ee18641557deba692c286cbc2d8751310f697 Fix PEELING_FOR_NITERS calculation (PR 87288)
512cc0151207de4c7ff3a84f040f730fe0d52458 Remove arc profile histogram in non-LTO mode.
edaaef601d0d6d263fba87b42d6d04c99dd23dba Use vectored writes when reporting errors and warnings.
75902396e6dbed2a3cacb42452992db156c6f32f RISC-V: Fix problems with ilp32e ABI support.
ad117173a0d8a5412bc2b9fb99e2c9b1cb4036af RISC-V: Fix weak symbols with medany and explicit relocs.
01414d53cf3c062ca821de9ae48ba4c3db7d8ad7 RISC-V: Add missing negate patterns.
2bd4ca7ad508ec9b94f8c3442a6e39d5276d7915 Simplify vec_merge according to the mask.
ed2d9d3720adef3a260b8a55e17e744352a901fc dumpfile.c: use prefixes other than 'note: ' for MSG_{OPTIMIZED_LOCATIONS|MISSED_OPTIMIZATION}
041bfa6f07787752743e8c32c7a75a47015ba65a Fix caching of tests for multiple variant runs and update existing target-supports tests.
eb471ba379597d73fcd79986cca5b8351a32770a Add support for SVE stack clash probing.
057cf66ca3d290e0f68f66eba0e43379cb77f870 No a*x+b*x factorization for signed vectors
86920074bfc4f6319edce71b7a11e49417599f0c vector<bool> _M_start and 0 offset
6bd2b8ec8dddadce2fff21c2f22a71192a2e4e43 re PR target/87474 (ICE in extract_insn, at recog.c:2305)
119b4963ea4f68e88eb496f0efcb450e1fbbbe9b RISC-V: Add macro for ilp32e ABI. Cleanup white space.
7db960c5b6adad2fd11789870aa514985ea0da04 Add -fopt-info-internals
f4ebbd243f887b3c5e01c65ad80a8f64a8261e61 Report vectorization problems via a new opt_problem class
808d8de5a2325bc04709e953328c3377493b0557 constraints.md ("C"): Do not depend on TARGET_SSE.
1fcbfb00fc675ee33b90ae486f3acb5916c93400 RISC-V: Fix -fsignaling-nans for glibc testsuite.
8656dafa39de8e537940433220e8f5db3bf7a614 Don't ICE on vectors of enums (PR 87286)
269ba95042e9fa35f6fa4c8270339bb932e8f7e9 tree-vect-loop.c (vect_compute_single_scalar_iteration_cost): Open a dump scope.
c885142a15687c39f6f46c23d7c40afc817ff7a9 tree-vectorizer.c (dump_stmt_cost): Fix cut&paste missing replacements.
6cdd5aecfb4e062354db8f7253240a371ba418af sse.md (reduc_plus_scal_v8df, [...]): Merge into pattern reducing to half width and recursing and pattern terminating...
1c070612117bce2b8ca4230007c1a62778de75b5 re PR c/87286 (ICE on vectors of enums)
7be65e79f68d862f912de22f1c2c61f31ae8e722 re PR target/87573 (error: could not split insn since r264877)
422a9f77892599ecf8e498d0e5e32b1db3cab559 PR libstdc++/87544 limit max_size() to PTRDIFF_MAX / sizeof(T)
2045ae1d3f511717c2a1223148ce63f71800e1dd Elide repeated RTL elements.
4b186707ee29b3189728731adf0ebdd2e620a26d vector (vector<>::cbegin()): Use C++11 direct initialization.
0df7c778ed50095a0c4b266b4beb8b783de832a8 re PR tree-optimization/87022 (miscompilation with -ftree-loop-distribution)
4124119974fd87380de607a6bc9bfdcffe1702d8 [PR87563][AARCH64-SVE]: Don't keep ifcvt loop when COND_<OP> ifn could not be vectorized.
b57d432bdd7d16e552c24ef80777eb27ecb1f973 Fix tests that fail when compiled without optimisation
7702ab653a903d5131bf72244ae22424ffd2e6c7 revert: [multiple changes]
294973a49751a7fc2d6a7a9f2749ce851a368c04 Simplify subreg of vec_merge of vec_duplicate
aff3ce41c4abecead6d05a0422d912468d2c893c Call simplify_gen_subreg to simplify subreg of vec_merge
28dd75a330e7cc929a6be489ea3c252dd4a8bd8a Limit mask of vec_merge to HOST_BITS_PER_WIDE_INT
6d2648763a1b8a74a85d04139c5d1391056810fa re PR tree-optimization/87657 (SLP ICE in libgfortran matmul_i2_vanilla)
92bab15297a57121317df803c9c688955af30722 Fix testsuite failures due to extra errors in strict dialects
f3245887551932de6aba1aa3e9f911b78a57b5ef Skip tests for GNU extensions when testing with strict mode
fe7f972d6ecc1f1df34f15615b7e3dea6f39e564 Enable AVX512 memory broadcast for FMSUB
5d9c5a966810fdedb072c7fef148bac21a075c14 emmintrin.h (_mm_movemask_pd): Replace __vector __m64 with __vector unsigned long long for compatibility.
36bbc05db8ef71811a7b925bbb862d0b1c3b5b89 Add a fun parameter to three stmt_could_throw... functions
ddec5aea567a131daf0c5741d676d6f4a68ca45d Index...
bc37759a51631f667d1728336c3662751f69b5ba re PR tree-optimization/86144 (GCC is not generating vector math calls to svml/acml functions)
34873d4c8e78350ef17e603efe592c46e225a637 tree-vect-stmts.c (vect_analyze_stmt): Fix typo in comment.
1cab645d3e321132dca5e43d9d5057c60852a17c re PR tree-optimization/87105 (Autovectorization [X86, SSE2, AVX2, DoublePrecision])
bf32992748c9849c38c089477d04b546e43ccdd1 re PR tree-optimization/87665 (gcc HEAD (svn: 265340) breaks elements on resize)
be43a8877e2f2f4590ba667b27a24a0cfdf8141d re PR tree-optimization/87105 (Autovectorization [X86, SSE2, AVX2, DoublePrecision])
28d2dc757edb6728d1a0f706ffc308aadbd082fc emmintrin.h (_mm_cvtpd_epi32): Change deprecated __vector long to __vector long long.
7852940e7bbeae3c40cdc6c61356099216bde688 re PR tree-optimization/87665 (gcc HEAD (svn: 265340) breaks elements on resize)
0f317ef76269a989ae751a808f946d15b740baf9 Relocation (= move+destroy)
303d8f779266535269e443f2fa65a3170a742ff4 tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Initialize ng to silence error with release checking bootstrap.
71c3949eeae32f0c242fa00c48be998b13cfdd7a emmintrin.h (_mm_sll_epi64): Remove wrong cast.
7ea4b8ed7b960e25d81c14842f7458e9f29c2042 re PR tree-optimization/87746 (ICE in vect_update_misalignment_for_peel, at tree-vect-data-refs.c:1035)
a1f072e2441c58f6a486f90bb9a32bd5f6c51cb4 re PR tree-optimization/87105 (Autovectorization [X86, SSE2, AVX2, DoublePrecision])
4bfcf87914b412f8fa56cd46f7c3081365b7e647 tree-vect-slp.c (vect_mark_slp_stmts): Add visited hash_set and wrapper.
b4c522fabd0df7be08882d2207df8b2765026110 Add D front-end, libphobos library, and D2 testsuite.
881eaae68818cab0b3419482586174582c348ed7 48101_neg.cc: Remove dg-prune-output 'std' from regex pattern for versioned namespace...
5d8c32cb86043e388fddc9833d9c2cd90ed05284 re PR tree-optimization/87785 (ICE in dr_misalignment, at tree-vectorizer.h:1245 on 454.calculix with -Ofast and -flto)
6c7e3b1fe2889136348984edeca7f9ae71d40027 re PR tree-optimization/87790 (ICE in vect_get_vec_def_for_operand_1, at tree-vect-stmts.c:1475)
266ef3613ea80da937a9fc782eb5c3ae8dcabb8f re PR tree-optimization/87785 (ICE in dr_misalignment, at tree-vectorizer.h:1245 on 454.calculix with -Ofast and -flto)
22e4f1fb6cda89074fa82ba70dfd757fb9ead5f0 re PR tree-optimization/87800 (CPU2006 416.gamess failed to build with LTO)
c397f267f1d0e8ea286904bc5543829b558e154f PR libstdc++/87784 fix dynamic_bitset::push_back
0321d9fac6eff34ef1cd91610a59070d0e9ff54d PR libstdc++/87809 avoid invalid expressions in exception specifications
187cea947e54d08eaed2587edeb49a5cc1fe8d6a re PR testsuite/87802 (g++.dg/vect/slp-pr87105.cc fails starting with r265522)
aac1c11ce4edd9c2e6af7e9ee8abcaba98d8741f [ARC] Add BI/BIH instruction support.
00e6775a5faa43702e96e315e7a1c22297983f2a Fix vector memory statistics.
733441e2e1d207a1ab0a4a255dea03ee7c6c8774 re PR tree-optimization/87873 (ICE: verify_gimple failed (error: incompatible types in PHI argument 0))
d8564d453161dc5302445d00b0e24b0b9c48206f re PR tree-optimization/87889 (CPU2000 177.mesa failed to build)
bfb9d79805753fd6cc69bb114b5c6597269f3e21 tree-vect-slp.c (vect_slp_bb): Move opening of vect_slp_analyze_bb dump-scope ...
8ae8bad7e558ce916c52e91a4e1879557f287bbc Add support for Loongson MMI instructions.
5a951baaf1b789281bf62b852d24a4ab8cf3e714 re PR tree-optimization/87914 (gcc fails to vectorize bitreverse code)
1c8badf66bec4e0ff73ae24bf4f8cabbef8c137a tree-data-ref.h (lambda_int): New typedef.
222cfefa7199b70e62df020c4768840b4434ac7f Update soft-fp from glibc.
536ecfc44b1fd2db67f669e9bb4c388b13d12045 neon.md (div<mode>3): New pattern.
1dd6990226fd92adf1e3c12a96c5776ec8efcb60 re PR tree-optimization/87621 (outer loop auto-vectorization fails for exponentiation code)
89939ff85a7c2ed0c1eb33e51d241f2a6dda0695 re PR c/87953 (asan: stack-buffer-overflow in vectorizable_reduction)
213fd71709e40dbcf601f765e80a56b1c624e4a8 PR libstdc++/87787 fix UBsan error in std::vector
be2b68e4cd63e50f4dd5fca247b9a919fb0013a0 re PR tree-optimization/87962 (ICE in vect_get_vec_def_for_operand_1, at tree-vect-stmts.c:1485)
ca31798e7bf8f87d78ff1ee66c120b135a1b2ebc [PATCH][GCC] Make DR_TARGET_ALIGNMENT compile time variable
41b32876b8a0b8c19b35b768f942bdad1f96f893 re PR tree-optimization/87931 (ICE in vectorizable_reduction, at tree-vect-loop.c:6193 since r265876)
bbeeac91f96bdcbc3eb40ec68c1fd8cf5d4a038d Ensure that dump calls are guarded with dump_enabled_p
53467b5543100b84ad1bb2392efd989639f01eca re PR tree-optimization/86991 (ICE in vectorizable_reduction, at tree-vect-loop.c:6919)
f711908bf61e39432965db84ed12424cc6f251e1 re PR tree-optimization/87974 (ICE in vect_get_vec_def_for_stmt_copy)
9989a43983116c05aca5c3b5fc30191524b73b94 [Ada] Update signal constants for GNU/Linux
e81d464cafa9815e64674a2e3b3e9d0e5eac6b31 re PR tree-optimization/87985 (Compile-time and memory hog w/ -O1 -ftree-slp-vectorize)
22692f3ce9d00eac18d5582de90dda5ae5c07c77 re PR tree-optimization/88031 (ICE in vectorizable_reduction, at tree-vect-loop.c:6953)
1ec7f4929a286da7aa03d413a0fe99c9c36be915 Handle vectors that don't fit in an integer.
d11be094c716885475a4a1562a967e4a127ecece re PR tree-optimization/87546 (Gcc miscompiles at -O3 on valid code)
b579523b7bcd02739e6f06fe21a7ac6eb24dd6ec RISC-V: Fix epilogue unwind info with fp and single sp adjust.
4cb3570c8c453a830589b717d8519daa31ec7468 re PR tree-optimization/88071 (ICE: verify_gimple failed (error: dead STMT in EH table))
1fd319753c90f05e026e16c2c83af8f1c6687a5f Disable unrolling for loops vectorised with non-constant VF
8c944c97a2e5a264779ad1d448f97319f471275a tree-vect-stmts.c (vectorizable_condition): Do not get at else_clause vect def for EXTRACT_LAST_REDUCTION.
98f08eb8939735c1e9cbc1ec5cadebe79e935c90 c-parser.c (c_parser_has_attribute_expression): New function.