From a00e16118003a1e3fef0bc036d0ac42f6d81a48b Mon Sep 17 00:00:00 2001 From: Cai Luoshan Date: Thu, 22 Aug 2024 11:38:41 +0800 Subject: [PATCH] Param: fix hasRVA23CMO config --- src/main/scala/coupledL2/CoupledL2.scala | 2 +- src/main/scala/coupledL2/L2Param.scala | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/main/scala/coupledL2/CoupledL2.scala b/src/main/scala/coupledL2/CoupledL2.scala index cbc27150..c8eace6b 100644 --- a/src/main/scala/coupledL2/CoupledL2.scala +++ b/src/main/scala/coupledL2/CoupledL2.scala @@ -77,7 +77,7 @@ trait HasCoupledL2Parameters { def hasTPPrefetcher = prefetchers.exists(_.isInstanceOf[TPParameters]) def hasPrefetchBit = prefetchers.exists(_.hasPrefetchBit) // !! TODO.test this def hasPrefetchSrc = prefetchers.exists(_.hasPrefetchSrc) - def hasRVA23CMO = false + def hasRVA23CMO = cacheParams.hasRVA23CMO def topDownOpt = if(cacheParams.elaboratedTopDown) Some(true) else None def enableHintGuidedGrant = true diff --git a/src/main/scala/coupledL2/L2Param.scala b/src/main/scala/coupledL2/L2Param.scala index 1cfcd13c..ecb7f3a3 100644 --- a/src/main/scala/coupledL2/L2Param.scala +++ b/src/main/scala/coupledL2/L2Param.scala @@ -104,6 +104,8 @@ case class L2Param( elaboratedTopDown: Boolean = true, // env FPGAPlatform: Boolean = false, + // CMO + hasRVA23CMO: Boolean = false, // Network layer SAM sam: Seq[(AddressSet, Int)] = Seq(AddressSet.everything -> 0)