x86_64v2-specific kernels and packages

[hilga007]

Greetings!

As you can see below, my CPU is set apart from v1 by having SSE4.2, F16c, and AVX. It seems it could benefit (and others with v2) by having at least an x86_64v2 compiled cachoys and cachyos-lto kernel! Other packages would be nice as well. Especially for low-end laptops and thin clients with chips like this! Brings about a massive rebirth already, even more with optimizings.

This is quite a feature distinction from x86_64v1 cores, including even the Core 2 Duo T9900 that has up to SSE4.1.

Keeping base-level support for x86_64 is of course, important too.

  CPU op-mode(s):        32-bit, 64-bit
  Address sizes:         40 bits physical, 48 bits virtual
  Byte Order:            Little Endian
CPU(s):                  4
  On-line CPU(s) list:   0-3
Vendor ID:               AuthenticAMD
  BIOS Vendor ID:        AMD processor
  Model name:            AMD E2-3800 APU with Radeon(TM) HD Graphics
    BIOS Model name:     AMD E2-3800 APU with Radeon(TM) HD Graphics     FFFF CPU @ 1.3GHz
    BIOS CPU family:     71
    CPU family:          22
    Model:               0
    Thread(s) per core:  1
    Core(s) per socket:  4
    Socket(s):           1
    Stepping:            1
    CPU(s) scaling MHz:  100%
    CPU max MHz:         1300.0000
    CPU min MHz:         800.0000
    BogoMIPS:            2595.19
    Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp l
                         m constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx 
                         f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt topoext perfctr_nb bpext perfctr_llc hw_p
                         state proc_feedback ssbd vmmcall bmi1 xsaveopt arat npt lbrv svm_lock nrip_save tsc_scale flushbyasid decodeassists pausefilter pfthreshold over
                         flow_recov
Virtualization features: 
  Virtualization:        AMD-V
Caches (sum of all):     
  L1d:                   128 KiB (4 instances)
  L1i:                   128 KiB (4 instances)
  L2:                    2 MiB (1 instance)
NUMA:                    
  NUMA node(s):          1
  NUMA node0 CPU(s):     0-3
Vulnerabilities:         
  Gather data sampling:  Not affected
  Itlb multihit:         Not affected
  L1tf:                  Not affected
  Mds:                   Not affected
  Meltdown:              Not affected
  Mmio stale data:       Not affected
  Retbleed:              Mitigation; untrained return thunk; SMT disabled
  Spec rstack overflow:  Not affected
  Spec store bypass:     Mitigation; Speculative Store Bypass disabled via prctl
  Spectre v1:            Mitigation; usercopy/swapgs barriers and __user pointer sanitization
  Spectre v2:            Mitigation; Retpolines, STIBP disabled, RSB filling, PBRSB-eIBRS Not affected
  Srbds:                 Not affected
  Tsx async abort:       Not affected

NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL SETS PHY-LINE COHERENCY-SIZE
L1d       32K     128K    8 Data            1   64        1             64
L1i       32K     128K    2 Instruction     1  256        1             64
L2         2M       2M   16 Unified         2 2048        1             64

[sirlucjan]

Unfortunately, we do not plan to support x86_64_v2. We have support for x86_64_v3, we want to introduce support for x86_64_v4 in the coming weeks, and we are not able to offer more - we are limited by time, human resources, money. I am very sorry that you will feel disappointed, but unfortunately fulfilling your request is not possible.

[ptr1337]

Hi,

Also in testings with the kernel using x86-64-v2 did really not bring any big performance improvement. When I have tested this around 2 years ago, it was under 1 %, so there is really not a reason to provide it.

We are focusing to provide an avx512 repository in the next month.